Urban rail transit LTE-M interface monitoring data acquisition device based on FPGA

Abstract

The invention discloses an urban rail transit LTE-M interface monitoring data acquisition device based on an FPGA, and relates to the field of urban rail transit. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device comprises an FPGA data path module and an external interface module, and the FPGA data path module comprises an IP data packet capture unit, an IP data packet analysis unit, an IP data packet processing unit, a storage unit and a network transmission unit. The external interface module comprises a first network interface and a second network interface, the first network interface is used for connecting a mirror image port of the LTE core switch, and the second network interface is used for connecting a data analysis workstation. According to the FPGA-based urban rail transit LTE-M interface monitoring data acquisition device, a one-way data transmission path and a physical isolation mechanism are constructed through FPGA hardware logic, the risk that an external network invades an LTE-M core network through the acquisition device is completely eradicated, and the network security of a CBTC signal system is guaranteed.

Description

Technical Field

[0001] This invention relates to the field of urban rail transit, and in particular to an FPGA-based monitoring and data acquisition device for urban rail transit LTE-M interface. Background Technology

[0002] LTE-M is widely used in my country's urban rail transit sector to carry CBTC signaling system services, operating in the 1785–1805MHz frequency band. Each subway line typically constructs two redundant LTE networks, A and B, to provide a reliable channel for bidirectional data transmission between trains and the ground signal control center, ensuring operational safety. To monitor the data transmission status of the LTE-M system carrying CBTC services in real time, existing LTE-M interface monitoring systems mostly use general-purpose servers. By connecting to the core network switch of the LTE-M system, they capture and store CBTC service-related IP data packets and LTE-M system S1 interface-related signaling data packets in a port mirroring manner for subsequent analysis, potential hazard identification, and fault diagnosis.

[0003] However, due to the strict network security requirements of the rail transit CBTC signaling system, and the port mirroring data acquisition method used in the existing interface monitoring, traditional security isolation devices such as firewalls cannot be connected between the switch mirror port and the data acquisition server. This results in the inability to implement effective security isolation at the network boundary between the server side and the LTE-M core network side, posing a risk that external networks may intrude into the LTE-M core network through the acquisition server (thus affecting the safe operation of the CBTC signaling system). This lack of security isolation has become a core pain point that the existing technology urgently needs to address. Summary of the Invention

[0004] The purpose of this invention is to provide an FPGA-based urban rail transit LTE-M interface monitoring data acquisition device to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: an FPGA-based urban rail transit LTE-M interface monitoring data acquisition device, comprising an FPGA data path module and an external interface module;

[0006] The FPGA data path module includes an IP packet capture unit, an IP packet parsing unit, an IP packet processing unit, a storage unit, and a network transmission unit;

[0007] The external interface module includes a first network interface and a second network interface. The first network interface is used to connect to the mirror port of the LTE core switch, and the second network interface is used to connect to the data analysis workstation.

[0008] The device uses a general-purpose FPGA chip that supports a 1000Mbps Ethernet interface and parallel logic. The general-purpose FPGA chip is a Xilinx Artix-7 series chip or an Altera Cyclone V series chip. It is programmed into dedicated functional firmware through a hardware description language to realize the capture, parsing, rule filtering, caching and external transmission of the mirror data stream.

[0009] The FPGA data path module constructs a one-way data transmission path from the LTE-M core network to the data analysis workstation. It only receives the mirror data stream from the LTE-M core network and transmits it to the data analysis workstation. There is no reverse data transmission channel, and the physical layer circuits of the first network interface and the second network interface have no direct electrical connection. Data isolation is achieved through the internal logic of the general-purpose FPGA chip.

[0010] Preferably, the device further includes a management and support module, which includes a power management unit and a central management unit, respectively used to realize the device's power supply management, configuration management and operation and maintenance support functions.

[0011] Preferably, the hardware description language is VerilogHDL or VHDL, and the hardware logic circuit of the dedicated functional firmware includes parallel processing logic and state machine parsing logic. The state machine parsing logic sets seven core states: idle, preamble_detect, SFD_detect, ethernet_header_parse, vlan_process, ip_header_parse, and transport_header_parse. The state machine parsing logic realizes the layer-by-layer parsing of network packets through state transition conditions, including frame structure field matching and data length verification.

[0012] Preferably, the IP packet capture unit captures complete network packets from the mirror port of the LTE-M core network switch through the first network interface and marks each packet with a time tag.

[0013] Preferably, the IP packet parsing unit uses a state machine algorithm to parse network packets layer by layer, sequentially completing the determination of the preamble and start-of-frame delimiter, Ethernet header parsing, optional VLAN tag identification and processing, IP header parsing and transport layer header parsing, and extracting the feature data of source address, destination address and protocol field and transmitting them to the IP packet processing unit.

[0014] Preferably, the IP packet processing unit filters out the CBTC service data packets and LTE-M system S1-MME signaling data packets of the LTE-M core network SGi interface according to preset rules, re-verifies and encapsulates them together with time tags, and then transmits them to the storage unit for caching. The network transmission unit sends the data packets in the storage unit to the data analysis workstation through the second network interface according to the TCP protocol.

[0015] Preferably, the external interface module further includes a programming maintenance port. The central management unit connects to an external operation and maintenance workstation through the programming maintenance port, receives preset rules and stores them in a whitelist. The preset rules are stored in the non-volatile memory of the central management unit in XML format, supporting online and offline updates. The update process does not affect the continuity of data acquisition services.

[0016] Preferably, the storage unit uses DDR3 SDRAM with a capacity of not less than 2GB and a read / write speed of not less than 1600Mbps as cache, and is configured with NAND Flash with a capacity of not less than 32GB as persistent storage for storing historical configuration data and key logs.

[0017] Preferably, the external interface module further includes a power interface. The power management unit has voltage conversion, electrical isolation and voltage protection functions, and works with the power interface to realize external power supply and provide a stable operating voltage for each unit of the device.

[0018] Preferably, the external interface module also includes an LED status indicator. The LED status indicator is used to provide feedback on the power-on status, link status, and operation and working status of the acquisition / storage. In conjunction with the self-test function of the central management unit, a solid green light indicates that the self-test is normal, a flashing red light indicates a fault, and the LED status indicator flashes 3 times when the rule configuration is successful.

[0019] The technical effects and advantages of this invention are as follows: By constructing a unidirectional data transmission path and physical isolation mechanism through FPGA hardware logic, the risk of external networks intruding into the LTE-M core network through the acquisition device is completely eliminated, ensuring the network security of the CBTC signal system; at the same time, the FPGA hardware processing mode has high-speed parallel characteristics, providing a foundation for real-time data processing, and the device is small in size and low in power consumption, making it suitable for on-site deployment requirements in rail transit. Attached Figure Description

[0020] Figure 1 This is a diagram of the overall architecture of the present invention;

[0021] Figure 2 This is an architecture diagram of an embodiment of the present invention.

[0022] In the diagram: 1. IP packet capture unit; 2. IP packet parsing unit; 3. IP packet processing unit; 4. Storage unit; 5. Network transmission unit; 6. Power management unit; 7. Central management unit; 8. Power interface; 9. Programming and maintenance port; 10. First network interface; 11. Second network interface; 12. LED status indicator. Detailed Implementation

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0024] This invention provides, for example Figure 1 The illustrated FPGA-based urban rail transit LTE-M interface monitoring data acquisition device includes an FPGA data path module and an external interface module.

[0025] The FPGA data path module includes an IP packet capture unit 1, an IP packet parsing unit 2, an IP packet processing unit 3, a storage unit 4, and a network transmission unit 5;

[0026] The external interface module includes a first network interface 10 and a second network interface 11. The first network interface 10 is used to connect to the mirror port of the LTE core switch, and the second network interface 11 is used to connect to the data analysis workstation.

[0027] The device uses a general-purpose FPGA chip that supports a 1000Mbps Ethernet interface and parallel logic. The general-purpose FPGA chip is either a Xilinx Artix-7 series chip or an Altera Cyclone V series chip. It is programmed into dedicated functional firmware through a hardware description language to achieve the capture, parsing, rule filtering, caching and external transmission of the mirror data stream.

[0028] The FPGA data path module constructs a one-way data transmission path from the LTE-M core network to the data analysis workstation. It only receives the mirror data stream from the LTE-M core network and transmits it to the data analysis workstation. There is no reverse data transmission channel. Furthermore, the physical layer circuits of the first network interface 10 and the second network interface 11 are not directly electrically connected. Data isolation is achieved through the internal logic of the general-purpose FPGA chip.

[0029] The device uses general-purpose FPGA chips such as Xilinx Artix-7 series or Altera Cyclone V series that support 1000Mbps Ethernet interfaces and parallel logic, and is programmed into dedicated functional firmware using Verilog HDL or VHDL hardware description languages. After the first network interface 10 receives the mirrored data stream from the mirror port of the LTE core switch, the IP packet capture unit 1 captures the data stream, which is then parsed by the IP packet parsing unit 2 and filtered by the IP packet processing unit 3 according to rules. The data is then buffered in the storage unit 4 and transmitted to the data analysis workstation through the network transmission unit 5 and the second network interface 11. The entire data transmission process is only from the LTE-M core network to the data analysis workstation, with no reverse data transmission channel. Furthermore, the physical layer circuits of the first network interface 10 and the second network interface 11 are not directly electrically connected, and data isolation is achieved through the internal logic of the general-purpose FPGA chip.

[0030] By constructing a unidirectional data transmission path and physical isolation mechanism through FPGA hardware logic, the risk of external networks intruding into the LTE-M core network through the acquisition device is completely eliminated, ensuring the network security of the CBTC signal system. At the same time, the FPGA hardware processing mode has high-speed parallel characteristics, providing a foundation for real-time data processing. Moreover, the device is small in size and low in power consumption, making it suitable for on-site deployment requirements in rail transit.

[0031] Furthermore, the device also includes a management and support module, which includes a power management unit 6 and a central management unit 7, used to realize the device's power supply management, configuration management and operation and maintenance support functions, respectively.

[0032] The power management unit 6 connects to an external power supply through the power interface 8 to achieve voltage conversion, electrical isolation and voltage protection, providing a stable operating voltage for each unit module of the device such as the IP packet capture unit 1 and the IP packet parsing unit 2; the central management unit 7 connects to an external operation and maintenance workstation through the programming maintenance port 9 to receive operation and maintenance configuration instructions, complete device parameter configuration, rule management and operation status monitoring, and provide configuration management and operation and maintenance support for data acquisition services.

[0033] Furthermore, the hardware description language is VerilogHDL or VHDL. The hardware logic circuit of the dedicated functional firmware includes parallel processing logic and state machine parsing logic. The state machine parsing logic sets seven core states: idle, preamble_detect, SFD_detect, ethernet_header_parse, vlan_process, ip_header_parse, and transport_header_parse. The network data packets are parsed layer by layer through state transition conditions, which include frame structure field matching and data length verification.

[0034] The FPGA chip is programmed using VerilogHDL or VHDL hardware description language, enabling dedicated functional firmware to form a hardware circuit containing parallel processing logic and state machine parsing logic. The state machine parsing logic sets seven core states: idle, preamble_detect, SFD_detect, ethernet_header_parse, vlan_process, ip_header_parse, and transport_header_parse. When parsing network data packets, it sequentially completes the parsing of each layer of the data packet based on state transition conditions such as frame structure field matching and data length verification.

[0035] Furthermore, the IP packet capture unit 1 captures complete network packets from the mirror port of the LTE-M core network switch through the first network interface 10 and marks each packet with a time tag.

[0036] IP packet capture unit 1 establishes a connection with the mirror port of the LTE core switch through the first network interface 10, detects the network data stream output by the mirror port in real time, accurately captures complete network packets, and automatically marks each captured packet with a unique timestamp to record the packet capture time.

[0037] Furthermore, the IP packet parsing unit 2 uses a state machine algorithm to parse network packets layer by layer, sequentially completing the determination of the preamble and start of frame delimiter (SFD), Ethernet header parsing, optional VLAN tag identification and processing, IP header parsing, and transport layer header parsing, and extracting the feature data of source address, destination address, and protocol field and transmitting them to the IP packet processing unit 3.

[0038] Furthermore, the IP packet processing unit 3 filters out the CBTC service data packets and LTE-M system S1-MME signaling data packets of the LTE-M core network SGi interface according to preset rules, re-verifies and encapsulates them together with time tags, and then transmits them to the storage unit 4 for buffering. The network transmission unit 5 sends the data packets in the storage unit 4 to the data analysis workstation through the second network interface 11 according to the TCP protocol.

[0039] Furthermore, the external interface module also includes a programming maintenance port 9. The central management unit 7 connects to the external operation and maintenance workstation through the programming maintenance port 9, receives preset rules and stores them in the whitelist. The preset rules are stored in the non-volatile memory of the central management unit 7 in XML format, supporting online and offline updates. The update process does not affect the continuity of data acquisition services.

[0040] External maintenance workstations connect to central management unit 7 via programming maintenance port 9. Maintenance personnel import preset rule files using dedicated configuration software. After verification, central management unit 7 stores the preset rules in XML format in its own non-volatile memory whitelist and distributes them to IP packet processing unit 3. The whitelist supports real-time online updates via maintenance workstations and offline updates via USB storage devices. Neither update mode affects the continuity of data collection services.

[0041] Furthermore, storage unit 4 uses DDR3 SDRAM with a capacity of no less than 2GB and a read / write speed of no less than 1600Mbps as cache, and is also configured with NAND Flash with a capacity of no less than 32GB as persistent storage for storing historical configuration data and critical logs.

[0042] Furthermore, the external interface module also includes a power interface 8. The power management unit 6 has voltage conversion, electrical isolation and voltage protection functions. It works with the power interface 8 to provide external power supply and provide a stable operating voltage for each unit of the device.

[0043] After the power interface 8 is connected to the +48VDC external power supply, the power management unit 6 converts the input voltage to the working voltage required by each unit module of the device, while realizing electrical isolation and voltage protection to prevent external voltage fluctuations or interference from damaging the internal circuits of the device, and providing a stable and safe power supply for all unit modules such as IP packet capture unit 1 and IP packet parsing unit 2.

[0044] Furthermore, the external interface module also includes an LED status indicator 12, which is used to provide feedback on the power-on status, link status, and operation and working status of the acquisition / storage. In conjunction with the self-test function of the central management unit 7, a solid green light indicates that the self-test is normal, a flashing red light indicates a fault, and the LED status indicator 12 flashes 3 times when the rule configuration is successful.

[0045] The overall process of the FPGA-based urban rail transit LTE-M interface monitoring data acquisition device includes the following steps:

[0046] Step 1: Device Initialization Process

[0047] Power supply access: Connect to a +48VDC external power supply through power interface 8. Power management unit 6 activates voltage conversion, electrical isolation and voltage protection functions to provide stable operating voltage for all modules such as IP packet capture unit 1, IP packet parsing unit 2, and central management unit 7.

[0048] Self-test activation: The central management unit 7 automatically starts the self-test program to comprehensively test the operating status of core components such as the FPGA data path module.

[0049] Status feedback: LED status indicator 12 provides real-time feedback on self-test results. A solid green light indicates that all modules have performed normally in the self-test, while a flashing red light indicates that a fault exists.

[0050] Rule loading: After the self-test passes, the central management unit 7 reads the pre-stored XML format whitelist rules and configuration parameters from its own non-volatile memory and sends them to the IP packet processing unit 3.

[0051] Ready and ready: After completing the rule loading, the device enters the data acquisition ready state, waiting for the data stream to be accessed from the mirror port of the LTE-M core network switch.

[0052] Step 2: Data Acquisition, Processing, and Transmission Flow

[0053] Mirror data capture: IP packet capture unit 1 connects to the mirror port of the LTE-M core network switch through the first network interface 10 to detect and capture complete network packets in real time, and automatically marks each packet with a unique timestamp.

[0054] Packet parsing layer by layer: The captured data packet is transmitted to IP packet parsing unit 2. This unit starts the state machine algorithm and, based on the jump conditions such as frame structure field matching and data length verification, sequentially completes the preamble and SFD determination, Ethernet header parsing, optional VLAN tag processing, IP header parsing and transport layer header parsing, and finally extracts feature data such as source address, destination address and protocol field, and transmits it to IP packet processing unit 3.

[0055] Rule filtering and classification: IP packet processing unit 3 filters valid data according to the whitelist preset rules issued by central management unit 7, filters CBTC service packets of LTE-M core network SGi interface by source / destination address, identifies SCTP packets by protocol field and filters out S1-MME signaling packets, and removes invalid data.

[0056] Verification, encapsulation, and caching: IP packet processing unit 3 re-verifies and encapsulates the filtered valid data packets along with timestamps, and then transmits them to storage unit 4; storage unit 4 implements real-time caching through DDR3 SDRAM to ensure that data is not lost in high-throughput scenarios.

[0057] Data transmission to external systems: Network transmission unit 5 reads cached data from storage unit 4 and transmits it stably to data analysis workstation via the second network interface 11 according to the TCP protocol, providing high-quality data for subsequent hazard identification and fault diagnosis.

[0058] Step 3: Configuration Management and Rule Update Process

[0059] Connecting to the maintenance workstation: The external maintenance workstation can be connected to the central management unit 7 via the programming maintenance port 9, supporting direct connection via USB cable or USB storage device connection.

[0060] Rule import and verification: Operation and maintenance personnel import preset rule files through dedicated configuration software. The preset rule files contain features such as source address, destination address, and protocol type. The central management unit 7 verifies the configuration file.

[0061] Rule storage and distribution: After successful verification, the rule is stored in the non-volatile memory of the central management unit 7 in XML format, and is simultaneously distributed to the IP packet processing unit 3 to update the whitelist; when the configuration is successful, the LED status indicator 12 flashes 3 times to confirm.

[0062] Flexible update mode: Supports both online and offline updates, and neither mode interrupts data acquisition services.

[0063] Step 4: Maintenance and Troubleshooting Process

[0064] Operational status monitoring: LED status indicators provide real-time feedback on the device's power-on, link connection, data acquisition / storage / transmission, and other operational statuses, facilitating intuitive judgment by on-site maintenance personnel.

[0065] Log reading and analysis: Operation and maintenance personnel can read historical configuration data and key logs stored in NAND Flash of storage unit 4 through configuration software. Key logs include the number of collected data packets, parsing success rate, rule hit count, and abnormal alarms.

[0066] Fault location and handling: If problems such as data transmission interruption or parsing failure occur, locate the cause of the fault through the log and carry out targeted maintenance or configuration adjustment.

[0067] Example: See attached document Figure 1 -Appendix Figure 2 As shown, this embodiment is applied to the LTE-M vehicle-to-ground transmission system of a subway. This line adopts a dual-network redundancy architecture (A and B). This embodiment takes network A as an example. The LTE-M system operates in the 1785–1805MHz frequency band, carrying critical data transmissions such as CBTC signaling system control commands and train status information. To achieve LTE-M interface monitoring and core network security isolation, this acquisition device is deployed. It meets the real-time acquisition requirements of CBTC service data and signaling data, and also constructs a security boundary through FPGA hardware logic, adapting to the limited deployment space and low power consumption requirements of the subway equipment room.

[0068] The system deployment architecture is shown below:

[0069] The data acquisition device is deployed in the LTE-M interface monitoring system, and the overall application scenario is divided into three core components:

[0070] CBTC signaling system: includes an application server, generates train control commands and receives train status information, and interacts with the LTE-M vehicle-to-ground transmission system through a communication link;

[0071] LTE-M vehicle-to-ground transmission system: includes base station controller (BBU), RRU base stations along the track and core network switch. The RRU base station provides radio coverage along the track. The train onboard terminal communicates with the RRU via radio. The core network switch has a mirror port to output the data stream to be monitored.

[0072] LTE-M Interface Monitoring System: Includes this acquisition device and a data analysis workstation. The acquisition device is connected to the mirror port of the core network switch through the first network interface 10, connected to the data analysis workstation through the second network interface 11, connected to the external operation and maintenance workstation through the programming and maintenance port 9, and connected to the field power supply through the power interface 8.

[0073] The workflow of the data acquisition device is as follows:

[0074] Step 1: Device Connection and Power Supply Guarantee

[0075] The data acquisition device of the present invention accesses the mirror port of the core network switch of the LTE-M vehicle-to-ground transmission system through the first network interface 10 to acquire the data stream to be monitored; it accesses the field power supply through the power interface 8, and the power management unit 6 completes the voltage conversion, electrical isolation and voltage protection to provide a stable operating voltage for all modules such as the IP packet capture unit 1 and the IP packet parsing unit 2, ensuring that the device operates reliably in the complex power supply environment of rail transit.

[0076] Step 2: Data Acquisition and Processing Link

[0077] Packet capture: IP packet capture unit 1 monitors the data flow output from the mirror port of the core network switch in real time through the first network interface 10, accurately captures complete network packets, and automatically marks each packet with a time tag to record the capture time, providing a time reference for subsequent fault tracing;

[0078] Packet parsing: The captured network packets are transmitted to IP packet parsing unit 2, which parses the packets layer by layer and extracts key feature data such as the source address and destination address of the packets, providing a basis for subsequent data filtering.

[0079] Rule filtering and data screening: The IP packet processing unit 3 uses a preset whitelist as the filtering criterion to screen the parsed packets, retaining only valid data that conforms to the whitelist rules, such as CBTC service packets of the LTE-M core network SGi interface and S1-MME signaling packets of the LTE-M system. Invalid data that does not conform to the rules is directly discarded. The whitelist rules are imported from the external operation and maintenance workstation through the programming maintenance port 9, verified by the central management unit 7, stored in its non-volatile memory, and then sent to the IP packet processing unit 3. Successful configuration can be indicated by the LED status indicator 12.

[0080] Data caching and transmission: After the IP packet processing unit 3 re-verifies the filtered valid data with timestamps, it transmits it to the storage unit 4 for temporary caching to avoid data loss in high-throughput scenarios; subsequently, the network transmission unit 5 reads the cached data from the storage unit 4 and transmits it stably to the data analysis workstation through the second network interface 11 according to the TCP protocol, providing high-quality data for subsequent hidden danger identification and fault diagnosis.

[0081] Step 3: Security Isolation Features

[0082] The data acquisition device of this invention is based on FPGA chip design. Its internal hardware logic circuit only constructs a one-way data transmission path from the LTE-M core network to the data analysis workstation, without a reverse data transmission channel. Furthermore, the physical layer circuits of the first network interface 10 and the second network interface 11 have no direct electrical connection. Data isolation is achieved through the internal logic of the FPGA, so that there is no IP path between the data analysis workstation and the LTE-M core network switch. The data analysis workstation cannot access the LTE-M core network on the other side of the device, completely eliminating the risk of external networks intruding into the core network through the acquisition device, and meeting the network security protection requirements.

[0083] Step 4: Equipment Status Monitoring and Maintenance

[0084] During device operation, LED status indicator 12 provides real-time feedback on the working status such as power-on, link connection, and data acquisition / storage, making it easy for on-site maintenance personnel to intuitively judge the device's operating condition. If troubleshooting is required, an external maintenance workstation can be connected through the programming maintenance port 9 to read the operation log stored in the central management unit 7, quickly locate the problem, and improve maintenance efficiency.

[0085] Finally, it should be noted that the above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A monitoring data acquisition device for urban rail transit LTE-M interface based on FPGA, characterized in that, This includes the FPGA data path module and the external interface module; The FPGA data path module includes an IP packet capture unit (1), an IP packet parsing unit (2), an IP packet processing unit (3), a storage unit (4), and a network transmission unit (5). The external interface module includes a first network interface (10) and a second network interface (11). The first network interface (10) is used to connect to the mirror port of the LTE core switch, and the second network interface (11) is used to connect to the data analysis workstation. The device uses a general-purpose FPGA chip that supports a 1000Mbps Ethernet interface and parallel logic. It is programmed into dedicated functional firmware using a hardware description language to capture, parse, filter, cache, and transmit the mirrored data stream. The FPGA data path module constructs a one-way data transmission path from the LTE-M core network to the data analysis workstation. It only receives the mirror data stream of the LTE-M core network and transmits it to the data analysis workstation. The physical layer circuits of the first network interface (10) and the second network interface (11) are not directly electrically connected. Data isolation is achieved through the internal logic of the general FPGA chip.

2. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device according to claim 1, characterized in that, The device also includes a management and support module, which includes a power management unit (6) and a central management unit (7), which are used to realize the device's power supply management, configuration management and operation and maintenance support functions, respectively.

3. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device according to claim 1, characterized in that, The hardware description language is VerilogHDL or VHDL. The hardware logic circuit of the dedicated functional firmware includes parallel processing logic and state machine parsing logic. The state machine parsing logic sets seven core states: idle, preamble_detect, SFD_detect, ethernet_header_parse, vlan_process, ip_header_parse, and transport_header_parse. The state machine parsing logic realizes the layer-by-layer parsing of network packets through state transition conditions, including frame structure field matching and data length verification.

4. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device according to claim 1, characterized in that, The IP packet capture unit (1) captures complete network packets from the mirror port of the LTE-M core network switch through the first network interface (10) and marks each packet with a time tag.

5. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device according to claim 1, characterized in that, The IP packet parsing unit (2) uses a state machine algorithm to parse network packets layer by layer, sequentially completing the determination of preamble and start of frame delimiter (SFD), Ethernet header parsing, optional VLAN tag identification and processing, IP header parsing and transport layer header parsing, and extracting the feature data of source address, destination address and protocol field and transmitting them to the IP packet processing unit (3).

6. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device according to claim 1, characterized in that, The IP packet processing unit (3) filters out the CBTC service data packets and LTE-M system S1-MME signaling data packets of the LTE-M core network SGi interface according to preset rules, and transmits them to the storage unit (4) for caching after re-verification and encapsulation together with the time tag. The network transmission unit (5) sends the data packets in the storage unit (4) to the data analysis workstation through the second network interface (11) according to the TCP protocol.

7. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device according to claim 2, characterized in that, The external interface module also includes a programming maintenance port (9). The central management unit (7) connects to an external operation and maintenance workstation through the programming maintenance port (9), receives preset rules and stores them in a whitelist. The preset rules are stored in the non-volatile memory of the central management unit (7) in XML format.

8. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device according to claim 1, characterized in that, The storage unit (4) uses DDR3 SDRAM with a capacity of not less than 2GB and a read / write speed of not less than 1600Mbps as a cache, and is configured with NAND Flash with a capacity of not less than 32GB as persistent storage to store historical configuration data and key logs.

9. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device according to claim 2, characterized in that, The external interface module also includes a power interface (8). The power management unit (6) has voltage conversion, electrical isolation and voltage protection functions, and works with the power interface (8) to realize external power supply.

10. The FPGA-based urban rail transit LTE-M interface monitoring data acquisition device according to claim 1, characterized in that, The external interface module also includes an LED status indicator (12), which is used to provide feedback on the power-on status, link status, and operation and working status of the acquisition / storage of the device.

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