Transfer substrate and transfer method of light-emitting device and display panel

Abstract

The invention provides a transfer substrate and a transfer method of a light-emitting device and a display panel, and belongs to the technical field of photoelectron manufacturing. The transfer substrate comprises a substrate body and a limiting structure, the limiting structure is located on the substrate body, and a gap used for containing a pixel chip is formed in the side, away from the substrate body, of the limiting structure. According to the transfer substrate, the problem of unstable drop point of the pixel chip in the laser transfer process can be improved, and the transfer precision of the pixel chip is improved.

Description

Technical Field

[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a transfer substrate, transfer method and display panel for a light-emitting device. Background Technology

[0002] In the emerging field of displays, Mini / Micro LEDs offer significant advantages in brightness and lifespan. MIP (Micro LED in package) is a technology that integrates and packages micro-LED chips to improve display performance and reduce manufacturing costs.

[0003] In related technologies, the light-emitting device of a MIP includes multiple pixel chips and a receiving substrate. The multiple pixel chips need to be transferred to the receiving substrate using mass transfer technology, so that the multiple pixel chips are arranged at intervals on the receiving substrate.

[0004] However, during the mass transfer process, after the epitaxial material of the pixel chip is decomposed by laser, the pixel chip falls freely without restraint, which makes the landing point of each pixel chip extremely unstable and affects the transfer accuracy of the pixel chip. Summary of the Invention

[0005] This disclosure provides a transfer substrate, transfer method, and display panel for a light-emitting device, which can improve the problem of unstable pixel chip landing point during laser transfer and enhance the transfer accuracy of the pixel chip. The technical solution is as follows: On one hand, embodiments of this disclosure provide a transfer substrate for a light-emitting device, the transfer substrate comprising: a substrate and a limiting structure, the limiting structure being located on the substrate, and the side of the limiting structure away from the substrate having a gap for accommodating a pixel chip.

[0006] In another implementation of the present disclosure, the limiting structure includes a limiting layer, the surface of the limiting layer away from the substrate having a plurality of spaced limiting holes; or, the limiting structure includes a plurality of limiting plates, the plurality of limiting plates being spaced along the same straight line, the gap between adjacent limiting plates being the void; or, the limiting structure includes a plurality of limiting blocks, the plurality of limiting blocks being arranged in an array, the gap between adjacent limiting blocks being the void.

[0007] In another implementation of the present disclosure, the cross-sectional shape of the limiting hole in the direction perpendicular to the substrate includes a polygon.

[0008] In another implementation of the present disclosure, the depth of the gap is less than or equal to the thickness of the pixel chip used to accommodate the gap.

[0009] In another implementation of the present disclosure, the transfer substrate further includes a receiving adhesive layer located between the limiting structure and the substrate.

[0010] In another implementation of the present disclosure, the thickness of the adhesive layer is less than or equal to 100 μm.

[0011] On the other hand, embodiments of this disclosure provide a method for transferring a light-emitting device. The method includes: preparing a transfer substrate, the transfer substrate including a substrate and a limiting structure, the limiting structure being located on the substrate, and the side of the limiting structure away from the substrate having a gap for accommodating a pixel chip; placing a wafer above the transfer substrate such that the pixel chip of the wafer is opposite to the gap of the limiting structure; and irradiating the wafer with a laser to cause the pixel chip of the wafer to fall into the gap of the limiting structure.

[0012] In another implementation of the present disclosure, the preparation of the transfer substrate includes: forming a limiting layer on one side of the substrate, and etching the surface of the limiting layer away from the substrate to form a plurality of spaced-apart limiting holes.

[0013] In another implementation of the present disclosure, forming a limiting layer on one side of the substrate further includes: forming a receiving adhesive layer on the substrate, the thickness of the receiving adhesive layer being less than or equal to 100 μm; and forming the limiting layer on the receiving adhesive layer.

[0014] In another aspect, embodiments of this disclosure provide a display panel, the display panel including a transfer substrate as described above and a plurality of pixel chips, the plurality of pixel chips being located within the gap.

[0015] The beneficial effects of the technical solutions provided in this disclosure include at least the following: The transfer substrate for the light-emitting device provided in this disclosure has a limiting structure on it. The limiting structure has gaps on the side away from the substrate, the size of which matches the size of the corresponding pixel chip, forming a customized accommodating space. During laser transfer, when the laser acts on the interface between the pixel chip and the growth substrate, after the pixel chip detaches, the sidewalls of the gaps in the limiting structure (such as the sidewalls of the grooves) mechanically obstruct the lateral movement of the pixel chip, allowing it to fall only vertically (towards the bottom of the gap), while horizontal displacement is restricted by the sidewalls of the gaps. Furthermore, the position of the gap matches the mounting position of the corresponding pixel chip on the receiving substrate, so after detachment, the pixel chip naturally falls into the corresponding gap under the guidance of gravity and the limiting structure. Therefore, this effectively solves the problem of unrestricted free fall of pixel chips. The limiting structure provides track-like guidance for pixel chip transfer in space-constrained environments, transforming the originally probability-dependent random landing point into deterministic positioning, thereby improving the accuracy and reliability of mass transfer. For MIP devices, high-precision pixel arrangement can ensure uniform light emission and color mixing, while reducing the repair costs in subsequent packaging stages. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of a transfer substrate for a light-emitting device provided in an embodiment of this disclosure; Figure 2 This is a top view of a transfer substrate provided in an embodiment of this disclosure; Figure 3 This is a top view of a transfer substrate provided in an embodiment of this disclosure; Figure 4 This is a top view of a transfer substrate provided in an embodiment of this disclosure; Figure 5 This is a schematic diagram of the structure of a transfer substrate for a light-emitting device provided in an embodiment of this disclosure; Figure 6 This is a flowchart of a method for transferring light-emitting devices according to an embodiment of the present disclosure; Figure 7 This is a transition state diagram of a light-emitting device provided in an embodiment of this disclosure; Figure 8 This is a top view of a display panel provided in an embodiment of this disclosure; Figure 9This is a schematic diagram of the structure of a display panel provided in an embodiment of this disclosure; Figure 10 This is a schematic diagram of the structure of a display panel provided in an embodiment of this disclosure.

[0018] The markings in the diagram are explained as follows: 11. Substrate; 20. Limiting structure; 200. Gap; 21. Limiting layer; 210. Limiting hole; 22. Limit plate; 23. Limit block; 30. Adhesive layer; 40. Wafer; 50. Pixel chip; 51. Encapsulation layer; 52. Electrode layer. Detailed Implementation

[0019] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0020] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” “top,” and “bottom,” etc., are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described objects changes.

[0021] Figure 1 This is a schematic diagram of the structure of a transfer substrate for a light-emitting device provided in an embodiment of this disclosure. Figure 1 As shown, the transfer substrate includes a substrate 11 and a limiting structure 20, the limiting structure 20 being located on the substrate 11.

[0022] Among them, such as Figure 1 As shown, the side of the limiting structure 20 away from the substrate 11 has a gap 200 for accommodating the pixel chip 50.

[0023] The transfer substrate for the light-emitting device provided in this embodiment includes a limiting structure 20. The limiting structure 20 has gaps 200 on its side away from the substrate 11. The size of these gaps 200 matches the size of the corresponding pixel chip 50, forming a customized accommodating space. During laser transfer, when the laser acts on the interface between the pixel chip 50 and the growth substrate, after the pixel chip 50 detaches, the sidewalls (such as groove sidewalls) of the gaps 200 in the limiting structure 20 mechanically obstruct the lateral movement of the pixel chip 50. This prevents the pixel chip 50 from falling only vertically (towards the bottom of the gap 200), while horizontal displacement is limited by the sidewalls of the gaps 200. Furthermore, the position of the gaps 200 matches the mounting position of the corresponding pixel chip 50 on the receiving substrate. Thus, after detachment, the pixel chip 50 naturally falls into the corresponding gap 200 under the guidance of gravity and the limiting structure 20. Therefore, it effectively solves the problem of unrestricted free fall of pixel chips 50. The limiting structure 20 provides track-like guidance for the transfer of pixel chips 50 in space-constrained environments, transforming the originally probability-dependent random landing point into deterministic positioning, thereby improving the accuracy and reliability of mass transfer. For MIP devices, high-precision pixel arrangement can ensure uniform light emission brightness and color mixing, while reducing the repair costs in subsequent packaging stages.

[0024] In one implementation of this disclosure, Figure 2 This is a top view of a transfer substrate provided in an embodiment of this disclosure. Figure 2 As shown, the limiting structure 20 includes a limiting layer 21, and the surface of the limiting layer 21 away from the substrate 11 has a plurality of spaced limiting holes 210.

[0025] Among them, the limiting layer 21, which is laid entirely on the substrate 11, is easier to process. During processing, multiple spaced limiting holes 210 can be precisely fabricated on the surface of the limiting layer 21 using mature micro-nano processing technologies such as photolithography and etching. The size, shape, and spacing of the limiting holes 210 can be flexibly adjusted according to the size and arrangement requirements of the pixel chip 50 to achieve high-precision patterning and ensure that each limiting hole 210 can be adapted to the corresponding pixel chip 50.

[0026] Furthermore, the limiting hole 210 provides stable and precise positioning. When the pixel chip 50 is allowed to fall freely via laser transfer, the hole wall of the limiting hole 210 effectively constrains the pixel chip 50 from all sides, restricting its lateral movement and ensuring that the chip can only fall into the limiting hole 210 in a vertical direction, accurately landing in the predetermined position, which greatly improves the positional accuracy of the pixel chip 50's landing point.

[0027] In another implementation of this disclosure, Figure 3 This is a top view of a transfer substrate provided in an embodiment of this disclosure. Figure 3 As shown, the limiting structure 20 includes multiple limiting plates 22, which are arranged at intervals along the same straight line, and the gap between adjacent limiting plates 22 is a gap 200.

[0028] In this embodiment of the disclosure, the limiting structure 20 is designed to consist of multiple limiting plates 22 arranged at intervals along the same straight line, with the gap between adjacent limiting plates 22 serving as the gap 200. In this implementation, the length, number, and arrangement spacing of the limiting plates 22 can be flexibly adjusted according to the size and arrangement direction of the pixel chip 50, accurately adapting to the transfer requirements of different specifications, and exhibiting strong adaptability.

[0029] Furthermore, when the pixel chip 50 falls freely, the gap formed by the adjacent limiting plates 22 can also effectively constrain the pixel chip 50 from both sides, restricting its lateral movement, ensuring that the chip falls smoothly along the gap direction and accurately lands in the target position, thus improving the landing accuracy.

[0030] Meanwhile, the arrangement of multiple limiting plates 22 simplifies the manufacturing process, allowing for mass production using conventional photolithography and etching processes, resulting in lower costs and easier large-scale production. This linearly arranged limiting structure 20 effectively utilizes space, improving the space utilization rate of the transfer substrate and enabling high-precision transfer of more pixel chips 50 within a limited area, thus contributing to improved efficiency and yield of mass transfer of MIP light-emitting devices.

[0031] In yet another implementation of this disclosure, Figure 4 This is a top view of a transfer substrate provided in an embodiment of this disclosure. Figure 4 As shown, the limiting structure 20 includes multiple limiting blocks 23, which are arranged in an array, and the gap between adjacent limiting blocks 23 is a gap 200.

[0032] The array-arranged limiting blocks 23 can flexibly adjust the row and column spacing, size and arrangement density of the limiting blocks 23 according to the matrix arrangement requirements of the pixel chips 50, accurately matching the layout of pixel chips 50 of different specifications, with extremely strong adaptability.

[0033] Furthermore, when the pixel chip 50 falls freely, each pixel chip 50 falls into an independent gap formed by adjacent limiting blocks 23. The limiting blocks 23 constrain the chip from all sides, effectively limiting its offset in all directions and ensuring that the chip falls accurately into the target gap 200, greatly improving the accuracy of the landing point position. At the same time, the array structure of the limiting blocks 23 is easy to mass-produce using conventional micro-nano processing techniques (such as photolithography and etching), and the process is mature and the cost is controllable.

[0034] Optionally, the cross-sectional shape of the limiting hole 210 in the direction perpendicular to the substrate 11 includes a polygon.

[0035] For example, such as Figure 1 As shown, the cross-sectional shape of the limiting hole 210 in the direction perpendicular to the substrate 11 is rectangular.

[0036] The cross-sectional shape of the rectangular limiting hole 210 matches the shape of most pixel chips 50, enabling geometric alignment and limiting. This allows the four sides of the pixel chip 50 to fit tightly against the four right-angled sidewalls of the rectangular hole, simultaneously constraining lateral displacement from four directions. This effectively suppresses complex offsets such as chip rotation and tilting caused by laser impact or airflow, improving the planar position accuracy of the landing point. Furthermore, the rectangular structure is simple, easy to mass-produce using conventional photolithography / etching processes, and adaptable to the pixel array layout of the receiving substrate, achieving precise directional transfer without additional adjustments to the pixel chip 50's orientation.

[0037] For example, the limiting hole 210 has an inverted trapezoidal cross-sectional shape in the direction perpendicular to the substrate 11.

[0038] The inverted trapezoidal limiting hole 210 has a guiding function. When the pixel chip 50 falls freely, the larger upper opening can widen the initial alignment tolerance of the pixel chip 50. After the pixel chip 50 contacts the hole, the tilt angle of the trapezoidal sidewall guides the chip to automatically slide towards the center and eventually lock into the narrower, stable area. Even if the initial landing point is slightly off, it can still be corrected to the precise position. This structure is particularly suitable for chip transfer scenarios with large dimensional tolerances, improving the transfer error tolerance while ensuring high consistency of the final landing point.

[0039] For example, such as Figure 5 As shown, the cross-sectional shape of the limiting hole 210 in the direction perpendicular to the substrate 11 is a trapezoid.

[0040] The narrow upper trapezoidal structure provides a tighter constraint on the pixel chip 50 from above after it enters, effectively limiting lateral movement, accurately positioning the chip, improving landing accuracy, and ensuring transfer quality. Furthermore, the wide lower design increases the distance between the limiting hole 210 and the pixel chip 50, reducing the contact area between them and thus minimizing the risk of frictional damage between the pixel chip 50 and the hole wall while maintaining the limiting effect.

[0041] Optionally, the depth of the gap 200 is less than or equal to the thickness of the pixel chip 50 to be accommodated within the gap 200.

[0042] For example, the ratio of the depth of the gap 200 to the thickness of the pixel chip 50 can be 0.8 to 1.

[0043] When the depth of the gap 200 is equal to the thickness of the pixel chip 50, after the pixel chip 50 falls to the bottom, the top of the pixel chip 50 will be flush with the surface of the limiting structure 20. This can prevent the top of the pixel chip 50 from being suspended and causing shaking or tilting, ensuring that the pixel chip 50 is vertically and stably positioned and accurately matches the corresponding position of the receiving substrate.

[0044] When the depth of the gap 200 is less than the thickness of the pixel chip 50, it can constrain the lateral displacement of the limiting hole 210 sidewall while reducing the contact area between the hole wall and the pixel chip 50. This reduces the risk of excessive squeezing due to the large contact area between the pixel chip 50 and the hole wall, which could damage the pixel chip 50.

[0045] For example, the depth of the void 200 can be less than or equal to 80 μm.

[0046] Optionally, such as Figure 1 As shown, the transfer substrate also includes a receiving adhesive layer 30, which is located between the limiting structure 20 and the substrate 11.

[0047] In the above implementation, the adhesive layer 30 provides adhesive force, which firmly adheres the pixel chip 50 after it falls into the gap 200 of the limiting structure 20 via laser transfer, preventing displacement during subsequent operations such as handling and bonding with the receiving substrate, thus ensuring the accuracy of the chip's position. The adhesive layer, located between the limiting structure 20 and the substrate 11, acts as an intermediate support, enhancing the overall structural strength and stability of the transfer substrate. It prevents the limiting structure 20 from deforming due to force during chip transfer, ensuring that the gap 200 in the limiting structure 20 can accurately limit the pixel chip 50, further improving the accuracy and yield of the pixel chip 50 transfer.

[0048] Optionally, the adhesive layer 30 may include a substrate layer and an adhesive layer located on both sides of the substrate layer.

[0049] For example, the substrate layer may be a nonwoven fabric.

[0050] The nonwoven fabric possesses a certain degree of flexibility and strength, providing a good support structure for the adhesive layer 30. During mass transfer, the falling chips exert impact on the adhesive layer 30. The nonwoven fabric substrate layer can disperse these impact forces, preventing the adhesive layer 30 from cracking or deforming due to excessive localized stress. The surface structure of the nonwoven fabric facilitates better adhesion of the adhesive. It increases the contact area and bonding force between the adhesive and the substrate layer, allowing the adhesive to be more firmly coated onto the nonwoven fabric.

[0051] For example, the adhesive may be an acrylic adhesive.

[0052] Acrylic adhesive possesses high adhesion, firmly bonding the pixel chip 50 to ensure precise positioning and minimal displacement during drop, guaranteeing accuracy in mass transfers. It also exhibits excellent weather resistance and chemical stability, resisting environmental factors and chemical substances during the transfer process and subsequent steps, maintaining stable performance and ensuring reliable adhesion. Furthermore, the acrylic adhesive demonstrates good compatibility with the non-woven fabric substrate layer, bonding tightly to ensure the overall stability and integrity of the adhesive layer 30.

[0053] Furthermore, when removing acrylic adhesive, whether by hand or with a cleaning agent, it will not excessively tear the chip due to its strong adhesion, effectively reducing the risk of chip fragments.

[0054] Optionally, the thickness of the adhesive layer 30 is less than or equal to 100 μm.

[0055] By controlling the thickness of the adhesive layer 30 within the aforementioned range, the overall thickness of the transfer substrate can be effectively controlled, resulting in a thinner and lighter structure that is more flexible during transfer, facilitating operation and precise chip positioning. Furthermore, this thickness range ensures sufficient adhesion and cushioning performance while avoiding material waste and increased processing difficulty caused by excessive thickness. Moreover, a thinner adhesive layer 30 reduces energy transfer obstacles during subsequent operations such as laser separation of the adhesive layer 30, making the process more efficient.

[0056] Alternatively, the substrate 11 may be a sapphire substrate 11 or a glass substrate 11.

[0057] For example, the limiting structure 20 can be made of photoresist. Using photoresist as the limiting structure 20 allows for the rapid fabrication of complex patterned limiting holes 210 through ultraviolet exposure and development processes. Furthermore, photoresist has a low elastic modulus, which can buffer impact forces through slight deformation when the pixel chip 50 is dropped.

[0058] For example, the limiting structure 20 can be made of silicon. For instance, the limiting structure 20 can be a ceramic structure. Silicon can be processed into micron-sized limiting holes 210 with high aspect ratios using a deep etching process. The hardness and chemical stability of silicon maintain the dimensional accuracy of the limiting structure 20 over a long period, preventing hole collapse due to external forces during transfer.

[0059] As an example, when silicon is used as the limiting structure 20, silicon nitride can be used as an insulating coating to coat the limiting hole 210, which further improves the surface wear resistance and high temperature resistance, making it suitable for high-temperature environments during laser transfer.

[0060] Figure 6 This is a flowchart illustrating a method for transferring light-emitting devices according to an embodiment of this disclosure. Figure 6 As shown, the transfer method includes: Step 101: Prepare the transfer substrate.

[0061] The transfer substrate includes a substrate 11 and a limiting structure 20, the limiting structure 20 being located on the substrate 11, and the side of the limiting structure 20 away from the substrate 11 having a gap 200 for accommodating the pixel chip 50.

[0062] Step 102: Place wafer 40 on top of the transfer substrate, so that the pixel chip 50 of wafer 40 is opposite to the gap 200 of the limiting structure 20.

[0063] Step 103: Irradiate wafer 40 with a laser to cause the pixel chip 50 of wafer 40 to fall into the gap 200 of limiting structure 20.

[0064] In the above transfer method, the prepared transfer substrate has a limiting structure 20 on it. The side of the limiting structure 20 away from the substrate 11 has gaps 200, the size of which matches the size of the corresponding pixel chip 50, forming a customized accommodating space. During the laser transfer process, when the laser acts on the interface between the pixel chip 50 and the growth substrate, after the pixel chip 50 detaches, the sidewalls of the gaps 200 of the limiting structure 20 (such as the sidewalls of the grooves) mechanically obstruct the lateral movement of the pixel chip 50, allowing it to fall only vertically (towards the bottom of the gaps 200), while horizontal displacement is limited by the sidewalls of the gaps 200. Furthermore, the position of the gaps 200 matches the mounting position of the corresponding pixel chip 50 on the receiving substrate, so that after detachment, the pixel chip 50 naturally falls into the corresponding gap 200 under the guidance of gravity and the limiting structure 20. Therefore, it effectively solves the problem of unrestricted free fall of pixel chips 50. The limiting structure 20 provides track-like guidance for the transfer of pixel chips 50 in space-constrained environments, transforming the originally probability-dependent random landing point into deterministic positioning, thereby improving the accuracy and reliability of mass transfer. For MIP devices, high-precision pixel arrangement can ensure uniform light emission brightness and color mixing, while reducing the repair costs in subsequent packaging stages.

[0065] Step 101 may include the following steps: The first step is to spin-coat a photosensitive adhesive onto the surface of substrate 11 and heat it to cure, forming a photosensitive adhesive layer.

[0066] Specifically, the process may include: First, thoroughly cleaning the substrate 11 to remove surface dust, grease, and other impurities to ensure a good subsequent spin coating effect. Next, precisely drop the photosensitive adhesive onto the center of the substrate 11 surface. Then, using a spin coating device, perform the spin coating operation according to a preset speed and time to evenly cover the substrate 11 surface with the photosensitive adhesive. Finally, place the substrate 11 with the spin-coated photosensitive adhesive into a heating device and heat it at a suitable temperature to cure, thereby forming a stable photosensitive adhesive layer.

[0067] The second step is to apply adhesive to the two opposite surfaces of the substrate layer to obtain the adhesive layer 30.

[0068] Specifically, this may include: first, cleaning and pre-treating both surfaces of the substrate layer to remove impurities and contaminants; then, using a coating device, uniformly coating the prepared adhesive (such as acrylic adhesive) onto the two opposite surfaces of the substrate layer; subsequently, through a drying or curing process, the adhesive is firmly adhered to the surface of the substrate layer, ultimately forming a double-sided adhesive layer 30.

[0069] The thickness of the adhesive layer 30 is less than or equal to 100μm.

[0070] The third step is to adhere one surface of the adhesive layer 30 to the photosensitive adhesive layer using adhesive.

[0071] Specifically, this may include: precisely aligning the adhesive-coated surface of the receiving adhesive layer 30 with the photosensitive adhesive layer, and applying appropriate pressure to ensure that the two are tightly bonded; utilizing the adhesive properties of the adhesive to ensure that a strong interface bond is formed between the receiving adhesive layer 30 and the photosensitive adhesive layer, avoiding delamination or peeling in subsequent processes, and ensuring the stability of the overall structure of the transfer substrate.

[0072] The fourth step is to form a limiting layer 21 on the surface of the adhesive layer 30 and etch the surface of the limiting layer 21 away from the substrate 11 to form a plurality of spaced limiting holes 210.

[0073] Specifically, this may include: forming a uniform and dense limiting layer 21 through a deposition process to ensure surface flatness (Ra<10nm) to meet the requirements of precision patterning; then, coating photoresist on the surface of the limiting layer 21 through a photolithography process and exposing and developing it to define a limiting hole 210 pattern that matches the shape of the target pixel chip 50; finally, using dry etching or wet etching, precisely etching the limiting layer 21 along a direction perpendicular to the substrate 11 to form multiple spaced limiting holes 210.

[0074] In the above implementation, the limiting layer 21, which is laid entirely on the substrate 11, is easier to process. During processing, multiple spaced limiting holes 210 can be precisely fabricated on the surface of the limiting layer 21 using mature micro-nano processing technologies such as photolithography and etching. The size, shape, and spacing of the limiting holes 210 can be flexibly adjusted according to the size and arrangement requirements of the pixel chip 50, achieving high-precision patterning and ensuring that each limiting hole 210 can be adapted to the corresponding pixel chip 50.

[0075] Furthermore, the limiting hole 210 provides stable and precise positioning. When the pixel chip 50 is allowed to fall freely via laser transfer, the hole wall of the limiting hole 210 effectively constrains the pixel chip 50 from all sides, restricting its lateral movement and ensuring that the chip can only fall into the limiting hole 210 in a vertical direction, accurately landing in the predetermined position, which greatly improves the positional accuracy of the pixel chip 50's landing point.

[0076] like Figure 7 , 8 As shown, steps 102 to 103 include: placing a wafer 40 above a transfer substrate, and irradiating the wafer 40 with a laser above the transfer substrate, so that each pixel chip 50 of the wafer 40 falls into each limiting hole 210 of the limiting layer 21.

[0077] Among them, the excimer laser is used to irradiate the wafer 40. The excimer laser generates laser by exciting a mixture of inert gas and halogen gas, and has the characteristics of a cold light source and high-precision cutting capability.

[0078] For example, the wavelength of a solid-state laser can be 248 nm.

[0079] In this embodiment of the disclosure, the pixel chip 50 may be at least one of a red light-emitting pixel chip 50, a green light-emitting pixel chip 50, and a blue light-emitting pixel chip 50.

[0080] In this embodiment, each pixel chip 50 includes an epitaxial layer, a passivation layer, and an electrode. The epitaxial layer is located on the surface of the substrate 11 and includes a p-type layer, a light-emitting layer, and an n-type layer stacked sequentially. The n-type layer has a groove exposing the p-type layer. The passivation layer is located on the surface of the n-type layer and in the groove, and the passivation layer has a through-hole exposing the n-type layer and the groove.

[0081] The passivation layer has a first electrode and a second electrode on its surface, and the first electrode and the second electrode are connected to the n-type layer and the p-type layer through two through holes, respectively.

[0082] In this embodiment of the disclosure, the difference between the red-emitting pixel chip 50, the green-emitting pixel chip 50, and the blue-emitting pixel chip 50 lies in the different light emission colors of the epitaxial layer.

[0083] For the red-emitting pixel chip 50, the epitaxial layer is a red-light epitaxial layer. For the green-emitting pixel chip 50, the epitaxial layer is a green-light epitaxial layer. For the blue-emitting pixel chip 50, the epitaxial layer is a blue-light epitaxial layer.

[0084] The red epitaxial layer comprises a first p-type layer, a first luminescent layer, and a first n-type layer stacked sequentially.

[0085] In the red-light epitaxial layer, the first p-type layer includes a p-type AlInP layer.

[0086] The first luminescent layer comprises alternating layers of AlGaInP quantum wells and AlGaInP quantum barriers, wherein the Al content in the AlGaInP quantum well layers and AlGaInP quantum barrier layers differs. The first luminescent layer may comprise 3 to 8 alternating stacked cycles of AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0087] The first n-type layer includes an n-type AlGaInP current-spreading layer.

[0088] In this embodiment of the disclosure, the green epitaxial layer includes a second p-type layer, a second luminescent layer, and a second n-type layer stacked sequentially.

[0089] In the green epitaxial layer, the second p-type layer includes a p-type GaN layer.

[0090] The second light-emitting layer comprises alternating InGaN quantum well layers and GaN quantum barrier layers. The second light-emitting layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0091] The second n-type layer includes an n-type GaN layer.

[0092] In this embodiment of the disclosure, the blue light epitaxial layer includes a third p-type layer, a third light-emitting layer, and a third n-type layer stacked sequentially.

[0093] In the blue light epitaxial layer, the third p-type layer includes a p-type GaN layer.

[0094] The third light-emitting layer may include alternating InGaN quantum well layers and GaN quantum barrier layers. The third light-emitting layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0095] The third n-type layer includes an n-type GaN layer.

[0096] Optionally, the thickness of the pixel chip 50 is 2 μm to 80 μm.

[0097] Step 103 is followed by: The first step is to use a laser to irradiate the photosensitive adhesive layer, causing the photosensitive adhesive layer to decompose and remove the substrate 11.

[0098] Specifically, this may include: using a high-precision laser that matches the absorption wavelength of the photosensitive adhesive layer, and precisely projecting the laser beam onto the surface of the photosensitive adhesive layer through an optical focusing system; controlling the laser energy density within the material decomposition threshold range to cause the photosensitive adhesive layer to undergo a photochemical decomposition reaction and gradually lose its adhesiveness; as the laser scans point by point or irradiates area by area, the photosensitive adhesive layer is completely decomposed into small molecular fragments, and then the substrate 11 can be easily removed by mechanical peeling or solvent-assisted methods.

[0099] The second step is to form an encapsulation layer 51 on the limiting structure 20 and the pixel chip 50, and to form through holes on the encapsulation layer 51 to expose each pixel chip 50.

[0100] Specifically, this may include: first, uniformly coating a layer of transparent encapsulation material (such as epoxy resin or silicone) on the surface of the limiting structure 20, and forming an encapsulation layer 51 of uniform thickness through spin coating or scraping process, covering all pixel chips 50 and gaps; then, using photolithography or laser etching process, precisely opening holes at the position of each pixel chip 50 in the encapsulation layer 51, and forming through holes with a diameter slightly larger than the electrodes of the pixel chip 50 by controlling the exposure / development parameters or laser energy, ensuring that the electrode area of ​​the pixel chip 50 is exposed, providing a clean and precise contact window for subsequent electrode connection, while maintaining the protective performance of the encapsulation layer 51 for the pixel chip 50.

[0101] The third step is to form electrodes on the encapsulation layer 51, and connect the electrodes to each pixel chip 50 through through holes.

[0102] Figure 9 This is a schematic diagram of the structure of a display panel provided in an embodiment of this disclosure. Figure 9 As shown, the display panel includes a transfer substrate as described above and a plurality of pixel chips 50. The plurality of pixel chips 50 are respectively located within corresponding gaps 200 of the limiting structure 20.

[0103] like Figure 10 As shown, the light-emitting device further includes an encapsulation layer 51 and an electrode layer 52. The encapsulation layer 51 is located on the limiting structure 20 and the pixel chip 50, and the electrode layer 52 is located on the encapsulation layer 51 and is connected to each pixel chip 50 through the through-hole of the encapsulation layer 51.

[0104] In this embodiment of the disclosure, the pixel chip 50 includes a red-emitting pixel chip 50, a green-emitting pixel chip 50, and a blue-emitting pixel chip 50. The difference between each pixel chip 50 lies in the different light-emitting colors of its epitaxial layer.

[0105] The red epitaxial layer comprises a first p-type layer, a first luminescent layer, and a first n-type layer stacked sequentially.

[0106] In the red-light epitaxial layer, the first p-type layer includes a p-type AlInP layer.

[0107] The first luminescent layer comprises alternating layers of AlGaInP quantum wells and AlGaInP quantum barriers, wherein the Al content in the AlGaInP quantum well layers and AlGaInP quantum barrier layers differs. The first luminescent layer may comprise 3 to 8 alternating stacked cycles of AlGaInP quantum well layers and AlGaInP quantum barrier layers.

[0108] The first n-type layer includes an n-type AlGaInP current-spreading layer.

[0109] In this embodiment of the disclosure, the green epitaxial layer includes a second p-type layer, a second luminescent layer, and a second n-type layer stacked sequentially.

[0110] In the green epitaxial layer, the second p-type layer includes a p-type GaN layer.

[0111] The second light-emitting layer comprises alternating InGaN quantum well layers and GaN quantum barrier layers. The second light-emitting layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0112] The second n-type layer includes an n-type GaN layer.

[0113] In this embodiment of the disclosure, the blue light epitaxial layer includes a third p-type layer, a third light-emitting layer, and a third n-type layer stacked sequentially.

[0114] In the blue light epitaxial layer, the third p-type layer includes a p-type GaN layer.

[0115] The third light-emitting layer may include alternating InGaN quantum well layers and GaN quantum barrier layers. The third light-emitting layer may include 3 to 8 alternating stacked InGaN quantum well layers and GaN quantum barrier layers.

[0116] The third n-type layer includes an n-type GaN layer.

[0117] Optionally, the thickness of the pixel chip 50 is 2 μm to 80 μm.

[0118] Optionally, the display panel is bottom-emitting, meaning the light-emitting surface is located on the bottom surface of the display panel. For example... Figure 8 As shown, to improve light efficiency, the substrate 11 on the transfer substrate can be removed by laser stripping.

[0119] Furthermore, the adhesive layer 30 on the transfer substrate can also be removed by an adhesive removal process. Meanwhile, a lens is placed on the bottom surface of the display panel to improve light efficiency.

[0120] The above is not intended to limit this disclosure in any way. Although this disclosure has been disclosed above through embodiments, it is not intended to limit this disclosure. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the technical solution of this disclosure. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of this disclosure without departing from the content of the technical solution of this disclosure shall still fall within the scope of the technical solution of this disclosure.

Claims

1. A transfer substrate for a light-emitting device, characterized in that, The transfer substrate includes a substrate (11) and a limiting structure (20), the limiting structure (20) being located on the substrate (11), and the side of the limiting structure (20) away from the substrate (11) having a gap (200) for accommodating a pixel chip (50).

2. The transfer substrate according to claim 1, characterized in that, The limiting structure (20) includes a limiting layer (21), the surface of the limiting layer (21) away from the substrate (11) having a plurality of spaced limiting holes (210); or, The limiting structure (20) includes multiple limiting plates (22), which are arranged at intervals along the same straight line, and the gap between adjacent limiting plates (22) is the gap (200); or, The limiting structure (20) includes multiple limiting blocks (23), which are arranged in an array, and the gap between adjacent limiting blocks (23) is the gap (200).

3. The transfer substrate according to claim 2, characterized in that, The cross-sectional shape of the limiting hole (210) in the direction perpendicular to the substrate (11) includes a polygon.

4. The transfer substrate according to any one of claims 1 to 3, characterized in that, The depth of the gap (200) is less than or equal to the thickness of the pixel chip (50) used to accommodate the gap (200).

5. The transfer substrate according to any one of claims 1 to 3, characterized in that, The transfer substrate further includes a receiving adhesive layer (30) located between the limiting structure (20) and the substrate (11).

6. The transfer substrate according to claim 5, characterized in that, The thickness of the adhesive layer (30) is less than or equal to 100 μm.

7. A method for transferring light-emitting devices, characterized in that, The transfer method includes: A transfer substrate is prepared, the transfer substrate comprising: a substrate (11) and a limiting structure (20), the limiting structure (20) being located on the substrate (11), and the side of the limiting structure (20) away from the substrate (11) having a gap (200) for accommodating a pixel chip (50). A wafer (40) is placed on top of the transfer substrate, such that the pixel chip (50) of the wafer (40) is opposite to the gap (200) of the limiting structure (20); The wafer (40) is irradiated with a laser, causing the pixel chip (50) of the wafer (40) to fall into the gap (200) of the limiting structure (20).

8. The transfer method according to claim 7, characterized in that, The fabrication of the transfer substrate includes: A limiting layer (21) is formed on one side of the substrate (11), and the surface of the limiting layer (21) away from the substrate (11) is etched to form a plurality of spaced limiting holes (210).

9. The transfer method according to claim 8, characterized in that, Forming a limiting layer (21) on one side of the substrate (11) further includes: A receiving adhesive layer (30) is formed on the substrate (11), the thickness of the receiving adhesive layer (30) being less than or equal to 100 μm; The limiting layer (21) is formed on the receiving adhesive layer (30).

10. A display panel, characterized in that, The display panel includes a transfer substrate as described in any one of claims 1 to 6 and a plurality of pixel chips (50), wherein the plurality of pixel chips (50) are located within the gap (200).

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