Display device

Abstract

A display device according to an embodiment of the present disclosure may include: a substrate; a plurality of light emitting devices disposed on the substrate and positioned in the display area; a plurality of column lines electrically connected to the first electrode of each of the plurality of light emitting devices; a plurality of row lines electrically connected to the second electrode of each of the plurality of light emitting devices; an optical driving device disposed on the substrate and positioned in the display area, overlapping a first row line of the plurality of row lines, and emitting specific light of a first wavelength band according to a voltage difference between both ends; and an optical detection device disposed on the substrate and detecting specific light reflected from the outside and incident inside.

Description

Technical Field

[0001] Embodiments of this disclosure relate to an apparatus, and particularly, for example, but not limited to, a display apparatus. Background Technology

[0002] Display devices are used in various electronic devices, such as televisions, mobile phones, laptops, and tablets. Display devices can include organic light-emitting displays (OLEDs) that contain self-emissive light-emitting devices and liquid crystal displays (LCDs) that include individual light sources.

[0003] Recently, display devices with light-emitting diodes (LEDs) have attracted attention as the next generation of display devices. Because LEDs are made of inorganic materials rather than organic materials, LED-based display devices have faster light emission speed, superior luminous efficiency, and can display high-brightness images compared to liquid crystal displays or organic light-emitting displays. Summary of the Invention

[0004] Embodiments of this disclosure can provide a display device that integrates an optical touch sensor into a display panel.

[0005] Embodiments of this disclosure may provide a display device including an optical driving device and an optical detection device having a structure corresponding to a light-emitting device for a display serving as an optical touch sensor.

[0006] Embodiments of this disclosure may provide a display device capable of reducing noise caused by light emitted for image display during optical touch sensing.

[0007] Embodiments of this disclosure may provide a display device capable of embedding drivers for display driving and touch driving into a display panel, thereby reducing the number of driving components (e.g., drivers) connected to the outside of the display panel, thereby reducing the number of assembly processes in the manufacturing process to achieve process optimization.

[0008] The purposes of embodiments of this disclosure are not limited to those described herein, and other purposes not mentioned will be clearly understood by those skilled in the art from the following description.

[0009] A display device according to an embodiment of the present disclosure may include: a substrate; a plurality of light-emitting devices disposed on the substrate and positioned in a display area; a plurality of column lines electrically connected to a first electrode of each of the plurality of light-emitting devices; a plurality of row lines electrically connected to a second electrode of each of the plurality of light-emitting devices; an optical driving device disposed on the substrate and positioned in the display area, overlapping with a first row line of the plurality of row lines, and emitting specific light of a first wavelength band according to a voltage difference between its two ends; and an optical detection device disposed on the substrate and detecting specific light reflected from the outside and incident inside.

[0010] A display device according to an embodiment of the present disclosure may include: a substrate; a plurality of light-emitting devices disposed on the substrate and positioned in a display area; a plurality of drivers configured to drive the plurality of light-emitting devices; an optical driving device disposed on the substrate and positioned in the display area, emitting specific light of a first wavelength band; and an optical detection device disposed on the substrate and positioned in the display area, detecting specific light reflected from the outside and incident on the inside. The optical driving device may be driven by a first driver among the plurality of drivers, and the optical detection device may be driven by a second driver among the plurality of drivers.

[0011] According to embodiments of the present disclosure, a display device that integrates an optical touch sensor into a display panel can be provided.

[0012] According to embodiments of this disclosure, a display device can be provided, comprising an optical driving device and an optical detection device, the optical detection device having a structure corresponding to a light-emitting device for a display serving as an optical touch sensor. Therefore, display panels can be designed and manufactured more easily, and process optimization can be achieved.

[0013] According to embodiments of the present disclosure, a display device capable of reducing noise caused by light emitted during image display during optical touch sensing can be provided.

[0014] According to embodiments of the present disclosure, a display device can be provided that can embed drivers for display driving and touch driving into a display panel, thereby reducing the number of driving components (e.g., drivers) connected to the outside of the display panel, thereby reducing the number of assembly processes in the manufacturing process to achieve process optimization.

[0015] The effects of the embodiments disclosed herein are not limited to those described above, and those skilled in the art will clearly understand from the description of the claims other effects not mentioned.

[0016] Other systems, methods, features, and advantages will be apparent to those skilled in the art upon examination of the following figures and detailed description. All such additional systems, methods, features, and advantages are intended to be included within this specification, within the scope of this disclosure, and protected by the appended claims. Nothing in this section should be construed as limiting those claims. Further aspects and advantages are discussed below in conjunction with embodiments of this disclosure.

[0017] It should be understood that both the foregoing general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0018] The accompanying drawings are included to provide a further understanding of this disclosure and are incorporated in and constitute a part of this application. The drawings illustrate embodiments of the disclosure and, together with the description, serve to explain the principles of the disclosure. In the drawings:

[0019] Figure 1 An example of a display device according to an embodiment of the present disclosure is shown.

[0020] Figure 2 This is a plan view of a display device according to an embodiment of the present disclosure.

[0021] Figure 3 This is a plan view of a display panel according to an embodiment of the present disclosure.

[0022] Figure 4 This is a plan view of the unit driving area of ​​a display panel according to an embodiment of the present disclosure.

[0023] Figure 5 Subpixels of a display panel according to an embodiment of the present disclosure are illustrated.

[0024] Figure 6 This is a plan view of a display panel according to an embodiment of the present disclosure.

[0025] Figure 7 and Figure 8 This is a plan view of a portion of a display panel according to an embodiment of the present disclosure.

[0026] Figure 9 This is a cross-sectional view of a display panel according to an embodiment of the present disclosure.

[0027] Figure 10 It is along Figure 6 A detailed cross-sectional view of the display panel according to an embodiment of the present disclosure, taken by the AB cutting line.

[0028] Figure 11This is an enlarged cross-sectional view of the first sub-pixel of a display panel according to an embodiment of the present disclosure.

[0029] Figure 12 It is the equivalent circuit of the sub-pixel of the display panel according to an embodiment of the present disclosure.

[0030] Figure 13 An example of an optical touch sensing structure for a display device according to an embodiment of the present disclosure is shown.

[0031] Figure 14 This is a diagram illustrating an optical driving region and an optical sensing region arranged in units in a display device according to an embodiment of the present disclosure.

[0032] Figure 15 This is a diagram illustrating an optical driving region and an optical sensing region arranged in units of sub-units in a display device according to an embodiment of the present disclosure.

[0033] Figures 16A to 16H This is an example of configuring an optical driving region and an optical sensing region in a display device according to embodiments of the present disclosure.

[0034] Figure 17 An example is illustrated in a display device according to an embodiment of the present disclosure, which includes a first subunit as an optical driving subunit in an optical driving region and a second subunit as an optical sensing subunit in an optical sensing region.

[0035] Figure 18 An example is illustrated of a first subunit in a display device comprising an optical driving subunit in an optical driving region, according to an embodiment of the present disclosure.

[0036] Figure 19 An example is illustrated of a second subunit comprising an optical sensing subunit in an optical sensing region of a display device according to an embodiment of the present disclosure.

[0037] Figure 20 An example is illustrated of a first subunit comprising an optical driving subunit in an optical driving region of a display device according to an embodiment of the present disclosure.

[0038] Figure 21 An example is illustrated of a second subunit comprising an optical sensing subunit in an optical sensing region of a display device according to an embodiment of the present disclosure.

[0039] Figure 22 An optical touch sensing system for a display device according to an embodiment of the present disclosure is illustrated.

[0040] Figure 23 This is a cross-sectional view of the optical driving region and the optical sensing region in a display panel according to an embodiment of the present disclosure.

[0041] Figures 24 to 26 This is a driving timing diagram for a display device according to an embodiment of the present disclosure.

[0042] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals shall be construed as referring to the same elements, features, and structures. For clarity, illustration, and convenience, the relative sizes and depictions of these elements may be exaggerated. Detailed Implementation

[0043] Reference will now be made in detail to embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. In the following description, detailed descriptions of well-known functions or configurations relevant to this document will be omitted or may be briefly discussed where it is determined that such detailed descriptions would unnecessarily obscure the essential points of the inventive concept. The described process steps and / or order of operations are exemplary; however, the order of steps and / or operations is not limited to the order set forth herein and may be varied as is known in the art, except for steps and / or operations that must occur in a specific order. The same reference numerals always refer to the same elements. The names of the corresponding elements used in the following explanation may be chosen solely for the convenience of writing the specification and may therefore differ from those used in actual products.

[0044] The advantages and features of this disclosure, as well as the methods for implementing them, will become clear from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, this disclosure is not limited to the embodiments disclosed below, but can be implemented in various different forms, and these embodiments are provided only to make the disclosure complete and fully inform those skilled in the art of the scope of this disclosure.

[0045] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustrative purposes, the relative sizes and depictions of these elements may be enlarged. The described process steps and / or operation sequence is an example; however, the order of steps and / or operations is not limited to that described herein, and may be changed as is known in the art, except for steps and / or operations that must occur in a specific order. The same reference numerals refer to the same elements throughout the text. The names of the various elements used in the following description are chosen solely for ease of writing and may therefore differ from the names used in actual products.

[0046] The shapes, sizes, ratios, angles, quantities, etc., disclosed in the accompanying drawings for explaining the embodiments of this disclosure are exemplary, and therefore this disclosure is not limited to the illustrated issues. When assigning reference numerals to components in each drawing, the same components may be assigned the same reference numerals even if shown in different drawings. Detailed descriptions of known techniques or functions may be omitted when it is determined that the subject matter of this disclosure is unclear. As used herein, when a component “comprises”, “has”, or “consistes of” another component, additional components may be added unless “only” is used. When a component is expressed in the singular, it includes cases where it includes a plural unless otherwise expressly stated.

[0047] When interpreting a component, it is interpreted as including the error range even if there is no separate explicit description of the error range.

[0048] Any implementation described in this article as an "example" is not necessarily to be interpreted as preferred or advantageous over other implementations.

[0049] When describing temporal relationships, when the temporal order is described as such as "after", "following", "next", and "before", discontinuous situations may be included unless more restrictive terms such as "only", "immediately", or "directly" are used.

[0050] When describing positional relationships, for example, if the positional relationship between two parts is described as "on," "above," "below," "next to," or "adjacent," then one or more other parts may be located between the two parts unless "directly" or "almost" is used.

[0051] Although the terms first, second, etc., are used to describe various elements, these components are not limited by these terms. These terms are only used to distinguish one component from another. Therefore, the first element mentioned below can also be a second element within the scope of this disclosure.

[0052] In describing the components of this disclosure, terms such as first, second, A, B, (a), or (b) may be used. These terms are intended only to distinguish a component from other components, and the nature, order, sequence, or number of components is not limited by the terms.

[0053] If a component is described as “connected,” “joined,” “linked,” or “attached” to another component, it should be understood that, without any specific explicit description, a component may be directly connected, joined, linked, or attached to another component, but other components may be inserted between each component that may be indirectly connected, joined, linked, or attached.

[0054] When a component or layer is described as "in contact" or "overlapping" with another component or layer, it should be understood that, without any specific explicit description, a component or layer may directly contact or overlap with other components or layers, but other components may be inserted between each component that may indirectly contact or overlap.

[0055] The expressions "first element," "second element," and " / or" "third element" should be understood as one of the first element, the second element, and the third element, or any or all combinations of the first element, the second element, and the third element. For example, A, B, and / or C can refer to only A; only B; only C; any or some combinations of A, B, and C; or all of A, B, and C.

[0056] "At least one" should be understood as any combination of one or more associated components. For example, "at least one of the first component, the second component, and the third component" can be interpreted as including not only the first component, the second component, or the third component, but also any combination of two or more of the first component, the second component, and the third component.

[0057] The terms “first direction,” “second direction,” “third direction,” “X-axis direction,” “Y-axis direction,” and “Z-axis direction” should not be interpreted as merely geometric relationships in which they are perpendicular to each other, but can be meant to indicate a wider range of directions within which the configuration of this disclosure can be functionally effective.

[0058] Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the example embodiments pertain. It should also be understood that terms such as those defined in common dictionaries should be interpreted as having a meaning consistent with, for example, their meaning in the context of the relevant field, and should not be interpreted in an idealized or overly formal sense unless explicitly defined herein. For example, as one of ordinary skill in the art will understand, the terms “component” or “unit” can be applied to, for example, a single circuit or structure, an integrated circuit, a computational block of a circuit device, or any structure configured to perform the described functions.

[0059] In contrast, these embodiments may be provided to make this disclosure sufficiently thorough and complete to assist those skilled in the art in fully understanding its scope. Furthermore, this disclosure is limited only by the scope of the claims.

[0060] Each feature of the various embodiments of this disclosure may be combined or integrated with each other in part or in whole, and various technical connections and operations are possible, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

[0061] Various embodiments of this disclosure are described in detail below with reference to the accompanying drawings.

[0062] Figure 1 A display device 100 according to an embodiment of the present disclosure is illustrated, and Figure 2 This is a plan view of a display device 100 according to an embodiment of the present disclosure.

[0063] Reference Figure 1 The display device 100 according to the embodiments of the present disclosure may include a display panel 110, a cover member 118 disposed on the display panel 110, a flexible printed circuit 102 connected to the display panel 110, and a printed circuit board 104 connected to the flexible printed circuit 102.

[0064] The display device 100 according to the embodiments of the present disclosure may further include: a support substrate 106 disposed below the display panel 110 and supporting the lower part of the display panel 110; a polarizing layer 114 disposed on the display panel 110; a first adhesive layer 112 disposed between the display panel 110 and the polarizing layer 114; and a second adhesive layer 116 disposed between the polarizing layer 114 and the cover member 118.

[0065] The display panel 110 may include a substrate 210. The substrate 210 may be a component on which various components, such as multiple metal layers and multiple insulating material layers, are formed. The substrate 210 may be made of an insulating material. For example, the substrate 210 may be made of glass or resin. Alternatively, the substrate 210 may be made of a flexible material. For example, the substrate 210 may be made of a flexible plastic material such as polyimide (PI).

[0066] Display panel 110 can display information, images, and / or images provided to a user. For example, display panel 110 may include a display area DA and a non-display area NDA. For example, substrate 210 may include a display area DA and a non-display area NDA. The display area DA and the non-display area NDA are not limited to substrate 210, but can be described throughout the display device 100.

[0067] The display area DA can be an area for displaying an image. The display area DA can include multiple pixels P. Each of the multiple pixels P can be composed of multiple sub-pixels. At least one light-emitting device can be arranged in each of the multiple sub-pixels. The light-emitting devices can be configured differently depending on the type of display device 100. For example, if the display device 100 is an inorganic light-emitting display device, the light-emitting device can be an inorganic light-emitting device such as a light-emitting diode (LED), a micro LED, or a mini LED.

[0068] The non-display area NDA can be an area where no image is displayed. Various wirings and circuits for driving the multiple pixels P of the display area DA can be arranged in the non-display area NDA. For example, various driving circuits and wirings can be arranged in the non-display area NDA, and pad portions 211 where integrated circuits and printed circuits are connected can be arranged.

[0069] For example, the driving circuit may include a data driving circuit and / or a gating driving circuit, but embodiments of this disclosure are not limited thereto. Wiring or lines provided with control signals for controlling the driving circuit may be arranged on the substrate 210. For example, the control signals may include various timing signals including clock signals, input data enable signals, and synchronization signals, but embodiments of this disclosure are not limited thereto. The control signals may be provided to the substrate 210 from the outside of the substrate 210 through the pad portion 211. For example, circuit components such as the flexible printed circuit 102 and the printed circuit board 104 may be connected to the pad portion 211.

[0070] The non-display area NDA may include a first non-display area NDA1, a curved area BA, and a second non-display area NDA2. For example, the first non-display area NDA1 may be a region surrounding at least a portion of the display area DA. The curved area BA may be a region extending from at least one of the multiple sides of the first non-display area NDA1, and may be a flexible region. The second non-display area NDA2 may be a region extending from the curved area BA, and may include a pad portion 211. For example, the curved area BA may be in a curved state, and the remaining area of ​​the substrate 210 other than the curved area BA may be in a flat state. In this case, when the curved area BA is bent, the second non-display area NDA2 may be located on the rear surface of the display area DA.

[0071] The display area DA of the substrate 210 or the display device 100 can be configured in various shapes according to the design of the display device 100. For example, the display area DA can be configured as a rectangular shape with rounded corners, a rectangular shape with right angles, or a circular shape.

[0072] The width of the second non-display area NDA2, where the pad portion 211 is arranged, can be wider than the width of the curved area BA. Additionally, the width of the display area DA can be wider than the width of the curved area BA. In the accompanying drawings, the width of the curved area BA is depicted as narrower than the width of other areas of the substrate 210; however, the shape of the substrate 210 including the curved area BA is exemplary, and embodiments of this disclosure are not limited thereto.

[0073] The flexible printed circuit 102 and the printed circuit board 104 can be disposed on the lower part of the display panel 110. For example, the flexible printed circuit 102 and the printed circuit board 104 can be arranged at one edge of the display panel 110. One side of the flexible printed circuit 102 can be connected to the display panel 110, and the other side can be connected to the printed circuit board 104. The flexible printed circuit 102 can be a flexible film.

[0074] The pad portion 211, located in the second non-display area NDA2, includes multiple pads, and a drive assembly including one or more flexible printed circuits 102 and a printed circuit board 104 can be attached or joined. The multiple pads included in the pad portion 211 are electrically connected to one or more flexible printed circuits 102 and can transmit various signals (or power) from the printed circuit board 104 and one or more flexible printed circuits 102 to drive circuitry arranged in the display area DA (e.g., Figure 3 The driver (DRV).

[0075] The flexible printed circuit 102 can be a film on which various components are arranged on a flexible base film. For example, a first circuit component 230, such as a gate driver integrated circuit and / or a data driver integrated circuit, can be arranged on one or more flexible printed circuits 102. The first circuit component 230 can be a component for processing data and driving signals for displaying images. The flexible printed circuit 102 can be attached or bonded to multiple pads via a conductive adhesive layer.

[0076] Printed circuit board 104 may be a component electrically connected to flexible printed circuit 102 and providing signals to first circuit assembly 230. Printed circuit board 104 may be disposed on one side of flexible printed circuit 102 and may be electrically connected to flexible printed circuit 102. Various components for providing various signals to first circuit assembly 230 may be disposed on printed circuit board 104. For example, various second circuit assemblies 240, such as timing controllers, power supplies, memory, or processors, may be disposed on printed circuit board 104. For example, the second circuit assembly 240 disposed on printed circuit board 104 may include timing controllers and / or power management integrated circuits (PMICs).

[0077] The printed circuit board 104 may include at least one hole, but embodiments of this disclosure are not limited thereto. Internal components for detecting ambient light or temperature (e.g., a light sensor or a temperature sensor) may be arranged in an area corresponding to at least one hole (e.g., a transmission hole).

[0078] The polarization layer 114 can be arranged on the display panel 110 and can prevent or reduce the light generated from the external light source from entering the display panel 110 and affecting the light-emitting device.

[0079] The cover member 118 can be arranged on the polarization layer 114 and can be a member used to protect the display panel 110.

[0080] A second adhesive layer 116 may be disposed between the polarizing layer 114 and the cover member 118. The second adhesive layer 116 can attach the cover member 118 to the display panel 110 or the polarizing layer 114. A first adhesive layer 112 may be disposed between the display panel 110 and the polarizing layer 114. The first adhesive layer 112 can attach the polarizing layer 114 to the display panel 110. The first adhesive layer 112 may be omitted. Each of the first adhesive layer 112 and the second adhesive layer 116 may include an optically clear adhesive (OCA), an optically clear resin (OCR), or a pressure-sensitive adhesive (PSA).

[0081] A support substrate 106 is disposed between the display panel 110 and the printed circuit board 104 to enhance the rigidity of the display panel 110. The support substrate 106 may be a back plate.

[0082] Figure 3 This is a plan view of the display panel 110 according to an embodiment of the present disclosure, and Figure 4 This is a plan view of the unit driving area UDA of the display panel 110 according to an embodiment of the present disclosure.

[0083] Reference Figure 3 According to embodiments of the present disclosure, the display area DA of the display panel 110 may include a plurality of unit driving areas UDA.

[0084] Display panel 110 may include multiple driver DRVs. The multiple driver DRVs may be arranged in each of multiple unit driving regions UDA. That is, one driver DRV may be located in one unit driving region UDA. Each of the multiple unit driving regions UDA may be a driving region driven by one driver DRV. For example, the driver DRV may be a driver chip manufactured on a semiconductor substrate using a MOSFET (Metal-Oxide-Silicon Field-Effect Transistor) fabrication process. Display panel 110 may include a substrate 210, which includes a display region DA and multiple pixels P arranged in a matrix within the display region DA.

[0085] Multiple pixels P can be arranged in each of multiple unit driving regions UDA. Each of the multiple pixels P may include multiple sub-pixels SP. Each of the multiple sub-pixels SP may include at least one light-emitting device.

[0086] For example, multiple sub-pixels SP may include a first sub-pixel SPa, a second sub-pixel SPb, and a third sub-pixel SPc. The first sub-pixel SPa may include a first light-emitting device that emits a first color of light, the second sub-pixel SPb may include a second light-emitting device that emits a second color of light, and the third sub-pixel SPc may include a third light-emitting device that emits a third color of light. For example, the first color of light, the second color of light, and the third color of light may be red light, green light, and blue light, respectively.

[0087] The display panel 110 may include multiple row lines RL and multiple column lines CL. Each of the multiple row lines RL may be arranged to extend in the row direction. The multiple row lines RL may be electrically connected to a first electrode of each of the multiple light-emitting devices ED. Each of the multiple column lines CL may be arranged to extend in the column direction. The multiple column lines CL may be electrically connected to a second electrode of each of the multiple light-emitting devices ED.

[0088] For example, the first electrode of each of the plurality of light-emitting devices (EDs) can be an anode electrode, and the second electrode of each of the plurality of light-emitting devices (EDs) can be a cathode electrode. As another example, the first electrode of each of the plurality of light-emitting devices (EDs) can be a cathode electrode, and the second electrode of each of the plurality of light-emitting devices (EDs) can be an anode electrode.

[0089] Each of the multiple row lines RL can be electrically connected to the second electrode of each of the multiple light-emitting devices ED. That is, the second electrode of each of the multiple light-emitting devices ED can be connected to a common row line RL.

[0090] Each of the multiple column lines CL can be electrically connected to the first electrode of each of the multiple light-emitting devices ED. That is, the first electrode of each of the multiple light-emitting devices ED can be connected to a common column line CL.

[0091] For example, the width of each of the multiple row lines RL can be greater than the width of each of the multiple column lines CL.

[0092] Reference Figure 4 Multiple drivers (DRVs) can drive multiple light-emitting devices (EDs), multiple column lines (CLs), and multiple row lines (RLs).

[0093] Each of the multiple drivers DRV can drive multiple row lines RL and multiple column lines CL arranged in the corresponding unit driving area UDA, thereby emitting light from multiple light-emitting devices ED arranged in the corresponding unit driving area UDA.

[0094] Multiple driver DRVs can be integrated into the display panel 110. Multiple driver DRVs can be positioned within display areas DA and can be arranged on the substrate 210. Multiple driver DRVs can be configured to correspond to multiple unit driving areas UDA. That is, one driver DRV can be positioned within one unit driving area UDA.

[0095] Multiple driver DRVs are arranged in the display area DA and can be positioned closer to the substrate 210 than multiple light-emitting devices EDs.

[0096] For example, multiple line lines RL can be driven sequentially. Alternatively, multiple line lines RL can be driven simultaneously. Yet another example is that two or more of the multiple line lines RL can be driven simultaneously.

[0097] For example, during a specific display driving period, at least one of the multiple row lines RL set in the unit driving area UDA can be driven, and the remaining row lines RL can be left undriven.

[0098] The voltage applied to the horizontal line RL can be referred to as the low potential voltage, and it can also be called the horizontal line voltage or cathode voltage. Depending on the drive type or drive state, the low potential voltage can have various values. For example, the low potential voltage can include a first low potential voltage, a second low potential voltage, and a third low potential voltage.

[0099] Driving a row line RL can mean providing a first low-potential voltage to the row line RL. Not driving a row line RL can mean providing a second low-potential voltage higher than the first low-potential voltage to the row line RL. Therefore, light-emitting devices ED overlapping with driven row lines RL can emit light, while light-emitting devices ED overlapping with undriven row lines RL can not emit light.

[0100] Reference Figure 4 A more detailed description of the structure of a unit-driven region UDA.

[0101] As an example, a unit-driven region UDA can be divided into a first sub-driven region SDA1 and a second sub-driven region SDA2. As another example, a unit-driven region UDA can be divided into three or more sub-driven regions. As yet another example, a unit-driven region UDA may not be divided into two or more sub-driven regions.

[0102] A unit driving region UDA may include a driver DRV driven by a driver DRV and (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m).

[0103] In embodiments of this disclosure, n can be a row sequence number, or the number of rows in each of the first sub-driving regions SDA1 and SDA2, or the number of row lines RL in each of the first sub-driving regions SDA1 and SDA2, or the number of pixel rows in each of the first sub-driving regions SDA1 and SDA2. m can be a column sequence number, or the number of columns in each of the first sub-driving regions SDA1 and SDA2, or the number of column lines CL in each of the first sub-driving regions SDA1 and SDA2, or the number of pixel columns in each of the first sub-driving regions SDA1 and SDA2.

[0104] (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m) can be arranged into 2n rows R(1), ..., R(2n) and m columns C(1), ..., C(m).

[0105] Among the (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m), the (n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(n,1), ..., P(n,m) arranged in the first row to the nth row R(1), ..., R(n) can be arranged in the first sub-driving region SDA1.

[0106] Among the (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m), the (n×m) pixels P(n+1,1), ..., P(n+1,m), P(n+2,1), ..., P(n+2,m), ..., P(2n,1), ..., P(2n,m) arranged in rows (n+1) to 2n, R(n+1), ..., R(2n), can be arranged in the second sub-driving region SDA2.

[0107] A unit driving region UDA can include 2n row lines RL(1), ..., RL(2n) to drive (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m).

[0108] Among the 2n row lines RL(1), ..., RL(2n), the first row line to the nth row line R(1), ..., RL(n) can be arranged in the first sub-driving region SDA1. Among the 2n row lines RL(1), ..., RL(2n), the (n+1)th row line to the 2nth row line R(n+1), ..., R(2n) can be arranged in the second sub-driving region SDA2.

[0109] Each of the 2n row lines RL(1), ..., RL(2n) can overlap with m pixels. For example, the first row line RL(1) can overlap with m pixels P(1,1), ..., P(1,m) arranged in the first row R(1). The nth row line RL(n) can overlap with m pixels P(n,1), ..., P(n,m) arranged in the nth row (R(n)). The (n+1)th row line RL(n+1) can overlap with m pixels P(n+1,1), ..., P(n+1,m) arranged in the (n+1)th row R(n+1). The 2nth row line RL(2n) can overlap with m pixels P(2n,1), ..., P(2n,m) arranged in the 2nth row R(2n).

[0110] For example, each of the m pixels P(n,1), ..., P(n,m) can include k sub-pixels SPa, SPb, and SPc.

[0111] The first sub-pixel SPa may include a first light-emitting device EDa that emits light of a first color. The first sub-pixel SPa may include at least one of a first primary sub-pixel SPa_M and a first redundant sub-pixel SPa_R. The first light-emitting device EDa included in the first sub-pixel SPa may include at least one of a first primary light-emitting device EDa_M included in the first primary sub-pixel SPa_M and a first redundant light-emitting device EDa_R included in the first redundant sub-pixel SPa_R.

[0112] The second sub-pixel SPb may include a second light-emitting device EDb that emits light of the second color. The second sub-pixel SPb may include at least one of a second primary sub-pixel SPb_M and a second redundant sub-pixel SPb_R. The second light-emitting device EDb included in the second sub-pixel SPb may include at least one of a second primary light-emitting device EDb_M included in the second primary sub-pixel SPb_M and a second redundant light-emitting device EDb_R included in the second redundant sub-pixel SPb_R.

[0113] The third sub-pixel SPc may include a third light-emitting device EDc that emits a third color of light. The third sub-pixel SPc may include at least one of a third main sub-pixel SPc_M and a third redundant sub-pixel SPc_R. The third light-emitting device EDc included in the third sub-pixel SPc may include at least one of the third main light-emitting device EDc_M included in the third main sub-pixel SPc_M and the third redundant light-emitting device EDc_R included in the third redundant sub-pixel SPc_R. Each row line may be connected to k sub-pixels SPa, SPb, and SPc included in each of the m pixels arranged in the corresponding row. More specifically, each row line may be connected to the second electrode of the k light-emitting devices EDa, EDb, and EDc included in each of the m pixels arranged in the corresponding row.

[0114] For example, the first row line RL(1) can be connected to k sub-pixels Spa, SPb, and SPc of each of the m pixels P(1,1), ..., (1,m) arranged in the first row R(1). More specifically, the first row line RL(1) can be connected to the second electrode of the k light-emitting devices EDa, EDb, and EDc of each of the m pixels P(1,1), ..., (1,m) arranged in the first row R(1).

[0115] Reference Figure 4 A unit driving region (UDA) may include (m×k×2) main column lines CLa_M, CLb_M, and CLc_M to drive (2n×m) pixels P(1,1), ..., P(1,m), P(2,1), ..., P(2,m), ..., P(2n,1), ..., P(2n,m), and in some cases, it may also include (m×k×2) redundant column lines CLa_R, CLb_R, and CLc_R. Here, k is the number of sub-pixels SP included in a pixel P. Figure 4 In the example, k is 3. That is, a pixel P can include three sub-pixels SPa, SPb, and SPc.

[0116] Each of the (m×k×2) main column lines CLa_M, CLb_M, and CLc_M can be connected to the first electrode of multiple main light-emitting devices arranged in the same column. Each of the (m×k×2) redundant column lines CLa_R, CLb_R, and CLc_R can be connected to the first electrode of multiple redundant light-emitting devices arranged in the same column.

[0117] Figure 5 A sub-pixel SP of a display panel 110 according to an embodiment of the present disclosure is illustrated.

[0118] Reference Figure 5According to embodiments of the present disclosure, a sub-pixel SP may include: a light-emitting device ED, which includes a first electrode Ecl and a second electrode Erl; a column driver C-DRV for driving column lines CL electrically connected to the first electrode Ecl of the light-emitting device ED; and a row driver R-DRV for driving row lines RL electrically connected to the second electrode Erl of the light-emitting device ED.

[0119] A light-emitting device (ED) may include a first electrode Ec1 and a second electrode Erl. The first electrode Ec1 may be electrically connected to a column line CL, and the second electrode Erl may be electrically connected to a row line RL. For example, the first electrode Ec1 may be an anode electrode, and the second electrode Erl may be a cathode electrode. Alternatively, the first electrode Ec1 may be a cathode electrode, and the second electrode Erl may be an anode electrode.

[0120] The column driver C-DRV included in the cell driving region UDA can be connected to and can drive multiple column lines CL included in the cell driving region UDA. Each of the multiple column lines CL can be commonly connected to the first electrode Ec1 of each of the multiple light-emitting devices ED included in multiple sub-pixels SP arranged in corresponding columns.

[0121] The row driver R-DRV included in the cell driving region UDA can be connected to and can drive multiple row lines RL included in the cell driving region UDA. Each of the multiple row lines RL can be commonly connected to the second electrode Erl of each of the multiple light-emitting devices ED included in multiple sub-pixels SP arranged in the corresponding row.

[0122] The column driver C-DRV may include a master node comprising a first node N1, a second node N2, a third node N3, and a fourth node N4. The column driver C-DRV may include a driving transistor DRT and a first light-emitting control transistor EMT1.

[0123] The first node N1 can be a node to which a voltage Vg is applied to control the switch of the driving transistor DRT. The second node N2 can be a node electrically connected to a high-potential voltage node NVDD to which a high-potential voltage VDD is applied. The third node N3 can be a node to which the driving transistor DRT is connected to the first light-emitting control transistor EMT1. The fourth node N4 can be a node to which the first light-emitting control transistor EMT1 and the light-emitting device ED are electrically connected, and can be a node to which the column line CL is electrically connected. Here, the source or drain electrode of the first light-emitting control transistor EMT1 and the first electrode Ecl of the light-emitting device ED can be commonly connected to the column line CL.

[0124] The driving transistor DRT provides driving current to make the light-emitting device ED emit light. The driving transistor DRT is connected between the second node N2 and the third node N3, and the connection between the second node N2 and the third node N3 can be controlled according to the voltage of the first node N1.

[0125] The gate electrode of the driving transistor DRT is electrically connected to the first node N1, and a gate voltage Vg can be applied to it. The drain or source electrode of the driving transistor DRT can be electrically connected to the second node N2. The source or drain electrode of the driving transistor DRT can be electrically connected to the third node N3.

[0126] The first light-emitting control transistor EMT1 can control the connection of the path through which the drive current flows and can play a role in controlling the light emission of the light-emitting device ED.

[0127] If the driving transistor DRT and the first light-emitting control transistor EMT1 are turned on between the high potential voltage VDD and the low potential voltage VSS, the driving current can be supplied to the light-emitting device ED through the driving transistor DRT and the first light-emitting control transistor EMT1. Therefore, the light-emitting device ED can emit light.

[0128] The first light-emitting control transistor EMT1 is connected between the third node N3 and the fourth node N4, and the connection between the third node N3 and the fourth node N4 can be controlled according to the first light-emitting control signal EM1. The first light-emitting control signal EM1 can be applied to the gate electrode of the first light-emitting control transistor EMT1. The drain or source electrode of the first light-emitting control transistor EMT1 can be electrically connected to the third node N3. The source or drain electrode of the first light-emitting control transistor EMT1 can be electrically connected to the fourth node N4.

[0129] The first emission control signal EM1 may be a pulse width modulated signal that varies over a predefined time (e.g., each frame or each subframe included in a frame), but the embodiments of this disclosure are not limited thereto.

[0130] The first light-emitting control signal EM1 can be generated by the driver DRV, or it can be provided to the driver DRV from drive-related circuitry such as a timing controller. For example, if the first light-emitting control signal EM1 is a pulse-width modulated signal, then the first light-emitting control signal EM1 can have a pulse width corresponding to the image signal (e.g., data voltage, data signal). For example, if the pulse width of the first light-emitting control signal EM1 is large, the brightness of the light-emitting device ED can be high. If the pulse width of the first light-emitting control signal EM1 is small, the brightness of the light-emitting device ED can be low.

[0131] The row driver R-DRV can drive at least one row line RL by providing a low potential voltage VSS to at least one row line RL.

[0132] The horizontal driver R-DRV can perform display enable or display disable driving for a horizontal line RL. The horizontal driver R-DRV can provide a low-potential voltage for display enable driving a horizontal line RL, thus enabling the display for that horizontal line RL. The horizontal driver R-DRV can also provide a low-potential voltage for display disable driving a horizontal line RL, thus enabling the display for that horizontal line RL.

[0133] The low potential voltage used to indicate the power-on drive and the low potential voltage used to indicate the power-off drive can be different. For example, the low potential voltage used to indicate the power-on drive can be lower than the low potential voltage used to indicate the power-off drive. In embodiments of this disclosure, the "low potential voltage used to indicate the power-on drive" is also referred to as the "first low potential voltage," and the "low potential voltage used to indicate the power-off drive" is also referred to as the "second low potential voltage."

[0134] In addition to the driving transistor DRT and the first light-emitting control transistor EMT1, the column driver C-DRV may also include at least one switching element and / or at least one transistor. Each of the transistors included in the column driver C-DRV may be an n-type transistor or a p-type transistor.

[0135] The column driver C-DRV may also include at least one capacitor. The column driver C-DRV may also include at least one circuit element. For example, at least one circuit element may include a power output buffer.

[0136] A row driver R-DRV may include at least one switching element and / or at least one transistor. Each of the transistors included in the row driver R-DRV may be an n-type transistor or a p-type transistor. The row driver R-DRV may also include at least one circuit element. For example, at least one circuit element may include a power output buffer.

[0137] Some or all of the column driver C-DRV and row driver R-DRV may be internal circuitry included in the driver DRV. As another example, the column driver C-DRV and row driver R-DRV may not be included in the driver DRV and may be circuitry formed on the substrate 210 of the display panel 110.

[0138] Figure 6 This is a plan view of the display panel 110 according to an embodiment of the present disclosure.

[0139] According to embodiments of the present disclosure, the substrate 210 of the display panel 110 may include a display area DA and a non-display area NDA, and the non-display area NDA may include a first non-display area NDA1, a curved area BA and a second non-display area NDA2.

[0140] Multiple driver DRVs can be arranged in the display area DA. Each of the multiple driver DRVs can be used to drive the corresponding unit driving area ( Figure 4 The circuitry for the light-emitting devices of multiple sub-pixels in the UDA (Unified Data Area). Each of the multiple driver DRVs may include a row driver R-DRV for driving multiple row lines and a column driver C-DRV for driving multiple column lines, so as to drive the corresponding cell driving region ( Figure 4 Multiple light-emitting devices (EDs) in UDA.

[0141] The pad portion 211, which includes multiple pads PD, can be located in the second non-display area NDA2.

[0142] Multiple signal lines SL and multiple link lines LL for signal transmission between multiple drivers DRV and pad portion 211 arranged in display area DA can be arranged on substrate 210. Multiple signal lines SL can be electrically connected between multiple link lines LL and multiple drivers DRV. Multiple link lines LL can be electrically connected to multiple pads PD and multiple signal lines SL.

[0143] Multiple link lines LL can be arranged in the non-display area NDA, and all or part of each of the multiple signal lines SL can be arranged in the display area DA.

[0144] Each of the multiple driver DRVs can receive various signals through multiple link lines LL and multiple signal lines SL to perform drive operations. Here, the various signals can include various power supply voltages and various signals required for the drive operation of each of the multiple driver DRVs.

[0145] When the bending region BA bends, a portion of the multiple link lines LL may also bend. Stress may concentrate on the bent portion of the link lines LL, potentially causing cracks to appear within them. Therefore, the multiple link lines LL can be formed of a conductive material with excellent ductility to reduce cracking when the bending region BA bends. Alternatively, the multiple link lines LL can be formed of one of various conductive materials used in the display region DA. The multiple link lines LL can consist of a multilayer structure comprising various conductive materials. The multiple link lines LL can be composed of various shapes to reduce stress. At least a portion of the multiple link lines LL arranged on the bending region BA may extend in the same direction as the bending region BA, or may extend in a direction different from the bending region BA to reduce stress.

[0146] In the following text, in order to examine the planar structure of the display panel 110 according to an embodiment of the present disclosure in more detail, an example will be described in more detail. Figure 4 Part 1100 of the plan view shows the planar structure.

[0147] Figure 7 and Figure 8 This is a plan view of a portion 1100 of a display panel 110 according to an embodiment of the present disclosure. Figure 7 and Figure 8 yes Figure 4 A magnified plan view of part 1100 of the plan view, and a magnified plan view of the two-row, two-column region 1100.

[0148] Figure 7 It is a plan view that does not show the two row lines RL(1) and RL(2) arranged in the two-row, two-column area 1100, and Figure 8 This involves adding two row lines RL(1) and RL(2) arranged in a two-row, two-column area 1100. Figure 7 The floor plan.

[0149] In a two-row, two-column region 1100, four pixels P(1,1), P(1,2), P(2,1), and P(2,2) can be arranged in two rows and two columns. That is, in the two-row, two-column region 1100, two pixels P(1,1) and P(1,2) can be arranged in the first row (e.g., the first pixel row), and two pixels P(2,1) and P(2,2) can be arranged in the second row (e.g., the second pixel row). Additionally, two pixels P(1,1) and P(2,1) can be arranged in the first column (e.g., the first pixel column), and two pixels P(1,2) and P(2,2) can be arranged in the second column (e.g., the second pixel column).

[0150] In the two-row, two-column region 1100, each of the four pixels P(1,1), P(1,2), P(2,1), and P(2,2) arranged in two rows and two columns can include k sub-pixels. Here, k is the number of sub-pixels included in a pixel.

[0151] exist Figure 7 and Figure 8 The example shown illustrates the case where k is 3. Therefore, in the two-row, two-column region 1100, each of the four pixels P(1,1), P(1,2), P(2,1), and P(2,2) arranged in two rows and two columns can include three sub-pixels SPa, SPb, and SPc. The following description focuses on the case where k is 3.

[0152] The three sub-pixels may include a first sub-pixel Spa that includes a first light-emitting device EDa that emits light of the first color, a second sub-pixel SPb that includes a second light-emitting device EDb that emits light of the second color, and a third sub-pixel SPc that includes a third light-emitting device EDc that emits light of the third color.

[0153] If the display panel 110 according to the embodiments of this disclosure has a redundant structure, the sub-pixel redundancy structure is as follows: A first sub-pixel SPa may include a first main sub-pixel SPa_M and a first redundant sub-pixel SPa_R. The first main sub-pixel SPa_M includes a first main light-emitting device EDa_M, and the first redundant sub-pixel SPa_R includes a first redundant light-emitting device EDa_R. A second sub-pixel SPb may include a second main sub-pixel SPb_M and a second redundant sub-pixel SPb_R. The second main sub-pixel SPb_M includes a second main light-emitting device EDb_M, and the second redundant sub-pixel SPb_R includes a second redundant light-emitting device EDb_R. A third sub-pixel SPc may include a third main sub-pixel SPc_M and a third redundant sub-pixel SPc_R. The third main sub-pixel SPc_M includes a third main light-emitting device EDc_M, and the third redundant sub-pixel SPc_R includes a third redundant light-emitting device EDc_R.

[0154] If the display panel 110 according to the embodiments of this disclosure has a redundant structure, the redundant structure of the light-emitting devices is as follows: The first light-emitting device EDa may include a first main light-emitting device EDa_M emitting a first color of light and a first redundant light-emitting device EDa_R emitting the first color of light. The second light-emitting device EDb may include a second main light-emitting device EDb_M emitting a second color of light and a second redundant light-emitting device EDb_R emitting the second color of light. The third light-emitting device EDb may include a third main light-emitting device EDc_M emitting a third color of light and a third redundant light-emitting device EDc_R emitting the third color of light.

[0155] In a two-row, two-column region 1100, a first row line RL(1) and a second row line RL(2) can be arranged. The first row line RL(1) can be arranged in the first row (i.e., the first pixel row), and the second row line RL(2) can be arranged in the second row (i.e., the second pixel row).

[0156] In the area where the first row line RL(1) is arranged, the first principal sub-pixel SPa_M, the first redundant sub-pixel SPa_R, the second principal sub-pixel SPb_M, the second redundant sub-pixel SPb_R, the third principal sub-pixel SPc_M and the third redundant sub-pixel SPc_R arranged in the first row (first pixel row) can be arranged.

[0157] The first row line RL(1) can be connected to the second electrode Erl of each of the first main light-emitting device EDa_M, the first redundant light-emitting device EDa_R, the second main light-emitting device EDb_M, the second redundant light-emitting device EDb_R, the third main light-emitting device EDc_M, and the third redundant light-emitting device EDc_R arranged in the first row (or the first pixel row).

[0158] At least a portion of the first row line RL(1) may overlap with the first main light-emitting device EDa_M, the first redundant light-emitting device EDa_R, the second main light-emitting device EDb_M, the second redundant light-emitting device EDb_R, the third main light-emitting device EDc_M, and the third redundant light-emitting device EDc_R arranged in the first row (or the first pixel row).

[0159] In the area where the second row line RL(2) is arranged, the first principal sub-pixel SPa_M, the first redundant sub-pixel SPa_R, the second principal sub-pixel SPb_M, the second redundant sub-pixel SPb_R, the third principal sub-pixel SPc_M and the third redundant sub-pixel SPc_R arranged in the second row (second pixel row) can be arranged.

[0160] The second row line RL(2) can be connected to the second electrode Erl of each of the first main light-emitting device EDa_M, the first redundant light-emitting device EDa_R, the second main light-emitting device EDb_M, the second redundant light-emitting device EDb_R, the third main light-emitting device EDc_M, and the third redundant light-emitting device EDc_R arranged in the second row (or the second pixel row).

[0161] At least a portion of the second row line RL(2) may overlap with the first main light-emitting device EDa_M, the first redundant light-emitting device EDa_R, the second main light-emitting device EDb_M, the second redundant light-emitting device EDb_R, the third main light-emitting device EDc_M, and the third redundant light-emitting device EDc_R arranged in the second row (or the second pixel row).

[0162] The multiple first column lines CL arranged in the first column (or first pixel column) may include a first main column line CLa_M and a first redundant column line CLa_R. The first main column line CLa_M is connected to a first main sub-pixel SPa_M in each of the two pixels P(1,1) and P(2,1) arranged in the first column (or first pixel column), and the first redundant column line CLa_R is connected to a first redundant sub-pixel SPa_R in each of the two pixels P(1,1) and P(2,1) arranged in the first column (or first pixel column).

[0163] The first main column line CLa_M arranged in the first column (or first pixel column) can be commonly connected to the first electrode Ec1 of the two first main light-emitting devices EDa_M arranged in the first column (or first pixel column).

[0164] The first redundant column line CLa_R arranged in the first column (or first pixel column) can be commonly connected to the first electrode Ec1 of the two first redundant light-emitting devices EDa_R arranged in the first column (or first pixel column).

[0165] Additionally, the multiple first column lines CL arranged in the first column (or first pixel column) may also include a second main column line CLb_M and a second redundant column line CLb_R. The second main column line CLb_M is connected to the second main sub-pixel SPb_M in each of the two pixels P(1,1) and P(2,1) arranged in the first column (or first pixel column), and the second redundant column line CLb_R is connected to the second redundant sub-pixel SPb_R in each of the two pixels P(1,1) and P(2,1) arranged in the first column (or first pixel column).

[0166] The second main column line CLb_M arranged in the first column (or first pixel column) can be commonly connected to the first electrode Ec1 of the two second main light-emitting devices EDb_M arranged in the first column (or first pixel column).

[0167] The second redundant column line CLb_R arranged in the first column (or first pixel column) can be commonly connected to the first electrode Ec1 of the two second redundant light-emitting devices EDb_R arranged in the first column (or first pixel column).

[0168] Additionally, the multiple first column lines CL arranged in the first column (or first pixel column) may also include a third main column line CLc_M and a third redundant column line CLc_R. The third main column line CLc_M is connected to the third main sub-pixel SPc_M in each of the two pixels P(1,1) and P(2,1) arranged in the first column (or first pixel column), and the third redundant column line CLc_R is connected to the third redundant sub-pixel SPc_R in each of the two pixels P(1,1) and P(2,1) arranged in the first column (or first pixel column).

[0169] The third main column line CLc_M arranged in the first column (or first pixel column) can be commonly connected to the first electrode Ec1 of the two third main light-emitting devices EDc_M arranged in the first column (or first pixel column).

[0170] The third redundant column line CLc_R arranged in the first column (or first pixel column) can be commonly connected to the first electrode Ec1 of the two third redundant light-emitting devices EDc_R arranged in the first column (or first pixel column).

[0171] The multiple second column lines CL arranged in the second column (or second pixel column) may include a first main column line CLa_M and a first redundant column line CLa_R. The first main column line CLa_M is connected to a first main sub-pixel SPa_M in each of the two pixels P(1,2) and P(2,2) arranged in the second column (or second pixel column), and the first redundant column line CLa_R is connected to a first redundant sub-pixel SPa_R in each of the two pixels P(1,2) and P(2,2) arranged in the second column (or second pixel column).

[0172] The first main column line CLa_M arranged in the second column (or second pixel column) can be commonly connected to the first electrode Ec1 of the two first main light-emitting devices EDa_M arranged in the second column (or second pixel column).

[0173] The first redundant column line CLa_R arranged in the second column (or second pixel column) can be commonly connected to the first electrode Ec1 of the two first redundant light-emitting devices EDa_R arranged in the second column (or second pixel column).

[0174] Additionally, the multiple second column lines CL arranged in the second column (second pixel column) may also include a second main column line CLb_M and a second redundant column line CLb_R. The second main column line CLb_M is connected to the second main sub-pixel SPb_M in each of the two pixels P(1,2) and P(2,2) arranged in the second column (or second pixel column), and the second redundant column line CLb_R is connected to the second redundant sub-pixel SPb_R in each of the two pixels P(1,2) and P(2,2) arranged in the second column (or second pixel column).

[0175] The second main column line CLb_M arranged in the second column (or second pixel column) can be commonly connected to the first electrode Ec1 of the two second main light-emitting devices EDb_M arranged in the second column (or second pixel column).

[0176] The second redundant column line CLb_R arranged in the second column (or second pixel column) can be commonly connected to the first electrode Ec1 of the two second redundant light-emitting devices EDb_R arranged in the second column (or second pixel column).

[0177] Additionally, the multiple first column lines CL arranged in the second column (or second pixel column) may also include a third main column line CLc_M and a third redundant column line CLc_R. The third main column line CLc_M is connected to the third main sub-pixel SPc_M in each of the two pixels P(1,2) and P(2,2) arranged in the second column (or second pixel column), and the third redundant column line CLc_R is connected to the third redundant sub-pixel SPc_R in each of the two pixels P(1,2) and P(2,2) arranged in the second column (or second pixel column).

[0178] The third main column line CLc_M arranged in the second column (or second pixel column) can be commonly connected to the first electrode Ec1 of the two third main light-emitting devices EDc_M arranged in the second column (or second pixel column).

[0179] The third redundant column line CLc_R arranged in the second column (or second pixel column) can be commonly connected to the first electrode Ec1 of the two third redundant light-emitting devices EDc_R arranged in the second column (or second pixel column).

[0180] The main column connection electrode CCE_M and the redundant column connection electrode CCE_R arranged in the first column (or first pixel column) can be set between the first main column line CLa_M and the first redundant column line CLa_R.

[0181] The main column connection electrode CCE_M and the redundant column connection electrode CCE_R arranged in the second column (or second pixel column) can be set between the second main column line CLb_M and the second redundant column line CLb_R.

[0182] The main column connection electrode CCE_M and the redundant column connection electrode CCE_R, which are arranged in the third column (or the third pixel column), can be set between the third main column line CLc_M and the third redundant column line CLc_R.

[0183] The display panel 110 according to an embodiment of the present disclosure may further include at least one row connection electrode for electrically connecting each of a plurality of row lines RL to a driver DRV.

[0184] The display panel 110 according to an embodiment of the present disclosure may further include at least one first row connection electrode RCE (1) connected to a first row line RL (1) arranged in a first row (or first pixel row), and at least one second row connection electrode RCE (2) connected to a second row line RL (2) arranged in a second row (or second pixel row).

[0185] The first row line RL(1) may overlap perpendicularly with at least one first row connecting electrode RCE(1), and the second row line RL(2) may overlap perpendicularly with at least one second row connecting electrode RCE(2).

[0186] The first row line RL(1) can be electrically connected to the row driver R-DRV of the corresponding driver DRV through at least one first row connection electrode RCE(1). The second row line RL(2) can be electrically connected to the row driver R-DR of the corresponding driver DRV through at least one second row connection electrode RCE(2).

[0187] The dammed area (BNK) can be disposed in each of the plurality of sub-pixels (SP). The plurality of dammed areas (BNK) can be a structure on which a plurality of light-emitting devices (EDs) are mounted. During panel manufacturing, in the transfer process for transferring the plurality of light-emitting devices (EDs) to the display device 100, the plurality of dammed areas (BNK) can guide the position of the plurality of light-emitting devices (EDs). That is, during panel manufacturing, the plurality of light-emitting devices (EDs) can be transferred to the plurality of dammed areas (BNK) in the transfer process of the plurality of light-emitting devices (EDs). The plurality of dammed areas (BNK) can be an organic insulating layer, a dammed pattern, or a structure, but embodiments of this disclosure are not limited thereto.

[0188] The embankment BNK of each of the multiple sub-pixels SP can be arranged to be spaced apart from each other. The embankment BNK of each of the multiple sub-pixels SP can be configured to be separated from each other. Therefore, the embankment BNK of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3, which are transferred with different types of light-emitting devices ED, can be easily identified.

[0189] The dam portion BNK of the first primary sub-pixel SPa_M and the dam portion BNK of the first redundant sub-pixel SPa_R can be connected to each other, or they can be spaced apart or formed separately. For example, considering the design requirements of the transfer process, the dam portion BNK of the first primary sub-pixel SPa_M and the dam portion BNK of the first redundant sub-pixel SPa_R (where the same type of light-emitting devices EDa_M and EDa_R (e.g., those emitting the same color of light)) can be connected to each other, or they can be spaced apart or formed separately. Furthermore, the dam portion BNK of the second primary sub-pixel SPb_M and the dam portion BNK of the second redundant sub-pixel SPb_R can be connected to each other, or they can be spaced apart or formed separately. The dam portion BNK of the third primary sub-pixel SPc_M and the dam portion BNK of the third redundant sub-pixel SPc_R can be connected to each other, or they can be spaced apart or formed separately.

[0190] The embankment BNK of the first principal sub-pixel SPa_M and the first redundant sub-pixel SPa_R, the embankment BNK of the second principal sub-pixel SPb_M and the second redundant sub-pixel SPb_R, and the embankment BNK of the third principal sub-pixel SPc_M and the third redundant sub-pixel SPc_R can be formed in various ways, and the embodiments of this disclosure are not limited thereto.

[0191] For example, multiple dammed BNKs can be formed from organic insulating materials. Multiple dammed BNKs can be formed from a single layer or multiple layers of organic insulating material. For example, multiple dammed BNKs can be composed of photoresist, polyimide (PI), or acrylic materials.

[0192] Multiple row lines RL can be formed of a transparent conductive material, but the embodiments disclosed herein are not limited thereto. The multiple row lines RL can be made of a transparent conductive material so that light emitted from the light-emitting device ED can be guided upwards through the row lines RL. For example, the multiple row lines RL can be made of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), etc.

[0193] The multiple column lines CL can be made of conductive materials. For example, the multiple column lines CL can be formed from conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO), but the embodiments of this disclosure are not limited thereto. As another example, the multiple column lines CL can have a multilayer structure of conductive materials. For example, the multiple column lines CL can be made from a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO).

[0194] For example, if the light-emitting device (ED) is a device manufactured using semiconductor processes (e.g., a micro-LED), multiple EDs can be formed on a wafer, and the EDs can be transferred to the substrate 210 of the display panel 110 to manufacture the display panel 110. During the transfer of multiple EDs of microscale size from the wafer to the substrate 210, various defects may occur. For example, non-transfer defects may occur in some sub-pixels (SPs) where the EDs are not transferred, and misalignment defects may occur where the EDs are transferred out of their proper positions due to alignment errors in other sub-pixels (SPs). Additionally, the transfer process may proceed normally, but the transferred EDs themselves may be defective. Therefore, considering the defects (including non-transfer defects) that occur during the ED transfer process, a main ED and a redundant ED, which are of the same type of light-emitting device (e.g., light-emitting devices emitting the same color of light), can be transferred to a single sub-pixel (SP). Illumination tests can be performed on the same type of main ED and redundant ED, and only one of the main ED and redundant ED ultimately determined to be normal can be used.

[0195] For example, the first primary light-emitting device EDa_M and the first redundant light-emitting device EDa_R can be transferred together to a first sub-pixel SPa, and defects in the first primary light-emitting device EDa_M and the first redundant light-emitting device EDa_R can be checked. If, as a result of the check, both the first primary light-emitting device EDa_M and the first redundant light-emitting device EDa_R are determined to be normal, then only the first primary light-emitting device EDa_M can be used, and the first redundant light-emitting device EDa_R can be omitted. If, as a result of the check, only the first redundant light-emitting device EDa_R is normal, then the first primary light-emitting device EDa_M is not used, and only the first redundant light-emitting device EDa_R can be used. Therefore, even if the same first primary light-emitting device EDa_M and the first redundant light-emitting device EDa_R are transferred to a first sub-pixel SPa, ultimately only one of the first primary light-emitting device EDa_M and the first redundant light-emitting device EDa_R can be used.

[0196] Therefore, in a sub-pixel SP, the redundant light-emitting device can be a backup light-emitting device that is transferred in case of failure of the main light-emitting device. In the event of a failure of the main light-emitting device, the redundant light-emitting device can be used as a replacement. Thus, by transferring both the main light-emitting device and the redundant light-emitting device together to a sub-pixel SP, the degradation of display quality caused by a defect in either the main light-emitting device or the redundant light-emitting device can be minimized or reduced.

[0197] In the embodiments of this disclosure, the first principal sub-pixel SPa_M and the first redundant sub-pixel SPa_R can also be referred to as sub-pixel 1-1 and sub-pixel 1-2, respectively; the second principal sub-pixel SPb_M and the second redundant sub-pixel SPb_R can also be referred to as sub-pixel 2-1 and sub-pixel 2-2; and the third principal sub-pixel SPc_M and the third redundant sub-pixel SPc_R can also be referred to as sub-pixel 3-1 and sub-pixel 3-2, respectively.

[0198] In the embodiments of this disclosure, the first main light-emitting device EDa_M and the first redundant light-emitting device EDa_R can also be referred to as 1-1 light-emitting device and 1-2 light-emitting device, the second main light-emitting device EDb_M and the second redundant light-emitting device EDb_R can also be referred to as 2-1 light-emitting device and 2-2 light-emitting device, and the third main light-emitting device EDc_M and the third redundant light-emitting device EDc_R can also be referred to as 3-1 light-emitting device and 3-2 light-emitting device.

[0199] The display panel 110 according to an embodiment of the present disclosure may further include multiple communication lines NL. The multiple communication lines NL may be arranged so that they do not overlap with the metal layer in the vertical direction. For example, the multiple communication lines NL may be arranged between the first row line RL(1) and the second row line RL(2).

[0200] For example, multiple communication lines (NLs) can be wiring for short-range communication (e.g., NFC (Near Field Communication) and Bluetooth). Multiple communication lines (NLs) can also be used as signal transmission lines and / or antennas.

[0201] Reference Figure 8 Each of the first row line RL(1) and the second row line RL(2) can be arranged above multiple light-emitting devices and can be arranged in a strip shape that overlaps with all of the multiple light-emitting devices.

[0202] Figure 9 This is a cross-sectional view of the display panel 110 according to an embodiment of the present disclosure. However, Figure 9 It is a cross-sectional view of a portion of the unit drive area UDA where a driver DRV is arranged.

[0203] Reference Figure 9 The display panel 110 may include a substrate 210, a driver DRV on the substrate 210, a stacked assembly 1410 on the driver DRV, a plurality of light-emitting devices ED disposed on the stacked assembly 1410, an optical layer 1420 disposed on the stacked assembly 1410 and between the plurality of light-emitting devices ED, an outer coating layer 1430 disposed on the plurality of light-emitting devices ED and the optical layer 1420, an adhesive layer 1440 disposed on the outer coating layer 1430, and a cover member 118 disposed on the adhesive layer 1440.

[0204] Multiple column lines CL can be arranged on the stack 1410. Each of the multiple column lines CL can be arranged between the stack 1410 and the light-emitting device ED. Multiple row lines RL can be arranged on multiple light-emitting devices ED and optical layer 1420.

[0205] The display panel 110 may include: a substrate 210 including a display area DA; a plurality of light-emitting devices ED disposed in the display area DA; a plurality of column lines CL electrically connected to a first electrode Ec1 of each of the plurality of light-emitting devices ED; a plurality of row lines RL electrically connected to a second electrode Erl of each of the plurality of light-emitting devices ED; and a plurality of drivers DRV configured to drive the plurality of light-emitting devices ED, the plurality of column lines CL and the plurality of row lines RL.

[0206] Multiple driver DRVs can be arranged in the display area DA and can be positioned closer to the substrate 210 than multiple light-emitting devices EDs.

[0207] The laminate 1410 may include multiple insulating layers. These multiple insulating layers may include multiple organic layers. At least one of the multiple organic layers may be disposed on a side of the driver DRV. For example, two or more organic layers may be disposed on a side of the driver DRV.

[0208] The stack 1410 may further include at least one metal layer connecting the driver DRV and column line CL, and at least one metal layer connecting the driver DRV and row line RL.

[0209] Figure 10 It is along Figure 6 A detailed cross-sectional view of the display panel 110 according to an embodiment of the present disclosure, taken by the AB cutting line, and Figure 11 This is an enlarged cross-sectional view of the first sub-pixel SP of the display panel 110 according to an embodiment of the present disclosure. However, Figure 10 It is a cross-sectional view of the display area DA, the first non-display area NDA, the curved area BA, and the second non-display area NDA.

[0210] In addition, for ease of explanation, Figure 6 The AB cut-off line in the diagram is illustrated as not overlapping with signal line SL and link line LL, but Figure 6 The AB cut line is intended to indicate the same position as the adjacent signal line SL and link line LL.

[0211] A buffer layer 1511 may be disposed on the substrate 210. The buffer layer 1511 may include a first buffer layer 1511a and a second buffer layer 1511b. The first buffer layer 1511a and the second buffer layer 1511b may be arranged in the display area DA, the first non-display area NDA1 and the second non-display area NDA, and may not be arranged in the entirety or part of the curved area BA.

[0212] The first buffer layer 1511a and the second buffer layer 1511b can reduce the penetration of moisture or impurities into the substrate 210. The first buffer layer 1511a and the second buffer layer 1511b can be made of inorganic insulating materials. For example, the first buffer layer 1511a and the second buffer layer 1511b can be composed of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx).

[0213] For example, a portion of the first buffer layer 1511a and the second buffer layer 1511b on the curved region BA can be removed. The upper surface of the substrate 210 located on the curved region BA can be exposed by removing the area of ​​the first buffer layer 1511a and the second buffer layer 1511b (e.g., an opening).

[0214] By removing the first buffer layer 1511a and the second buffer layer 1511b from the bending region BA, the occurrence of cracks in the first buffer layer 1511a and the second buffer layer 1511b that may occur during bending can be minimized or reduced.

[0215] Multiple alignment keys MK can be arranged between the first buffer layer 1511a and the second buffer layer 1511b. The multiple alignment keys MK can be configured to identify the position of the driver DRV during the manufacturing process of the display panel 110. For example, the multiple alignment keys MK can be configured to align the position of the driver DRV transferred on the adhesive layer 1512. In another example, the multiple alignment keys MK can be omitted.

[0216] The adhesive layer 1512 may be disposed on the second buffer layer 1511b. The adhesive layer 1512 may be disposed in the display area DA, the first non-display area NDA1, the curved area BA, and the second non-display area NDA2. Alternatively, at least a portion of the adhesive layer 1512 may be removed from the non-display area NDA, including the curved area BA. For example, the adhesive layer 1512 may be made of any of the following: adhesive polymer, epoxy resin, UV-curable resin, polyimide series, acrylate series, urethane series, and polydimethylsiloxane (PDMS).

[0217] The driver DRV can be disposed on the adhesive layer 1512 in the display area DA. If the driver DRV is implemented as a driver chip (e.g., a driver integrated circuit), the driver can be mounted on the adhesive layer 1512 via a transfer process.

[0218] The display panel 110 may further include a side protective layer 1513 disposed on the sides of the plurality of driver DRVs and an upper protective layer 1514 disposed on the plurality of driver DRVs and the side protective layer 1513. For example, the side protective layer 1513 may include at least one of a first protective layer 1513a and a second protective layer 1513b disposed on the sides of the plurality of driver DRVs, and in some cases, may also include at least one additional protective layer. The first protective layer 1513a and the second protective layer 1513b may be disposed on the adhesive layer 1512. The first protective layer 1513a and the second protective layer 1513b may be arranged to surround the side surface of the driver DRV. For example, the second protective layer 1513b may be arranged to cover at least a portion of the upper surface of the driver DRV. For example, at least one of the first protective layer 1513a and the second protective layer 1513b disposed on the curved region BA may be omitted. For example, the first protective layer 1513a may be completely disposed on the display area DA and the non-display area NDA, and the second protective layer 1513b may be partially disposed on the display area DA, the first non-display area NDA1, and the second non-display area NDA2. For example, at least a portion of the second protective layer 1513b may be removed from all or part of the curved area BA.

[0219] For example, the side protective layer 1513, which includes at least one of the first protective layer 1513a and the second protective layer 1513b, may be made of an organic insulating material (i.e., an organic layer), but embodiments of this disclosure are not limited thereto. For example, the first protective layer 1513a and the second protective layer 1513b may be made of photoresist, polyimide (PI), or photoacryloyl materials. For example, the first protective layer 1513a and the second protective layer 1513b may be an outer coating or an insulating layer.

[0220] The display panel 110 may also include a plurality of insulating layers 1515 disposed on the upper protective layer 1514. For example, the plurality of insulating layers 1515 may include a first insulating layer 1515a, a second insulating layer 1515b, and a third insulating layer 1515c.

[0221] In the display area DA, multiple line connection patterns (LCPs) can be arranged on the second protective layer 1513b. The multiple line connection patterns (LCPs) can be wiring used to electrically connect the driver DRV to other components. For example, the driver DRV can be electrically connected to multiple column lines CL, multiple row lines RL, and multiple row connection electrodes RCE via the multiple line connection patterns (LCPs).

[0222] For example, multiple line connection patterns (LCPs) may include a first line connection pattern (LCP1), a second line connection pattern (LCP2), a third line connection pattern (LCP3), and a fourth line connection pattern (LCP4). For example, the first line connection pattern (LCP1), the second line connection pattern (LCP2), the third line connection pattern (LCP3), and the fourth line connection pattern (LCP4) may be arranged as different metal layers.

[0223] For example, multiple first-line connection patterns LCP1 can be arranged on the second protective layer 1513b. The multiple first-line connection patterns LCP1 can be electrically connected to the driver DRV. The multiple first-line connection patterns LCP1 can send the voltage output from the driver DRV to the column line CL or the row line RL.

[0224] The display panel 110 may further include a side protective layer 1513 comprising at least one of a first protective layer 1513a and a second protective layer 1513b, and an upper protective layer 1514 disposed on a plurality of driver DRVs. For example, the upper protective layer 1514 may include a third protective layer 1514, and in some cases, may also include at least one additional protective layer. The third protective layer 1514 may be disposed on the second protective layer 1513b and a plurality of first line connection patterns LCP1. The third protective layer 1514 may be disposed entirely in the display area DA and the non-display area NDA. In the curved area BA, the third protective layer 1514 may cover or surround the side surface of the second protective layer 1513b and the upper surface of the first protective layer 1513a.

[0225] For example, the third protective layer 1514 may be made of an organic insulating material. For example, the third protective layer 1514 may be made of photoresist, polyimide (PI), or photoacryloyl material. For example, the first protective layer 1513a, the second protective layer 1513b, and the third protective layer 1514 may be made of the same insulating material, or at least one of the first protective layer 1513a, the second protective layer 1513b, and the third protective layer 1514 may be made of an insulating material different from the rest.

[0226] Multiple second-line connection patterns LCP2 can be arranged on the third protective layer 1514. The multiple second-line connection patterns LCP2 can be electrically connected or directly connected to the driver DRV. For example, a portion of the second-line connection patterns LCP2 can be directly or indirectly connected to the driver DRV through contact holes in the third protective layer 1514. Other portions of the second-line connection patterns LCP2 can be electrically connected to the first-line connection pattern LCP1 through contact holes in the third protective layer 1514. However, embodiments of this disclosure are not limited thereto. Voltage output from the driver DRV can be sent to column line CL or row line RL through multiple second-line connection patterns LCP2 and other connection patterns.

[0227] The first insulating layer 1515a can be disposed on a plurality of second line connection patterns LCP2. The first insulating layer 1515a can be disposed entirely over the display area DA and the non-display area NDA. The first insulating layer 1515a can be made of an organic insulating material. For example, the first insulating layer 1515a can be made of photoresist, polyimide (PI), or photoacryloyl material.

[0228] Multiple third-wire connection patterns LCP3 can be disposed on the first insulating layer 1515a. The multiple third-wire connection patterns LCP3 can be electrically connected to multiple second-wire connection patterns LCP2. For example, the third-wire connection patterns LCP3 can be electrically connected to the second-wire connection patterns LCP2 through contact holes in the first insulating layer 1515a.

[0229] The second insulating layer 1515b can be disposed on a plurality of third-line connection patterns LCP3. The second insulating layer 1515b can be disposed in the display area DA, the first non-display area NDA1, and the second non-display area NDA2, and may not be disposed in the entirety or a portion of the curved area BA, but embodiments of this disclosure are not limited thereto. For example, the second insulating layer 1515b can be removed from the entirety or a portion of the curved area BA. The second insulating layer 1515b can be made of an organic insulating material. For example, the second insulating layer 1515b can be made of photoresist, polyimide (PI), or photoacryloyl material.

[0230] Multiple fourth-wire connection patterns LCP4 can be arranged on the second insulating layer 1515b. The multiple fourth-wire connection patterns LCP4 can be electrically connected to multiple third-wire connection patterns LCP3. For example, the fourth-wire connection patterns LCP4 can be electrically connected to the third-wire connection patterns LCP3 through contact holes in the second insulating layer 1515b.

[0231] In the non-display area NDA, multiple pad connection patterns PCP can be arranged on the second protective layer 1513b. The multiple pad connection patterns PCP can be wiring for transmitting signals from the flexible printed circuit 102 to the pad portion 211 to the driver DRV of the display area DA. For example, the multiple pad connection patterns PCP can be electrically connected to multiple pads PD and can receive signals from the flexible printed circuit 102 through the multiple pads PD. The flexible printed circuit 102 can be connected to the printed circuit board 104 (see...). Figure 1 and Figure 2 ).

[0232] For example, multiple pad connection patterns PCP can extend from pad portion 211 toward display area DA and send signals to the wiring of display area DA. In this case, multiple pad connection patterns PCP can be used as link lines LL (see...). Figure 6Multiple pad connection patterns (PCPs) may include a first pad connection pattern (PCP1), a second pad connection pattern (PCP2), a third pad connection pattern (PCP3), and a fourth pad connection pattern (PCP4).

[0233] Multiple first pad connection patterns PCP1 can be arranged on the second protective layer 1513b. Each of the multiple first pad connection patterns PCP1 can be arranged across the second non-display area NDA2, the curved area BA, and the first non-display area NDA1. Each of the multiple first pad connection patterns PCP1 may include a first portion arranged in the curved area BA, a second portion extending from the first portion to the first non-display area NDA1, and a third portion extending from the first portion to the second non-display area NDA2. Each of the multiple first pad connection patterns PCP1 may extend from the first non-display area NDA1 to a portion of the display area DA. The multiple first pad connection patterns PCP1 can send signals from the flexible printed circuit 102 to the pad portion 211 to the driver DRV of the display area DA.

[0234] Each of the plurality of first pad connection patterns PCP1 can be electrically connected to the pad PD of the pad portion 211 via a connection pattern arranged in the second non-display area NDA2. Here, the connection pattern that electrically connects each of the plurality of first pad connection patterns PCP1 to the pad PD may include at least one of the second pad connection pattern PCP2, the third pad connection pattern PCP3, and the fourth pad connection pattern PCP4 arranged in the second non-display area NDA2.

[0235] Each of the plurality of first pad connection patterns PCP1 can be electrically connected to the driver DRV via a connection pattern arranged in the display area DA. Here, the connection pattern that electrically connects each of the plurality of first pad connection patterns PCP1 to the driver DRV may include at least one of the second pad connection pattern PCP2, the third pad connection pattern PCP3, and the fourth pad connection pattern PCP4 arranged in the display area DA.

[0236] Multiple second pad connection patterns PCP2 can be arranged on the third protective layer 1514. Multiple second pad connection patterns PCP2 can be arranged in the second non-display area NDA2. The second pad connection patterns PCP2 can be electrically connected to the first pad connection pattern PCP1 through contact holes in the third protective layer 1514. Therefore, signals provided from the flexible printed circuit 102 can be transmitted to the first pad connection pattern PCP1 through the second pad connection patterns PCP2.

[0237] The third pad connection pattern PCP3 can be disposed on the first insulating layer 1515a. The third pad connection pattern PCP3 can be disposed in the second non-display area NDA2. The third pad connection pattern PCP3 can be electrically connected to the second pad connection pattern PCP2 through the contact holes of the first insulating layer 1515a. Therefore, signals provided from the flexible printed circuit 102 can be transmitted to the second pad connection pattern PCP2 through the third pad connection pattern PCP3, and signals transmitted to the second pad connection pattern PCP2 can be transmitted again to the first pad connection pattern PCP1.

[0238] The fourth pad connection pattern PCP4 can be disposed on the second insulating layer 1515b. The fourth pad connection pattern PCP4 can be disposed in the second non-display area NDA2. The fourth pad connection pattern PCP4 can be electrically connected to the third pad connection pattern PCP3 through the contact holes of the second insulating layer 1515b. The pad PD of the pad portion 211 can be electrically connected to the fourth pad connection pattern PCP4 through the contact holes of the third insulating layer 1515c.

[0239] Signals from the flexible printed circuit 102 are input to pads PD in the pad portion 211. These signals are then transmitted to pads PD via a fourth pad connection pattern PCP4 to a third pad connection pattern PCP3. Signals transmitted to the third pad connection pattern PCP3 can be transmitted again to the first pad connection pattern PCP1 via a second pad connection pattern PCP2. Signals transmitted to the first pad connection pattern PCP1 can be transmitted to the driver DRV via connection patterns arranged in the display area DA.

[0240] Multiple line connection patterns (LCPs) and multiple pad connection patterns (PCPs) can be arranged in various metal layers. The multiple line connection patterns (LCPs) and multiple pad connection patterns (PCPs) can be formed from conductive materials with excellent ductility or from any of the various conductive materials used in the display area (DA).

[0241] For example, a metal pattern such as the first pad connection pattern PCP1, which is at least partially disposed in the curved region BA, can be made of a conductive material with excellent ductility (e.g., gold (Au), silver (Ag), or aluminum (Al)). As another example, multiple line connection patterns LCP and multiple pad connection patterns PCP can be made of alloys or alloys of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), silver (Ag), and magnesium (Mg).

[0242] The third insulating layer 1515c can be disposed on multiple line connection patterns LCP and multiple pad connection patterns PCP. The third insulating layer 1515c is disposed in the display area DA, the first non-display area NDA1, and the second non-display area NDA2, and can be disposed in all or part of the curved area BA. In the curved area BA, a portion of the third insulating layer 1515c can be removed. The third insulating layer 1515c can be made of an organic insulating material. For example, the third insulating layer 1515c can be made of photoresist, polyimide (PI), or photoacryloyl-based material.

[0243] Multiple embankment BNKs can be disposed on the third insulating layer 1515c in the display area DA. The multiple embankment BNKs can be arranged to overlap at least a portion of each of a plurality of sub-pixels SPa, SPb, and SPc. For example, the first sub-pixel SPa may include a first light-emitting device EDa emitting a first color of light, the second sub-pixel SPb may include a second light-emitting device EDb emitting a second color of light, and the third sub-pixel SPc may include a third light-emitting device EDc emitting a third color of light.

[0244] As an example, a light-emitting device (ED) can be arranged on top of each of multiple embankment sections (BNKs). As another example, two or more light-emitting devices (EDs) can be arranged on top of each of multiple embankment sections (BNKs). The two or more light-emitting devices (EDs) arranged on top of each of the multiple embankment sections (BNKs) can be of the same type. For example, light-emitting devices of the same type can be light-emitting devices that emit the same color of light. For example, the two or more light-emitting devices (EDs) arranged on top of each of the multiple embankment sections (BNKs) can include a main light-emitting device and redundant light-emitting devices.

[0245] In the display area DA, multiple row connection electrodes RCE can be arranged on the third insulating layer 1515c. The multiple row connection electrodes RCE can transmit the low potential voltage VSS output from the driver DRV to the row line RL.

[0246] In the display area DA, multiple column lines CL can be arranged on the third insulating layer 1515c. Multiple column lines CL can be arranged in the area between multiple dike sections BNK. For example, multiple column lines CL can be arranged adjacent to one of the multiple dike sections BNK.

[0247] Each of the multiple column lines CL may include a wiring portion and a column connection electrode CCE protruding from the wiring portion. The wiring portion and the column connection electrode CCE included in each of the multiple column lines CL may be integrally formed, or they may be different metals electrically connected.

[0248] For example, each of the multiple column lines CL may include a column connection electrode CCE, which is a portion protruding above an adjacent embankment BNK among the multiple embankment BNKs. The column connection electrode CCE of each of the multiple column lines CL may be arranged to extend along the side and top surfaces of the embankment BNK. The column connection electrode CCE may be an electrode electrically connected to each of the multiple column lines CL, or it may be a portion protruding from each of the multiple column lines CL.

[0249] The column connection electrode CCE of the column line CL can be composed of one or more conductive layers. For example, the column connection electrode CCE electrically connected to or protruding from the column line CL may include a first conductive layer 1601, a second conductive layer 1602, a third conductive layer 1603, and a fourth conductive layer 1604.

[0250] A first conductive layer 1601 may be disposed on the embankment BNK. A second conductive layer 1602 may be disposed on the first conductive layer 1601. A third conductive layer 1603 may be disposed on the second conductive layer 1602, and a fourth conductive layer 1604 may be disposed on the third conductive layer 1603. For example, each of the first conductive layer 1601, the second conductive layer 1602, the third conductive layer 1603, and the fourth conductive layer 1604 may be formed of titanium (Ti), molybdenum (Mo), aluminum (Al), or titanium (Ti) and indium tin oxide (ITO).

[0251] Among the multiple conductive layers constituting the column connection electrode CCE, some conductive layers with good reflectivity can be configured as alignment bonds and / or reflectors for aligning the light-emitting device ED. For example, among the multiple conductive layers constituting the column connection electrode CCE, the second conductive layer 1602 may include a reflective material. For example, the second conductive layer 1602 may include aluminum (Al). Therefore, the second conductive layer 1602 can be configured as a reflector. In addition, due to the high reflectivity of the second conductive layer 1602, it can be easily identified during the manufacturing process, and therefore the position or relocation position of the light-emitting device ED can be aligned based on the second conductive layer 1602.

[0252] For example, to configure the second conductive layer 1602 as a reflector, the third conductive layer 1603 and the fourth conductive layer 1604 disposed on the second conductive layer 1602 can be partially removed or etched. For example, a portion of the third conductive layer 1603 and the fourth conductive layer 1604 disposed on the embankment BNK can be removed or etched to expose the upper surface of the second conductive layer 1602. That is, the openings of the third conductive layer 1603 and the fourth conductive layer 1604 can overlap with a portion of the upper surface of the second conductive layer 1602. For example, in the third conductive layer 1603 and the fourth conductive layer 1604, the central portion and the edge portion where the solder pattern SDP is disposed can be retained, and the remaining portion other than this portion (e.g., the central portion and the edge portion) can be removed. For example, the edge portions of each of the third conductive layer 1603 made of titanium (Ti) and the fourth conductive layer 1604 made of indium tin oxide (ITO) can be left unetched. Therefore, it is possible to prevent or reduce the corrosion of other conductive layers of the column connection electrode CCE of the column line CL by the TMAH (tetramethylammonium hydroxide) solution used in the masking process of the column connection electrode CCE.

[0253] The first conductive layer 1601 and the third conductive layer 1603 may comprise titanium (Ti) or molybdenum (Mo). The second conductive layer 1602 may comprise aluminum (Al). The fourth conductive layer 1604 may comprise a transparent conductive oxide layer such as indium tin oxide (ITO) or indium zinc oxide (IZO), which has good adhesion to the solder pattern SDP and is corrosion-resistant and acid-resistant.

[0254] The first conductive layer 1601, the second conductive layer 1602, the third conductive layer 1603 and the fourth conductive layer 1604 can be deposited sequentially and then patterned by performing photolithography and etching processes.

[0255] Two or more of the column connection electrodes (CCE), column lines (CL), row connection electrodes (RCE), and pads (PD) can be arranged on the same layer. The column connection electrodes (CCE), column lines (CL), row connection electrodes (RCE), and pads (PD) can be composed of a single layer or multiple layers of conductive material. For example, two or more of the column connection electrodes (CCE), column lines (CL), row connection electrodes (RCE), and pads (PD) can be composed of multiple layers of indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti).

[0256] A solder pattern SDP can be disposed on the column connection electrode CCE in each of multiple sub-pixels. The solder pattern SDP can bond the light-emitting device ED to the column connection electrode CCE. The column connection electrode CCE and the light-emitting device ED can be electrically connected via eutectic bonding using the solder pattern SDP. For example, if the solder pattern SDP is composed of indium (In) and the first electrode Ec1 of the light-emitting device ED is composed of gold (Au), the first electrode Ec1 of the light-emitting device ED and the solder pattern SDP can be bonded by applying heat and pressure during the transfer process of the light-emitting device ED. Through eutectic bonding, the light-emitting device ED can be bonded to the solder pattern SDP and the column connection electrode CCE without a separate adhesive. For example, the solder pattern SDP can be made of indium (In), tin (Sn), or an alloy thereof. For example, the solder pattern SDP can be a bonding pad.

[0257] The passivation layer 1516 can be disposed on multiple column lines CL, multiple column connection electrodes CCE, multiple row connection electrodes RCE and the third insulating layer 1515c.

[0258] For example, passivation layer 1516 can be disposed on display area DA, first non-display area NDA1, and second non-display area NDA2. At least a portion of the passivation layer 1516 covering multiple pads PD can be removed in the entirety or a portion of the curved area BA. The portion of passivation layer 1516 covering multiple pads PD in the second non-display area NDA2 can be removed. Furthermore, as... Figure 11 As shown, the passivation layer 1516 can be removed from the area where the solder pattern SDP is arranged.

[0259] Because the passivation layer 1516 is arranged to cover the remaining area except for the curved region BA, the multiple pads PD, and the area with the solder pattern SDP, the penetration of moisture or impurities into the light-emitting device ED can be reduced. For example, the passivation layer 1516 may consist of a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but embodiments of this disclosure are not limited thereto. For example, the passivation layer 1516 may be a protective layer or an insulating layer, but embodiments of this disclosure are not limited thereto. For example, as... Figure 10 As shown, the passivation layer 1516 may include vias that expose the solder pattern SDP. That is, the vias of the passivation layer 1516 may overlap with the solder pattern SDP.

[0260] The light-emitting device (ED) can be arranged on a solder pattern SDP in each of multiple sub-pixels (SPs). The ED can be formed on a silicon wafer by methods such as metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PDCVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPD), or sputtering.

[0261] A light-emitting device (ED) may include a first electrode Ecl, a first semiconductor layer 1611, an active layer 1612, a second semiconductor layer 1613, a second electrode Erl, and an encapsulation film 1614. In some cases, the encapsulation film 1614 may not be included in the light-emitting device (ED).

[0262] The first semiconductor layer 1611 can be disposed on the solder pattern SDP. The second semiconductor layer 1613 can be disposed on the first semiconductor layer 1611.

[0263] For example, one of the first semiconductor layer 1611 and the second semiconductor layer 1613 can be implemented as a III-V or II-VI compound semiconductor and can be doped with impurities (or dopants). For example, one of the first semiconductor layer 1611 and the second semiconductor layer 1613 can be a semiconductor layer doped with n-type impurities, and the other can be a semiconductor layer doped with p-type impurities. For example, at least one of the first semiconductor layer 1611 and the second semiconductor layer 1613 can be a layer doped with n-type or p-type impurities in a material such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), or gallium arsenide (GaAs), but the embodiments of this disclosure are not limited thereto. For example, n-type impurities can be silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (TE), or tin (Sn), but the embodiments of this disclosure are not limited thereto. For example, p-type impurities can be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or beryllium (Be).

[0264] For example, the first semiconductor layer 1611 and the second semiconductor layer 1613 can be a nitride semiconductor including n-type impurities and a nitride semiconductor including p-type impurities, respectively. For example, the first semiconductor layer 1611 can be a nitride semiconductor including p-type impurities, and the second semiconductor layer 1613 can be a nitride semiconductor including n-type impurities.

[0265] An active layer 1612 may be disposed between a first semiconductor layer 1611 and a second semiconductor layer 1613. The active layer 1612 can receive holes and electrons from the first semiconductor layer 1611 and the second semiconductor layer 1613 to emit light. For example, the active layer 1612 may be configured as a single-well structure, a multi-well structure, a single quantum well structure, a multiple quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure. For example, the active layer 1612 may be configured as indium gallium nitride (InGaN) or gallium nitride (GaN). As another example, the active layer 1612 may comprise a multiple quantum well (MQW) structure having a well layer and a blocking layer having a higher bandgap than the well layer. For example, the active layer 1612 may be formed from an InGaN layer as the well layer and an AlGaN layer as the blocking layer.

[0266] The first electrode Ec1 of the light-emitting device (ED) can be disposed between the first semiconductor layer 1611 and the solder pattern SDP. For example, the first electrode Ec1 of the ED can be electrically connected to the first semiconductor layer 1611 and the column connection electrode CCE. The column line voltage (e.g., anode voltage) output from the driver DRV can be applied to the first semiconductor layer 1611 through the column line CL, the column connection electrode CCE, and the first electrode Ec1. For example, the first electrode Ec1 can be made of a conductive material capable of eutectic bonding with the solder pattern SDP. For example, the first electrode Ec1 of the ED can be made of gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), and copper (Cu), or alloys thereof.

[0267] The second electrode Erl of the light-emitting device ED can be disposed on the second semiconductor layer 1613. For example, the second electrode Erl of the light-emitting device ED can be electrically connected to the second semiconductor layer 1613 and the row line RL. The row line voltage output from the driver DRV (e.g., referred to as the low potential voltage VSS as the cathode voltage) can be applied to the second semiconductor layer 1613 through the row connection electrode RCE, the row line RL, and the second electrode Erl. The second electrode Erl of the light-emitting device ED can be made of a transparent conductive material so that the light emitted from the light-emitting device ED can be directed to the upper part of the light-emitting device ED, but the embodiments of this disclosure are not limited thereto. For example, the second electrode Erl can be made of a material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO).

[0268] The encapsulation film 1614 may be disposed on at least a portion of the first semiconductor layer 1611, the active layer 1612, the second semiconductor layer 1613, the first electrode Ecl, and the second electrode Erl. For example, the encapsulation film 1614 may surround at least a portion of the first semiconductor layer 1611, the active layer 1612, the second semiconductor layer 1613, the first electrode Ecl, and the second electrode Erl.

[0269] For example, the encapsulation film 1614 can protect the first semiconductor layer 1611, the active layer 1612, and the second semiconductor layer 1613. For example, the encapsulation film 1614 can be disposed on the side surface of the first semiconductor layer 1611, the side surface of the active layer 1612, and the side surface of the second semiconductor layer 161.

[0270] For example, the encapsulation film 1614 may be disposed on at least a portion of the first electrode Ec1 and the second electrode Erl of the light-emitting device ED. For example, the encapsulation film 1614 may be disposed on the edge portion (or one side) of the first electrode Ec1 and the edge portion (or one side) of the second electrode Erl of the light-emitting device ED. At least a portion of the first electrode Ec1 may be exposed from the encapsulation film 1614 so that the first electrode Ec1 can be connected to the solder pattern SDP. For example, at least a portion of the second electrode Erl may be exposed from the encapsulation film 1614 so that the second electrode Erl can be connected to the row line RL. For example, the encapsulation film 1614 may be made of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx).

[0271] For example, the encapsulation film 1614 may have a structure in which reflective material is dispersed in a resin layer, but embodiments of the present disclosure are not limited thereto. For example, the encapsulation film 1614 may be manufactured as a reflector with various structures, but embodiments of the present disclosure are not limited thereto. Light emitted from the active layer 1612 can be reflected upward by the encapsulation film 1614, thereby improving light extraction efficiency. For example, the encapsulation film 1614 may be a reflective layer.

[0272] The light-emitting device (ED) can have a vertical structure. Alternatively, the ED can have a lateral structure or a flip-chip structure.

[0273] Figure 11The structure of the light-emitting device ED shown can be applied substantially equivalently to all of the first light-emitting device EDa, the second light-emitting device EDb, and the third light-emitting device EDc. The first optical layer 1517a can be arranged to surround multiple light-emitting devices ED in the display area DA. For example, the first optical layer 1517a can be arranged to cover multiple light-emitting devices ED and the embankment BNK in the area of ​​multiple sub-pixels SP. For example, the first optical layer 1517a can cover the area between the embankment BNK, a portion of the passivation layer 1516, and the multiple light-emitting devices ED. The first optical layer 1517a can be arranged or cover multiple light-emitting devices ED included in a pixel and between multiple embankments BNK. For example, the first optical layer 1517a can be arranged around the side of the light-emitting device ED and the embankment BNK between the passivation layer 1516 and the row line RL. For example, the first optical layer 1517a can be a diffusion layer or a sidewall diffusion layer.

[0274] The first optical layer 1517a may include an organic insulating material in which fine particles are dispersed. For example, the first optical layer 1517a may be composed of a siloxane having fine metal particles (e.g., titanium dioxide (TiO2) particles) dispersed therein. Light from multiple light-emitting devices (EDs) can be scattered by the fine particles dispersed in the first optical layer 1517a and emitted to the outside of the display device 100. Therefore, the first optical layer 1517a can improve the extraction efficiency of light emitted from multiple light-emitting devices (EDs).

[0275] For example, the first optical layer 1517a can be disposed on each of a plurality of pixels, or it can be disposed together on some pixels disposed in the same row. For example, the first optical layer 1517a can be disposed on each of a plurality of pixels, or a plurality of pixels can share a first optical layer 1517a. As another example, each of a plurality of sub-pixels can each include the first optical layer 1517a.

[0276] In the display area DA, the second optical layer 1517b can be disposed on the passivation layer 1516. For example, the second optical layer 1517b can be disposed around the first optical layer 1517a. For example, the second optical layer 1517b can contact the side surface of the first optical layer 1517a. For example, the second optical layer 1517b can be disposed in the area between multiple pixels. For example, the second optical layer 1517b can be a diffusion layer, a diffusion layer window, or a window diffusion layer.

[0277] The second optical layer 1517b may be composed of an organic insulating material. The second optical layer 1517b may be composed of the same material as the first optical layer 1517a. For example, the first optical layer 1517a may include fine particles, and the second optical layer 1517b may not include fine particles. For example, the second optical layer 1517b may be composed of siloxanes.

[0278] For example, the thickness of the first optical layer 1517a may be less than the thickness of the second optical layer 1517b. Therefore, when viewed from a plan view, the area where the first optical layer 1517a is disposed may include a recessed portion that is recessed inward from the upper surface of the second optical layer 1517b.

[0279] Row lines RL can be disposed on the first optical layer 1517a and the second optical layer 1517b. For example, row lines RL can be electrically connected to multiple row connection electrodes RCE through contact holes in the second optical layer 1517b. For example, row lines RL can be disposed on multiple light-emitting devices ED. For example, row lines RL can include transparent conductive oxides such as indium tin oxide (ITO) or indium zinc oxide (IZO). For example, row lines RL can be arranged to contact the second electrode Erl of the light-emitting device ED. For example, row lines RL can overlap with the first optical layer 1517a. For example, row lines RL can cover the plane on the outer side of the first optical layer 1517a.

[0280] The row lines RL can extend continuously in a first direction (X) of the substrate 210. Therefore, the row lines RL can be commonly connected to multiple pixels arranged in the first direction (X) of the substrate 210. For example, the row lines RL can be commonly connected to multiple pixels.

[0281] The line lines RL can extend continuously on the first optical layer 1517a, the second optical layer 1517b, and the light-emitting device ED. The region where the first optical layer 1517a is disposed may include a recessed portion that is recessed inward from the upper surface of the second optical layer 1517b. Therefore, the first portion of the line lines RL disposed on the first optical layer 1517a can be disposed along the recessed portion, and thus can be disposed at a lower position than the second portion of the line lines RL disposed on the second optical layer 1517b.

[0282] The third optical layer 1517c can be disposed on the row lines RL. The third optical layer 1517c can be configured to overlap with the plurality of light-emitting devices ED and the first optical layer 1517a. Since the third optical layer 1517c is disposed on the row lines RL and the plurality of light-emitting devices ED, brightness inhomogeneity that may occur in some of the plurality of light-emitting devices ED can be improved. For example, when the plurality of light-emitting devices ED are transferred onto the substrate 210 of the display panel 110, areas may appear where the spacing between the plurality of light-emitting devices ED is uneven due to process variations. If the spacing between the plurality of light-emitting devices ED is uneven, the light-emitting area of ​​each of the plurality of light-emitting devices ED can be arranged unevenly, and thus the user can see brightness inhomogeneity. Therefore, since the third optical layer 1517c is disposed to uniformly diffuse light above the plurality of light-emitting devices ED, the light emitted from some of the light-emitting devices ED can be reduced to be visible as brightness inhomogeneity. Therefore, since the light emitted from the plurality of light-emitting devices ED is uniformly scattered by the third optical layer 1517c and extracted to the outside of the display device 100, the brightness uniformity of the display device 100 can be improved.

[0283] The third optical layer 1517c can be composed of an organic insulating material in which fine particles are dispersed. For example, the third optical layer 1517c can be composed of a siloxane in which fine metal particles such as titanium dioxide (TiO2) particles are dispersed, but the embodiments disclosed herein are not limited thereto. For example, the third optical layer 1517c can be composed of the same material as the first optical layer 1517a. For example, the third optical layer 1517c can be a diffusion layer or an upper diffusion layer.

[0284] Light from multiple light-emitting devices (EDs) can be scattered by fine particles dispersed in the third optical layer 1517c and emitted to the outside of the display device 100. The third optical layer 1517c can uniformly mix the light emitted from the multiple light-emitting devices (EDs), thereby further improving the brightness uniformity of the display device 100. In addition, the light extraction efficiency of the display device 100 can be improved by the light scattered from the multiple fine particles, thereby enabling the display device 100 to be driven at low power.

[0285] A black matrix BM can be disposed on the row lines RL, the first optical layer 1517a, the second optical layer 1517b, and the third optical layer 1517c in the display area DA. For example, the black matrix BM can fill the contact holes of the second optical layer 1517b. The black matrix BM can be configured to cover the display area DA to reduce color mixing of light and external light reflection from multiple sub-pixels. For example, the black matrix BM can also be disposed in the contact holes connecting the row lines RL and the row connection electrodes RCE to prevent or reduce light leakage between multiple adjacent sub-pixels. For example, the black matrix BM can be made of an opaque material. For example, the black matrix BM can be an organic insulating material with added black pigment or black dye.

[0286] A capping layer 1518 may be disposed on the black matrix BM in the display area DA. The capping layer 1518 may protect the configuration beneath it. For example, the capping layer 1518 may be composed of an organic insulating material. For example, the capping layer 1518 may be composed of photoresist, polyimide (PI), or photopolymer-based materials. For example, the capping layer 1518 may be an outer coating or an insulating layer.

[0287] The polarizing layer 114 may be disposed on the capping layer 1518 via the first adhesive layer 112. The capping member 118 may be disposed on the polarizing layer 114 via the second adhesive layer 116. For example, the first adhesive layer 112 and the second adhesive layer 116 may comprise an optically transparent adhesive (OCA), an optically transparent resin (OCR), or a pressure-sensitive adhesive (PSA).

[0288] Multiple pads (PDs) may be arranged on a third insulating layer 1515c in the second non-display area NDA2. For example, at least a portion of the multiple pads (PDs) may be exposed from the passivation layer 1516. For example, the multiple pads (PDs) may be electrically connected to a fourth pad connection pattern (PCP4) through contact holes in the third insulating layer 1515c.

[0289] The adhesive layer ACF can be disposed on multiple pads PD. The adhesive layer ACF can be an adhesive layer in which conductive balls are dispersed in an insulating material. The adhesive layer ACF can be disposed between the multiple pads PD and the flexible printed circuit 102, so that the flexible printed circuit 102 can be attached or bonded to the multiple pads PD. For example, the adhesive layer ACF can be an anisotropic conductive film ACF.

[0290] The flexible printed circuit 102 can be disposed on the adhesive layer ACF. The flexible printed circuit 102 can be electrically connected to multiple pads PD through the adhesive layer ACF. Therefore, signals provided from the flexible printed circuit 102 can be transmitted to the driver DRV of the display area DA through the multiple pads PD, the fourth pad connection pattern PCP4, the third pad connection pattern PCP3, the second pad connection pattern PCP2, and the first pad connection pattern PCP1.

[0291] The display panel 110 according to an embodiment of the present disclosure may include a substrate 210, a multilayer stack 1410 disposed on a plurality of driver DRVs on the substrate 210, a first optical layer 1517a disposed between a plurality of light-emitting devices EDa, EDb and EDc disposed on the multilayer stack 1410, a second adhesive layer 116 disposed on the plurality of light-emitting devices EDa, EDb and EDc and the first optical layer 1517a, and a cover member 118 disposed on the second adhesive layer 116.

[0292] Multiple column lines CL can be disposed between the stacked components 1410 and multiple light-emitting devices EDa, EDb, and EDc. Multiple row lines RL can be arranged on the multiple light-emitting devices EDa, EDb, and EDc and the first optical layer 1517a. Multiple row lines RL can be arranged between the multiple light-emitting devices EDa, EDb, and EDc, the optical layer 1517a, and the second adhesive layer 116.

[0293] The stack 1410 may include a plurality of protective layers 1513a, 1513b and 1514 disposed on the side and top surfaces of each of the plurality of driver DRVs, a plurality of insulating layers 1515a, 1515b and 1515c disposed on the plurality of protective layers 1513a, 1513b and 1514, and a dam BNK disposed on the plurality of insulating layers.

[0294] The multiple protective layers 1513a, 1513b and 1514 may also include a side protective layer 1513 disposed on each side of the multiple driver DRVs and an upper protective layer 1514 disposed on the upper surface of each of the multiple driver DRs.

[0295] The side protective layer 1513 may include a first protective layer 1513a disposed on the substrate 210 and a second protective layer 1513b disposed on the first protective layer 1513a. The upper protective layer 1514 may include a second protective layer 1513b and a third protective layer 1514 disposed on a plurality of driver DRVs.

[0296] The plurality of insulating layers 1515a, 1515b, and 1515c may include a first insulating layer 1515a disposed on the upper protective layer 1514 and a second insulating layer 1515b disposed on the first insulating layer 1515a. The plurality of insulating layers 1515a, 1515b, and 1515c may also include a third insulating layer 1515c disposed on the second insulating layer 1515b.

[0297] Each of the multiple light-emitting devices EDa, EDb and EDc can be disposed on the embankment BNK and positioned in the opening of the optical layer 1517a.

[0298] At least a portion of each of the multiple column lines CL may extend to the embankment BNK on the multiple insulating layers 1515a, 1515b and 1515c. Each of the multiple row lines RL may be arranged on the optical layer 1517a and the multiple light-emitting devices EDa, EDb and EDc.

[0299] The first electrode Ec1 of each of the plurality of light-emitting devices EDa, EDb, and EDc may be electrically connected to at least a portion of the column line CL extending onto the embankment BNK among the plurality of column lines CL. The second electrode Erl of each of the plurality of light-emitting devices EDa, EDb, and EDc may be electrically connected to one of the plurality of row lines RL.

[0300] Display panel 110 may include a plurality of line connection patterns LCP that connect each of a plurality of lines, including a plurality of row lines RL and a plurality of column lines CL, to a plurality of drivers DR.

[0301] The multiple line connection patterns (LCPs) may include a first line connection pattern LCP1 disposed on the side protective layer 1513, a second line connection pattern LCP2 disposed on the upper protective layer 1514 and electrically connected to the first line connection pattern LCP1 through a hole in the upper protective layer 1514, a third line connection pattern LCP3 disposed on the first insulating layer 1515a and electrically connected to the second line connection pattern LCP2 through a hole in the first insulating layer 1515a, and a fourth line connection pattern LCP4 disposed on the second insulating layer 1515b and electrically connected to the third line connection pattern LCP3 through a hole in the second insulating layer 1515b.

[0302] The first connection pattern LCP1 can be electrically connected to one of the multiple drivers DRV. The fourth connection pattern LCP4 can be electrically connected to at least one second electrode Erl of the multiple light-emitting devices EDa, EDb and EDc, or can be electrically connected to at least one first electrode Ec1 of the multiple light-emitting devices EDa, EDb and EDc.

[0303] The side protection layer 1513 arranged on each side of the multiple drive DRVs may include two or more organic layers.

[0304] The first protective layer 1513a and the second protective layer 1513b, which serve as the side protective layer 1513, the third protective layer 1514, which serves as the upper protective layer 1514, and the first insulating layer 1515a, the second insulating layer 1515b, and the third insulating layer 1515c can each be composed of organic layers.

[0305] Figure 12 This is the equivalent circuit of a sub-pixel of the display panel 110 according to an embodiment of the present disclosure. Reference is also made in the following description. Figures 1 to 11 .

[0306] According to embodiments of the present disclosure, the sub-pixels of the display panel 110 may include a light-emitting device ED for driving a light-emitting device ED and a sub-pixel circuit SPC.

[0307] The light-emitting device (ED) can be disposed on the substrate 210 within the display panel 110. That is, the ED can be disposed within the display panel 110, but it can also be disposed outside the driver DRV. As an example, the sub-pixel circuit (SPC) can be included in the driver DRV of the unit driving region UDA where the ED is disposed. As another example, the sub-pixel circuit (SPC) can be disposed outside the driver DRV within the display panel 110.

[0308] A light-emitting device (ED) may include a first electrode and a second electrode, as well as a light-emitting layer located between the first and second electrodes. For example, the first electrode of the ED may be an anode electrode, and the second electrode may be a cathode electrode. The first electrode of the ED may be electrically connected to a column line CL, and the second electrode may be electrically connected to a row line RL. A low-potential voltage VSS may be applied to the second electrode of the ED.

[0309] The subpixel circuit SPC can be connected to the first electrode of the light-emitting device ED. The subpixel circuit SPC can be connected to the column line CL electrically connected to the first electrode of the light-emitting device ED. The subpixel circuit SPC may include a column driver C-DRV included in the driver DRV of the cell driving region UDA where the light-emitting device ED is disposed.

[0310] The sub-pixel circuit SPC can also be connected to the second electrode of the light-emitting device ED. The sub-pixel circuit SPC can be connected to the row line RL, which is electrically connected to the second electrode of the light-emitting device ED. The sub-pixel circuit SPC may also include a row driver R-DRV included in the driver DRV of the cell driving region UDA where the light-emitting device ED is located.

[0311] For example, a sub-pixel circuit SPC may include multiple electrical nodes such as a first node N1 to a fifth node N5, and may include a driving transistor DRT, a first transistor T1 to a fifth transistor T5, and a storage capacitor Cst.

[0312] The storage capacitor Cst may include a first plate PLT1 and a second plate PLT2. The storage capacitor Cst may be connected between a first node N1 and a fifth node N5. The first plate PLT1 may correspond to the first node N1, and the second plate PLT2 may correspond to the fifth node N5.

[0313] The driving transistor DRT can control the connection between the second node N2 and the third node N3 based on the voltage of the first node N1. The first node N1 can correspond to the gate electrode of the driving transistor DRT. The second node N2 can correspond to either the source or drain electrode of the driving transistor DRT and can be electrically connected to the high-potential voltage line VDDL to which a high-potential voltage VDD is applied. The third node N3 can correspond to either the drain or source electrode of the driving transistor DRT. The first node N1 can correspond to the first plate PLT1 of the storage capacitor Cst.

[0314] The first transistor T1 can control the connection between the data line DL and the fifth node N5 according to the first scan signal SC1 provided from the first scan line SCL1. The gate electrode of the first transistor T1 can be electrically connected to the first scan line SCL1, and the source electrode or drain electrode of the first transistor T1 can be electrically connected to the data line DL to which the data voltage VDATA is applied. The drain electrode or source electrode of the first transistor T1 can correspond to the fifth node N5.

[0315] The second transistor T2 can control the connection between the first node N1 and the third node N3 according to the first scan signal SC1 provided from the first scan line SCL1. The gate electrode of the second transistor T2 can be electrically connected to the first scan line SCL1, the source electrode or drain electrode of the second transistor T2 can correspond to the third node N3, and the drain electrode or source electrode of the second transistor T2 can correspond to the first node N1.

[0316] The third transistor T3 can control the connection between the reference voltage line VREFL, to which the reference voltage VREF is applied, and the fifth node N5, based on the first light-emitting control signal EM1 provided from the first light-emitting control line EML1. The fifth node N5 can correspond to the second plate PLT2 of the storage capacitor Cst.

[0317] The fourth transistor T4 can control the connection between the third node N3 and the fourth node N4 according to the first light-emitting control signal EM1 provided from the first light-emitting control line EML1. The fourth transistor T4 can... Figure 5 The first light-emitting control transistor EMT1 corresponds to this. The gate electrode of the fourth transistor T4 can be electrically connected to the first light-emitting control line EML1, and the source or drain electrode of the fourth transistor T4 can correspond to the third node N3. The drain or source electrode of the fourth transistor T4 can correspond to the fourth node N4. The fourth node N4 can be electrically connected to the column line CL.

[0318] The fifth transistor T5 can control the connection between the reference voltage line VREFL and the third node N3 according to the second scan signal SC2 provided from the second scan line SCL2. The gate electrode of the fifth transistor T5 can be electrically connected to the second scan line SCL2, the source electrode or drain electrode of the fifth transistor T5 can be electrically connected to the reference voltage line VREFL, and the drain electrode or source electrode of the fifth transistor T5 can correspond to the third node N3.

[0319] The driving transistor DRT and each of the first transistor T1 through the fifth transistor T5 can be a p-type transistor or an n-type transistor. For example, as Figure 12 As shown, the driving transistor DRT and the first transistors T1 through T5 can all be p-type transistors. As another example, the driving transistor DRT and the first transistors T1 through T5 can all be n-type transistors. As yet another example, the driving transistor DRT and the first transistors T1 through T5 can be a mixture of n-type and p-type transistors.

[0320] Figure 12 The sub-pixel circuit SPC shown is just an example and can be implemented in various forms.

[0321] The structure and operation related to the display function of the display device 100 according to embodiments of the present disclosure have been described above.

[0322] The display device 100 according to embodiments of the present disclosure can provide not only display functions but also touch sensing functions. Hereinafter, the structure and operation related to the touch sensing function of the display device 100 according to embodiments of the present disclosure will be described.

[0323] Figure 13 An optical touch sensing structure of a display device 100 according to an embodiment of the present disclosure is illustrated.

[0324] The display device 100 according to embodiments of the present disclosure can provide optical touch sensing functionality. The display device 100 according to embodiments of the present disclosure may include an optical touch sensor, and the optical touch sensor may include an optical driving device PD and an optical detection device PS.

[0325] The optical driving device PD can emit specific light of a first wavelength band. The specific light emitted from the optical driving device PD can be emitted to the outside of the display device 100 and can be reflected by a touch point (e.g., a finger, pen, etc.) located outside the display device 100. The specific light reflected by the touch point can enter the interior of the display device 100.

[0326] The optical detection device PS can detect specific light incident on the display device 100. The presence or absence of a touch or touch location can be detected based on whether the optical detection device PS detects the specific light.

[0327] The optical driving device PD and the optical detection device PS can be disposed on the display panel 110. The location of the optical driving device PD and the optical detection device PS within the display panel 110 will be described exemplarily below.

[0328] According to embodiments of the present disclosure, the display area DA of the display panel 110 may include a plurality of cells. Each of the plurality of cells may include a plurality of sub-cells corresponding to a plurality of drivers DRVs. That is, a driver DRV may be disposed in each of the plurality of sub-cells. Here, the sub-cells may be associated with... Figure 3 The unit driving area UDA is the same. That is, the unit driving area UDA is the area driven by a driver DRV from the display driving perspective, and the sub-unit SCELL can be the area driven by a driver DRV from the touch driving perspective.

[0329] Each of the multiple sub-cells (SCELL) may include two or more row lines (RL). Each of the two or more row lines (RL) may overlap with at least one pixel (P). Each pixel (P) may include two or more light-emitting devices (ED). For example, each pixel (P) may include a (primary) light-emitting device (EDa_M) emitting a first color of light, a (primary) light-emitting device (EDb_M) emitting a second color of light, and a (primary) light-emitting device (EDc_M) emitting a third color of light. Each pixel (P) may also include redundant light-emitting devices (EDa_R) emitting the first color of light, redundant light-emitting devices (EDb_R) emitting the second color of light, and redundant light-emitting devices (EDc_R) emitting the third color of light.

[0330] At least one optical driving device PD can be configured to be adjacent to at least one pixel P. At least one optical detection device PS can be configured to be adjacent to at least one pixel P.

[0331] A display device 100 according to an embodiment of the present disclosure may include: a substrate 210; a plurality of light-emitting devices ED disposed on the substrate 210 and positioned in a display area DA; a plurality of column lines CL electrically connected to a first electrode of each of the plurality of light-emitting devices ED; a plurality of row lines RL electrically connected to a second electrode of each of the plurality of light-emitting devices ED; a plurality of drivers DRV electrically connected to the plurality of column lines CL and the plurality of row lines RL; an optical driving device PD disposed on the substrate 210, positioned in the display area DA, overlapping with a first row line RL1 of the plurality of row lines RL, and emitting specific light of a first wavelength band according to the voltage difference between its two ends; and an optical detection device PS disposed on the substrate 210 and detecting specific light reflected from the outside and incident inside.

[0332] Each of the multiple column lines CL can be electrically connected to the first electrode of each of two or more light-emitting devices ED arranged in the same column. Each of the multiple row lines RL can be electrically connected to the second electrode of each of two or more light-emitting devices ED arranged in the same row.

[0333] For example, the first wavelength band of a specific light emitted from an optical drive device (PD) may be a different wavelength band than the wavelength band of light emitted from multiple light-emitting devices (EDs).

[0334] For example, the first wavelength band of a specific light emitted from the optical drive device PD can be a wavelength band different from the visible light wavelength band. For example, the first wavelength band can be the infrared wavelength band. As another example, the first wavelength band can be the ultraviolet wavelength band.

[0335] For example, in multiple cells, only the optical drive unit (PD) can be arranged in some cells, and only the optical detection unit (PS) can be arranged in other cells. That is, the optical drive unit (PD) and the optical detection unit (PS) can be arranged in units.

[0336] For example, in multiple sub-cells, only the optical drive unit (PD) can be arranged in some sub-cells, and only the optical detection unit (PS) can be arranged in other sub-cells. That is, the optical drive unit (PD) and the optical detection unit (PS) can be arranged on a sub-cell basis.

[0337] An optical touch sensor according to embodiments of the present disclosure may include an optical driving device (PD) and an optical detection device (PS). For example, the optical driving device (PD) may be implemented as a light-emitting diode that emits light of a specific wavelength band, and the optical detection device (PS) may be implemented as a photodiode that generates current in response to light.

[0338] In the following text, refer to Figure 14The arrangement of optical drive devices (PD) and optical inspection devices (PS) on a unit basis, and reference. Figure 15 The arrangement of the optical drive unit (PD) and the optical detection unit (PS) on a sub-unit basis will be explained.

[0339] Figure 14 An example is shown of an optical driving region PDA and an optical sensing region PSA arranged in units in a display device 100 according to an embodiment of the present disclosure.

[0340] According to the embodiments of the present disclosure, the display device 100, the optical driving device PD and the optical detection device PS can be arranged in units.

[0341] The display area DA of the display panel 110 may include multiple cells.

[0342] Each of the multiple cell cells may include multiple subcell cells corresponding to multiple driver DRVs.

[0343] Among the multiple cells, some cells may be optical driving cells CELL_D with optical driving devices PD, and other cells may be optical detection cells CELL_S with optical detection devices PS.

[0344] For example, among multiple cells, two adjacent cells in the horizontal direction (e.g., row direction) can be an optical driving cell CELL_D and an optical detection cell CELL_S. Similarly, two adjacent cells in the vertical direction (e.g., column direction) can be an optical driving cell CELL_D and an optical detection cell CELL_S.

[0345] For example, multiple cells may include a first cell CELL1 and a second cell CELL2. The first cell CELL1 may be an optical driving cell CELL_D. The second cell CELL2 may be an optical detection cell CELL_S. The first cell CELL1 and the second cell CELL2 may be adjacent cells in a first direction or a second direction. For example, the first direction may be a row direction and the second direction may be a column direction. In another example, the first direction may be a column direction and the second direction may be a row direction.

[0346] The first unit CELL1 may include a plurality of first sub-units SCELL1. Each of the plurality of first sub-units SCELL1 may include a first driver DRV1. The plurality of first sub-units SCELL1 may refer to a plurality of sub-units SCELL included in the first unit CELL1. The first driver DRV1 may refer to a driver DRV included in the first sub-unit SCELL1.

[0347] The second unit CELL2 may include multiple second sub-units SCELL2. Each of the multiple second sub-units SCELL2 may include a second driver DRV2. The multiple second sub-units SCELL2 may refer to multiple sub-units SCELL included in the second unit CELL2. The second driver DRV2 may refer to a driver DRV included in the second sub-unit SCELL2.

[0348] At least one of the plurality of first sub-units SCELL1 included in the first unit CELL1 may be an optical driving sub-unit SCELL_D, and may include an optical driving device PD. The optical detection device PS may not be arranged in the plurality of first sub-units SCELL1.

[0349] The first driver DRV1, which is included in all or part of the multiple first sub-units SCELL1, can drive the optical drive device PD to make the optical drive device PD emit specific light.

[0350] At least one of the multiple second sub-units SCELL2 included in the second unit CELL2 may be an optical sensing sub-unit SCELL_S, and may include an optical detection device PS. An optical driving device PD may not be disposed in the multiple second sub-units SCELL2.

[0351] The second driver DRV2, which is included in all or part of the multiple second sub-units SCELL2, can perform light detection via an optical detection device PS. Here, the detection of light or the magnitude of light detection (e.g., the amount of light detection) can vary depending on the occurrence or location of the touch.

[0352] The display device 100 according to embodiments of the present disclosure may further include a controller 1500 connected to a plurality of drivers DRVs. For example, the controller 1500 may be implemented as a microcontroller unit (MCU).

[0353] The controller 1500 can control multiple first drivers DRV1 and multiple second drivers DRV2.

[0354] The controller 1500 can drive the optical drive device PD installed in the first subunit SCELL1 by controlling multiple first drivers DRV1. When the optical drive device PD is driven, specific light can be emitted from the optical drive device PD.

[0355] If a specific light is emitted from the optical drive device PD disposed in the first subunit SCELL1, the specific light can be reflected from a touch point (e.g., a finger, pen, etc.) outside the display device 100 and can be incident into the interior of the display device 100.

[0356] The controller 1500 can control multiple second drivers DRV2 such that the second drivers DRV2 can detect the sensing voltage of the sensing nodes in the second sub-unit SCELL2. The second drivers DRV2 can provide sensing data to the controller 1500 based on the detected sensing voltage. The controller 1500 can determine the presence or absence of a touch and / or the touch location based on the sensing data.

[0357] The sensing node in the second subunit SCELL2 can have a sensing voltage for touch based on the current (e.g., a forward current) generated by the optical detection device PS arranged in the second subunit SCELL2. A forward current can be generated in the optical detection device PS arranged in the second subunit SCELL2 by specific light incident inside the display device 100.

[0358] As described above, among the multiple cells, the first cell CELL1 can be an optical driving cell CELL_D that only has an optical driving device PD and no optical detection device PS, and the second cell CELL2 can be an optical detection cell CELL_S that only has an optical detection device PS and no optical driving device PD. Therefore, the first cell CELL1 can correspond to the optical driving area PDA, and the second cell CELL2 can correspond to the optical sensing area PSA.

[0359] Figure 15 An example is shown of an optical driving region PDA and an optical sensing region PSA arranged in a sub-unit manner in a display device 100 according to an embodiment of the present disclosure.

[0360] According to the display device 100 of the present disclosure, the optical driving device PD and the optical detection device PS can be provided in units of sub-units.

[0361] The display area DA of the display panel 110 may include multiple cells.

[0362] Each of the multiple cell cells may include multiple subcell cells corresponding to multiple driver DRVs.

[0363] Among the multiple sub-cells included in each of the multiple cells, some sub-cells may be optical driving sub-cells SCELL_D in which optical driving devices PD are arranged, and other sub-cells may be optical sensing sub-cells SCELL_S in which optical detection devices PS are arranged.

[0364] For example, multiple sub-cells can include a first sub-cell SCELL1 and a second sub-cell SCELL2. The first sub-cell SCELL1 can be an optical driving sub-cell SCELL_D. The second sub-cell SCELL2 can be an optical sensing sub-cell SCELL_S. For example, the first sub-cell SCELL1 and the second sub-cell SCELL2 can be adjacent cells in a first direction or a second direction. For example, the first direction can be a row direction, and the second direction can be a column direction. In another example, the first direction can be a column direction, and the second direction can be a row direction.

[0365] Among the multiple sub-cells included in each of the multiple cells, the first sub-cell SCELL1 may be an optical drive sub-cell SCELL_D and may include an optical drive device PD. The first sub-cell SCELL1 may not include an optical detection device PS.

[0366] The first driver DRV1 included in the first subunit SCELL1 can drive the optical drive device PD included in the first subunit SCELL1 to make the optical drive device PD emit specific light.

[0367] Among the multiple sub-units SCELL included in each of the multiple units CELL, the second sub-unit SCELL2 may be an optical sensing sub-unit SCELL_S and may include an optical detection device PS. The second sub-unit SCELL2 may not include an optical driving device PD.

[0368] The second driver DRV2, included in the second subunit SCELL2, can perform light detection via the optical detection device PS, also included in the second subunit SCELL2. Here, the detection of light or the magnitude of light detection (e.g., the amount of light detected) can vary depending on the presence or absence of a touch or the location of the touch.

[0369] As described above, among the multiple sub-units SCELL in each of the multiple units CELL, the first sub-unit SCELL1 can be an optical driving sub-unit SCELL_D, which only has an optical driving device PD and no optical detection device PS, and the second sub-unit SCELL2 can be an optical sensing sub-unit SCELL_S, which only has an optical detection device PS and no optical driving device PD. Therefore, the first sub-unit SCELL1 can correspond to the optical driving area PDA, and the second sub-unit SCELL2 can correspond to the optical sensing area PSA.

[0370] As described above, each of the plurality of cell units may include an optical driving device (PD) and an optical sensing device (PS). That is, each of the plurality of cell units may include at least one optical driving region (PDA) and at least one optical sensing region (PSA).

[0371] Figures 16A to 16H An example of configuring an optical driving region PDA and an optical sensing region PSA in a display device 100 according to an embodiment of the present disclosure is illustrated.

[0372] Reference Figures 16A to 16H The optical driving area (PDA) and the optical sensing area (PSA) can be arranged within a specific area. This specific area can include 16 sub-areas, and the optical driving area (PDA) or the optical sensing area (PSA) can be assigned to each of the 16 sub-areas.

[0373] like Figure 14 As shown, if the optical driving area PDA and the optical sensing area PSA are configured in units, a specific area can be part of the display area DA, and each of the 16 sub-areas can be a cell.

[0374] like Figure 15 As shown, if the optical driving area PDA and the optical sensing area PSA are configured as sub-units, a specific area can be a cell included in the display area DA, and each of the 16 sub-regions can be a sub-unit SCELL included in a cell.

[0375] Reference Figure 16A Within a specific area, the optical driving area (PDA) and the optical sensing area (PSA) can be arranged alternately. The optical driving area (PDA) and the optical sensing area (PSA) can be arranged adjacent to each other in both the row and column directions.

[0376] Reference Figure 16B Within a specific area, the optical driving area PDA can be arranged in the center, and the optical sensing area PSA can be arranged around the optical driving area PDA.

[0377] Reference Figure 16C Within a specific area, the optical sensing area PSA can be arranged in the center, the optical driving area PDA can be arranged on the left and right sides of the center, the optical driving area PDA can be arranged on the upper and lower sides of the center, and the optical sensing area PSA can be arranged in the corner.

[0378] Reference Figure 16D Within a specific area, the optical driving area PDA can be arranged in the center, the optical sensing area PSA can be arranged on the left and right sides of the center, the optical sensing area PSA can be arranged on the upper and lower sides of the center, and the optical driving area PDA can be arranged in the corner.

[0379] Reference Figure 16E Within a specific area, the optical driving area PDA can be arranged in the center, and the optical sensing area PSA can be arranged above and below the center.

[0380] Reference Figure 16F Within a specific area, the optical sensing area PSA can be arranged in the center, and the optical driving area PDA can be arranged above and below the center.

[0381] Reference Figure 16G Within a specific area, the optical driving area (PDA) can be arranged in the center, and the optical sensing area (PSA) can be arranged on the left and right sides of the center.

[0382] Reference Figure 16H Within a specific area, the optical sensing area PSA can be arranged in the center, and the optical driving area PDA can be arranged on the left and right sides of the center.

[0383] Figures 16A to 16H The arrangement of the optical driving region PDA and the optical sensing region PSA shown is merely an example and can be modified differently to take into account optical touch sensing performance (or touch sensing accuracy) or power consumption reduction.

[0384] Figure 17 This is an exemplary illustration of a first subunit SCELL1, which is included in the optical driving region PDA as an optical driving subunit SCELL_D, and a second subunit SCELL2, which is included in the optical sensing region PSA as an optical sensing subunit SCELL_S, in a display device 100 according to an embodiment of the present disclosure.

[0385] The display panel 110 of the display device 100 according to the embodiments of the present disclosure may include a first sub-unit SCELL1, which is included in the optical driving region PDA as an optical driving sub-unit SCELL_D, and a second sub-unit SCELL2, which is included in the optical sensing region PSA as an optical sensing sub-unit SCELL_S.

[0386] The first subunit SCELL1 may include multiple first light-emitting devices ED1, two or more first row lines RL1, and a first driver DRV1. The second subunit SCELL2 may include multiple second light-emitting devices ED2, two or more second row lines RL2, and a second driver DRV2.

[0387] The first driver DRV1 can be electrically connected to two or more first row lines RL1. The second driver DRV2 can be electrically connected to two or more second row lines RL2.

[0388] Each of two or more first row lines RL1 may overlap with two or more first light-emitting devices ED1. Each of two or more second row lines RL2 may overlap with two or more second light-emitting devices ED2.

[0389] As described above, the multiple row lines RL arranged on the display panel 110 may include a first row line RL1 and a second row line RL2. The multiple drivers DRV disposed on the display panel 110 may include a first driver DRV1 electrically connected to the first row line RL1 and a second driver DRV2 electrically connected to the second row line RL2.

[0390] The first subunit SCELL1 may include at least one optical driving device PD. The at least one optical driving device PD may be configured to overlap with all or part of the plurality of first row lines RL1.

[0391] The optical driving device PD can be disposed on the side of the first light-emitting device ED1 that overlaps with the first row line RL1. The optical driving device PD may include an anode electrode and a cathode electrode.

[0392] The first driver, DRV1, can drive the optical drive device, PD.

[0393] The first driver DRV1 can generate a voltage difference between the anode and cathode electrodes of the optical driver PD. Therefore, the optical driver PD can emit specific light of a first wavelength band according to the voltage difference between the two ends.

[0394] The second subunit SCELL2 may include at least one optical detection device PS. The at least one optical detection device PS may be arranged to overlap with all or part of the plurality of second row lines RL2.

[0395] The optical detection device PS can be arranged on the side of the second light-emitting device ED2 that overlaps with the second row line RL2. The optical detection device PS can include an anode electrode and a cathode electrode.

[0396] The second driver, DRV2, can drive the optical inspection device, PS.

[0397] The second driver DRV2 can control light detection through the optical detection device PS and generate sensing data based on the sensing signal corresponding to the presence or absence of light detection.

[0398] The display device 100 according to embodiments of the present disclosure may include: a substrate 210; a plurality of light-emitting devices (EDs) disposed on the substrate 210 and positioned in a display area DA; a plurality of drivers (DRVs) for driving the plurality of light-emitting devices (EDs); an optical driving device (PD) disposed on the substrate 210, positioned in the display area DA, and emitting specific light of a first wavelength band; and an optical detection device (PS) disposed on the substrate 210, positioned in the display area DA, and detecting specific light reflected from the outside and incident on the inside.

[0399] The optical drive device PD can be driven by the first driver DRV1 among multiple drivers DRV, and the optical detection device PS can be driven by the second driver DRV2 among multiple drivers DRV.

[0400] Multiple driver DRVs can be set on substrate 210 and positioned in display area DA.

[0401] A specific light emitted from an optical drive device (PD) can have a different wavelength band than the light emitted from multiple light-emitting devices (EDs).

[0402] The optical driving device PD can be positioned on the side of the first light-emitting device ED1 among the multiple light-emitting devices ED, and the optical detection device PS can be positioned on the side of the second light-emitting device ED2 among the multiple light-emitting devices ED.

[0403] The optical touch sensing circuit will be described in more detail below, in conjunction with the sub-pixel circuit.

[0404] Figure 18 An example is illustrated of a first subunit SCELL1, which is included in the optical driving region PDA as an optical driving subunit SCELL_D in the display device 100 according to an embodiment of the present disclosure.

[0405] As an optical driving subunit SCELL_D, the first subunit SCELL1 included in the optical driving region PDA may include an optical driving circuit PDC. The first subunit SCELL1 may also include a first light-emitting device ED1 for driving a first light-emitting device ED1 and a first sub-pixel circuit SPC1. The first sub-pixel circuit SPC1 and... Figure 12 The sub-pixel circuit SPC is the same. Therefore, the description of the first sub-pixel circuit SPC1 will be omitted.

[0406] The optical drive circuit PDC may include an optical drive device PD. The optical drive device PD may include an anode electrode AND_PD and a cathode electrode CAT_PD.

[0407] The cathode electrode CAT_PD of the optical drive device PD can be electrically connected to a low-potential voltage node NL to which a low-potential voltage VSS is applied. For example, the low-potential voltage node NL can be electrically connected to the first row line RL1.

[0408] The first driver DRV1 in the first sub-unit SCELL1 arranged among multiple driver DRVs can be electrically connected to the first row line RL1.

[0409] The first driver DRV1 can generate a voltage difference between the anode electrode AND_PD and the cathode electrode CAT_PD of the optical drive device PD. If a voltage difference exists between the anode electrode AND_PD and the cathode electrode CAT_PD of the optical drive device PD, the optical drive device PD can emit specific light of a first wavelength band.

[0410] The first row line RL1 arranged in the first sub-unit SCELL1 can be electrically connected to the second electrode of each of two or more first light-emitting devices ED1. The first row line RL1 arranged in the first sub-unit SCELL1 can be electrically connected to the cathode electrode CAT_PD of the optical driving device PD.

[0411] The optical drive circuit PDC may also include an optical drive control transistor PD_CTR. The optical drive control transistor PD_CTR can be connected between the high-potential voltage node NH, to which a high-potential voltage VDD is applied, and the anode electrode AND_PD of the optical drive device PD. The optical drive control transistor PD_CTR can control the connection between the high-potential voltage node NH and the anode electrode AND_PD of the optical drive device PD according to the drive enable control signal PD_EN.

[0412] For example, the optical drive device PD can be arranged in the first sub-unit SCELL1, but can be arranged outside the first driver DRV1. The optical drive control transistor PD_CTR can be included in the first driver DRV1.

[0413] The first light-emitting device ED1 can be disposed within the first sub-unit SCELL1, but it can also be disposed outside the first driver DRV1. The first sub-pixel circuit SPC1 for driving the first light-emitting device ED1 can be included within the first driver DRV1.

[0414] The drive enable control signal PD_EN applied to the gate node of the optical drive control transistor PD_CTR can be the optical drive emission control signal EM_PD, which controls the emission of light from the optical drive control transistor PD_CTR. The optical drive emission control signal EM_PD can be sent to the gate node of the optical drive control transistor PD_CTR via the optical drive emission control signal line EML_PD.

[0415] If the optical drive control transistor PD_CTR is turned on via the drive enable control signal PD_EN, a high-potential voltage VDD can be applied to the anode electrode AND_PD of the optical drive device PD. In this case, the high-potential voltage VDD can be applied to the anode electrode AND_PD of the optical drive device PD, and the low-potential voltage VSS can be applied to the cathode electrode CAT_PD of the optical drive device PD. Here, the voltage difference between the high-potential voltage VDD and the low-potential voltage VSS can be greater than or equal to the threshold voltage at which the optical drive device PD can generate a specific light. For example, if the optical drive device PD is a diode, the voltage difference between the high-potential voltage VDD and the low-potential voltage VSS can be greater than or equal to the threshold voltage of the optical drive device PD.

[0416] The voltage difference between the anode electrode AND_PD and the cathode electrode CAT_PD of the optical drive device PD can be increased to enable the optical drive device PD to emit light. If the optical drive device PD emits light, it can emit specific light (e.g., infrared light) in a first wavelength band.

[0417] For example, the drive enable control signal PD_EN can correspond to a first light emission control signal EM1 that controls the light emission timing of at least one first light emission device ED1 among a plurality of light emission devices ED. The drive enable control signal PD_EN can be the same as or different from the first light emission control signal EM1.

[0418] Figure 19 An example is illustrated of a second subunit SCELL2, which is included in the optical sensing region PSA as an optical sensing subunit SCELL_S in the display device 100 according to an embodiment of the present disclosure.

[0419] The second subunit SCELL2, included in the optical sensing region PSA as the optical sensing subunit SCELL_S, may include an optical sensing circuit PSC. The second subunit SCELL2 may also include a second light-emitting device ED2 and a second sub-pixel circuit SPC2 for driving the second light-emitting device ED2. The second sub-pixel circuit SPC2 can be connected to... Figure 12 The sub-pixel circuit SPC is the same. Therefore, the description of the second sub-pixel circuit SPC2 will be omitted.

[0420] The optical sensing circuit PSC may include an optical detection device PS. The optical detection device PS may include an anode electrode AND_PS and a cathode electrode CAT_PS. The anode electrode AND_PS of the optical detection device PS may be electrically connected to a high-potential voltage node NH to which a high-potential voltage VDD is applied.

[0421] The optical detection device PS can conduct a positive current from the anode electrode AND_PS to the cathode electrode CAT_PS based on the specific light incident inside the display device 100.

[0422] Among the multiple driver DRVs, the second driver DRV2, located in the second sub-unit SCELL2, can be electrically connected to the second row line RL2.

[0423] The optical sensing circuit PSC may also include an optical detection control transistor PS_CTR and a sensing transistor TSEN.

[0424] The optical detection control transistor PS_CTR can control the connection between the high-potential voltage node NH and the low-potential voltage node NL based on the voltage of the cathode electrode CAT_PS of the optical detection device PS. Here, the high-potential voltage VDD can be applied to the high-potential voltage node NH. The low-potential voltage node NL can be electrically connected to the second row line RL2. The second row line RL2 can be electrically connected to the second electrode of the second light-emitting device ED2 included in the second subunit SCELL2.

[0425] For example, the optical detection control transistor PS_CTR can be an n-type transistor. If a high potential voltage VDD is applied to the gate node of the optical detection control transistor PS_CTR, the optical detection control transistor PS_CTR can be turned on.

[0426] The sensing transistor TSEN can control the connection between the anode electrode AND_PS of the optical detection device PS and the sensing node NS according to the sensing enable control signal EN_SEN.

[0427] If the optical drive device PD in the first sub-unit SCELL1 does not emit specific light, or if the specific light is not incident on the optical detection device PS, then the forward current does not flow through the optical detection device PS. Therefore, the optical detection control transistor PS_CTR can be in a cutoff state, and the anode electrode AND_PS of the optical detection device PS can maintain a high potential voltage VDD. In this case, if the sensing transistor TSEN is turned on, the voltage at the sensing node NS (e.g., the sensing voltage) can have a high potential voltage VDD.

[0428] If the sensing voltage of sensing node NS has a high potential voltage VDD, it may mean that no touch has occurred around the second sub-unit SCELL2.

[0429] If the optical driving device PD in the first sub-unit SCELL1 emits specific light, the specific light can be emitted to the outside of the display device 100 and reflected by a touch pointer (e.g., a finger, pen, etc.). The specific light reflected by the touch pointer can enter the interior of the display device 100, and the incident specific light can reach the optical detection device PS in the second sub-unit SCELL2.

[0430] The optical detection device PS can conduct forward current from the anode electrode AND_PS to the cathode electrode CAT_PS by responding to specific light incident inside the display device 100. Therefore, a high potential voltage VDD is applied to the gate node of the optical detection control transistor PS_CTR so that the optical detection control transistor PS_CTR can be turned on.

[0431] If the optical detection control transistor PS_CTR is turned on, the anode AND_PS of the optical detection device PS can have a low potential voltage VSS. In this case, if the sensing transistor TSEN is turned on, the voltage of the sensing node NS (e.g., the sensing voltage) can have a low potential voltage VSS.

[0432] If the sensing voltage of sensing node NS has a low potential voltage VSS, it may indicate that a touch has occurred around the second sub-cell SCELL2.

[0433] The second subunit SCELL2 may include a second row line RL2, which is different from the first row line RL1, and a second driver DRV2 electrically connected to the second row line RL2.

[0434] The optical detection device PS included in the optical sensing circuit PSC can be included in the second sub-unit SCELL2 and can be arranged outside the second driver DRV2.

[0435] The optical detection control transistor PS_CTR and the sensing transistor TSEN, which are included in the optical sensing circuit PSC, may be included in the second driver DRV2. The second sub-pixel circuit SPC2 may be included in the second driver DRV2.

[0436] The second driver DRV2 may include a column driver C-DRV2 that drives the column line CL, the column line CL being electrically connected to the first electrode of at least one of two or more second light-emitting devices ED2 that overlap with the second row line RL2.

[0437] The second sub-pixel circuit SPC2 may include column driver C-DRV2.

[0438] The sensing enable control signal EN_SEN can be the same signal as the first scan signal SC1 used in the column driver C-DRV2 included in the second sub-pixel circuit SPC2.

[0439] If the first transistor T1 and the second transistor T2 are turned on by the first scan signal SC1, the data voltage VDATA can be applied to the first node N1. That is, during the data writing period when the data voltage VDATA is applied to the first node N1 and the storage capacitor Cst is charged, the sensing transistor TSEN can also be turned on so that the sensing voltage of the sensing node NS can be detected by the second driver DRV2.

[0440] Therefore, the sensing transistor TSEN can be the same type of transistor as the first transistor T1 and the second transistor T2. For example, the sensing transistor TSEN, the first transistor T1, and the second transistor T2 can be p-type transistors. Alternatively, the sensing transistor TSEN, the first transistor T1, and the second transistor T2 can be n-type transistors.

[0441] Figure 20 An example is illustrated of a first subunit SCELL1, which is included in the optical driving region PDA as an optical driving subunit SCELL_D in the display device 100 according to an embodiment of the present disclosure. Figure 21 An example is illustrated of a second subunit SCELL2, which is included in the optical sensing region PSA as an optical sensing subunit SCELL_S in the display device 100 according to an embodiment of the present disclosure.

[0442] Figure 20 The first subunit SCELL1 is Figure 18 A modified example of the first subunit SCELL1. Since the first subunit SCELL1 is the optical drive subunit SCELL_D, the first subunit SCELL1 can include the optical drive circuit PDC.

[0443] Reference Figure 20Although the first subunit SCELL1 is the optical driving subunit SCELL_D, the first subunit SCELL1 may also include an optical sensing circuit PSC. However, the optical sensing circuit PSC included in the first subunit SCELL1 may be disabled and inoperable.

[0444] Figure 21 The second subunit SCELL2 is Figure 19 A modified example of the second subunit SCELL2. Since the second subunit SCELL2 is the optical sensing subunit SCELL_S, the second subunit SCELL2 may include the optical sensing circuit PSC.

[0445] Reference Figure 21 Although the second subunit SCELL2 is the optical sensing subunit SCEL_S, the second subunit SCELL2 may also include an optical driving circuit PDC. However, the optical driving circuit PDC included in the second subunit SCELL2 may be in an inactive state.

[0446] As described above, if the first subunit SCELL1, which is the optical driving subunit SCELL_D, includes an optical sensing circuit PSC in a disabled state, and the second subunit SCELL2, which is the optical sensing subunit SCELL_S, includes an optical driving circuit PDC in a disabled state, then the advantage of the first driver DRV1 and the second driver DRV2 is that they can be designed and manufactured identically. Furthermore, in addition to the first driver DRV1 and the second driver DRV2, panel design and panel manufacturing can be performed equivalently.

[0447] Figure 22 An optical touch sensing system for a display device 100 according to an embodiment of the present disclosure is illustrated. Reference is also made in the following description. Figure 18 and Figure 19 .

[0448] The controller 1500 can control the operation timing of each of the optical drive circuit PDC included in the first subunit SCELL1, which is the optical drive subunit SCELL_D, and the optical sensing circuit PSC included in the second subunit SCELL2, which is the optical sensing subunit SCELL_S.

[0449] The optical drive circuit PDC can be provided with a high potential voltage VDD and a low potential voltage VSS, and can emit specific light according to the control of the controller 1500.

[0450] The optical sensing circuit PSC can provide a high potential voltage VDD and a low potential voltage VSS, and can output a sensing voltage SEN through light detection according to the control of the controller 1500.

[0451] The controller 1500 can determine the presence or absence of a touch or the touch location based on sensing data generated according to the sensing voltage SEN.

[0452] The first subunit SCELL1 may include a first buffer BUF_PD and an optical drive circuit PDC. The remaining circuitry of the optical drive circuit PDC, excluding the optical drive device PD, may be included in the first driver DRV1. The first buffer BUF_PD may be included in the first driver DRV1.

[0453] The second subunit SCELL2 may include a second buffer BUF_PS and an optical sensing circuit PSC. The optical sensing circuit PSC may be included in the second driver DRV2, in addition to the optical detection device PS. The second buffer BUF_PS may be included in the second driver DRV2.

[0454] The controller 1500 can output an optical drive enable signal PD_EN for enabling the operation of the optical drive circuit PDC (e.g., optical drive operation), an optical sensing enable signal PS_EN for enabling the operation of the optical sensing circuit PSC (e.g., optical sensing operation), and a touch control signal TOUCH_CTR.

[0455] The touch control signal TOUCH_CTR can have a high-level voltage or a low-level voltage.

[0456] The first buffer BUF_PD can be operated by receiving power from a signal that inverts the touch control signal TOUCH_CTR.

[0457] The first buffer BUF_PD can receive the optical drive enable signal PD_EN, and can output the optical drive enable signal PD_EN according to the provided power status, or it can choose not to output the optical drive enable signal PD_EN.

[0458] The second buffer BUF_PS can be operated by receiving the touch control signal TOUCH_CTR as power.

[0459] The second buffer BUF_PS can receive the optical sensing enable signal PS_EN and can output the optical sensing enable signal PS_EN, or it can output the optical sensing enable signal PS_EN without depending on the power state provided.

[0460] If the touch control signal TOUCH_CTR has a low voltage level, the first buffer BUF_PD can be powered by the inverted touch control signal TOUCH_CTR with a high voltage level, and output the optical drive enable signal PD_EN. Therefore, the optical drive circuit PDC in the first sub-unit SCELL1 can operate.

[0461] If the touch control signal TOUCH_CTR has a low-level voltage, the second buffer BUF_PS can be powered by the low-level touch control signal TOUCH_CTR and can not output the optical sensing enable signal PS_EN. Therefore, the optical sensing circuit PSC in the second sub-unit SCELL2 can be inactive.

[0462] If the touch control signal TOUCH_CTR has a high voltage level, the first buffer BUF_PD can output the optical drive enable signal PD_EN without being powered by the touch control signal TOUCH_CTR which is provided with a low voltage level. Therefore, the optical drive circuit PDC in the first sub-unit SCELL1 can be inactive.

[0463] If the touch control signal TOUCH_CTR has a high-level voltage, the second buffer BUF_PS can be powered by the high-level touch control signal TOUCH_CTR and output the optical sensing enable signal PS_EN. Therefore, the optical sensing circuit PSC in the second sub-unit SCELL2 can operate.

[0464] For example, the optical drive enable signal PD_EN can correspond to the drive enable control signal PD_EN and the optical drive emission control signal EM_PD. The optical sensing enable signal PS_EN can correspond to the sensing enable control signal EN_SEN and the first scan signal SC1.

[0465] Figure 23 This is a cross-sectional view of the optical driving region PDA and the optical sensing region PSA in the display panel 110 according to an embodiment of the present disclosure. In the following description, terms related to... Figure 10 and Figures 17 to 19 Any overlapping descriptions.

[0466] Figure 23 It is a cross-sectional view of a portion of the first sub-unit SCELL1 included in the optical drive region PDA (e.g., along...). Figure 17 A cross-sectional view of the CD line, and a cross-sectional view of a portion of the second sub-unit SCELL2 included in the optical sensing region PSA (e.g., along the CD line). Figure 17 (Cross-section view taken from the EF line).

[0467] The display panel 110 may further include a substrate 210, a side protective layer 1513 disposed on each side of the first driver DRV1 and the second driver DRV2 disposed on the substrate 210, an upper protective layer 1514 disposed on the side protective layer 1513 and the first driver DRV1 and the second driver DRV2, an insulating layer 1515 disposed on the upper protective layer 1514, a dam BNK disposed on the insulating layer 1515 and on which a plurality of light-emitting devices ED1 and ED2 are mounted, and a first optical layer 1517a disposed on the sides of the plurality of light-emitting devices ED1 and ED2.

[0468] The side protective layer 1513 may have a height corresponding to the height of the first driver DRV1 and the second driver DRV2. For example, the side protective layer 1513 may include at least one organic layer. Therefore, the side protective layer 1513 can prevent or reduce the first driver DRV1 and the second driver DRV2 from falling off.

[0469] Insulating layer 1515 may include multiple insulating layers. For example, insulating layer 1515 may include a first insulating layer 1515a, a second insulating layer 1515b, and a third insulating layer 1515c. For example, each of the multiple insulating layers may be an organic layer.

[0470] Multiple light-emitting devices ED1 and ED2, optical driving devices PD, and optical detection devices PS can be mounted on the embankment BNK.

[0471] The display panel 110 may also include a passivation layer 1516 disposed on the insulating layer 1515.

[0472] The display panel 110 according to the embodiments of the present disclosure may further include a second optical layer 1517b surrounding the first optical layer 1517a and a third optical layer 1517c disposed on the first row line RL1 and the second row line RL2.

[0473] The display panel 110 according to an embodiment of the present disclosure may further include: a black matrix BM disposed on a third optical layer 1517c and having openings overlapping with a plurality of light-emitting devices ED; and an outer coating layer 2400 disposed on the black matrix BM, overlapping with an optical driving device PD and an optical detection device PS, and comprising a transparent insulating material. The outer coating layer 2400 may be an insulating layer made of a transparent material and having a planarization function.

[0474] The multiple light-emitting devices ED1 and ED2 may include a light-emitting device emitting a first color light (R), a light-emitting device emitting a second color light (G), and a light-emitting device emitting a third color light (B). The first color light (R), the second color light (G), and the third color light (B) may be light in the visible light wavelength range.

[0475] An optical driving device (PD) can emit specific light (L) in a first wavelength band that differs from the visible light wavelength band. For example, the first wavelength band could be the infrared wavelength band. An optical detection device (PS) can detect specific light (L') reflected from a touch point such as a finger and incident internally.

[0476] The outer coating 2400 can be a transparent insulating layer disposed on multiple light-emitting devices ED1 and ED2, an optical driving device PD and an optical detection device PS, and can be a light-transmitting transparent layer.

[0477] Each of the two or more first light-emitting devices ED1 and the two or more second light-emitting devices ED2 can be a vertical light-emitting diode.

[0478] Each of the multiple first column lines CL1 can be electrically connected to the first electrode of each of the two or more first light-emitting devices ED1 that overlap with the first row line RL1.

[0479] Each of the multiple first column lines CL1 can be arranged on the insulating layer 1515 and can extend along the side of the embankment BNK to the upper surface of the embankment BNK to be electrically connected to the first electrode of each of the two or more first light-emitting devices ED1.

[0480] The first row line RL1 can be arranged on the first optical layer 1517a and two or more first light-emitting devices ED1.

[0481] Multiple second column lines CL2 can be electrically connected to the first electrode of each of two or more second light-emitting devices ED2 that overlap with the second row line RL2.

[0482] Each of the multiple second column lines CL2 can be arranged on the insulating layer 1515 and can extend along the side of the embankment BNK to the upper surface of the embankment BNK to be electrically connected to the first electrode of each of the two or more second light-emitting devices ED2.

[0483] The second line RL2 can be arranged on the first optical layer 1517a and two or more second light-emitting devices ED2.

[0484] For example, the optical drive device PD can be a vertical diode.

[0485] The optical drive unit PD can be mounted on the embankment BNK.

[0486] The optical drive device PD can be positioned on the side of two or more first light-emitting devices ED1 that overlap with the first row line RL1.

[0487] The first line RL1 can be positioned on the optical drive device PD and electrically connected to the cathode electrode CAT_PD of the optical drive device PD. The first line RL1 and the cathode electrode CAT_PD of the optical drive device PD can correspond to the low potential voltage node NL.

[0488] The display panel 110 according to an embodiment of the present disclosure may further include an anode connection pattern AND_PD_CP electrically connected to the anode electrode AND_PD of the optical drive device PD.

[0489] The anode connection pattern AND_PD_CP can extend from the upper surface of the insulating layer 1515 along the side of the embankment BNK to the upper surface of the embankment BNK, and can be electrically connected to the anode electrode AND_PD of the optical drive device PD.

[0490] The anode connection pattern AND_PD_CP can be electrically connected to the anode electrode AND_PD of the optical drive device PD through holes in the passivation layer 1516 arranged on the side and top surfaces of the embankment BNK.

[0491] For example, the optical detection device PS can be a vertical diode.

[0492] The optical inspection device PS can be installed on the embankment BNK.

[0493] The optical detection device PS can be positioned on the side of two or more second light-emitting devices ED2 that overlap with a second line RL2 that is different from the first line RL1 among multiple line lines RL.

[0494] The display panel 110 may also include an anode connection pattern AND_PS_CP electrically connected to the anode electrode AND_PS of the optical detection device PS and a cathode connection pattern CAT_PS_CP electrically connected to the cathode electrode CAT_PS of the optical detection device PS.

[0495] The cathode connection pattern CAT_PS_CP can extend from the upper surface of the insulating layer 1515 along the side of the embankment BNK to the upper surface of the embankment BNK, and can be electrically connected to the cathode electrode CAT_PS of the optical detection device PS.

[0496] The cathode connection pattern CAT_PS_CP of the cathode electrode CAT_PS electrically connected to the optical detection device PS can be arranged in the same metal layer as the anode connection pattern AND_PD_CP of the anode electrode AND_PD electrically connected to the optical drive device PD.

[0497] The anode connection pattern AND_PS_CP of the anode electrode AND_PS, which is electrically connected to the optical detection device PS, can be arranged in the same metal layer as the first row line RL1 and the second row line RL2.

[0498] The display panel 110 according to an embodiment of the present disclosure may further include a first row connection electrode RCE1 electrically connected to the first row line R1. The first row connection electrode RCE1 may be disposed in the same metal layer as the first column line CL1.

[0499] The display panel 110 according to embodiments of the present disclosure may further include a line connection pattern LCP electrically connecting the first row connection electrode RCE1 and the first driver DRV1. The line connection pattern LCP may include the first line connection pattern LCP1 to the fourth line connection pattern LCP4.

[0500] The display panel 110 may also include a second row connection electrode RCE2 electrically connected to the second row line R2. The second row connection electrode RCE2 may be disposed in the same metal layer as the second column line CL2.

[0501] The display panel 110 according to embodiments of the present disclosure may further include a line connection pattern LCP electrically connecting the second row connection electrode RCE2 and the second driver DRV2. The line connection pattern LCP may include first line connection patterns LCP1 to fourth line connection patterns LCP4.

[0502] The optical driving device PD and the optical detection device PS, which serve as optical touch sensors, can have structures corresponding to the light-emitting devices ED1 and ED2 used for display. Therefore, this facilitates the design and manufacture of the display panel 110, and process optimization is also possible.

[0503] Figures 24 to 26 This is a driving timing diagram of a display device 100 according to an embodiment of the present disclosure.

[0504] Reference Figures 24 to 26 A frame period FT of the display device 100 according to an embodiment of the present disclosure may include an optical driving period Td for optical touch driving in which an optical driving device PD emits specific light, and an optical sensing period Ts for optical touch sensing, wherein an optical detection device PS detects specific light reflected from the outside of the display device 100 and incident on the inside of the display device 100 and senses touch.

[0505] Reference Figures 24 to 26 During the optical driving period Td, at least one of the plurality of light-emitting devices ED can emit light. During the touch period (T, T1 to T2, T1 to T4) but not during the display period (D, D1 to D2, D1 to D4), optical sensing operations can be performed. During the display period (D, D1 to D2, D1 to D4), at least one of the plurality of light-emitting devices ED can emit light for image display.

[0506] Therefore, noise caused by light emitted during image display can be reduced during optical touch sensing.

[0507] Reference Figure 24 A frame period FT can include a display period D and a touch period T. During a touch period D, touch sensing can be performed across the entire screen.

[0508] A display period D can correspond to an optical drive period Td. That is, optical drive can be performed by an optical drive device PD during a display period D.

[0509] A touch duration T can correspond to an optical sensing duration Ts. That is, during a touch duration T, optical sensing using an optical detection device PS can be performed.

[0510] Reference Figure 25 A frame period FT may include a first display period D1 and a second display period D2, as well as a first touch period T1 and a second touch period T2. The first display period D1, the first touch period T1, the second display period D2, and the second touch period T2 may be executed sequentially.

[0511] During the first display period D1 and the second display period D2, image display can be performed across the entire screen. During the first touch period T1 and the second touch period T2, touch sensing can be performed across the entire screen.

[0512] The first display period D1 and the second display period D2 can correspond to the optical driving period Td. That is, during the first display period D1 and the second display period D2, optical driving using the optical driving device PD can be performed.

[0513] The first touch period T1 and the second touch period T2 can correspond to the optical sensing period Ts. That is, during the first touch period T1 and the second touch period T2, optical sensing using the optical detection device PS can be performed.

[0514] Reference Figure 26 A frame period FT may include a first display period D1 to a fourth display period D4 and a first touch period T1 to a fourth touch period T4. The first display period D1, the first touch period T1, the second display period D2, the second touch period T2, the third display period D3, the third touch period T3, the fourth display period D4, and the fourth touch period T4 may be executed sequentially.

[0515] During the first display period D1 to the fourth display period D4, image display can be performed on the entire screen. During the first touch period T1 to the fourth touch period T4, touch sensing can be performed on the entire screen.

[0516] The first display period D1 to the fourth display period D4 can correspond to the optical driving period Td. That is, during the first display period D1 to the fourth display period D4, optical driving using the optical driving device PD can be performed.

[0517] The first touch period T1 to the fourth touch period T4 can correspond to the optical sensing period Ts. That is, during the first touch period T1 to the fourth touch period T4, optical sensing using the optical detection device PS can be performed.

[0518] Figures 24 to 26 The driving timing diagram shown is merely an example of the driving timing of the display device 100 according to an embodiment of the present disclosure, and the embodiments of the present disclosure are not limited thereto. That is, the driving timing of the display device 100 can be modified in various ways.

[0519] Although embodiments of the present disclosure have been described in more detail with reference to the accompanying drawings, the present disclosure is not necessarily limited to these embodiments, and various modifications can be made without departing from the technical concept of the present disclosure. Therefore, the embodiments disclosed herein are not intended to limit the technical concept of the present disclosure, but rather to explain it, and the scope of the technical concept of the present disclosure is not limited to these embodiments. Thus, the above embodiments should be understood as illustrative and not restrictive in all respects.

[0520] Cross-references to related applications

[0521] This application claims priority to Korean Patent Application No. 10-2024-0153601, filed November 1, 2024, which is incorporated herein by reference for all purposes as if fully stated herein.

Claims

1. A display device, the display device comprising: substrate; Multiple light-emitting devices are disposed on the substrate and positioned in the display area; Multiple column lines, the multiple column lines being electrically connected to the first electrode of each of the multiple light-emitting devices; Multiple row lines, wherein the multiple row lines are electrically connected to the second electrode of each of the multiple light-emitting devices; An optical driving device is disposed on the substrate and positioned in the display area. The optical driving device overlaps with a first row line among the plurality of row lines and is configured to emit specific light of a first wavelength band according to the voltage difference between its two ends. as well as An optical detection device is disposed on the substrate and configured to detect specific light reflected from the outside and incident on the inside.

2. The display device according to claim 1, further comprising a plurality of drivers electrically connected to the plurality of column lines and the plurality of row lines. in, The display area comprises multiple units, and each of the multiple units includes multiple sub-units corresponding to the multiple drivers. The plurality of units include a first unit and a second unit. Wherein, at least one of the plurality of first sub-units included in the first unit includes the optical driving device, and at least one of the plurality of second sub-units included in the second unit includes the optical detection device.

3. The display device according to claim 1, further comprising a plurality of drivers electrically connected to the plurality of column lines and the plurality of row lines. in, The display area comprises multiple units, and each of the multiple units includes multiple sub-units corresponding to the multiple drivers. The plurality of sub-units includes a first sub-unit and a second sub-unit. The first subunit includes the optical driving device, and the second subunit includes the optical detection device.

4. The display device according to claim 1, further comprising a plurality of drivers electrically connected to the plurality of column lines and the plurality of row lines. in, The plurality of drivers includes a first driver electrically connected to the first row line. The first driver is configured to generate a voltage difference between the anode and cathode electrodes of the optical driving device.

5. The display device according to claim 4, wherein, The first row line is electrically connected to the second electrode of each of two or more of the plurality of light-emitting devices, and the first row line is electrically connected to the cathode electrode of the optical driving device.

6. The display device according to claim 4, further comprising an optical drive control transistor configured to control the connection between a high-potential voltage node and the anode electrode of the optical drive device, wherein, A high-potential voltage is applied to the high-potential voltage node.

7. The display device according to claim 6, wherein, The optical drive control transistor is included in one of the plurality of drivers.

8. The display device according to claim 6, wherein, The optical drive control transistor is configured to turn on or off according to a drive enable control signal, and The drive enable control signal corresponds to the light emission control signal that controls the light emission timing of at least one of the plurality of light-emitting devices.

9. The display device according to claim 1, wherein, The optical detection device includes an anode electrode and a cathode electrode. The optical detection device is configured to conduct a positive current from the anode electrode to the cathode electrode based on specific light incident on the interior of the display device. In this optical detection device, the anode electrode is electrically connected to a high-potential voltage node, and a high-potential voltage is applied to the high-potential voltage node. The display device further includes: An optical detection control transistor configured to control the connection between a high-potential voltage node and a low-potential voltage node to which a low-potential voltage is applied, based on the voltage of the cathode electrode of the optical detection device; and A sensing transistor configured to control the connection between the anode electrode and the sensing node of the optical detection device.

10. The display device of claim 9, further comprising a plurality of drivers electrically connected to the plurality of column lines and the plurality of row lines. in, The optical detection control transistor and the sensing transistor are included in one of the plurality of drivers.

11. The display device according to claim 10, wherein, The sensing transistor is configured to turn on or off according to a sensing enable control signal, and The sensing enable control signal is the same as the scan signal used in one of the plurality of drivers.

12. The display device according to claim 9, wherein, The low-potential voltage node is electrically connected to the second row line among the plurality of row lines.

13. The display device according to claim 1, further comprising: Multiple drivers, the multiple drivers being electrically connected to the multiple column lines and the multiple row lines; A side protective layer is disposed on the side of each of the plurality of drivers disposed on the substrate; An upper protective layer is disposed on the side protective layer and the plurality of drivers; An insulating layer disposed on the upper protective layer; A dam is disposed on the insulating layer, and the plurality of light-emitting devices, the optical driving device, and the optical detection device are disposed on the dam; as well as A first optical layer is disposed on the side of the plurality of light-emitting devices.

14. The display device according to claim 13, wherein, The optical driving device is a vertical diode. The optical driving device is mounted on the embankment. The optical driving device is positioned on the side of two or more first light-emitting devices that overlap with the first row line. The first row line is arranged on the optical driving device and is electrically connected to the cathode electrode of the optical driving device. The display device further includes an anode connection pattern that extends from the upper surface of the insulating layer along the side of the embankment to the upper surface of the embankment, and the anode connection pattern is electrically connected to the anode electrode of the optical drive device.

15. The display device according to claim 13, wherein, The optical driving device is a vertical diode. The optical driving device is mounted on the embankment. The optical driving device is positioned on the side of two or more second light-emitting devices that overlaps with a second row line that is different from the first row line among the plurality of row lines. The display device further includes: An anode connection pattern, the anode connection pattern being electrically connected to the anode electrode of the optical detection device; and A cathode connection pattern extends from the upper surface of the insulating layer along the side of the embankment to the upper surface of the embankment, and the cathode connection pattern is electrically connected to the cathode electrode of the optical detection device.

16. The display device according to claim 13, wherein, Each of the two or more first light-emitting devices is a vertical light-emitting diode. The plurality of column lines include a plurality of first column lines electrically connected to the first electrode of each of two or more first light-emitting devices that overlap with the first row lines. Each of the plurality of first column lines is arranged on the insulating layer and extends along the side of the embankment to the upper surface of the embankment. The first row line is arranged on the first optical layer and the two or more first light-emitting devices.

17. The display device according to claim 13, further comprising: A second optical layer surrounds the first optical layer; A third optical layer is disposed on the plurality of rows; A black matrix is ​​disposed on the third optical layer, and the black matrix has an opening that overlaps with the plurality of light-emitting devices; as well as An outer coating is disposed on the black matrix, the outer coating overlaps with the optical driving device and the optical detection device, and the outer coating includes a transparent insulating material.

18. The display device according to claim 1, wherein, The first wavelength band is a wavelength band different from the wavelength band of the light emitted from the plurality of light-emitting devices.

19. The display device according to claim 1, wherein, The first wavelength band is the infrared wavelength band.

20. The display device according to claim 1, wherein, The frame period includes an optical driving period during which the optical driving device emits the specific light, and an optical sensing period during which the optical detection device detects the specific light reflected from the exterior of the display device and incident on the interior of the display device. During the optical driving period, at least one of the plurality of light-emitting devices emits light.

21. A display device, the display device comprising: substrate; Multiple light-emitting devices are disposed on the substrate and positioned in the display area; Multiple drivers, the multiple drivers being configured to drive the multiple light-emitting devices; An optical driving device is disposed on the substrate and positioned in the display area, and the optical driving device is configured to emit specific light of a first wavelength band. as well as An optical detection device is disposed on the substrate and positioned in the display area, and is configured to detect specific light reflected from the outside and incident on the interior. The optical driving device is driven by a first driver among the plurality of drivers, and the optical detection device is driven by a second driver among the plurality of drivers.

22. The display device according to claim 21, wherein, The plurality of drivers are disposed on the substrate and positioned in the display area.

23. The display device according to claim 21, wherein, The specific light has a wavelength band that is different from the wavelength band of the light emitted from the plurality of light-emitting devices.

24. The display device according to claim 21, wherein, The optical driving device is positioned on the side of the first light-emitting device among the plurality of light-emitting devices, and the optical detection device is positioned on the side of the second light-emitting device among the plurality of light-emitting devices.

25. The display device according to claim 24, further comprising: A dam is disposed on the substrate, and the plurality of light-emitting devices, the optical driving device, and the optical detection device are mounted on the dam; as well as A transparent insulating layer is disposed on the plurality of light-emitting devices, the optical driving device, and the optical detection device.

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