Display device

Abstract

Features of a display device are disclosed, including examples of a display device, the display device comprising: a substrate; a circuit portion provided on the substrate; a connection electrode connected to the circuit portion and disposed on the first insulating layer; a second insulating layer disposed on the connection electrode; a first electrode pattern connected to the connection electrode and on the second insulating layer; a third insulating layer disposed on the first electrode pattern; a second electrode pattern connected to the first electrode pattern and disposed on the third insulating layer and in the first through hole of the third insulating layer; a fourth insulating layer disposed on the second electrode pattern; and a third electrode pattern connected to the second electrode pattern and formed on the fourth insulating layer and in the second via of the fourth insulating layer, and the first via or the second via may include at least two inclined surfaces having slopes different from each other.

Description

Technical Field

[0001] The disclosed technology relates to a display device. Background Technology

[0002] With the development of the information society, the demand for simplified display devices for displaying images is increasing, and various types of display devices such as liquid crystal displays and organic light-emitting diode displays are being used.

[0003] In this type of display device, organic light-emitting diode (OLED) displays are self-emissive and offer superior viewing angles and contrast compared to liquid crystal displays (LCDs). OLED displays do not require a separate backlight, making them lightweight and thin, and offering low power consumption. Furthermore, OLED displays are advantageous due to their low DC voltage operation, fast response times, and particularly low manufacturing costs.

[0004] Recently, there has been an increasing demand for display devices for a variety of applications, including, for example, augmented reality (AR), virtual reality (VR), and other applications where ultra-high display resolution can be expected through the use of light-emitting display devices. Summary of the Invention

[0005] Some embodiments of this disclosure can provide a display device including a first or second through-hole having at least two inclined surfaces with different inclinations, such that the electrode pattern deposited in the first or second through-hole is not interrupted.

[0006] Some implementations of the disclosed technology provide a display device in which the dark absorption (or failure) defect (or malfunction) of the organic light-emitting element is improved by ensuring that the electrode pattern deposited in the first or second via is not destroyed.

[0007] Some implementations of the disclosed technology provide a display device in which a planarization process is omitted during the deposition of electrode patterns within a first or second via, enabling the induction of efficient and precise microcavities in each sub-pixel.

[0008] In one aspect, the display device may include: a substrate; a circuit portion disposed on the substrate; a connecting electrode connected to the circuit portion and disposed on a first insulating layer; a second insulating layer disposed on the connecting electrode; a first electrode pattern connected to the connecting electrode and located on the second insulating layer; a third insulating layer disposed on the first electrode pattern; a second electrode pattern connected to the first electrode pattern and disposed on the third insulating layer and in a first through-hole of the third insulating layer; a fourth insulating layer disposed on the second electrode pattern; and a third electrode pattern connected to the second electrode pattern and formed on the fourth insulating layer and in a second through-hole of the fourth insulating layer. The first through-hole or the second through-hole may include at least two inclined surfaces having different slopes from each other.

[0009] In another aspect of this disclosure, the display device may include: a substrate defining a first sub-pixel, a second sub-pixel, and a third sub-pixel; a first reflective electrode disposed on the substrate of the first sub-pixel; a first connecting electrode disposed on the substrate of the first sub-pixel to the third sub-pixel; a first insulating layer disposed on the first reflective electrode and the first connecting electrode; a second connecting electrode disposed on the first insulating layer of the first sub-pixel to the third sub-pixel; a second reflective electrode disposed on the first insulating layer of the second sub-pixel; a second insulating layer disposed on the second reflective electrode and the second connecting electrode; a third connecting electrode disposed on the second insulating layer of the first sub-pixel to the third sub-pixel; a third reflective electrode disposed on the second insulating layer of the third sub-pixel; a first electrode disposed on the third connecting electrode and the third reflective electrode; a common light-emitting layer disposed on the first electrode; and a second electrode disposed on the common light-emitting layer. The distance between the first reflective electrode and the second electrode may be greater than the distance between the second reflective electrode and the second electrode, and the distance between the second reflective electrode and the second electrode may be greater than the distance between the third reflective electrode and the second electrode. The first insulating layer may include a first through-hole and the second insulating layer may include a second through-hole, and the first through-hole or the second through-hole may include at least two inclined surfaces having different slopes from each other.

[0010] According to embodiments of this disclosure, the display device may include a first through-hole or a second through-hole having at least two inclined surfaces with different angles. Therefore, the electrode pattern deposited within the first or second through-hole may not be interrupted.

[0011] Furthermore, in the display device according to the embodiments of the present disclosure, by ensuring that the electrode pattern deposited in the first or second via is not destroyed, the dark absorption defects (or faults) of the organic light-emitting element can be improved.

[0012] Furthermore, the display device according to the embodiments of the present disclosure omits the planarization process during the deposition of the electrode pattern in the first or second via, thus enabling the induction of efficient and precise microcavities in each sub-pixel.

[0013] In addition to the effects described above, the specific effects of the technical features disclosed in the patent document will be described together with a detailed description of the following examples of embodiments for implementing the features disclosed in the patent document. Attached Figure Description

[0014] Figure 1 This is a block diagram illustrating a display device based on some implementations of the disclosed technology.

[0015] Figure 2 yes Figure 1 The image shows a cross-sectional view of the pixels.

[0016] Figure 3 yes Figure 2 The diagram shows a cross-sectional view of an organic light-emitting element.

[0017] Figure 4 Based on Figure 3 A cross-sectional view of an organic light-emitting element as a modified example.

[0018] Figure 5 yes Figure 2 The enlarged cross-sectional view of region Q1 is shown.

[0019] Figures 6 to 13 This is a cross-sectional view of the manufacturing process of a display panel based on some implementation methods of the disclosed technology.

[0020] Figure 14 This is a cross-sectional view of a display device based on some implementations of the disclosed technology.

[0021] Figure 15 This is a cross-sectional view of a display device based on some implementations of the disclosed technology.

[0022] Figure 16 This is a cross-sectional view of a display device based on some implementations of the disclosed technology.

[0023] Figure 17 This is a cross-sectional view of a display device based on some implementations of the disclosed technology.

[0024] Figure 18This is a cross-sectional view of a display device based on some implementations of the disclosed technology. Detailed Implementation

[0025] In the following description, a display device according to an embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0026] Preferred embodiments according to this disclosure are described in detail below with reference to the accompanying drawings. In the drawings, the same reference numerals denote the same or similar components.

[0027] Figure 1 This is a block diagram illustrating a display device according to one embodiment.

[0028] Reference Figure 1 The display device 10 may include: a display panel 100, which includes panel pixels 20 that emit light for displaying images; a timing controller TC for timing the panel pixels 20; a gating driver GIP connected to the display panel 100; a data driver DIC connected to the display panel 100; a light-emitting driver LEDP connected to the display panel 100; and a power supply unit PSU connected to the display panel 100 to supply power to the panel pixels 20. The timing controller TC, gating driver GIP, data driver DIC, light-emitting driver LEDP, power supply unit PSU, and display panel 100 can be considered as components disposed in the display device 10.

[0029] The timing controller TC can be configured to receive an image signal RGB and a control signal CS from an external host system, etc., having color information for each panel pixel 20 (e.g., the color components are composed of colors represented by red (R), green (G), and blue (B)). The image signal RGB may include multiple grayscale data. The control signal CS may include, for example, a horizontal synchronization signal, a vertical synchronization signal, and a master clock signal.

[0030] The timing controller TC can process image signals RGB and control signals CS to adapt to the operating conditions of the display panel 100, thereby generating and outputting image data DATA, gating drive control signal CONT1, data drive control signal CONT2, light emission drive control signal CON3 and power control signal CONT4.

[0031] The strobe drive control signal CONT1 may include scan timing control signals such as strobe start pulse, strobe shift clock, and strobe output enable signal. The data drive control signal CONT2 may include data timing control signals such as source sampling clock, polarity signal, and source output enable signal.

[0032] The gating driver GIP can be configured to sequentially output a horizontal time interval of gating signals via gating lines GL within a frame in response to the gating drive control signal CONT1 provided from the timing controller TC. Therefore, the pixel rows connected to each gating line GL can be activated within a horizontal time interval. Within a horizontal time interval, data signals can be applied to the pixel rows activated by the gating lines GL.

[0033] The gating driver GIP can consist of or include stage circuits connected to multiple gating lines GL, and can be configured as a GIP (in-panel gating) mounted on the display panel 100. Such a gating driver GIP may include shift resistors, level shifters, etc.

[0034] The data driver DIC can be configured to convert digital image data DATA provided by the timing controller TC into an analog data signal based on the data drive control signal CONT2. The data driver DIC can also be configured to apply analog data signals to the corresponding panel pixels 20 via the data line DL.

[0035] The light-emitting driver (hereinafter referred to as the emitter driver) LEDP can be configured to generate a light-emitting signal based on the light-emitting drive control signal CONT3 output from the timing controller TC. The light-emitting driver LEDP can provide the generated light-emitting signal to the panel pixel 20 through multiple light-emitting lines.

[0036] Figure 1 The diagram shows that the gating driver (GIP) and the LED driver are provided separately, but other implementations are possible. For example, the gating driver and the LED driver can be integrated into a single integrated circuit. In the following text, the gating driver and the LED driver are integrated and collectively referred to as the gating driver (GIP).

[0037] The power supply unit (PSU) can be configured to convert an externally input voltage into a high-potential voltage ELVDD and a low-potential voltage ELVSS, which serve as a standard power supply for providing power within the display device 10, based on the power control signal CONT4. The PSU can also be configured to output the generated drive voltages ELVDD and ELVSS to the components via power lines PL1 and PL2.

[0038] In a display device 10 according to one embodiment, a timing controller TC, a data driver DIC, a gating driver GIP, and a power supply unit PSU can be embedded in or included in the display panel 100. During the formation of the display panel 100, circuits constituting the timing controller TC, data driver DIC, gating driver GIP, and power supply unit PSU can be formed together. The timing controller TC, data driver DIC, gating driver GIP, and power supply unit PSU can be mounted on a substrate (see [link to relevant documentation]). Figure 2 2). In some implementations, the timing controller TC, data driver DIC, strobe driver GIP, and power supply unit PSU can be implemented as separate chip CHIPs that are separate from the display panel 100.

[0039] Figure 2 It is used to implement Figure 1 A cross-sectional view of an example of each of the panel pixels 20 shown.

[0040] Reference Figure 2 The display panel 100 according to this embodiment may include a substrate 2, a first electrode 4, a common light-emitting layer 5, and a second electrode 6. The first electrode 4, the common light-emitting layer 5, and the second electrode 6 may form an organic light-emitting element (OLED).

[0041] Multiple sub-pixels 21, 22, and 23 can be formed on substrate 2. Multiple sub-pixels can be formed... Figure 1 One panel pixel 20 in the display panel 100. Multiple pixels (see Figure 1 20) can be formed on substrate 2 to form Figure 1 The display panel 100 in the middle.

[0042] Multiple subpixels 21, 22, and 23 may include a first subpixel 21, a second subpixel 22, and a third subpixel 23 arranged relative to each other in a spatial order or pattern. For example, as Figure 2 As shown in the example, the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 are aligned sequentially along a line in which the second sub-pixel 22 can be set to be adjacent to one side (e.g., the right side) of the first sub-pixel 21 and the third sub-pixel 23 can be set to be adjacent to one side (e.g., the right side) of the second sub-pixel 22.

[0043] In some implementations, when two adjacent sub-pixels are arranged, no other sub-pixels are arranged between the two sub-pixels.

[0044] The first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 are configured to emit light of different colors from each other. For example, the first sub-pixel 21 may be configured to emit red light R, the second sub-pixel 22 may be configured to emit green light G, and the third sub-pixel 23 may be configured to emit blue light B, but the implementation is not limited to this.

[0045] Figure 2 The illustration shows a pixel comprising only three subpixels 21, 22, and 23, but other implementations are possible. For example, a pixel could include four subpixels. If a pixel includes four subpixels, a fourth subpixel can be further configured to emit white light W.

[0046] Each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can have the same size. For example, each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can be configured to have the same width and the same height.

[0047] Each of sub-pixels 21, 22, and 23 may include light-emitting regions EA1, EA2, and EA3, and non-light-emitting regions NEA1, NEA2, and NEA3. The first sub-pixel 21 may include a first light-emitting region EA1 and a first non-light-emitting region NEA1 adjacent to the first light-emitting region EA1. The second sub-pixel 22 may include a second light-emitting region EA2 and a second non-light-emitting region NEA2 adjacent to the second light-emitting region EA2. The third sub-pixel 23 may include a third light-emitting region EA3 and a third non-light-emitting region NEA3 adjacent to the third light-emitting region EA3. Each of the light-emitting regions EA1, EA2, and EA3 may be the same as the area of ​​the anode electrodes 41a, 41b, and 41c exposed from the embankments BK1, BK2, and BK3.

[0048] The first electrode 4 can be patterned for each sub-pixel 21, 22, and 23. That is, one first electrode 4 can be formed in the first sub-pixel 21, another first electrode 4 can be formed in the second sub-pixel 22, and yet another first electrode 4 can be formed in the third sub-pixel 23. The first electrode 4 may include a reflective electrode 42 and an anode electrode 41. The anode electrode 41 and the reflective electrode 42 can be set for each sub-pixel 21, 22, and 23. The anode electrode 41 may include a first anode electrode 41a set in the first sub-pixel 21, a second anode electrode 41b set in the second sub-pixel 22, and a third anode electrode 41c set in the third sub-pixel 23. The reflective electrode 42 may include a first reflective electrode 42a set in the first sub-pixel 21, a second reflective electrode 42b set in the second sub-pixel 22, and a third reflective electrode 42c set in the third sub-pixel 23. The electrodes 42a, 42b, and 42c of the sub-pixels 21, 22, and 23 can be set at different heights.

[0049] A dam may be provided on each of the anode electrodes 41a, 41b and 41c (see [reference]). Figure 2 (BK1, BK2, and BK3). The embankments BK1, BK2, and BK3 can be configured to cover each edge of the anode electrode 41a in the first sub-pixel 21, the anode electrode 41b in the second sub-pixel 22, and the anode electrode 41c in the third sub-pixel 23, respectively, thereby distinguishing the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 from each other.

[0050] The display panel 100 may include reflective electrodes 42a, 42b and 42c with different surface heights for each sub-pixel 21, 22 and 23 to improve light extraction efficiency by using microcavity characteristics.

[0051] The microcavity characteristic refers to the constructive interference that occurs when the distance between the reflective electrodes 42a, 42b, and 42c and the second electrode 6 becomes an integer multiple of half the wavelength λ / 2 of the light emitted from the sub-pixels 21, 22, and 23 and the light is amplified. Furthermore, as the reflection and re-reflection process between the reflective electrodes 42a, 42b, and 42c and the second electrode 6 is repeated, the degree of light amplification continuously increases, thereby improving the external extraction efficiency of light.

[0052] The common light-emitting layer 5 can be configured to emit white light. For example, the common light-emitting layer 5 can be configured with a double-layer structure including a blue light-emitting layer, a yellow-green light-emitting layer, and a charge-generating layer, or with a triple-layer structure including a blue light-emitting layer, a green light-emitting layer, a red light-emitting layer, and a charge-generating layer to emit white light. However, this embodiment is not limited to this, and a multi-layer structure with more than three layers can be configured, as long as the multi-layer structure can emit white light.

[0053] The common light-emitting layer 5 can be set as a common layer above the entire first sub-pixel 21, second sub-pixel 22 and third sub-pixel 23.

[0054] The second electrode 6 can be configured to form an electric field with the anode electrodes 41a, 41b and 41c and serve as a cathode. The second electrode 6 can be disposed on the upper surface of the common light-emitting layer 5 and can be configured as a common layer over the entire first sub-pixel 21, second sub-pixel 22 and third sub-pixel 23, with the upper surface of the common light-emitting layer 5 opposite to the lower surface of the common light-emitting layer 5 that contacts the anode electrodes 41a, 41b and 41c.

[0055] In the case of a top-emitting method, the second electrode 6 can be configured as a second electrode, but in the case of a bottom-emitting method, it can be configured as a third electrode including a reflective material. The second electrode 6 can be formed as a semi-transparent electrode to increase light extraction by utilizing the microcavity characteristics. The display device 10 is described as an example in which the second electrode 6 is formed as a semi-transparent electrode to improve light extraction efficiency by utilizing the microcavity characteristics in the top-emitting method.

[0056] A color filter layer 9 can be disposed in each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23, and is configured to block a specific color of light emitted from the common light-emitting layer 5 of each sub-pixel 21, 22, and 23. The first color filter 91 disposed in the first sub-pixel 21 can be configured to block light of colors other than red light R. In this case, the first color filter 91 can be configured as a red color filter. The second color filter 92 disposed in the second sub-pixel 22 can be configured to block light of colors other than green light G. In this case, the second color filter 92 can be configured as a green color filter. The third color filter 93 disposed in the third sub-pixel 23 can be configured to block light of colors other than blue light B. In this case, the third color filter 93 can be configured as a blue color filter. However, the embodiments disclosed herein are not limited thereto.

[0057] The first color filter 91, the second color filter 92, and the third color filter 93, respectively set in the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23, can be set at the same size as the size of each sub-pixel, or they can be set at a size that is reduced or enlarged at a constant ratio to the size of each sub-pixel.

[0058] Circuit portions 31, 32, and 33 may be disposed in the non-light-emitting regions NEA1, NEA2, and NEA3 of each sub-pixel 21, 22, and 23. Each of circuit portions 31, 32, and 33 may include CMOS circuitry or transistor circuitry, but embodiments of this disclosure are not limited thereto.

[0059] Circuit sections 31, 32, and 33 may overlap with reflective electrodes 42a, 42b, and 42c disposed in each of sub-pixels 21, 22, and 23. Circuit sections 31, 32, and 33 may be electrically connected to reflective electrodes 42a, 42b, and 42c.

[0060] The lamination structure of a display panel 100 according to one embodiment will be described in detail below.

[0061] According to one embodiment, the display device 10 may include a substrate 2, an insulating layer 3, a first electrode 4, embankments BK1, BK2 and BK3, a common light-emitting layer 5, a second electrode 6, a capping layer 7, an encapsulation layer 8 and a color filter layer 9.

[0062] Substrate 2 can be a plastic film, a glass substrate, or a semiconductor substrate such as silicon. For example, substrate 2 can be a semiconductor substrate.

[0063] The substrate 2 may be made of or comprise transparent or opaque materials. A first sub-pixel 21, a second sub-pixel 22, and a third sub-pixel 23 may be disposed on the substrate 2. The first sub-pixel 21 may be configured to emit red light R, the second sub-pixel 22 may be configured to emit blue light B, and the third sub-pixel 23 may be configured to emit green light G.

[0064] According to one embodiment, the display device 10 can be configured using a so-called top-emitting method that emits light upwards, so that not only transparent materials but also opaque materials can be used as the material of the substrate 2. Color filters 91, 92, and 93 can be respectively disposed on the upper side of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 that emit light, so as to transmit light of the same color.

[0065] At least one trench portion TRP can be formed on the substrate 2. The substrate 2 can be recessed in the thickness direction at the trench portion TRP. The trench portion TRP can be arranged to correspond to the boundary between adjacent sub-pixels 21, 22, and 23. In various embodiments, multiple trench portions TRP can be formed in one of the sub-pixels 21, 22, and 23, but the embodiments of this disclosure are not limited thereto. The trench portion TRP can improve the electrical connection of circuit portions 31, 32, and 33 between adjacent sub-pixels 21, 22, and 23 through the substrate 2.

[0066] An insulating layer 3 may be formed on a substrate 2. The insulating layer 3 may include an inorganic insulating material. The insulating layer 3 may include: a first insulating layer 3a; a second insulating layer 3b disposed on the first insulating layer 3a; a third insulating layer 3c formed on the second insulating layer 3b; and a fourth insulating layer 3d formed on the third insulating layer 3c.

[0067] Within the insulating layer 3, circuit elements including multiple circuit portions 31, 32, and 33, various signal lines, and capacitors can be provided for each sub-pixel 21, 22, and 23. Circuit portions 31, 32, and 33 can be disposed within the first insulating layer 3a. Signal lines may include gating lines, data lines, power lines, and reference lines. Circuit portions 31, 32, and 33 may include CMOS circuits or thin-film transistors. When circuit portions 31, 32, and 33 include thin-film transistors, the thin-film transistors may include at least one of a switching thin-film transistor, a driving thin-film transistor, or a sensing thin-film transistor. The switching thin-film transistor performs switching control based on a gating signal provided to the gating line and is configured to provide a data voltage from the data line to the driving thin-film transistor.

[0068] The driving thin-film transistor can be switched based on the data voltage provided from the switching thin-film transistor, and can be configured to generate a data current from the power supplied from the power line and provide the generated data current to the first electrode 4.

[0069] The sensing thin-film transistor can be configured to sense a threshold voltage deviation that drives the thin-film transistor and to supply current to a reference line in response to a sensing control signal provided from a gate line or a separate sensing line, the threshold voltage deviation being the cause of image quality degradation.

[0070] The capacitor can be configured to hold the data voltage supplied to the driving thin-film transistor within a frame and is connected to the gate terminal and source terminal of the driving thin-film transistor, respectively.

[0071] Each sub-pixel 21, 22, and 23 may be defined by or may include a cross structure of gating lines and data lines. The insulating layer 3 may surround the circuit portions 31, 32, and 33.

[0072] Within the first insulating layer 3a, a first circuit portion 31, a second circuit portion 32, and a third circuit portion 33 can be arranged for each sub-pixel 21, 22, and 23. The first circuit portion 31 can be connected to a first electrode 4 disposed on the first sub-pixel 21 and can provide a driving voltage to emit light of a color corresponding to the first sub-pixel 21. The first circuit portion 31, the second circuit portion 32, and the third circuit portion 33 can be disposed on the same layer, but the embodiments of this disclosure are not limited thereto.

[0073] The second circuit section 32 can be connected to the first electrode 4 disposed on the second sub-pixel 22 and is configured to apply a driving voltage to emit light of a color corresponding to the second sub-pixel 22.

[0074] The third circuit section 33 can be connected to the first electrode disposed on the third sub-pixel 23 and is configured to apply a driving voltage to emit light of a color corresponding to the third sub-pixel 23.

[0075] When a gating signal is input from the gating line, each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can use each of the circuit portions 31, 32, and 33 to provide a predetermined current to the light-emitting layer based on the data voltage of the data line. Therefore, the light-emitting layers of each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can emit light at a predetermined brightness based on the predetermined current.

[0076] The insulating layer 3 can be configured to protect circuit portions 31, 32, and 33. The insulating layer 3 can be made of or include inorganic insulating materials, but embodiments of this disclosure are not limited thereto. The insulating layer 3 can also be made of or include organic insulating materials. For example, the insulating layer 3 can be made of or include inorganic materials such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (Al2O3), but embodiments of this disclosure are not limited thereto.

[0077] A connection electrode and multiple electrode patterns can be formed on the insulating layer 3. The multiple electrode patterns may include: a connection electrode CE formed on the first insulating layer 3a; first electrode patterns 42a and 42a' formed on the second insulating layer 3b; second electrode patterns 42b and 42b' formed on the third insulating layer 3c; and third electrode patterns 42c and 42c' formed on the fourth insulating layer 3d. In some implementations, the first electrode patterns 42a and 42a' may include a first reflective electrode 42a and a first connection electrode 42a'. The second electrode patterns 42b and 42b' may include a second reflective electrode 42b and a second connection electrode 42b'. In some implementations, the third electrode patterns 42c and 42c' may include a third reflective electrode 42c and a third connection electrode 42c'.

[0078] A connection electrode CE can be disposed in each of sub-pixels 21, 22, and 23. The connection electrode CE can be disposed in the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23, respectively, and can also be disposed on the first insulating layer 31a. In some implementations, the connection electrodes CE of sub-pixels 21, 22, and 23 can be electrically connected to circuit portions 31, 32, and 33 via a first via VIA1. The first via VIA1 can comprise copper (Cu) or tungsten (W), but embodiments of this disclosure are not limited thereto. The first via VIA1 can fill a hole recessed from the first insulating layer 3a in the thickness direction. The first insulating layer 3a in which the first via VIA1 is formed can include an inclined surface formed at an inclined angle.

[0079] The first reflective electrode 42a and the first connecting electrode 42a' can be disposed on the same layer and comprise the same material. The second reflective electrode 42b and the second connecting electrode 42b' can be disposed on the same layer using the same material. The third reflective electrode 42c and the third connecting electrode 42c' can be disposed on the same layer using the same material.

[0080] Each electrode pattern may include a reflective material for reflecting light. For example, the reflective material may be a metal or include a metal, but embodiments of this disclosure are not limited thereto, and the reflective material may be other materials or include other materials, as long as the material can reflect light. For example, the reflective material may have a laminated structure of aluminum (Al), silver (Ag), or aluminum (Al) and titanium (Ti), but embodiments of this disclosure are not limited thereto.

[0081] Because the reflective electrodes (42: 42a, 42b, and 42c) are positioned relatively lower than the common light-emitting layer 5, they can reflect light emitted from the common light-emitting layer 5 upwards. Here, "upwards" refers to a direction that the user can perceive. For example, "upwards" could represent the direction in which the encapsulation layer 8 or the color filter layer 9 is positioned. Therefore, compared to the case without reflective electrodes (42: 42a, 42b, and 42c), the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23 can have improved light efficiency, and the user can perceive higher brightness, for example, a clearer image, through the improved light efficiency.

[0082] The first reflective electrode 42a can be disposed on the second insulating layer 3b in the first sub-pixel 21. The first connecting electrode 42a' can be disposed on the second insulating layer 3b in each sub-pixel 21, 22, and 23, and connected to the first reflective electrode 42a in the first sub-pixel 21. The first connecting electrode 42a' disposed in each sub-pixel 21, 22, and 23 can be electrically connected to the connecting electrode CE through a second via VIA2. The second via VIA2 can include copper CU or tungsten W, but the embodiments of this disclosure are not limited thereto. The second via VIA2 can fill a hole recessed from the second insulating layer 3b in the thickness direction. The hole in the second insulating layer 3b in which the second via VIA2 is formed can include an inclined surface.

[0083] The first reflective electrode 42a can be disposed on the first light-emitting region EA1, or it can be disposed on the first non-light-emitting region NEA1. Here, it is shown that the first connecting electrode 42a' is disposed on the first non-light-emitting region NEA1, and a portion of the first reflective electrode 42a even extends into the first light-emitting region EA1. However, the embodiments of this disclosure are not limited thereto, and the first connecting electrode 42a' may be disposed only on the first non-light-emitting region NEA1.

[0084] The third insulating layer 3c can be disposed on the first reflective electrode 42a and the first connecting electrode 42a'.

[0085] The second reflective electrode 42b can be disposed on the third insulating layer 3c in the second sub-pixel 22, and the second connecting electrode 42b' can be disposed on the third insulating layer 3c in each sub-pixel 21, 22, and 23. The second connecting electrode 42b' disposed in each sub-pixel 21, 22, and 23 can be electrically connected to the first connecting electrode 42a' disposed in the lower region of the first through-hole TH1. The third insulating layer 3c can be recessed from the first through-hole TH1 in the thickness direction. In the first sub-pixel 21, the second connecting electrode 42b' can be electrically connected to the first connecting electrode 42a' in the first through-hole TH1. In the second sub-pixel 22, the second connecting electrode 42b' can be electrically connected to the first connecting electrode 42a' in the first through-hole TH1. In the third sub-pixel 23, the second connecting electrode 42b' can be electrically connected to the first connecting electrode 42a' in the first through-hole TH1. Figure 2 The diagram shows that the first through-hole TH1 is located in the light-emitting areas EA1, EA2 and EA3, but the first through-hole TH1 can also be located in the non-light-emitting areas NEA1, NEA2 and NEA3.

[0086] In one embodiment, the first through-hole TH1 may include two or more inclined surfaces. That is, the first through-hole TH1 may include two or more inclined surfaces with different inclination angles, which will be discussed later. Figure 5 Describe it.

[0087] The fourth insulating layer 3d can be disposed on the second reflective electrode 42b and the second connecting electrode 42b'.

[0088] The third reflective electrode 42c can be disposed on the fourth insulating layer 3d in the third sub-pixel 23. The third connecting electrode 42c' can be disposed on the fourth insulating layer 3d in each sub-pixel 21, 22, and 23. The third connecting electrode 42c' disposed in each sub-pixel 21, 22, and 23 can be electrically connected to the second connecting electrode 42b' disposed at a lower position in the second via TH2. In the second via TH2, the fourth insulating layer 3d can be recessed in the thickness direction. In the first sub-pixel 21, the third connecting electrode 42c' can be electrically connected to the second connecting electrode 42b' in the second via TH2. In the second sub-pixel 22, the third connecting electrode 42c' can be electrically connected to the second connecting electrode 42b' in the second via TH2. In the third sub-pixel 23, the third connecting electrode 42c' can be electrically connected to the second connecting electrode 42b' in the second via TH2. Figure 2The second through-hole TH2 is shown to be located in the non-light-emitting regions NEA1, NEA2 and NEA3, but the second through-hole TH2 can also be located in the light-emitting regions EA1, EA2 and EA3.

[0089] In one embodiment, the second through-hole TH2 may include two or more inclined surfaces. That is, the second through-hole TH2 may include two or more inclined surfaces with different inclination angles, which will be discussed later. Figure 5 Describe it.

[0090] Although not shown in the accompanying drawings, trenches (not shown) may be formed in at least one insulating layer 3a, 3b, 3c, and 3d. For example, trenches may be formed in non-light-emitting regions NEA1, NEA2, and NEA3. For example, trenches may be formed through part or all of the fourth insulating layer 3d, but embodiments of this disclosure are not limited thereto. The trenches may be configured to prevent lateral leakage current LLC caused by the common light-emitting layer 5 disposed between two adjacent sub-pixels 21, 22, and 23.

[0091] like Figure 2 As shown, the distances between the reflective electrodes 42a, 42b, and 42c and the second electrode 6 can be different in the light-emitting regions EA1, EA2, and EA3. For example, the distance between the first reflective electrode 42a and the second electrode 6 can be the largest, followed by the distance between the second reflective electrode 42b and the second electrode 6, and finally the distance between the third reflective electrode 42c and the second electrode 6 can be the smallest.

[0092] Thus, the reflective electrodes 42a, 42b, and 42c are configured to have various distances (or resonant distances) from the second electrode 6. This is because, based on these distances, the extraction efficiency of different colors of light can be improved through reflection and re-reflection between the reflective electrodes 42a, 42b, and 42c and the second electrode 6. Therefore, in the first sub-pixel 21, the extraction efficiency of red light can be improved. In the second sub-pixel 22, the extraction efficiency of green light can be improved. In the third sub-pixel 23, the extraction efficiency of blue light can be improved.

[0093] The anode electrode 41 may include a first anode electrode 41a of the first sub-pixel 21, a second anode electrode 41b of the second sub-pixel 22, and a third anode electrode 41c of the third sub-pixel 23. The anode electrodes 41a, 41b, and 41c may be disposed on the same layer and comprise the same material.

[0094] Anode electrodes 41a, 41b, and 41c can be directly disposed on the third connecting electrode 42c' or the third reflecting electrode 42c in each of sub-pixels 21, 22, and 23. In each of sub-pixels 21, 22, and 23, anode electrodes 41a, 41b, and 41c can be electrically connected to the third connecting electrode 42c' or the third reflecting electrode 42c. Anode electrodes 41a, 41b, and 41c can be disposed in the light-emitting regions EA1, EA2, and EA3, respectively, and can extend to even be disposed in a portion of the non-light-emitting regions NEA1, NEA2, and NEA3.

[0095] Anode electrodes 41a, 41b, and 41c may comprise a material with high light transmittance. Anode electrodes 41a, 41b, and 41c may be transparently disposed such that light reflected from reflective electrodes 42a, 42b, and 42c can travel upwards. Anode electrodes 41a, 41b, and 41c may be made of or comprise transparent materials, but embodiments are not limited thereto. Anode electrodes may be configured as thin films made of or comprising metallic materials, as long as they are capable of transmitting light. For example, anode electrodes 41a, 41b, and 41c may comprise titanium nitride (TiN), but embodiments of this disclosure are not limited thereto. For example, when anode electrodes 41a, 41b, and 41c comprise TiN, the thickness of the anode electrodes may be about 5 nm or less. For example, the thickness of anode electrodes 41a, 41b, and 41c may be about 3 nm, but embodiments are not limited thereto. For example, anode electrodes 41a, 41b, and 41c may comprise transparent conductive oxides such as ITO or IZO.

[0096] Dikes can be provided on the anode electrodes 41a, 41b, and 41c. The dikes can consist of or include multiple layers, but embodiments of this disclosure are not limited thereto. For example, the dikes can include three stacked dikes BK1, BK2, and BK3.

[0097] The dike portions BK1, BK2, and BK3 may be made of or include inorganic materials such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (Al2O3), but the embodiments of this disclosure are not limited thereto. For example, the first dike portion BK1 may include aluminum oxide (Al2O3), the second dike portion BK2 may include silicon oxide (SiOx), and the third dike portion BK3 may include silicon nitride (SiNx), but the embodiments of this disclosure are not limited thereto.

[0098] Dikes BK1, BK2, and BK3 can be disposed on non-light-emitting regions NEA1, NEA2, and NEA3. In non-light-emitting regions NEA1, NEA2, and NEA3, dikes BK1, BK2, and BK3 can be configured to expose the upper surfaces of anode electrodes 41a, 41b, and 41c to define light-emitting regions EA1, EA2, and EA3.

[0099] The common light-emitting layer 5 can be formed on the anode electrodes 41a, 41b, and 41c, as well as the embankments BK1, BK2, and BK3. The common light-emitting layer 5 can be in contact with the upper surfaces of the anode electrodes 41a, 41b, and 41c. The common light-emitting layer 5 can be in direct contact with the upper surfaces of the anode electrodes 41a, 41b, and 41c, the upper surfaces of the embankments BK1, BK2, and BK3, and the upper surface of the insulating layer 3.

[0100] An organic light-emitting element (OLED) according to one embodiment may include an anode electrode (41, ANO), a first electrode 4, a second electrode (6, CAT), and a common light-emitting layer 5 disposed between the first electrode 4 and the second electrode 6.

[0101] The common light-emitting layer 5 can be configured to emit white light W. In some implementations, the common light-emitting layer 5 can consist of or include multiple stacked layers configured to emit light of different colors. Specifically, the common light-emitting layer 5 may include a first stacked layer, a second stacked layer, and a charge-generating layer CGL disposed between the first and second stacked layers. The common light-emitting layer 5 can be formed in each of the sub-pixels and between the sub-pixels.

[0102] The second electrode 6 can be formed on the common light-emitting layer 5. The second electrode can be used as the cathode of the display panel. The second electrode 6 can be formed in each sub-pixel and between sub-pixels, just like the common light-emitting layer 5.

[0103] In a display panel 100 according to one embodiment, the second electrode 6 can be configured as a semi-transparent electrode to achieve white light with high light efficiency in the top-emitting method. Therefore, a microcavity effect can be obtained for each of the first sub-pixel 21, the second sub-pixel 22, and the third sub-pixel 23. Repeated reflection and re-reflection between the second electrode 6 and the reflective electrode 42 can then achieve the microcavity effect, thereby improving light extraction efficiency.

[0104] Since the second electrode 6 is formed on the upper surface of the common light-emitting layer 5, the second electrode 6 can be formed along the contour of the common light-emitting layer 5. Since the common light-emitting layer 5 is formed along the contour of the first electrode 4 in the light-emitting region, the second electrode 6 can be formed along the contour of the first electrode 4. Furthermore, the capping layer 7 formed on the second electrode 6 can be formed along the contour of the second electrode 6.

[0105] The capping layer 7 may be made of or include inorganic insulating materials, but the implementation is not limited thereto. The capping layer 7 may be disposed on the second electrode 6 and may protect the organic light-emitting element OLED.

[0106] The encapsulation layer 8 may be formed on the second electrode 6 and configured to prevent external moisture from leaking into the common light-emitting layer 5. The encapsulation layer 8 may be made of or include inorganic insulating materials, or may be configured as a stacked structure in which inorganic and organic insulating materials are alternately layered, but the embodiments are not limited thereto.

[0107] A color filter layer 9 may be formed on the encapsulation layer 8. The color filter layer 9 may include: a first color filter 91 for red (R) in the first sub-pixel; a second color filter 92 for green (G) in the second sub-pixel 22; and a third color filter 93 for blue (B) in the third sub-pixel 23, but the implementation is not limited thereto. Although not shown, a black matrix may be provided between every two of the first color filter 91, the second color filter 92, and the third color filter 93 to prevent color mixing between sub-pixels.

[0108] Figure 3 yes Figure 2 The diagram shows a cross-sectional view of an organic light-emitting element. Figure 4 It is based on Figure 3 A cross-sectional view of an organic light-emitting element as a modified example.

[0109] Reference Figure 2 and Figure 3 The common light-emitting layer 5 may include a first stacked layer EL1, a second stacked layer EL2, and a first charge-generating layer CGL1 disposed on the first electrode 4.

[0110] The first stack EL1 can be disposed on the first electrode 4, and can have a structure in which the hole injection layer HIL, the hole transport layer HTL, the blue B emitting layer EML1, and the electron transport layer ETL are sequentially laminated.

[0111] The first stack EL1 can be set between the first sub-pixel 21 and the second sub-pixel 22, or even between the second sub-pixel 22 and the third sub-pixel 23.

[0112] The first charge generation layer CGL1 can be configured to provide charge to the first stacked layer EL1 and the second stacked layer EL2. The first charge generation layer CGL1 may include an N-type charge generation layer configured to provide electrons to the first stacked layer EL1; and a P-type charge generation layer configured to provide holes to the second stacked layer EL2. The N-type charge generation layer may include a metallic material as a dopant.

[0113] The second stacked layer EL2 can be disposed on the first stacked layer EL1, and can have a structure in which the hole transport layer (HTL), yellow-green (YG) light-emitting layer (EML2), electron transport layer (ETL) and electron injection layer (EIL) are stacked in sequence.

[0114] The second layer EL2 can be set between the first sub-pixel 21 and the second sub-pixel 22, or even between the second sub-pixel 22 and the third sub-pixel 23.

[0115] As a result, Figure 2 and Figure 3 As shown, the common light-emitting layer 5 can be set above the entire first sub-pixel 21, second sub-pixel 22 and third sub-pixel 23 as a common layer.

[0116] like Figure 2 and Figure 4 As shown, the common light-emitting layer 5' of an organic light-emitting element OLED according to one embodiment may include a first stacked layer EL1, a second stacked layer EL2, a third stacked layer EL3 disposed on a first electrode 4, a first charge-generating layer CGL1 disposed between the first stacked layer EL1 and the second stacked layer EL2, and a second charge-generating layer CGL2 disposed between the second stacked layer EL2 and the third stacked layer EL3.

[0117] The first stacked layer EL1 can be disposed on the first electrode 4, and can have a structure in which the hole injection layer HIL, the hole transport layer HTL, the blue B emitting layer EML1, and the electron transport layer ETL are stacked in sequence.

[0118] The first stack EL1 can be set between the first sub-pixel 21 and the second sub-pixel 22, or even between the second sub-pixel 22 and the third sub-pixel 23, that is, set on the dikes BK1, BK2 and BK3.

[0119] The first charge generation layer CGL1 can be configured to provide charge to the first stacked layer EL1 and the second stacked layer EL2. The first charge generation layer CGL1 may include: an N-type charge generation layer configured to provide electrons to the first stacked layer EL1; and a P-type charge generation layer configured to provide holes to the second stacked layer EL2. The N-type charge generation layer may include a metallic material as a dopant.

[0120] The second stack EL2 can be disposed on the first stack EL1, and can consist of or include a structure in which the hole transport layer HTL, the green light-emitting layer EML2 and the electron transport layer ETL are sequentially stacked.

[0121] The second layer EL2 can be set between the first sub-pixel 21 and the second sub-pixel 22, or even between the second sub-pixel 22 and the third sub-pixel 23, that is, set on the embankment BK1, BK2 and BK3.

[0122] The second charge generation layer CGL2 can be configured to provide charge to the second stacked layer EL2 and the third stacked layer EL3. The second charge generation layer CGL2 may include: an N-type charge generation layer configured to provide electrons to the second stacked layer EL2; and a P-type charge generation layer configured to provide holes to the third stacked layer EL3. The N-type charge generation layer may include a metallic material as a dopant.

[0123] The third stack EL3 can be disposed on the second stack EL2, and can consist of or include the structure in which the hole transport layer HTL, the red R emitting layer EML3, the electron transport layer ETL and the electron injection layer EIL are sequentially stacked.

[0124] like Figure 2 , Figure 3 and Figure 4 As shown, charge generation layers CGL1 and CGL2 can be disposed between the first sub-pixel 21 and the second sub-pixel 22, or even between the second sub-pixel 22 and the third sub-pixel 23. In a display panel 100 according to one embodiment, since the common light-emitting layer 5 is disposed even between any two sub-pixels among sub-pixels 21, 22, and 23, when one sub-pixel emits light, lateral leakage current can be generated to adjacent sub-pixels 21, 22, and 23 through the charge generation layers CGL1 and CGL2. However, in some implementations, trenches as described above can be formed between sub-pixels 21, 22, and 23. The trenches can increase the formation length of the common light-emitting layer 5 at the boundaries of sub-pixels 21, 22, and 23, thereby extending the current path. Therefore, lateral leakage current can be prevented. Furthermore, the common light-emitting layer 5 can be separated from the trenches, thereby preventing lateral leakage current in advance.

[0125] Figure 5 yes Figure 2 The enlarged cross-sectional view of region Q1 is shown. Figure 5 It shows Figure 3 Detailed cross-sectional views of the first non-luminescent region NEA1, the second non-luminescent region NEA2, and the second luminescent region EA2 are shown.

[0126] Reference Figure 5The hole in the second insulating layer 3b in which the second via VIA2 is formed may include a sloping surface. The second via VIA2 may fill the hole in the second insulating layer 3b. After the second via VIA2 is filled into the hole in the second insulating layer 3b, a portion of the second via VIA2 may even be disposed on the upper surface near the hole in the second insulating layer 3b. During the planarization process, a portion of the second via VIA2 disposed on the upper surface near the hole in the second insulating layer 3b may be eliminated. During the planarization process, the thickness of the second insulating layer 3b may be partially reduced. Unlike the case where a planarization process is applied when forming the second via VIA2, a planarization process may not be applied when electrode patterns are formed in the first via TH1 and the second via TH2. For example, refer to... Figure 3 and Figure 5 The second reflective electrode 42b and the third reflective electrode 42c can be formed in the first via TH1 and the second via TH2, respectively. As described above, the first reflective electrode 42a, the second reflective electrode 42b, and the third reflective electrode 42c can be designed with separation distances d1, d2, and d3 to meet the microcavity characteristics of the second electrode 6. After forming the first reflective electrode 42a, the thickness of each of the insulating layers 3c and 3d disposed on the first reflective electrode 42a can be an important factor in controlling the separation distances d1, d2, and d3. Therefore, unlike the second via VIA2, when forming the second electrode pattern (including the second reflective electrode 42b) and the third electrode pattern (including the third reflective electrode 42c), the planarization process can be omitted.

[0127] The first through-hole TH1 of the third insulating layer 3c may include two or more inclined surfaces. For example, the first through-hole TH1 may include: a first inclined surface 3cs1; and a second inclined surface 3cs2 located above the first inclined surface 3cs1. The first inclined surface 3cs1 and the second inclined surface 3cs2 may be connected to each other. The lower end of the first inclined surface 3cs1 may be in direct contact with the first connecting electrode 42a'. The slopes (or inclination angles) of the first inclined surface 3cs1 and the second inclined surface 3cs2 may be different from each other. For example, the slope a11 of the first inclined surface 3cs1 may be greater than the slope a12 of the second inclined surface 3cs2. The third insulating layer 3c may have a first thickness H1. However, embodiments of the present disclosure are not limited thereto, and the slope a11 of the first inclined surface 3cs1 may be less than the slope a12 of the second inclined surface 3cs2.

[0128] The second electrode pattern can be disposed on the third insulating layer 3c. The second electrode pattern can be formed by physical vapor deposition (PVD), but the embodiments disclosed herein are not limited thereto. For example, the second reflective electrode 42b can be disposed on the third insulating layer 3c. The second reflective electrode 42b can be continuously disposed and integrally formed within the first through-hole TH1.

[0129] If the slope of the inclined surface of the first via TH1 is too steep, the second reflective electrode 42b may break within the first via TH1 due to limitations in the deposition equipment and deposition process. To improve reliability and avoid breakage or disconnection of the second reflective electrode 42b, it is possible to fill the first via TH1 with auxiliary vias and place the second reflective electrode 42b on the vias within the first via TH1. However, when forming electrode patterns in the first via TH1 and the second via TH2 as described above, a planarization process may not be applicable to accurately meet the microcavity characteristics.

[0130] In view of the above, according to one embodiment of the display panel 100, the slopes a11 of the inclined surface 3sc1 and a12 of the inclined surface 3sc2 are each 80 degrees or less, and the slope a12 of the second inclined surface 3sc2 is less than the slope a11 of the first inclined surface 3sc1. Therefore, when the first through-hole TH1 is activated, the disconnection of the second reflective electrode 42b (or the second electrode pattern) can be improved.

[0131] Similarly, the second via TH2 of the fourth insulating layer 3d may include two or more inclined surfaces. For example, the second via TH2 may include: a third inclined surface 3ds1 (or a first inclined surface of the second via TH2); and a fourth inclined surface 3ds2 (or a second inclined surface of the second via TH2) disposed above the third inclined surface 3ds1.

[0132] The third inclined surface 3ds1 and the fourth inclined surface 3ds2 can be connected to each other. The lower end of the third inclined surface 3ds1 can be in direct contact with the second reflective electrode 42b. The slopes (or tilt angles) of the third inclined surface 3ds1 and the fourth inclined surface 3ds2 can be different from each other. For example, the slope a21 of the third inclined surface 3ds1 can be greater than the slope a22 of the fourth inclined surface 3ds2. The fourth insulating layer 3d can have a second thickness H2. The second thickness H2 can be greater than the first thickness H1. However, the embodiments of this disclosure are not limited thereto, and the slope a21 of the third inclined surface 3ds1 can be less than the slope a22 of the fourth inclined surface 3ds2.

[0133] The third electrode pattern can be disposed on the fourth insulating layer 3d. The third electrode pattern can be formed by physical vapor deposition (PVD), but the embodiments disclosed herein are not limited thereto. For example, the third connecting electrode 42c' can be disposed on the fourth insulating layer 3d. The third connecting electrode 42c' can be continuously disposed and integrally formed within the second via TH2.

[0134] Similar to the first via TH1, if the slope of the inclined surface of the second via TH2 is steep, the third connecting electrode 42c' may break within the second via TH2 due to limitations in the deposition equipment and deposition process. Specifically, since the depth of the second via TH2 is greater than the depth of the first via TH1, the third connecting electrode 42c' can be more easily broken than the second reflective electrode 42b. To avoid breakage or disconnection of the third connecting electrode 42c', it is possible to fill the second via TH2 with auxiliary vias and place the second reflective electrode 42b on the vias within the second via TH2. However, when forming electrode patterns in the first via TH1 and the second via TH2 as described above, a planarization process may not be applicable to accurately meet the microcavity characteristics.

[0135] In view of the above, according to one embodiment of the display panel 100, the slopes a21 of the inclined surface 3ds1 and a22 of the inclined surface 3ds2 are each 80 degrees or less, and the slope a22 of the fourth inclined surface 3ds2 is less than the slope a21 of the third inclined surface 3ds1. Therefore, when the second through-hole TH2 is activated, the disconnection of the third connecting electrode 42c' (or the third electrode pattern) can be improved.

[0136] In the following text, a method for manufacturing a display panel 100 according to one embodiment will be described.

[0137] Figures 6 to 13 A cross-sectional view of a display panel being processed according to one embodiment is shown.

[0138] Reference Figure 5 and Figure 6 The second via VIA2' is filled into the hole of the second insulating layer 3b. For example... Figure 6 As shown, a second via VIA2' can be formed on the upper surface of the second insulating layer 3b near the hole. The second via VIA2' is located inside the hole of the second insulating layer 3b and above the upper surface of the second insulating layer.

[0139] Reference Figure 5 and Figure 7 Through a planarization process, the second via formed on the upper surface of the second insulating layer 3b near the hole can be eliminated (see...). Figure 6 The second via VIA2 is formed by forming a second via VIA2. During the planarization process, the thickness of the second insulating layer 3b can be reduced. The second via VIA2 may include at least one of copper Cu or tungsten W, but embodiments of this disclosure are not limited thereto.

[0140] Then, refer to Figure 5 and Figure 8A first electrode pattern can be formed on the second insulating layer 3b and the second via VIA2. The first electrode pattern may include a first connecting electrode 42a'. The first electrode pattern may include a reflective material for reflecting light. For example, the reflective material may be a metallic material or include a metallic material, but the embodiments are not limited thereto. The reflective material may be or include other materials, as long as the material can reflect light. For example, the reflective material may include aluminum (Al), silver (Ag), or a stacked structure of aluminum (Al) and silver (Ag), but the embodiments of this disclosure are not limited thereto.

[0141] Next, refer to Figure 5 and Figure 9 A photoresist is formed on the third insulating layer 3c, and then a first via TH1' penetrating the third insulating layer 3c can be formed. The first via TH1' can be formed by etching the area exposed by the photoresist. For example, the etching used to form the first via TH1' can be wet etching, but embodiments of this disclosure are not limited thereto.

[0142] Then, refer to Figure 5 and Figure 10 The first via TH1 can be formed. The process of forming the first via TH1 can be achieved by etching the front surface of the third insulating layer 3c. Figure 10 The etching can be performed, for example, by dry etching, but the embodiments disclosed herein are not limited thereto. Figure 10 Etching can create forms as described above. Figure 5 The first inclined surface 3cs1 and the second inclined surface 3cs2. With Figure 9 Compared to the first through-hole TH1', the first through-hole TH1 can have a larger width. Figure 10 In the etching process, the thickness of the third insulating layer 3c can be greater than... Figure 9 The thickness of the third insulating layer 3c is thin.

[0143] Reference Figure 5 and Figure 11 A second electrode pattern can be formed on the third insulating layer 3c and the first through-hole TH1. The second electrode pattern may include a second reflective electrode 42b and a second connecting electrode 42b'. The second electrode pattern may include a reflective material for reflecting light. For example, the reflective material may be or include a metallic material, but the embodiments are not limited thereto. The reflective material may be or include other materials, as long as the material can reflect light. For example, the reflective material may include aluminum (Al) or silver (Ag), or a stacked structure of aluminum (Al) and silver (Ag), but the embodiments of this disclosure are not limited thereto.

[0144] Then, refer to Figure 5 and Figure 12A photoresist is formed on the fourth insulating layer 3d, and then a second via TH2' can be formed to penetrate the fourth insulating layer 3d. After the photoresist is formed on the fourth insulating layer 3d, the second via TH2' can be formed by etching the area exposed by the photoresist. For example, the etching for forming the second via TH2' can be performed by, for example, wet etching, but embodiments of this disclosure are not limited thereto.

[0145] Then, refer to Figure 5 and Figure 13 A second via TH2 can be formed. The process of forming the second via TH2 can be achieved by etching the front surface of the fourth insulating layer 3d. Figure 13 The etching can be performed, for example, by dry etching, but the embodiments disclosed herein are not limited thereto. Figure 13 Etching can create forms as described above. Figure 5 The third inclined surface 3ds1 and the fourth inclined surface 3ds2. (The last part is incomplete and likely refers to a different context.) Figure 12 Compared to the second through-hole TH2', the second through-hole TH2 can have a larger width. Figure 13 In the etching process, the thickness of the fourth insulating layer 3d can be greater than... Figure 12 The thickness of the fourth insulating layer 3d is thin.

[0146] In the following description, a display device according to another embodiment will be described. In the following embodiments, terms related to... Figures 1 to 13 Detailed descriptions or duplicate descriptions of configurations that are the same as or similar to those described in the previous section.

[0147] Figure 14 This is a cross-sectional view of a display device according to another embodiment of the disclosed technology.

[0148] Reference Figure 14 According to this embodiment, the third insulating layer 3c of the display panel 100_1 disposed in the display device may include a first through-hole TH1' instead of Figure 5 The first through-hole TH1, which is related to Figure 5 The display panel 100 is different. The first through-hole TH1' can correspond to Figure 9 The hole formed in the middle.

[0149] As mentioned above Figure 9As described, the thickness of the fourth insulating layer 3d is greater than the thickness of the third insulating layer 3c. Therefore, the third electrode pattern (or third connecting electrode 42c') disposed in the second through-hole TH2 of the fourth insulating layer 3d may be easily disconnected compared to the first through-hole TH1' of the third insulating layer 3c. Therefore, in order to improve the disconnection of the third electrode pattern (or third connecting electrode 42c') in the second through-hole TH2, the second through-hole TH2 may include two or more inclined surfaces, but the first through-hole TH1' may include one inclined surface (see 3cs1).

[0150] omission and Figure 9 The description is the same as the description of other components.

[0151] Figure 15 This is a cross-sectional view of a display device according to another embodiment of the disclosed technology.

[0152] Reference Figure 15 According to this embodiment, the third insulating layer 3c_1 of the display panel 100_2 disposed in the display device may include a first through-hole TH1_1, and the fourth insulating layer 3d_1 may include a second through-hole TH2_1, which is consistent with... Figure 5 The display panel is different from 100.

[0153] In some implementations, the first through-hole TH1_1 may further include a fifth inclined surface 3cs3 (or the third inclined surface of the first through-hole TH1_1). The slope a13 of the fifth inclined surface 3cs3 may be greater than the slope a12 of the second inclined surface 3cs2, but the embodiments of this disclosure are not limited thereto. The slope a13 of the fifth inclined surface 3cs3 may be 80 degrees or less. The second through-hole TH2_1 may further include a sixth inclined surface 3ds3 (or the third inclined surface of the second through-hole TH2_1). The slope a23 of the sixth inclined surface 3ds3 may be greater than the slope a22 of the fourth inclined surface. The slope a23 of the sixth inclined surface 3ds3 may be greater than the slope a22 of the fourth inclined surface 3ds2, but the embodiments of this disclosure are not limited thereto. The slope a23 of the sixth inclined surface 3ds3 may be 80 degrees or less. The first through-hole TH1_1 and the second through-hole TH2_1 can have inclined surfaces with different slopes, thereby further improving the breakage of the electrode pattern provided in the through-holes TH1_1 and TH2_1. For example, when the first through-hole TH1_1 and the second through-hole TH2_1 each include three inclined surfaces with different slopes, the overall slope can be gentler compared to the case of including two inclined surfaces with different slopes. Furthermore, the total thickness of the through-holes TH1_1 and TH2_1 can be less than [a certain value]. Figure 5 The total thickness of the through holes TH1 and TH2.

[0154] omission and Figure 9The description is the same as the description of other components.

[0155] Figure 16 This is a cross-sectional view of a display device according to another embodiment of the disclosed technology.

[0156] Reference Figure 16 According to this embodiment, the third insulating layer 3c of the display panel 100_3 disposed in the display device may not include... Figure 5 The first through hole TH1 is not included but rather the first through hole TH1', which is consistent with Figure 15 The display panel 100_2 is different. The first through hole TH1' can be... Figure 9 The hole formed in the middle.

[0157] like Figure 5 As shown, the thickness of the fourth insulating layer 3d can be greater than the thickness of the third insulating layer 3c. The third electrode pattern (or third connecting electrode 42c') disposed in the second through-hole TH2_1 of the fourth insulating layer 3d can be more easily disconnected than the second electrode pattern (or second connecting electrode 42b') disposed in the first through-hole TH1' of the third insulating layer 3c. Therefore, in order to improve the disconnection of the third electrode pattern (or third connecting electrode 42c') in the second through-hole TH2_1, the second through-hole TH2_1 may include three inclined surfaces, but the first through-hole TH1' may include one inclined surface (see 3cs1).

[0158] Therefore, omission and Figure 9 and Figure 15 The description is the same as the description of other components.

[0159] Figure 17 This is a cross-sectional view of a display device according to another embodiment of the disclosed technology.

[0160] Reference Figure 17 According to this embodiment, the fourth insulating layer 3d_1 of the display panel 100_4 disposed in the display device may include a second through-hole TH2_1, which is consistent with... Figure 5 The display panel is different from 100.

[0161] In some implementations, the second via TH2_1 may further include a sixth inclined surface 3ds3 (or a third inclined surface of the second via TH2_1). The slope a23 of the sixth inclined surface 3ds3 may be greater than the slope a22 of the fourth inclined surface 3ds2, but the embodiments of this disclosure are not limited thereto. The slope a23 of the sixth inclined surface 3ds3 may be 80 degrees or less, and the second via TH2_1 may include three inclined surfaces with different slopes, thereby further improving the disconnection of the electrode pattern disposed in the second via TH2_1. Figure 15The effects generated by the second through-hole TH2_1 including three inclined surfaces with different slopes from each other have been described in the description thereof, and thus the description thereof will be omitted.

[0162] The description of other components that is the same as the corresponding description of Figure 9 will be omitted.

[0163] Figure 18 is a cross-sectional view of a display device according to another embodiment of the disclosed technology.

[0164] Referring to Figure 18 , in the display device according to this embodiment, the third insulating layer 3c_2 of the display panel 100_5 provided in the display device may include a first through-hole TH1_2, and the fourth insulating layer 3d_2 may include a second through-hole TH2_2, which is different from the display panel 100_2 of Figure 15 .

[0165] In some implementations, the first through-hole TH1_2 may include a first inclined surface 3cs1_1, a second inclined surface 3cs2_1, and a fifth inclined surface 3cs3_1 (or the third inclined surface of the first through-hole TH1_2). The second through-hole TH2_2 may include a third inclined surface 3ds1_1 (or the first inclined surface of the second through-hole TH2_2), a fourth inclined surface 3ds2_1 (or the second inclined surface of the second through-hole TH2_2), and a sixth inclined surface 3ds3_1 (or the third inclined surface of the second through-hole TH2_2). In the case of the first through-hole TH1_1, the slope may increase from the top to the bottom (a13_1 < a12_1 < a11_1). The slopes a11_1, a12_1, a13_1, a21_1, a22_1, and a23_1 of the inclined surfaces of the first through-hole TH1_1 and the second through-hole TH2_1 may be 80 degrees or less.

[0166] The description of other components that is the same as the corresponding description of Figure 15 will be omitted.

[0167] The display device according to various embodiments of the present disclosure may be described as follows.

[0168] The display device may include: a substrate including a light-emitting region and a non-light-emitting region disposed adjacent to the light-emitting region; a reflective electrode disposed on the substrate; an auxiliary layer disposed on the reflective electrode; and an organic light-emitting element disposed on the auxiliary layer.

[0169] In the displays according to various embodiments of the present disclosure, the reflective electrode may be disposed on the light-emitting region and a part of the non-light-emitting region.

[0170] In displays according to various embodiments of the present disclosure, the auxiliary layer may be in direct contact with the upper surface of the reflective electrode in a non-light-emitting area.

[0171] In a display device according to various embodiments of the present disclosure, an organic light-emitting element may include: an anode electrode disposed on the reflective electrode and the auxiliary layer; a common light-emitting layer disposed on the anode electrode; and a second electrode disposed on the common light-emitting layer.

[0172] The display device according to various embodiments of the present disclosure may further include a dam disposed between the anode electrode and the common light-emitting layer, and the dam may be disposed on a non-light-emitting area.

[0173] In the display device according to various embodiments of the present disclosure, the second distance between the reflective electrode and the second electrode in the non-light-emitting region may be greater than the first distance between the reflective electrode and the second electrode in the light-emitting region.

[0174] The display device according to various embodiments of the present disclosure may include a metallic material, and the light reflectivity of the auxiliary layer may be lower than that of the reflective electrode.

[0175] In the display device according to various embodiments of the present disclosure, the light absorption rate of the auxiliary layer may be greater than the light absorption rate of the reflective electrode.

[0176] In the display device according to various embodiments of the present disclosure, the auxiliary layer may include a light-shielding material.

[0177] In the display device according to various embodiments of the present disclosure, the light transmittance of the auxiliary layer may be greater than the light transmittance of the reflective electrode.

[0178] In the display device according to various embodiments of the present disclosure, the thickness (t1) of the auxiliary layer and the thickness (t2) of the embankment satisfy the following equation:

[0179] (t1+t2)=λ / 2×(2m)(Here, t1 is the thickness of the auxiliary layer, t2 is the thickness of the embankment, and λ is the target wavelength of the luminescent region).

[0180] In the display device according to various embodiments of the present disclosure, a reflective electrode may be disposed on a light-emitting region and a non-light-emitting region, and may further include a transistor disposed on the non-light-emitting region between the substrate and the reflective electrode. The reflective electrode may be connected to the transistor on the non-light-emitting region.

[0181] In the display device according to various embodiments of the present disclosure, the auxiliary layer may overlap with the transistor.

[0182] In the display device according to various embodiments of the present disclosure, the auxiliary layer may be configured to partially expose the upper surface of the reflective layer, and the anode electrode may be connected to the exposed upper surface of the reflective electrode.

[0183] Although various embodiments have been described with reference to the exemplary drawings, variations and improvements can be made to the disclosed embodiments and other embodiments based on what is described or shown in this document.

[0184] Cross-reference to related applications

[0185] This patent document claims priority and benefit to Korean Patent Application No. 10-2024-0156888, filed on November 7, 2024, the disclosure of which is incorporated herein by reference in its entirety as part of the disclosure of this patent document.

Claims

1. A display device, the display device comprising: substrate; A first insulating layer is disposed above the substrate; The circuit portion is disposed in the first insulating layer; A connecting electrode is disposed on the first insulating layer and electrically connected to the circuit portion; A second insulating layer is disposed on the connecting electrode; A first electrode pattern is disposed on the second insulating layer and electrically connected to the connection electrode; A third insulating layer is disposed on the first electrode pattern; The second electrode pattern is disposed on the third insulating layer and in the first through hole of the third insulating layer, and is electrically connected to the first electrode pattern; A fourth insulating layer is disposed on the second electrode pattern; as well as A third electrode pattern is disposed on the fourth insulating layer and in a second through-hole of the fourth insulating layer, and the third electrode pattern is electrically connected to the second electrode pattern. Wherein, at least one of the first through hole or the second through hole includes at least two inclined surfaces having different slopes from each other.

2. The display device according to claim 1, wherein, The second through-hole includes a first inclined surface disposed on the second electrode pattern and a second inclined surface connected to the first inclined surface, and The slope of the first inclined surface of the second through hole is greater than the slope of the second inclined surface of the second through hole.

3. The display device according to claim 2, wherein, The second through hole further includes a third inclined surface disposed on the second inclined surface of the second through hole, and the slope of the third inclined surface is greater than the slope of the second inclined surface of the second through hole.

4. The display device according to claim 2, wherein, The first through-hole includes a first inclined surface disposed on the first electrode pattern and a second inclined surface connected to the first inclined surface, and The slope of the first inclined surface of the first through hole is greater than the slope of the second inclined surface of the first through hole.

5. The display device according to claim 4, wherein, The first through hole further includes a third inclined surface located on the second inclined surface of the first through hole, and The slope of the third inclined surface of the first through hole is greater than the slope of the second inclined surface of the first through hole.

6. The display device according to claim 1, wherein, The second through hole includes a first inclined surface disposed on the second electrode pattern, a second inclined surface connected to the first inclined surface, and a third inclined surface connected to the second inclined surface.

7. The display device according to claim 6, wherein, The slope of the first inclined surface of the second through hole is greater than the slope of the second inclined surface of the second through hole, and The slope of the second inclined surface of the second through hole is greater than the slope of the third inclined surface of the second through hole.

8. The display device according to claim 1, wherein, The thickness of the fourth insulating layer is greater than the thickness of the third insulating layer.

9. The display device according to claim 1, wherein, The second through-hole includes three or more inclined surfaces with different slopes from each other, and The first through hole includes a tilted surface or two tilted surfaces with different slopes from each other.

10. The display device according to claim 1, wherein, The first sub-pixel, the second sub-pixel, and the third sub-pixel are disposed on the substrate. The first electrode pattern includes a first reflective electrode of the first sub-pixel and a first connecting electrode from the first sub-pixel to the third sub-pixel. The second electrode pattern includes a second connecting electrode from the first sub-pixel to the third sub-pixel and a second reflective electrode of the second sub-pixel. The third electrode pattern includes a third connecting electrode from the first sub-pixel to the third sub-pixel and a third reflective electrode of the third sub-pixel.

11. The display device according to claim 10, wherein, Each of the first sub-pixel, the second sub-pixel, and the third sub-pixel includes a light-emitting region and a non-light-emitting region disposed adjacent to the light-emitting region, and The first reflective electrode, the second reflective electrode, and the third reflective electrode are disposed on the light-emitting area of ​​each sub-pixel.

12. The display device according to claim 1, wherein the display device further comprises: A first electrode is disposed on the third electrode pattern and is in direct contact with the third electrode pattern.

13. The display device according to claim 12, wherein the display device further comprises: A common light-emitting layer is disposed on the first electrode; as well as The second electrode is disposed on the common light-emitting layer.

14. A display device, the display device comprising: substrate; A first sub-pixel, a second sub-pixel, and a third sub-pixel are defined on the substrate, and each of the first sub-pixel, the second sub-pixel, and the third sub-pixel emits light of a corresponding color. A first reflective electrode is disposed on the substrate of the first sub-pixel; A first connecting electrode is disposed on a substrate from the first sub-pixel to the third sub-pixel; A first insulating layer is disposed on the first reflective electrode and the first connecting electrode; The second connection electrode is disposed on the first insulating layer from the first sub-pixel to the third sub-pixel; The second reflective electrode is disposed on the first insulating layer of the second sub-pixel; A second insulating layer is disposed on the second reflective electrode and the second connecting electrode; A third connection electrode is disposed on a second insulating layer from the first sub-pixel to the third sub-pixel; A third reflective electrode is disposed on the second insulating layer of the third sub-pixel; A first electrode is disposed on the third connecting electrode and the third reflecting electrode; A common light-emitting layer is disposed on the first electrode; as well as The second electrode is disposed on the common light-emitting layer. Wherein, the distance between the first reflective electrode and the second electrode is greater than the distance between the second reflective electrode and the second electrode. The distance between the second reflective electrode and the second electrode is greater than the distance between the third reflective electrode and the second electrode. The first insulating layer includes a first through-hole and the second insulating layer includes a second through-hole, and The first or second through hole includes at least two inclined surfaces with different slopes from each other.

15. The display device according to claim 14, wherein, The second through-hole includes a first inclined surface disposed on the second connecting electrode and a second inclined surface connected to the first inclined surface, and The slope of the first inclined surface of the second through hole is greater than the slope of the second inclined surface of the second through hole.

16. The display device according to claim 15, wherein, The second through hole further includes a third inclined surface disposed on the second inclined surface of the second through hole, and The slope of the third inclined surface is greater than the slope of the second inclined surface of the second through hole.

17. The display device according to claim 15, wherein, The first through-hole includes a first inclined surface disposed on the first connecting electrode and a second inclined surface connected to the first inclined surface, and The slope of the first inclined surface of the first through hole is greater than the slope of the second inclined surface of the first through hole.

18. The display device according to claim 17, wherein, The first through hole further includes a third inclined surface disposed on the second inclined surface of the first through hole, and The slope of the third inclined surface of the first through hole is greater than the slope of the second inclined surface of the first through hole.

19. The display device according to claim 14, wherein, The second through-hole includes a first inclined surface disposed on the second connecting electrode, a second inclined surface connected to the first inclined surface, and a third inclined surface connected to the second inclined surface. The slope of the first inclined surface of the first through hole is greater than the slope of the second inclined surface of the second through hole, and the slope of the second inclined surface of the second through hole is greater than the slope of the third inclined surface of the second through hole.

20. The display device according to claim 14, wherein, The thickness of the second insulating layer is greater than the thickness of the first insulating layer.

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