Multi-path intrinsically safe actuator current monitoring method

Abstract

The invention provides a multi-path intrinsic safety actuator current monitoring method which comprises the steps that a plurality of non-intrusive Hall current sensors are arranged on a multi-path intrinsic safety actuator power line in a sleeving mode to obtain analog signals of multi-path intrinsic safety actuator current, the primary sides and the secondary sides of the Hall current sensors are electrically isolated, and the internal resistance of the primary sides is extremely small; inputting the output signals of the plurality of Hall current sensors into a multi-channel signal acquisition and processing mainboard, wherein the mainboard is integrated with a multi-channel signal conditioning circuit to filter and amplify the analog signals; an analog-to-digital converter of the mainboard carries out digital conversion on the conditioned multipath signals, and a microprocessor of the mainboard processes the digital signals and generates each path of fault state mark based on a preset threshold value; the microprocessor packages the multipath current values and the corresponding fault state marks into standard industrial protocol data frames, and the standard industrial protocol data frames are sent to an upper control system through an isolation digital communication interface of the mainboard via a single digital bus.

Description

Technical Field

[0001] This invention relates to the field of information technology, and in particular to a method for monitoring the current of multi-channel intrinsically safe actuators. Background Technology

[0002] In environments with explosive gas hazards, such as underground coal mines and chemical production facilities, multiple intrinsically safe actuators undertake critical control tasks such as valve switching and regulation. These devices are directly related to the safe operation of the production process and accident prevention, so real-time monitoring of their operating status is extremely necessary.

[0003] Currently, most commonly used monitoring methods rely on connecting an ammeter or shunt resistor in series with the circuit for measurement. This connection method directly alters the electrical parameters of the original intrinsically safe circuit, increasing circuit resistance or introducing additional inductance and capacitance. This can easily compromise the safety margin of explosion-proof certification, causing the equipment to no longer meet intrinsic safety requirements and making it unsafe for use in hazardous locations. Other solutions employ parallel shunt or sampling resistors. Although the resistance value is small, it still inevitably affects the circuit, especially when multiple actuators are operating simultaneously. The cumulative interference introduced by multiple monitoring points can cause the originally weak current signal to deviate, severely reducing monitoring accuracy.

[0004] The core requirement of intrinsically safe circuits lies in strictly limiting energy output. Any monitoring method must ensure that no additional energy is injected into the circuit, that the circuit impedance characteristics are not altered, and that independent parallel acquisition of current from multiple actuators is achieved. In actual production sites, dozens of actuators are often deployed. Changes in the current of each actuator may reflect different problems such as valve jamming, coil aging, poor cable contact, or actuator malfunction. If all circuits cannot be continuously monitored simultaneously, it is difficult to detect anomalies in the early stages of a fault. For example, a sudden drop in current to near zero in one actuator may mean that the valve has failed to move properly, while an abnormal increase in current in another actuator may indicate a coil short circuit or load jamming. These different manifestations can only be distinguished in a timely manner through continuous and independent current acquisition. However, existing methods are limited by the constraint of maintaining circuit integrity and cannot achieve multi-channel synchronous high-precision monitoring without affecting safety parameters. This means that once an actuator malfunction occurs on-site, it can often only be detected through manual inspection or shutdown inspection after production interruption, delaying fault response time.

[0005] Therefore, how to achieve parallel, real-time, and independent current monitoring of multiple intrinsically safe actuators and accurately identify the operating status of each one without changing or damaging the original intrinsically safe circuit electrical characteristics has become a key issue in ensuring the continuity of production and the safe operation of equipment in hazardous locations. Summary of the Invention

[0006] This invention provides a method for monitoring the current of multiple intrinsically safe actuators, mainly including:

[0007] Analog signals of the multiple intrinsically safe actuator currents are acquired by embedding multiple non-invasive Hall current sensors onto the power lines of multiple intrinsically safe actuators. The primary and secondary sides of the Hall current sensors are electrically isolated, and the primary side has extremely low internal resistance. The output signals of the multiple Hall current sensors are input into a multi-channel signal acquisition and processing motherboard. The motherboard integrates a multi-channel signal conditioning circuit to filter and amplify the analog signals. The analog-to-digital converter of the motherboard digitizes the conditioned multiple signals. The microprocessor of the motherboard processes the digital signals and generates a fault status flag for each channel based on a preset threshold. The microprocessor encapsulates the multiple current values ​​and the corresponding fault status flags into a standard industrial protocol data frame, which is then sent to the upper control system via a single digital bus through the isolated digital communication interface of the motherboard. Furthermore, the multiple non-invasive Hall current sensors are embedded in the power lines of the multi-channel intrinsically safe actuators to acquire analog signals of the multi-channel intrinsically safe actuator currents. This includes: the Hall current sensors employing a perforated structure, with the primary side passing through the perforation of the intrinsically safe actuator power line, and the primary side internal resistance maintained at the milliohm level to minimize the impact on the voltage drop of the intrinsically safe actuator circuit; the secondary side of the Hall current sensor outputs a voltage signal corresponding to the intrinsically safe actuator current range, which is transmitted to the input terminal of the multi-channel signal acquisition and processing motherboard via a short-distance shielded cable; for each of the Hall current sensors, the secondary side output polarity is determined based on the primary side current direction, and a DC component is included in the analog signal to characterize the operating state of the intrinsically safe actuator. Furthermore, the motherboard integrates a multi-channel signal conditioning circuit to filter and amplify the analog signal, including: each channel of the signal conditioning circuit includes an RC low-pass filter, the cutoff frequency of which suppresses high-frequency interference components in the analog signal; followed by a programmable gain amplifier, the gain amplifier adjusting the output voltage of the Hall current sensor to the input range of the analog-to-digital converter; the microprocessor controls the gain of the programmable gain amplifier through a digital potentiometer, the gain being dynamically adjusted according to the amplitude of the analog signal in each channel. Furthermore, the microprocessor of the motherboard processes the digital signal and generates a fault status flag for each channel based on a preset threshold, including: the microprocessor loads the zero-point calibration coefficient and full-scale calibration coefficient of each channel into a non-volatile memory upon power-up; applies linear correction to the digitized signal to obtain a calibration current value; compares the calibration current value with a first preset threshold; if the calibration current value is lower than the first preset threshold, an open-circuit fault status flag is generated; compares the calibration current value with a second preset threshold; if the calibration current value is higher than the second preset threshold, an overcurrent fault status flag is generated; and stores the fault status flag and the corresponding calibration current value in the microprocessor register.Furthermore, the microprocessor encapsulates multiple current values ​​and corresponding fault status flags into a standard industrial protocol data frame, including: mapping each calibration current value to a standard industrial protocol holding register address; mapping each fault status flag to a standard industrial protocol coil address or discrete input register address; constructing the standard industrial protocol data frame containing the contents of multiple holding registers and coil addresses, as a slave station response to the master station polling of the upper control system. Furthermore, the isolated digital communication interface of the motherboard transmits data to the upper control system via a single digital bus, including: the isolated digital communication interface includes a high-speed optocoupler isolating the microprocessor's serial port from an RS485 transceiver; the motherboard's isolated power supply module obtains isolated power from an external power source, providing operating voltage for the microprocessor and the signal conditioning circuit; and periodically transmitting the standard industrial protocol data frame to the upper control system via the single digital bus. Furthermore, the standard industrial protocol data frame is transmitted to the upper control system via a single digital bus through the isolated digital communication interface of the motherboard, including: the microprocessor acting as a Modbus RTU slave, responding to the upper control system master station's register read command to return multiple calibration current values; responding to the upper control system master station's coil read command to return multiple fault status flags; and the RS485 transceiver driving the single digital bus A and B differential signal lines to transmit the Modbus RTU data frame. Furthermore, the motherboard integrates a multi-channel signal conditioning circuit to filter and amplify the analog signal, including: the resistor and capacitor parameters of the RC low-pass filter are configured according to the frequency characteristics of the analog signal; the output of the programmable gain amplifier is connected to the input of a multi-channel analog-to-digital converter, and the analog-to-digital converter synchronously or time-divisionally samples multiple amplified analog signals; the microprocessor obtains a digital sample sequence from the analog-to-digital converter and performs average filtering to obtain the digital signal.

[0008] The technical solutions provided by the embodiments of the present invention may include the following beneficial effects:

[0009] This invention discloses a method for monitoring the current of multiple intrinsically safe actuators, addressing the unique operational scenario of real-time monitoring of the current of multiple intrinsically safe actuators in hazardous locations such as underground coal mines and explosive gas environments in chemical plants. It solves the challenge of parallel monitoring of the operating status of multiple devices and timely fault detection without compromising the intrinsically safe circuit. This invention acquires analog current signals using a non-invasive Hall effect current sensor, leveraging its electrical isolation and extremely low internal resistance characteristics to ensure no impact on the original circuit's safety parameters. Combined with a multi-channel signal acquisition and processing motherboard, the signals are filtered, amplified, and digitized. A microprocessor generates fault status flags based on preset thresholds. Finally, the data is encapsulated into standard industrial protocol frames and transmitted to the upper-level control system via an isolated digital communication interface, achieving real-time monitoring and fault early warning. This invention significantly improves the reliability and safety of monitoring the operating status of multiple intrinsically safe actuators in hazardous environments, providing an efficient solution for industrial field equipment management. Attached Figure Description

[0010] Figure 1 This is a flowchart of a multi-channel intrinsically safe actuator current monitoring method according to the present invention. Detailed Implementation

[0011] The technical solutions of the embodiments of the present invention will be clearly and thoroughly described below with reference to the accompanying drawings. The described embodiments are merely some embodiments of the present invention.

[0012] like Figure 1 This embodiment of a multi-channel intrinsically safe actuator current monitoring method may specifically include:

[0013] This invention provides a method for monitoring the current of multiple intrinsically safe actuators. Figure 1 This is a flowchart illustrating the multi-channel intrinsically safe actuator current monitoring method provided in an embodiment of the present invention, as shown below. Figure 1As shown, the method includes the following steps. Step S1: Analog signals of the current from the multiple intrinsically safe actuators are acquired by attaching multiple non-invasive Hall current sensors to the power lines of the multi-channel intrinsically safe actuators. The primary and secondary sides of the Hall current sensors are electrically isolated, and the primary side has extremely low internal resistance. In this embodiment, the multi-channel intrinsically safe actuators typically refer to multiple intrinsically safe actuators used in underground coal mines, chemical explosive gas environments, or other hazardous locations, such as multiple intrinsically safe solenoid valves, intrinsically safe electro-hydraulic valves, intrinsically safe electric actuators, or intrinsically safe proportional valves. These actuators are often installed in the same control area, and their power lines are led out from the same power cabinet or distribution box and supplied to multiple devices in parallel. To achieve uninterrupted monitoring of the operating current of these actuators without disrupting the original intrinsically safe circuit, using non-invasive Hall current sensors is a suitable choice. Specifically, each intrinsically safe actuator is equipped with a perforated Hall current sensor. This sensor employs a closed magnetic circuit design, with a pre-drilled circular or rectangular perforation on the sensor body. The power line of the intrinsically safe actuator passes directly through this perforation without disconnecting the existing wiring or adding any series components. Therefore, it does not introduce additional loop resistance or alter the electrical parameters of the intrinsically safe circuit. The primary side of the Hall current sensor is the perforation portion, and its internal resistance is typically controlled between 0.5 milliohms and 2 milliohms, far less than any additional resistance value allowed in the intrinsically safe circuit. Thus, its impact on the voltage drop of the actuator power supply circuit is negligible, maintaining the original intrinsically safe characteristics. The Hall current sensor operates based on the Hall effect. When current flows through the intrinsically safe actuator power line, a magnetic field is formed within the perforation. This magnetic field acts on the Hall element inside the sensor, generating a Hall voltage proportional to the current magnitude. This voltage is converted into a secondary output voltage signal by the sensor's internal signal processing circuit. Typically, for the common operating current range of 4mA to 20mA or 0mA to 20mA for intrinsically safe actuators, the sensor's secondary side is designed with a corresponding voltage output, such as a linear correspondence of 0V to 5V or 0V to 10V. In one possible implementation, for intrinsically safe actuators with forward power supply, the power line passes through the sensor perforation in a designated direction, ensuring a positive voltage output on the secondary side. If reverse current monitoring is required, the perforation direction can be adjusted, or a bipolar output Hall sensor can be selected. The analog voltage signal output from the secondary side is transmitted to the multi-channel signal acquisition and processing motherboard via a shielded twisted-pair cable, typically no longer than 10 meters. The shielding layer is grounded to the motherboard chassis at one end to avoid ground loop interference, and simultaneously, the shielding layer effectively suppresses the coupling of spatial electromagnetic noise to weak analog signals. It should be noted that because intrinsically safe actuators exhibit large current variations under different operating conditions—for example, a solenoid valve may experience a peak current of tens of milliseconds at the moment of engagement, while the steady-state holding current may only be a few milliamps to tens of milliamps—the Hall current sensor must possess sufficient dynamic range and response speed. Typically, a closed-loop Hall sensor with a bandwidth of at least 5kHz is selected to ensure accurate capture of transient currents.Step S2 involves inputting the output signals of the multiple Hall current sensors into a multi-channel signal acquisition and processing motherboard. This motherboard integrates a multi-channel signal conditioning circuit to filter and amplify the analog signals. The multi-channel signal acquisition and processing motherboard is the core hardware platform of this method, typically designed as a circuit board sized to fit a mining explosion-proof and intrinsically safe control box or a non-mining industrial control cabinet. This motherboard integrates at least 8 to 32 analog signal input channels, each corresponding to a Hall current sensor output, enabling parallel monitoring of multiple intrinsically safe actuators. After entering the motherboard, each analog voltage signal first enters a dedicated signal conditioning circuit. The main task of the signal conditioning circuit is to suppress noise, remove high-frequency interference, and adjust the signal amplitude to a range suitable for subsequent analog-to-digital converter sampling. In one embodiment, a first-stage RC low-pass filter is set at the front end of the signal conditioning circuit for each channel. This filter consists of precision resistors and ceramic capacitors; the resistor value is typically selected from 1kΩ to 10kΩ, and the capacitor value from 10nF to 100nF, forming a first-order low-pass filter. The cutoff frequency is typically set between 50Hz and 500Hz. The selection of the cutoff frequency takes into account the main frequency components of the intrinsically safe actuator current signal and the 50Hz power frequency interference commonly found in industrial environments. For example, in underground coal mine environments, 50Hz and its harmonics interference are significant; therefore, the cutoff frequency can be set to approximately 100Hz to effectively attenuate the power frequency and its harmonics while ensuring signal integrity. The signal after RC low-pass filtering enters the programmable gain amplifier stage. Programmable gain amplifiers typically use integrated instrumentation amplifiers or dedicated PGA chips, and their gain can be selected in powers of 2 from 1 to 128 times or even higher via external digital control signals. In this embodiment, the microprocessor controls the onboard digital potentiometer or directly controls the PGA's gain register via I2C or SPI bus to achieve independent gain settings for each channel. Specifically, different intrinsically safe actuators may have significantly different Hall sensor output voltage amplitudes due to differences in cable length and actuator coil resistance. For example, one actuator may have a steady-state current of 8mA, corresponding to a sensor output of approximately 0.8V; while another actuator may have a steady-state current of 18mA, corresponding to an output of approximately 1.8V. Using a fixed gain for all channels may result in undersized signals and increased quantization errors in low-current channels, or clipping of signals in high-current channels when they approach or exceed the full-scale range of the analog-to-digital converter. Therefore, during system power-on initialization or periodic calibration, the microprocessor first acquires the actual signal amplitude of each channel and dynamically calculates and sets the amplification factor for the corresponding channel based on a preset target full-scale voltage, such as 3.0V or 4.0V. Preferably, in practical applications, the gain can also be preset and grouped according to the type of actuator. For example, solenoid valve actuators can be grouped together with a higher preset gain to highlight their pull-in and release current spikes; proportional valve actuators can be grouped into another group with a moderate preset gain to ensure the linear measurement accuracy of steady-state current.After gain amplification, the multiple analog signals are sent to a multi-channel analog-to-digital converter integrated on the motherboard. The ADC typically uses a high-precision Σ-Δ ADC with 16-bit or 24-bit resolution, featuring built-in multiplexed analog switches and synchronous sampling capabilities. In one possible implementation, the ADC employs a sequential sampling mode, with the microprocessor controlling channel switching and sampling timing via an SPI bus. After each round of multi-channel sampling, the digital samples are temporarily stored in a buffer for subsequent digital processing. In step S3, the motherboard's ADC performs digitization on the conditioned multiple signals, and the motherboard's microprocessor processes the digital signals and generates a fault status flag for each channel based on a preset threshold. In this embodiment, after the analog-to-digital conversion is complete, the microprocessor reads the original digital sample values ​​of each channel from the ADC register or DMA buffer. These sample values ​​first need to undergo zero-point and full-scale calibration to eliminate individual sensor differences, temperature drift, and circuit parameter changes caused by long-term operation. Specifically, a complete calibration process is required before the system leaves the factory or during initial field commissioning. In zero-current mode, where all intrinsically safe actuators are powered off or switched off, the ADC output values ​​of each channel are collected as zero-point offsets and stored in non-volatile memory on the motherboard, such as EEPROM or ferroelectric memory. During full-scale calibration, known standard currents, such as 5mA, 10mA, 15mA, and 20mA at several points, are applied to each actuator. By collecting the corresponding ADC readings, the gain coefficient and linear correction parameters for each channel are fitted. These calibration coefficients are loaded into the microprocessor's working memory each time the system is powered on. Once real-time monitoring begins, the microprocessor first applies the aforementioned linear correction formula to each round of digital samples to obtain the calibrated current value. Expressed in mA, each round of sampling yields a sequence of multiple real-time calibration current values. Subsequently, the microprocessor compares the calibration current value of each channel with two pre-set thresholds. The first preset threshold is used to determine open-circuit or extremely low current faults. A typical value is 20% to 40% of the rated operating current. For example, if an actuator has a rated current of 15mA, the first threshold can be set to 3mA to 6mA. When the calibration current value is repeatedly lower than this threshold, it is determined to be an open-circuit fault, and the fault status flag of the corresponding channel is set to 1 or to a specific code. The second preset threshold is used to determine overcurrent or short-circuit faults. A typical value is 150% to 300% of the rated operating current. For example, for an actuator with a rated current of 15mA, the second threshold can be set to 22.5mA to 45mA. When the calibration current value is repeatedly higher than this threshold, it is determined to be an overcurrent fault, and the fault status flag of the corresponding channel is set to another specific value. In one embodiment, to improve the reliability of the determination, a continuous sampling number or a sliding window mechanism is used for confirmation.For example, a circuit breaker flag is set only if eight consecutive sampled values ​​are below the first threshold, and an overcurrent flag is set only if five consecutive sampled values ​​are above the second threshold, thus effectively filtering out misjudgments caused by transient interference or noise. Furthermore, the microprocessor also associates and stores the current value under normal operating conditions with the aforementioned fault status flags. For example, a status word can be assigned to each channel, where the low byte stores the high 8 bits of the current calibration current value or the scaled integer part, and the high byte stores the fault status code, such as 00 for normal, 01 for circuit breaker, 10 for overcurrent, and 11 for sensor malfunction. In step S4, the microprocessor encapsulates the multiple current values ​​and corresponding fault status flags into a standard industrial protocol data frame, and sends it to the upper control system via a single digital bus through the isolated digital communication interface of the motherboard. In this embodiment, after the microprocessor completes the calibration of multiple intrinsically safe actuator current values ​​and the generation of fault status flags, it needs to format and encapsulate this data according to the communication standards commonly used in industrial settings to enable efficient and reliable data interaction with the upper control system. The construction of the standard industrial protocol data frame is a key step in achieving data standardization and communication compatibility. Specifically, the microprocessor first maps the calibration current value of each channel to a holding register address defined by a standard industrial protocol. Commonly used protocols include, but are not limited to, remote terminal unit (RTU) mode based on serial communication. In this mode, each current value is converted to a 16-bit unsigned integer or floating-point number and stored in a pre-allocated contiguous register address space. For example, for an 8-channel intrinsically safe actuator, eight consecutive holding register addresses can be allocated, each storing the current value of the corresponding channel, in milliamps (mA), with a precision reserved to 0.1 mA. Simultaneously, a fault status flag for each channel is mapped to a coil address or discrete input register address according to a standard industrial protocol. The fault status flag is typically represented in bit or byte form, for example, using a single bit to represent normal or fault status, or using multi-bit encoding to represent different types of faults, such as open circuit or overcurrent. For an 8-channel actuator, eight coil addresses can be allocated, each coil corresponding to a fault status of one channel (0 for normal, 1 for fault); or an 8-bit register can be allocated, with each bit corresponding to a channel status. When constructing a data frame, the microprocessor organizes the contents of the holding registers and coil addresses into a complete data packet according to the protocol specifications. The data packet contains necessary fields such as slave address, function code, data start address, data length, and checksum to ensure the integrity and accuracy of data transmission. After construction, the data frame is sent to the communication buffer, awaiting polling requests from the upper control system or active transmission. In step S41, the microprocessor maps each calibration current value to a standard industrial protocol holding register address. In one possible implementation, the mapping process for the calibration current values ​​needs to consider the dimensions and accuracy requirements of the data.For example, assuming an intrinsically safe actuator has a current range of 0 mA to 20 mA, directly storing the raw value might require using a floating-point format. However, considering the data type limitations in industrial protocols, the current value is usually scaled to an integer for storage. A common practice is to multiply the actual current value by 10 or 100, converting it to an unsigned integer (e.g., 15.6 mA is converted to 156 or 1560) and stored in a register. The host control system then receives this value and restores it to the actual value using the same scaling ratio. It should be noted that different channels may have different range or accuracy requirements for current values. For example, some proportional valve actuators have a small current variation range, possibly concentrated between 4 mA and 8 mA. In this case, a higher scaling ratio, such as multiplying by 1000, can be set for this channel to improve resolution within a small range. Conversely, for solenoid valve actuators, the current range may be larger, even reaching 30 mA at the moment of activation. In this case, a lower scaling ratio, such as multiplying by 10, can be used to avoid data overflow. In one embodiment, the microprocessor can also dynamically adjust the data storage format according to the configuration requirements of the host control system. For example, if the host system supports 32-bit floating-point format, the unscaled current value can be stored directly; if the host system only supports 16-bit integers, the scaling operation described above needs to be performed. This flexible mapping method can adapt to different types of control systems, improving system compatibility. Step S42: Map each fault status flag to a standard industrial protocol coil address or discrete input register address. Specifically, the mapping process for fault status flags is relatively simple and is usually represented in binary form. For example, for each intrinsically safe actuator, a coil address can be assigned, where a coil value of 0 indicates that the channel is working normally, and a value of 1 indicates that a fault exists. Alternatively, to provide more detailed fault information, an 8-bit or 16-bit register can be assigned to each channel, where different bits or different value ranges represent different fault types, such as a value of 1 indicating an open circuit fault, a value of 2 indicating an overcurrent fault, and a value of 3 indicating an abnormal sensor signal. In one possible implementation, for multi-channel actuators, the fault status flags of all channels can be stored centrally in one or more registers. For example, for a 16-channel actuator, two 16-bit registers can be used, with each bit in each register corresponding to the status of one channel. A bit value of 1 indicates a fault, and a bit value of 0 indicates normal operation. This centralized storage method can reduce the length of data frames and improve communication efficiency. It should be noted that the update frequency of the fault status flag can be adjusted according to the actual application scenario. For example, in some scenarios with extremely high real-time requirements, the microprocessor can update the fault status flag and refresh the register contents immediately after each acquisition cycle; while in scenarios with lower real-time requirements, a certain update interval can be set, such as once per second, to reduce the computational burden on the microprocessor. Step S43: Construct the standard industrial protocol data frame containing multiple holding registers and the coil address content as a slave station response to the master station polling of the upper control system.When constructing a data frame, the microprocessor, according to the protocol specifications, organizes the current values ​​stored in the holding registers and the fault status flags stored in the coil addresses or discrete input registers into a complete data packet. The data packet format typically includes a slave address to identify the current device; a function code to indicate the type of read / write operation; a data address to specify the range of registers to be read or written; data content, i.e., the actual current values ​​and fault status flags; and a checksum to verify the integrity of the data transmission. For example, in one embodiment, assuming the host control system initiates a read request to obtain the current values ​​and fault statuses of all channels, after receiving the request, the microprocessor, based on the function code and data address, extracts the corresponding register contents from its internal storage area, constructs a data frame containing multiple current values ​​and fault status flags, and returns it to the host system through the communication interface. The entire process strictly follows the timing and format requirements of the protocol to ensure the reliability of data interaction. Step S5: The isolated digital communication interface of the motherboard sends data to the host control system via a single digital bus. In this embodiment, the isolated digital communication interface is a key hardware module for data transmission between the microprocessor and the host control system. Its main function is to provide electrical isolation and signal driving capabilities, ensuring the stability and security of data transmission in the complex electromagnetic environment of industrial settings. Specifically, the isolated digital communication interface typically includes a high-speed optocoupler and a differential transceiver. The optocoupler completely isolates the microprocessor's serial communication signals from external bus signals, preventing damage to the motherboard's internal circuitry from ground loop currents or external high-voltage interference. The differential transceiver converts the isolated digital signals into a differential signal format suitable for long-distance transmission, for example, using two signal lines to transmit complementary positive and negative signals to improve anti-interference capabilities. In one possible implementation, the motherboard also integrates an isolated power supply module. This module obtains input voltage from an external power source and generates isolated low-voltage DC power, such as 5V or 3.3V, through a switching power supply or linear regulator circuit, providing a stable operating voltage for the microprocessor, signal conditioning circuitry, and communication interface. The design of the isolated power supply module ensures electrical isolation between the motherboard's internal circuitry and the external power system, further enhancing system safety. Step S51: The isolated digital communication interface includes a high-speed optocoupler isolating the microprocessor's serial port from the differential transceiver. Specifically, the high-speed optocoupler isolator is typically selected with a transmission rate of not less than 115,200 bits per second to meet the high-speed transmission requirements of industrial protocol data frames. One side of the optocoupler is connected to the microprocessor's serial communication interface, and the other side is connected to the differential transceiver. The digital signal output by the microprocessor is converted into an optical signal by the optocoupler, and then converted into an electrical signal and output to the transceiver, thereby achieving electrical isolation. In one embodiment, the differential transceiver uses a chip that supports half-duplex communication and has an automatic direction control function, which can automatically switch between sending and receiving states according to the data flow direction.The transceiver's output is connected to a single digital bus, transmitting data signals via two differential signal lines. This differential transmission method effectively suppresses common-mode interference during long-distance transmission, making it suitable for communication distances of tens to hundreds of meters commonly found in industrial environments. In step S52, the motherboard's isolated power supply module obtains isolated power from an external power source, providing operating voltage for the microprocessor and the signal conditioning circuit. In one possible implementation, the isolated power supply module is typically designed with a wide voltage input, such as supporting 9V to 36V DC input, to adapt to the 24V or 12V power systems commonly found in industrial environments. The module internally employs high-frequency transformer isolation technology to convert the input voltage into an isolated low-voltage output, for example, 5V for driving the microprocessor and digital circuits, and 12V for the analog signal conditioning circuit. It should be noted that the output power of the isolated power supply module needs to be designed according to the power consumption requirements of each circuit on the motherboard. For example, if the motherboard supports 32 signal acquisition channels, and each signal conditioning circuit includes a high-power amplifier, a power supply module with strong output current capability must be selected to ensure that all circuits can still operate stably under full load. Step S53: The standard industrial protocol data frame is periodically transmitted to the upper control system via the single digital bus. Specifically, the single digital bus uses a two-wire differential signal transmission method to connect the motherboard and the upper control system. The data frame transmission typically employs a periodic polling mechanism, whereby the upper control system, acting as the master station, periodically sends read data requests to the motherboard, and the motherboard, acting as the slave station, responds to the requests and returns a data frame containing the current value and fault status flag. In one embodiment, the transmission period can be adjusted according to the real-time requirements of the application scenario. For example, in scenarios sensitive to actuator state changes, the polling period can be set to 100 milliseconds to ensure that the upper system can obtain the latest current and fault information in a timely manner; while in scenarios with slower state changes, the polling period can be set to 1 second or longer to reduce the load on the communication bus. Step S6: The standard industrial protocol data frame is sent to the upper control system via the isolated digital communication interface of the motherboard through the single digital bus, and the microprocessor, acting as the slave station, responds to the read register and read coil commands from the master station of the upper control system. In this embodiment, the microprocessor operates in slave mode according to the communication protocol, continuously listening for command frames from the host control system. When a register read command is received, the microprocessor extracts the calibration current value stored in its internal storage area based on the register address range specified in the command, and constructs a response frame containing this data to return to the host system. When a coil read command is received, the microprocessor extracts the fault status flag stored in its internal storage area and similarly constructs a response frame to return. Specifically, the communication process strictly follows the timing requirements of the protocol. For example, a certain interval, typically 3.5 character intervals, must be maintained between the command frame sent by the host system and the response frame returned by the motherboard to avoid data conflicts.After receiving a command, the microprocessor needs to complete data extraction and response frame construction within a specified time, typically requiring a response time of no more than 50 milliseconds. Step S61: The microprocessor responds to the host control system's master station's read register command by returning multiple calibration current values. In one possible implementation, when the host control system sends a read register command, the command includes the starting register address and the number of registers to be read. After parsing the command, the microprocessor extracts the calibration current value data within the corresponding address range from its internal storage area. For example, if the command requires reading the contents of register addresses 40001 to 40008, the microprocessor will extract the eight current values ​​stored in these eight registers, construct a response frame, and return it through the isolated digital communication interface. It should be noted that the construction of the response frame must ensure that the data order corresponds one-to-one with the register addresses. For example, register 40001 stores the first current value, register 40002 stores the second current value, and so on, to ensure that the host system can correctly parse the received data. Step S62: Responds to the host control system's master station's read coil command by returning multiple fault status flags. Specifically, when the host control system sends a read coil command, the command includes the starting coil address and the number of coils to be read. After parsing the command, the microprocessor extracts the fault status flag data within the corresponding address range from its internal storage area. For example, if the command requires reading the contents of coil addresses 00001 to 00008, the microprocessor will extract the 8 fault status flags stored in these 8 coils, construct a response frame, and return it. In one embodiment, if the fault status flags are stored in a multi-bit encoded form, for example, each fault status occupies an 8-bit register, the microprocessor needs to extract the contents of the corresponding register completely according to the address range specified in the command and return it. This method can provide more detailed fault information, facilitating further fault analysis and processing by the host system. Step S63: The differential signal transceiver drives the differential signal lines of the single digital bus to transmit the data frame. In one possible implementation, the differential signal transceiver converts the response frame constructed by the microprocessor into a differential signal form and transmits it to the host control system through the two signal lines of the single digital bus. Differential signal transmission uses a complementary positive and negative signal method, which can effectively suppress electromagnetic interference commonly found in industrial environments and ensure data integrity during long-distance transmission. It should be noted that differential transceivers typically support multiple baud rate settings, such as 9600, 19200, and 38400, which can be selected based on the actual communication distance and real-time requirements. For example, in scenarios with short communication distances and high real-time requirements, a higher baud rate can be selected to accelerate data transmission; while in scenarios with long communication distances or strong interference, a lower baud rate can be selected to improve the signal's anti-interference capability.Step S7: The motherboard integrates a multi-channel signal conditioning circuit to filter and amplify the analog signal. The filter resistor and capacitor parameters are configured according to the frequency characteristics of the analog signal. In this embodiment, the filter design of the signal conditioning circuit is a crucial step in ensuring the quality of the analog signal. The filter resistor and capacitor parameters need to be specifically configured based on the frequency characteristics of the intrinsically safe actuator current signal and the interference characteristics of the industrial environment to retain the effective components of the signal as much as possible while suppressing noise. Specifically, the filter typically adopts a first-order or second-order low-pass filter structure, and the selection of resistor and capacitor values ​​determines the cutoff frequency of the filter. For intrinsically safe actuator current signals, the main frequency components are usually concentrated in the range from DC to tens of hertz. Common interference in industrial environments includes 50 Hz power frequency interference and its harmonics. Therefore, the cutoff frequency of the filter needs to be set in an appropriate range, such as 100 Hz to 200 Hz, to effectively attenuate high-frequency interference. In one embodiment, for the underground coal mine environment, 50 Hz power frequency interference is significant. A combination of a 4.7 kΩ resistor and a 330 NF capacitor can be selected to form a low-pass filter with a cutoff frequency of approximately 100 Hz. This configuration can significantly attenuate power frequency interference and its harmonic components while ensuring signal integrity. In step S71, the output of the programmable gain amplifier is connected to the input of a multi-channel analog-to-digital converter (ADC). The ADC synchronously or time-divisionally samples and amplifies the analog signals. Specifically, the programmable gain amplifier amplifies the filtered analog signal to a voltage range suitable for the ADC input and then directly connects it to the ADC's analog input channel. ADCs typically support multiple inputs and can achieve synchronous or time-division sampling of multiple channels through built-in analog switches. In one possible implementation, in synchronous sampling mode, the ADC samples all channels simultaneously, suitable for scenarios with high time correlation requirements for multiple signals, such as applications requiring comparison of the synchronicity of current changes in multiple actuators. In time-division sampling mode, the ADC samples each channel sequentially, suitable for scenarios with a large number of channels or low sampling rate requirements. In step S72, the microprocessor obtains a digital sample sequence from the ADC and performs average filtering to obtain the digital signal. In one embodiment, the microprocessor obtains the digital sample sequence for each round of sampling from the ADC via a serial communication interface or direct memory access. Because industrial field signals may contain random noise or transient interference, microprocessors perform averaging filtering on the acquired sample sequences to improve signal smoothness and stability. Specifically, the averaging filtering process typically employs a sliding window approach, for example, continuously acquiring 8 or 16 samples from each signal and calculating the arithmetic mean of these samples as the digital signal value for the current period. This processing method effectively filters out high-frequency noise while preserving the main trend of signal variation, making it suitable for signals with relatively gentle changes, such as intrinsically safe actuator current.In one possible implementation, different filtering window lengths can be set for different types of intrinsically safe actuators. For example, for solenoid valve actuators, since their current signals may contain transient spikes during pull-in and release, a shorter window length, such as 4 samples, can be set to avoid excessive smoothing that could lead to the loss of spike features. For proportional valve actuators, whose current signals change more gradually, a longer window length, such as 16 samples, can be set to further improve the smoothness of the signal.

[0014] The above-disclosed embodiments are merely preferred embodiments of the present invention and should not be construed as limiting the scope of the invention. Those skilled in the art will understand that implementing all or part of the above-described embodiments and making equivalent changes in accordance with the claims of the present invention are still within the scope of the invention.

Claims

1. A method for monitoring the current of a multi-channel intrinsically safe actuator, characterized in that, include: The analog signals of the multi-channel intrinsically safe actuator current are obtained by using multiple non-invasive Hall current sensors fitted onto the power lines of the multi-channel intrinsically safe actuator. The primary and secondary sides of the Hall current sensors are electrically isolated and the internal resistance of the primary side is extremely small. The output signals of the multiple Hall current sensors are input into a multi-channel signal acquisition and processing motherboard. The motherboard integrates a multi-channel signal conditioning circuit to filter and amplify the analog signals. The analog-to-digital converter of the motherboard performs digital conversion on the conditioned multi-channel signals. The microprocessor of the motherboard processes the digital signals and generates a fault status flag for each channel based on a preset threshold. The microprocessor encapsulates multiple current values ​​and corresponding fault status flags into standard industrial protocol data frames, which are then sent to the upper control system via a single digital bus through the isolated digital communication interface of the motherboard.

2. The method as described in claim 1, characterized in that, The multiple non-invasive Hall current sensors are embedded in the power lines of the multi-channel intrinsically safe actuators to acquire analog signals of the multi-channel intrinsically safe actuator currents. The Hall current sensors employ a perforated structure, with the primary side passing through the perforation of the intrinsically safe actuator power line. The primary side internal resistance is maintained at the milliohm level to minimize the impact on the voltage drop of the intrinsically safe actuator circuit. The secondary side of the Hall current sensor outputs a voltage signal corresponding to the intrinsically safe actuator current range, which is transmitted to the input terminal of the multi-channel signal acquisition and processing motherboard via a short-distance shielded cable. For each Hall current sensor, the secondary side output polarity is determined based on the primary side current direction, and a DC component is included in the analog signal to characterize the operating state of the intrinsically safe actuator.

3. The method as described in claim 1, characterized in that, The motherboard integrates a multi-channel signal conditioning circuit to filter and amplify the analog signal, including: each channel of the signal conditioning circuit includes an RC low-pass filter, the cutoff frequency of which suppresses high-frequency interference components in the analog signal; followed by a programmable gain amplifier, the gain amplifier adjusting the output voltage of the Hall current sensor to the input range of the analog-to-digital converter; the microprocessor controls the gain of the programmable gain amplifier through a digital potentiometer, the gain being dynamically adjusted according to the amplitude of the analog signal in each channel.

4. The method as described in claim 1, characterized in that, The microprocessor on the motherboard processes the digital signal and generates a fault status flag for each channel based on a preset threshold, including: Upon power-up, the microprocessor loads the zero-point calibration coefficient and full-scale calibration coefficient for each channel from the non-volatile memory; applies linear correction to the digitized signal to obtain a calibration current value; compares the calibration current value with a first preset threshold; if the calibration current value is lower than the first preset threshold, a circuit breaker fault status flag is generated; compares the calibration current value with a second preset threshold; if the calibration current value is higher than the second preset threshold, an overcurrent fault status flag is generated; and stores the fault status flag and the corresponding calibration current value in the microprocessor register.

5. The method as described in claim 1, characterized in that, The microprocessor encapsulates multiple current values ​​and corresponding fault status flags into a standard industrial protocol data frame, including: mapping each calibration current value to a standard industrial protocol holding register address; mapping each fault status flag to a standard industrial protocol coil address or discrete input register address; and constructing the standard industrial protocol data frame containing the contents of multiple holding registers and coil addresses, as a slave station response to the master station polling of the upper control system.

6. The method as described in claim 1, characterized in that, The isolated digital communication interface of the motherboard transmits data to the upper control system via a single digital bus, including: the isolated digital communication interface comprising a high-speed optocoupler isolating the microprocessor serial port from the RS485 transceiver; the motherboard isolated power supply module obtaining isolated power from an external power source to provide operating voltage for the microprocessor and the signal conditioning circuit; and periodically transmitting standard industrial protocol data frames to the upper control system via the single digital bus.

7. The method as described in claim 1, characterized in that, The standard industrial protocol data frame is transmitted to the upper control system via the isolated digital communication interface of the motherboard through a single digital bus, including: the microprocessor acting as a Modbus RTU slave station, responding to the upper control system master station read register command to return multiple calibration current values; responding to the upper control system master station read coil command to return multiple fault status flags; and the RS485 transceiver driving the single digital bus A and B differential signal lines to transmit the Modbus RTU data frame.

8. The method as described in claim 3, characterized in that, The motherboard integrates a multi-channel signal conditioning circuit to filter and amplify the analog signal, including: configuring the resistor and capacitor parameters of the RC low-pass filter according to the frequency characteristics of the analog signal; connecting the output of the programmable gain amplifier to the input of the multi-channel analog-to-digital converter, wherein the analog-to-digital converter synchronously or time-divisionally samples and amplifies the analog signal; and the microprocessor acquiring a digital sample sequence from the analog-to-digital converter and performing average filtering to obtain the digital signal.

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