Test data analysis method and server applied to circuit board detection

Abstract

This invention provides a test data analysis method and server for circuit board testing. The method first acquires the electrical signal response waveform sequence and regional optical scanning image of each test point on the circuit board. Next, it distinguishes the response characteristics of the data, generating a set of directional markers for each point. Then, it calls a pre-set multi-path exploration model to independently mine the marker set, generating a signal waveform depth characterization map and an optical image local structure characterization map corresponding to each directional path. Based on these maps, it performs cross-path feature comparison, filters out the dominant feature evolution paths, and constructs their path feature association maps. Finally, it determines the type and location distribution of defects based on these maps and generates test optimization instructions containing point identifiers and timing adjustment identifiers to guide the test equipment to dynamically adjust the test process. This invention achieves in-depth analysis of circuit board test data and adaptive optimization of the test process.

Description

Technical Field

[0001] This application relates to the field of data processing, and in particular to a test data analysis method and server for circuit board testing. Background Technology

[0002] In the field of circuit board manufacturing and testing, as the integration and complexity of electronic products continue to increase, the quality inspection requirements for circuit boards are becoming increasingly stringent. Currently, the common approach is to acquire electrical signal response data and corresponding optical image data from various test points on the circuit board under test. These data are then processed separately, or a simple correlation comparison is performed between the two types of data. Finally, based on preset thresholds or template matching rules, the state of the test points is judged to determine the presence and type of defects. However, this analytical method often struggles to fully extract and utilize the deep-seated feature correlation information contained in the test data when faced with the increasingly sophisticated defect patterns resulting from more refined circuit board manufacturing processes. This leads to insufficient precision in defect location and incomplete defect type identification, thus affecting the overall accuracy and efficiency of circuit board testing. Therefore, how to more effectively extract and utilize defect features from complex test response data has become a problem that those skilled in the art need to address. Summary of the Invention

[0003] This invention provides a test data analysis method and server for circuit board testing.

[0004] In a first aspect, embodiments of the present invention provide a test data analysis method for circuit board testing, comprising:

[0005] Obtain the initial test response set of the circuit board to be tested. The initial test response set includes the electrical signal response waveform sequence collected for each test point on the circuit board and the corresponding regional optical scan image of the test point.

[0006] The initial test response set is processed to distinguish the response characteristics. Based on the waveform profile fluctuation trend of the electrical signal response waveform sequence and the image gray level distribution of the regional optical scanning image, a set of pointing marks to be analyzed corresponding to each test point is generated.

[0007] The preset test data multi-path exploration model is invoked to perform path independent mining operations on the set of pointing marks to be analyzed, generating signal waveform depth characterization maps and optical image local structure characterization maps for each pointing path;

[0008] Cross-path feature comparison and screening are performed based on signal waveform depth characterization map and optical image local structure characterization map. The pointing path that meets the preset conditions is determined as the dominant path of feature evolution, and the path feature association map corresponding to the dominant path of feature evolution is generated.

[0009] The distribution of defect categories and locations in the circuit board to be tested is determined based on the path feature association map. Based on the defect category and location distribution, test optimization instructions containing test point identifiers and test timing adjustment identifiers are generated and transmitted to the circuit board test equipment.

[0010] Secondly, embodiments of the present invention provide a server, including: a memory for storing computer-executable instructions or computer programs; and a processor for executing the computer-executable instructions or computer programs stored in the memory to implement the above-mentioned test data analysis method applied to circuit board testing.

[0011] The embodiments of this application have the following beneficial effects:

[0012] The test data analysis method for circuit board testing provided by this invention acquires an initial set of test responses, including electrical signal response waveform sequences and regional optical scanning images. Based on the waveform contour fluctuation trend and image grayscale distribution, it performs preliminary differentiation of response characteristics, generating a set of directional markers for each test point. This achieves ordered filtering and focusing on areas of interest within massive test data. By calling a pre-set multi-path exploration model for test data, it independently mines paths within the set of directional markers, generating signal waveform depth characterization maps and optical image local structure characterization maps corresponding to each directional path. This allows for the independent extraction of waveform evolution features and structural detail features of images within different directional regions. Based on cross-path feature comparison, it filters out the dominant feature evolution paths and generates corresponding path feature association maps, integrating scattered local features into globally correlated feature expressions, revealing the feature association patterns between different test points. Finally, based on the defect category distribution and defect location distribution determined by the path feature association map, test optimization instructions containing test point identifiers and test timing adjustment identifiers are generated and transmitted to the circuit board test equipment to dynamically switch the test process. This realizes a complete drive from data analysis to test strategy adjustment, enabling the test equipment to dynamically optimize the test focus and sequence according to the actual defect distribution. This effectively improves the targeting and adaptability of circuit board testing, and overall improves the accuracy of defect location and the utilization efficiency of test resources. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the architecture of the application scenario provided in the embodiments of this application;

[0014] Figure 2 This is a schematic diagram of the server structure provided in an embodiment of this application;

[0015] Figure 3 This is a flowchart illustrating the test data analysis method for circuit board testing provided in this application embodiment. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be regarded as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0017] See Figure 1 This is an architectural diagram of an application scenario provided in this application embodiment. The detection device 400 is connected to the server 200 through the network 300. The network 300 can be a wide area network or a local area network, or a combination of the two, and data transmission is achieved using wireless or wired links.

[0018] The detection device 400 is, for example, an oscilloscope, a digitizer, or an optical detection device, used to collect relevant data (such as electrical signal response waveform sequences and regional optical scanning images) and send the data to the server 200. The server 200 is used to execute the method provided in this embodiment of the invention based on the acquired data.

[0019] In some embodiments, server 200 may be an independent physical server, a server cluster or distributed system consisting of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content delivery networks (CDN), and big data and artificial intelligence platforms.

[0020] The server used for implementing the test data analysis method for circuit board testing provided in the embodiments of this application will be described next. See Figure 2 This is a schematic diagram of the server structure provided in an embodiment of this application. Figure 2 The server shown includes at least one processor 210, memory 250, at least one network interface 220, and an external interface 230. The various components in server 200 are coupled together via a bus system 240. It is understood that the bus system 240 is used to implement communication between these components. In addition to a data bus, the bus system 240 also includes a power bus, a control bus, and a status signal bus. However, for clarity, ... Figure 2The general labeled all buses as Bus System 240.

[0021] Processor 210 can be an integrated circuit chip with signal processing capabilities, such as a general-purpose processor, a digital signal processor (DSP), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. Among them, the general-purpose processor can be a microprocessor or any conventional processor, etc.

[0022] External interface 230 may include, for example, one or more speakers and / or one or more visual displays. External interface 230 may also include one or more input devices 432, such as a keyboard, mouse, microphone, touch screen display, camera, etc.

[0023] The memory 250 may be removable, non-removable, or a combination thereof. Exemplary hardware devices include solid-state storage, hard disk drives, optical disk drives, etc. The memory 250 may optionally include one or more storage devices physically located away from the processor 210.

[0024] The memory 250 may include volatile memory or non-volatile memory, or both. The non-volatile memory may be read-only memory (ROM), and the volatile memory may be random access memory (RAM). The memory 250 described in this application embodiment is intended to include any suitable type of memory.

[0025] In some embodiments, memory 250 is capable of storing data to support various operations, examples of which include programs, modules, and data structures or subsets or supersets thereof, as illustrated below.

[0026] Operating system 251 includes system programs for handling various basic system services and performing hardware-related tasks, such as the framework layer, core library layer, driver layer, etc., for implementing various basic business functions and handling hardware-based tasks;

[0027] The network communication module 252 is used to reach the detection device via one or more (wired or wireless) network interfaces 220, exemplary network interfaces 220 include: Bluetooth, WiFi, and Universal Serial Bus (USB), etc.

[0028] Presentation module 253 is configured to enable the display of information (e.g., external interface for operating peripheral devices and displaying content and information) via one or more output devices 231 (e.g., display screen, speaker, etc.) associated with external interface 230;

[0029] The input processing module 254 is used to detect and translate one or more user inputs or interactions from one or more input devices 232.

[0030] Based on the above description of the application scenarios and servers provided in the embodiments of this application, the test data analysis method for circuit board testing provided in the embodiments of this application is described below. In actual implementation, the test data analysis method for circuit board testing provided in the embodiments of this application can be implemented by a server. See also Figure 3 , Figure 3 This is a flowchart illustrating the test data analysis method for circuit board testing provided in this application embodiment. Next, we will combine... Figure 3 The steps shown are explained.

[0031] Step S100: Obtain the initial test response set of the circuit board to be tested. The initial test response set includes the electrical signal response waveform sequence collected for each test point on the circuit board and the corresponding regional optical scan image of the test point.

[0032] The initial test response set refers to the sum of raw data collected from the circuit board under test by the testing equipment. The circuit board under test is a printed circuit board assembly that has not yet undergone quality certification and may have manufacturing defects. Test points are physical locations predefined during the circuit board design phase for applying test signals or monitoring responses, such as pins of integrated circuits, test pads, vias, or the ends of critical networks. The electrical signal response waveform sequence is a discrete numerical sequence of voltage changes over time, captured in real-time at each test point using an oscilloscope or digitizer after an excitation signal is applied to the circuit board's input or a preset test point. This sequence reflects the attenuation, reflection, delay, or distortion experienced by the signal as it travels from the excitation source to the test point, thus revealing the electrical performance of the circuit. Area optical scan images are grayscale or color digital images obtained by high-resolution scanning of each test point and its neighborhood within a preset radius using automated optical inspection equipment. These images reveal details of the physical structure of the circuit board surface, such as the wetting angle of solder joints, burrs on circuit edges, solder mask coverage, and the presence of scratches or foreign objects.

[0033] In a specific implementation scenario, a composite testing system integrating flying probe testing and a line scan camera is employed. Guided by a motion control system, the flying probe sequentially contacts each point according to a pre-defined list of test point coordinates. Simultaneously, a predefined test pulse is applied, and the reflected voltage signal is recorded at an extremely high sampling rate using the probe's built-in high-speed sampling circuit, generating an electrical signal response waveform sequence containing a large number of sampling points. During the probe's movement intervals, a high-resolution line scan camera fixed to the test head scans the test point area. The acquired light intensity signal is converted into a digital matrix by an image acquisition card, generating an optical scan image of the area. The electrical signal response waveform sequences of all test points and the regional optical scan image are associated through unique identifiers for each test point, collectively forming an initial set of test responses.

[0034] Step S200: Perform preliminary differentiation processing on the initial test response collection. Based on the waveform contour fluctuation trend of the electrical signal response waveform sequence and the image gray level distribution of the regional optical scanning image, generate a set of pointing markers to be analyzed corresponding to each test point.

[0035] In one implementation, step S200 may specifically include the following steps S210 to S250:

[0036] Step S210: Extract the electrical signal response waveform sequence of each test point, perform waveform profile trend analysis on the electrical signal response waveform sequence, determine the cumulative amplitude difference between the peak and trough positions in each waveform sequence as the waveform profile fluctuation trend, and mark the test points whose waveform profile fluctuation trends meet the preset fluctuation trend conditions as waveform analysis target points according to the comparison results between the waveform profile fluctuation trends and the preset fluctuation trend conditions.

[0037] Extracting the electrical signal response waveform sequence for each test point refers to reading the corresponding voltage-time series data from the initial test response collection, according to the identifier of the test point. Waveform profile trend analysis involves mathematical morphological processing of this sequence data to identify the main fluctuation characteristics of the waveform. Peak and trough positions refer to the time or sampling point indices corresponding to local maxima and minima in the waveform sequence. Amplitude difference accumulation refers to summing the voltage differences between all adjacent peaks and troughs, or calculating the statistics of these differences, such as the root mean square value or the sum of absolute values. This accumulation can quantify the severity of the overall waveform fluctuation. The preset fluctuation trend condition is a pre-set threshold or threshold range used to determine whether the waveform fluctuation level belongs to the abnormal range. This condition is usually determined based on statistical analysis of test waveforms from a large number of known good circuit boards. Waveform analysis target points refer to those test points whose electrical signal waveform fluctuation level exceeds the normal range and are thus initially screened out, requiring in-depth examination of their electrical characteristics in subsequent analysis. For example, using a peak-valley detection algorithm, a sliding window comparison method is first applied to the electrical signal response waveform sequence. Each sampling point in the sequence is compared with several adjacent points before and after it. If the value of the sampling point is greater than that of all its neighbors, it is identified as a peak; if it is less than that of all its neighbors, it is identified as a valley. Then, the voltage amplitude difference between each peak and its adjacent valley is calculated, and all such amplitude differences in the waveform sequence are summed to obtain a quantized value of the waveform profile fluctuation trend. This quantized value is compared with a preset fluctuation trend condition (e.g., the upper limit of the 95% confidence interval set based on the statistical distribution of good products). If the quantized value is greater than the preset upper limit, the waveform fluctuation at that point is considered to be abnormally drastic, satisfying the preset fluctuation trend condition, and thus the test point is marked as the point to be analyzed.

[0038] Step S220: Extract the regional optical scan image of each test point, perform gray level analysis on the regional optical scan image, determine the distribution range of gray values ​​of all pixels in the image as the image gray level distribution, and mark the test points whose image gray level distribution meets the preset gray level conditions as the image points to be analyzed according to the comparison results between the image gray level distribution and the preset gray level conditions.

[0039] Extracting the regional optical scan image of each test point refers to reading the corresponding digital image data from the initial test response set, following the path associated with the test point. Gray-level analysis involves statistically processing this image data to quantify the image's contrast and gray-level distribution characteristics. The distribution range of all pixel gray-level values ​​refers to the interval between the minimum and maximum gray-level values ​​in the image, also including the central tendency of gray-level values, such as the mean and median, and the dispersion, such as the variance or standard deviation. These statistical measures together constitute the image's gray-level distribution. The preset gray-level conditions are pre-defined thresholds or ranges of gray-level statistics used to determine whether the image's gray-level distribution deviates from the normal state. For example, a normal solder joint image may have a set gray-level mean and variance range, while an oxidized solder joint may have an overall low gray-level value and decreased contrast. The image to be analyzed points refer to those test points whose gray-level distribution characteristics in the optical image are abnormal, thus initially screened out, and whose physical structure or surface condition needs to be examined in subsequent analyses. For example, grayscale histogram statistics are performed on a regional optical scan image to calculate the mean and standard deviation of grayscale values ​​for all pixels in the image. The calculated mean and standard deviation are then compared with preset grayscale level conditions. These preset conditions can be a multivariate Gaussian distribution model trained on high-quality image data, which defines the joint distribution region of the mean and standard deviation of grayscale values ​​in a normal image. If the combination of the mean and standard deviation of the current point falls within the low probability density range of this distribution region (e.g., deviating from the mean by more than three times the standard deviation), the grayscale distribution of the image is considered abnormal, meeting the preset grayscale level conditions. Therefore, this test point is marked as the target point for image analysis.

[0040] Step S230: Obtain the physical layout coordinates of each test point, construct a test point layout map based on the physical layout coordinates, and mark the test points that are simultaneously marked as waveform analysis points and image analysis points as first-level points on the test point layout map, and mark the test points that are only marked as waveform analysis points or only marked as image analysis points as second-level points.

[0041] Physical layout coordinates are the two-dimensional coordinate values ​​of each test point on the board surface, defined in the PCB computer-aided design file. The origin is typically a location on the PCB, such as a corner or a positioning hole. The test point layout map is a two-dimensional coordinate system where each test point is mapped to a point based on its physical layout coordinates, thus visually displaying the spatial distribution of all test points. Based on the marking results of steps S210 and S220, each point is hierarchically labeled on this layout map. The first level indicates points that exhibit abnormal electrical response characteristics and optical physical characteristics. These points simultaneously display two different types of abnormal features, suggesting a very high probability of real defects, and are the core areas requiring priority attention. The second level indicates points that exhibit abnormalities only in one dimension. These points may be caused by test interference, environmental factors, or normal fluctuations that are not defects; their analysis urgency is less than that of the first level. This hierarchical division effectively distinguishes abnormal signals of different confidence levels, providing a basis for subsequent area aggregation and allocation of analysis resources. For example, in a test point layout map, a point with coordinates (x1, y1) is marked as a waveform pointing point to be analyzed in step S210 and also as an image pointing point to be analyzed in step S220. In this case, a "first-level pointing point" attribute label is added to the annotation information of this point in the map. Another point with coordinates (x2, y2), if only marked in step S210, is labeled "second-level pointing point (waveform)" in the map.

[0042] Step S240: Perform adjacent region merging processing on the test point layout map, aggregate the pointing points with adjacent physical layout coordinates and the same level label, generate multiple pointing point adjacent regions, and assign a unique region pointing identifier to each pointing point adjacent region.

[0043] In one implementation, step S240 may specifically include the following steps S241 to S246:

[0044] Step S241: Perform boundary tracking processing on the test point layout map, extract the physical layout coordinates of each pointing point, calculate the spatial proximity between pointing points based on the physical layout coordinates, and mark the pointing point pairs that meet the preset proximity conditions as point pairs to be aggregated.

[0045] Boundary tracing processing refers to the preliminary calculations performed to identify groups of spatial points, aiming to analyze the spatial relationships between points. Extracting the physical layout coordinates of each pointing point involves reading the x and y coordinates of all points marked as pointing points from the test point layout map. Spatial proximity is a quantitative indicator measuring the physical proximity of two pointing points, such as Euclidean distance, which is the straight-line distance between two points. The preset proximity condition is a distance threshold, typically set based on the average spacing of test points on the circuit board, the size of potential defect areas, and the accuracy requirements of subsequent analysis. Point pairs to be aggregated refer to two pointing points whose spatial distance is less than the preset threshold; they are considered candidate pairs potentially belonging to the same defect area or related areas. For example, for a high-density interconnect circuit board, the spacing of test points may be very small, and the preset proximity condition can be set to a value slightly larger than the average spacing, such as 1.5 times the average spacing. For any two first-level pointing points, calculate the Euclidean distance between them. If this distance is less than the preset proximity threshold, the point pair formed by these two points can be marked as a point pair to be aggregated, and the identifiers of these two points and the distance between them can be recorded.

[0046] Step S242: Construct an initial association graph based on the point pairs to be aggregated, taking each pointing point as a node in the initial association graph, and taking the connection relationship between the pointing points corresponding to the point pairs to be aggregated as an edge in the initial association graph, thus generating an initial association topology structure with nodes and edges.

[0047] The initial association graph is a graph data structure used to formally represent the adjacency relationships between pointing points. Nodes represent each independent pointing point. Edges represent the connections between nodes; if two pointing points are marked as a pair to be aggregated in step S241, an edge is created between these two nodes. The initial association topology is this network of nodes and edges, clearly revealing which pointing points are spatially adjacent and how these adjacencies are connected. For example, suppose there are three first-level pointing points A, B, and C. Calculations show that the distance between A and B is less than a threshold, the distance between B and C is also less than a threshold, but the distance between A and C is greater than a threshold. Then, in the initial association graph, there will be three nodes A, B, and C, and two edges AB and BC. This topology forms a path, indicating that although A, B, and C are three points, they are spatially connected through the intermediate point B, potentially forming a larger defect area.

[0048] Step S243: Perform connected subgraph partitioning on the initial associated topology. Traverse all nodes in the initial associated topology and perform depth-first search along the edges starting from any unvisited node. All nodes that can be reached from each other through edges are partitioned into the same connected subgraph, generating multiple sets of connected subgraphs.

[0049] Connected subgraph partitioning is an algorithm in graph theory used to decompose a large graph into several independent connected components. Depth-first search (DFS) is a graph traversal algorithm that starts from a starting node and recursively visits all unvisited neighboring nodes along the edges until no new unvisited nodes can be found, thus exploring a connected component. A connected subgraph is a substructure consisting of a set of nodes and edges connecting these nodes, where there is a path between any two nodes, and the subgraph is not connected to the rest of the graph by edges. The set of connected subgraphs is the collective term for all independent connected components. Each connected subgraph corresponds to a potential, spatially continuous defect region on the path. Continuing the example above, performing a depth-first search starting from node A allows access to A's neighbor B, and from B to its neighbor C. All nodes have been visited, therefore nodes A, B, and C, along with the edges AB and BC, together form a connected subgraph. If there is another isolated node D in the graph, without any edges connecting it to other nodes, then D itself also constitutes a separate connected subgraph. In this way, all the scattered directional points can be divided into different sets of connected subgraphs.

[0050] Step S244: Perform contour extraction processing on each connected subgraph set to obtain the physical layout coordinates of all pointing points in the connected subgraph set, calculate the convex hull of all coordinates as the initial adjacent region boundary of the connected subgraph, and determine the set of pointing points contained in the region based on the initial adjacent region boundary.

[0051] Contour extraction aims to determine the smallest polygonal boundary that encloses all nodes of each connected subgraph set. A convex hull is the smallest convex polygon on a plane that contains all the points of a given set. The initial adjacent region boundary is defined by the polygonal boundary line defined by this convex hull. Based on this boundary, the coverage area of ​​the region on the plane can be clearly defined, and the set of pointing points contained in the region constitutes all the nodes of this connected subgraph. For example, for a connected subgraph containing multiple pointing points, the coordinates of all these points are first obtained. Then, the convex hull of these points is calculated using Graham's scan method or Andrew's algorithm. First, the point with the smallest y-coordinate in the set is found, then the other points are sorted according to their polar angle. Next, a stack structure is used to maintain the vertices of the convex hull. It is then determined whether each point causes the connection at the top of the stack to turn right. If a right turn occurs, the point is not on the convex hull and is popped. The points remaining on the stack are the vertices of the convex hull. Connecting these vertices in order yields a convex polygon, which is the initial adjacent region boundary. All the pointing points contained within this polygon are the key points that need to be focused on and analyzed in this area.

[0052] Step S245: Perform smoothing correction on the initial adjacent region boundary, remove outlier points on the boundary that deviate from the main contour, and refit the corrected adjacent region boundary based on the remaining boundary points. At the same time, extract the region geometric center coordinates corresponding to the corrected adjacent region boundary.

[0053] Smoothing correction optimizes the initial convex hull boundary to better reflect the actual shape of the defective region and removes abrupt or distorted boundaries caused by isolated points. Outliers deviating from the main contour refer to points on the convex hull boundary that are significantly convex or concave relative to the overall trend. These points often exist because an isolated pointing point elongates the boundary, resulting in a large number of blank areas where no actual pointing points exist. After removing outliers, the remaining boundary points need to be refitted to generate a smoother, more compact corrected boundary for the adjacent region. The geometric center coordinates of the region refer to the geometric center of the corrected polygon boundary, usually obtained by calculating the average coordinates of all vertices of the polygon. It provides a representative positional reference for the region. For example, in a convex hull formed by five pointing points, if one point is very far outward, the convex hull forms a long "tentacle." By analyzing the distance between the boundary point and the centroid of the overall point set, or the angle change of the line connecting adjacent boundary points, this "tentacle" vertex can be identified as an outlier. Remove this point from the boundary point set, and then recalculate the convex hull for the remaining four points. The resulting new polygon boundary will be more compact and more accurately reflect the clustered area of ​​the main points. Next, calculate the arithmetic mean of the x and y coordinates of all vertices of this new polygon to obtain the coordinates of the geometric center of the region.

[0054] Step S246: The corrected adjacent region boundaries, region geometric center coordinates, and the set of pointing points contained in the region are associated and stored to generate the adjacent regions of the pointing points corresponding to each connected subgraph, and a unique region pointing identifier is assigned to each adjacent region of the pointing points.

[0055] In one implementation, step S246 may specifically include the following steps S2461 to S2466:

[0056] Step S2461: Obtain the corrected adjacent region boundary corresponding to each connected subgraph, convert the corrected adjacent region boundary into a closed boundary ring structure, and perform ring filling processing on the boundary ring structure to generate a solid region mask with the boundary ring as the outline. The solid region mask is used to indicate the coverage range of the adjacent region of the pointing point in the test point layout map.

[0057] A closed boundary loop structure refers to representing the corrected adjacent region boundary as a sequence of ordered, interconnected coordinate points, ensuring that the last point is connected to the first point, forming a closed loop. Loop filling is an image processing operation where, on a blank canvas of the same size as the test point layout map, all pixels inside the boundary loop are set to a non-zero value, while pixels outside the loop remain zero. The resulting image is called a solid region mask, which is essentially a binary image where white (or 1) areas precisely indicate the projected coverage of the adjacent region of the pointed point across the entire circuit board layout. For example, for the corrected adjacent region boundary, the vertex order is first checked using a graphics algorithm to ensure it forms a closed loop. Then, a two-dimensional zero matrix of the same size as the circuit board layout map is created as the mask canvas. Next, using a scanline fill algorithm or a seed fill algorithm, for each row on the canvas, the intersection point of that row with the boundary loop is calculated, and the values ​​of all pixels between the intersection points are set to 1. After traversing all rows, a binary solid region mask is obtained, where the connected regions with a value of 1 represent the spatial range of the region adjacent to the pointed point.

[0058] Step S2462: Extract the coordinates of the geometric center of the region corresponding to each connected subgraph, launch radial probe lines in multiple directions starting from the coordinates of the geometric center of the region, record the coordinates of the intersection of each radial probe line with the corresponding corrected boundary of the adjacent region, and generate the radial span feature set of the adjacent region of the pointing point based on the distance between all the intersection coordinates and the coordinates of the geometric center of the region.

[0059] The coordinates of the region's geometric center serve as the reference origin. Radial probe lines originate from this origin and radiate outwards at equal angular intervals, for example, one line every 15 degrees, for a total of 24 lines. Each probe line intersects the corrected boundary of the adjacent region, generating one or more intersection points. Typically, the intersection point farthest from the origin is taken as the boundary point in that direction. The coordinates of this intersection point are recorded. The Euclidean distance between this intersection point and the origin is calculated. This process is repeated for all directions to obtain a list of distances from the center to the boundary in different directions. This list, along with the corresponding angular information, constitutes the radial span feature set. This set can quantitatively describe the shape of the adjacent region; for example, whether it is a nearly circular region (distances are similar in all directions) or a long and narrow region (distances are much greater in some directions than in others). For instance, taking the geometric center of a region as the origin, a ray is emitted in the 0-degree direction, and the intersection point with the region boundary is calculated, with a distance of d0; in the 15-degree direction, the distance is d1; ... in the 345-degree direction, the distance is d23. These 24 distance values ​​d0, d1, ..., d23 constitute the radial span feature set of the region, which reflects the extent of the region's extension in different directions.

[0060] Step S2463: Perform point distribution density analysis on the set of pointing points corresponding to each connected subgraph, project the coordinates of all points in the set of pointing points onto a two-dimensional plane to construct a point distribution density map, and extract the number and location of density peak regions from the point distribution density map as point clustering features.

[0061] Point density analysis aims to explore the inherent distribution patterns of directional points within a region, rather than solely relying on the region boundary generated by the convex hull. Projecting the coordinates of the directional points onto a two-dimensional plane, a point density map can be constructed using kernel density estimation. Kernel density estimation involves overlaying a smooth kernel function (e.g., a Gaussian kernel) over each point, and then calculating the sum of the contributions of all kernel functions at any point on the plane, resulting in a continuous density surface. Density peak regions are the locations of local maxima on this surface, representing the core regions where points are most concentrated. The number and location of density peak regions constitute the point clustering characteristics. For example, for a region containing ten directional points, kernel density estimation might reveal that these points are not uniformly distributed but clustered around two different cores. After calculation, two distinct local peaks were detected on the density map, with coordinates (x, y, y) and (x, y). p1 ,y p1 ) and (x p2 ,y p2 Therefore, the clustering feature of the points includes the quantity "2" and the coordinates of these two peaks. This feature reveals that there may be two independent defect sources or two severe centers of a defect within the region.

[0062] Step S2464: Input the radial span feature set and the point clustering feature into the region type discrimination unit. The region type discrimination unit jointly evaluates the multi-directional distance distribution in the radial span feature set and the peak region distribution in the point clustering feature to generate the region morphology category identifier pointing to the adjacent region of the point.

[0063] The region type discrimination unit is a pre-built classifier whose input is the features extracted in steps S2462 and S2463, and whose output is a category label. This unit determines the pre-defined morphological category of a region by jointly evaluating radial span features (describing the overall shape of the region) and point clustering features (describing the distribution of internal points), such as "compact circular single defect region," "elongated multi-point clustered region," "ring-shaped defect region," or "discrete point cluster region." The region morphological category identifier is the label of this evaluation result. For example, for a region where the radial span feature shows little difference in distances in all directions (i.e., the shape is close to a circle), and the point clustering feature shows only one density peak, the region type discrimination unit might classify it as an "isolated point-like defect region." Conversely, for a region where the radial span feature shows a significantly longer distance in one direction, and the point clustering feature shows two separate density peaks, it might be classified as a "linearly extended dual-core defect region." The implementation of this discrimination unit can be based on decision trees, support vector machines, or simple rule engines, with rules defined by experts based on the physical morphology of the defects.

[0064] Step S2465: Based on the region morphology category identifier, retrieve the corresponding identifier encoding template from the preset identifier encoding library, combine the identifier encoding template with the numbering information of the connected subgraph for encoding processing, and generate a unique region pointing identifier for each pointing point's adjacent region.

[0065] The pre-defined identifier encoding library is a lookup table storing the correspondence between different region morphological categories and encoding templates. An encoding template is a string format containing a fixed prefix and variable placeholders. The combined encoding process involves replacing the placeholders in the template with the actual numbers of the connected subgraphs, thereby generating an identifier that uniquely identifies the region and carries its morphological category information. For example, in the pre-defined identifier encoding library, the encoding template for the "isolated point defect area" category might be "SPOT_"; for the "linearly extended double-core defect area" category, the template might be "LINE_". Suppose a connected subgraph has the number "015" and is identified as a "linearly extended double-core defect area" in step S2464. Then, the template "LINE_" is retrieved from the encoding library, the placeholders are replaced with the actual number "015", and the combined encoding generates a unique region pointer identifier "LINE_015". Based on this, subsequent processing modules can immediately determine the approximate morphological characteristics of the region without needing to re-analyze it.

[0066] Step S2466: Encapsulate and store the solid region mask, the region geometric center coordinates, the set of pointing points, and the unique region pointing identifier; construct the pointing point adjacent region record entries; and summarize all pointing point adjacent region record entries to generate the pointing point adjacent region record set.

[0067] Encapsulated storage packages all relevant descriptive information about a pointer point's adjacent region into a single data record. A solid region mask is used for precise positioning, the region's geometric center coordinates are used for fast indexing, the pointer point set serves as the basis for tracing the original data, and the unique region pointer identifier is the handle for operating on the record. Combining this information constructs a complete pointer point's adjacent region record entry. Summarizing all such record entries constitutes the pointer point's adjacent region record set, which forms the foundation of input data for all subsequent in-depth analysis. For example, a pointer point's adjacent region record entry can be a data structure containing five fields: Field1 is a unique identifier (STRING type, value "LINE_015"), Field2 is a solid region mask (IMAGE type, or a pointer to the memory address storing the mask data), Field3 is the geometric center coordinates (POINT type, value (x,y)), Field4 is the pointer point set (LIST type, containing a series of point IDs, such as [P_023,P_024,P_027]), and Field5 may also contain other metadata such as timestamps. All such entries, such as REG 001 REG 002 The records , ..., REG_100 together constitute a set of records pointing to the adjacent regions of the points, which are stored in the system database and called by step S300.

[0068] Step S250: Associate and store the region pointing identifier corresponding to the adjacent region of each pointing point with the hierarchical labeling information of all test points in that region to generate a set of pointing marks to be analyzed for each test point. The set of pointing marks to be analyzed includes the adjacent region identifier of the first-level pointing point and the adjacent region identifier of the second-level pointing point.

[0069] The purpose of this step is to establish a mapping relationship from a single test point to its adjacent regions. For each test point, it is necessary to know not only its own anomaly level (first level or second level), but also which or more adjacent regions it belongs to. The set of pointing markers to be analyzed is a data record generated for each test point, which includes the region pointing identifier of the region to which the point belongs (there may be more than one, but usually a point belongs to only one region), and its hierarchical role within that region. For a first-level pointing point, the identifier of its adjacent region is the identifier of the first-level pointing point's adjacent region; for a second-level pointing point, the identifier of its region is the identifier of the second-level pointing point's adjacent region. Through this association, subsequent analysis can easily start from a test point to find its entire defect area, or start from a region to find all the test points contained within that region. For example, for test point P... 023 It is marked as a first-level pointing point in steps S210 and S220, and is assigned to the region "LINE" in step S246. 015 "In the middle. So, for point P..." 023 The generated set of pointer markers to be analyzed will contain a field named "First-level pointer adjacency region identifier" with the value "LINE". 015 "And for a P that is only marked as a second-level pointing point..." 045 If its location is "SPOT" 022 If so, the set of pointers to be analyzed will contain "second-level pointer adjacency region identifier", with a value of "SPOT". 022 ".

[0070] Step S300: Call the preset test data multi-path exploration model to perform path independent mining operation on the set of pointing marks to be analyzed, and generate the signal waveform depth characterization map and optical image local structure characterization map corresponding to each pointing path.

[0071] In one implementation, step S300 may specifically include the following steps S310 to S350:

[0072] Step S310: Input the set of pointer markers to be analyzed into the path allocation layer of the multi-path exploration model of the test data. The path allocation layer creates a corresponding number of independent data processing channels based on the number of regional pointer markers contained in the set of pointer markers to be analyzed. Each independent data processing channel corresponds to a pointer path.

[0073] The set of directional markers to be analyzed serves as input, containing identifiers of all adjacent regions of the directional points to be processed. The path allocation layer, the first layer of the model, parses this input and counts the number of distinct, unique regional directional markers. Then, it dynamically creates the same number of independent data processing channels within the model. These channels are logically parallel, with no data exchange between them, ensuring the independence of feature extraction for each path. Each channel is assigned a regional directional marker and is responsible for processing all raw data associated with that marker; this processing link is called a directional path. For example, the set of directional markers to be analyzed might contain the regional directional marker "LINE". 015 “SPOT” 022 "and AREA" 003 There are three different identifiers in total. After receiving this set, the path allocation layer will instantiate three identical data processing channels in the model. Channel 1 is marked as responsible for the path "LINE". 015 Channel 2 is responsible for "SPOT" 022 Channel 3 is responsible for "AREA" 003 Subsequent data will be processed through different channels according to this allocation.

[0074] Step S320: In each independent data processing channel, extract the electrical signal response waveform sequence of all test points in the adjacent area of ​​the pointing point indicated by the corresponding area pointing identifier, and combine the extracted electrical signal response waveform sequences according to the spatial arrangement order of the test points in the adjacent area to generate the waveform sequence combination map corresponding to the pointing path.

[0075] In each independent channel, the system first searches for the corresponding record entry in the adjacent area record set based on its assigned area pointer identifier, and then retrieves the "point set," which is a list of identifiers for all test points belonging to that area. Next, based on these identifiers, the electrical signal response waveform sequence corresponding to each point is extracted one by one from the initial test response collection set. These independent waveform sequences need to be combined into a unified data structure. The combination is based on the spatial arrangement of the test points within the area; for example, it can be sorted according to the lexicographical order of the point coordinates (row-first, then column-first) or according to their projection order along the principal axis of the area. Stacking all the sorted waveform sequences together forms a two-dimensional waveform sequence combination map, where the width of the map corresponds to the sampling point length of a single waveform, and the height corresponds to the number of test points within the area. This map visually displays the spatial variation of the electrical response of all test points within the area. For example, for the area "LINE..." 015 ", its pointing point set is [P 023 ,P 024 ,P 027 The channel first reads waveform sequences from the database for these three points, each sequence being a one-dimensional array of length L. Then, based on the spatial coordinates of these three points, for example, if they are arranged from left to right on a line as P... 023 ,P 024 ,P 027 Arrange these sequences in this order from top to bottom to form a two-dimensional matrix of shape (3, L). This is the region "LINE". 015 The waveform sequence combination spectrum of "".

[0076] Step S330: Input the waveform sequence combination map into the signal waveform depth mining sub-network of the multi-path exploration model of the test data, and extract the waveform morphology evolution features and waveform temporal sequence succession features in the waveform sequence combination map through the multi-level feature extraction operation of the signal waveform depth mining sub-network to generate the signal waveform depth representation map corresponding to the pointing path.

[0077] In one implementation, step S330 may specifically include the following steps S331 to S335:

[0078] Step S331: Perform first-level feature extraction on the waveform sequence combination map. Use multiple first-feature extraction kernels to perform feature operations with the waveform sequence combination map to generate multiple first-level feature mapping maps. Each first-level feature mapping map corresponds to the local morphological features of the waveform at different scales in the waveform sequence combination map.

[0079] The first-level feature extraction stage is the initial phase of feature extraction, aiming to capture the most fundamental local patterns in the waveform. The first feature extraction kernel consists of multiple small-sized two-dimensional convolutional kernels, such as 3×3 or 5×5. Each kernel has different weight parameters, so after convolving the combined graph of the input waveform sequence, they are activated to different types of local waveform morphologies. For example, one kernel might specifically respond to a sharply rising pulse front, another to a gently falling edge, and yet another to high-frequency oscillations. Feature processing is the convolution operation, where the kernel slides across the input graph, calculating the dot product between the kernel and the local region. The resulting output is multiple first-level feature maps, each highlighting the location in the input graph most similar to the corresponding convolutional kernel pattern. For example, for a waveform sequence combination map of shape (H,W), convolution is performed using 32 first feature extraction kernels of size 3×3 with a stride of 1 and padding of 1, resulting in 32 new two-dimensional matrices. The size of each matrix is ​​the same as that of the input map (or slightly different after downsampling). These 32 matrices are the first-level feature map set, representing the response intensity distribution of 32 different waveform local morphological features in the original map.

[0080] Step S332: Perform feature condensation operation on multiple first-level feature maps to reduce the spatial resolution of the first-level feature maps, retain the significant response regions in the local morphological features of the waveform, and generate a set of condensed first-level feature maps.

[0081] The main purpose of feature condensation is dimensionality reduction and abstraction, reducing subsequent computation and expanding the receptive field of subsequent convolutions. Pooling, such as max pooling or average pooling, can be used. Max pooling selects the maximum value as the output within a small neighborhood window (e.g., a 2×2 region), thus reducing the spatial size while preserving the most salient feature responses within that region. Preserving salient response regions means that after pooling, regions with lower feature values ​​are suppressed or merged, while high-response regions are highlighted. The resulting set of condensed first-level feature maps has a smaller spatial size (e.g., height and width halved), but the number of feature maps (i.e., the number of channels) remains unchanged. For example, a 2×2 max pooling layer with a stride of 2 is applied to the 32 first-level feature maps of size H×W generated in step S331. The pooling layer takes the maximum value within each 2×2 window and outputs a new value. The result is 32 new feature maps, each with a size of (H / 2)×(W / 2). This process allows subsequent network layers to focus on a wider range of waveform patterns.

[0082] Step S333: Perform second-level feature extraction on the condensed first-level feature map set. Use multiple second-level feature extraction kernels to perform feature operations on each condensed first-level feature map to generate multiple second-level feature maps. Each second-level feature map corresponds to the combined correlation features between different waveform local morphological features.

[0083] The second-level feature extraction builds upon the local patterns extracted in the first level, further learning the combination relationships between these patterns. The second-level feature extraction kernel is also a convolutional kernel, but its input is multiple first-level feature maps (i.e., multi-channel input). These convolutional kernels can simultaneously perceive responses from different first-level features and learn their co-occurrence patterns in the local space. For example, a second-level feature extraction kernel might learn the combination pattern of "sharp rising front" followed by "high-frequency oscillation," which could be a typical signal feature of a certain setting defect. Feature operations are still convolution operations, but their input is multi-channel, so the convolutional kernel also has multiple channels, convolving with each channel of the input, and then summing the results. The generated result is multiple second-level feature maps, each representing the response intensity of a certain feature combination pattern in the input. For example, using the 32 condensed feature maps from the previous step as input, and convolving them with 64 second feature extraction kernels of size 3×3×32, 64 new feature maps will be obtained. Their size may be the same as or further reduced from the input map due to the stride and padding settings. These 64 feature maps encode more complex and abstract feature combination information.

[0084] Step S334: Input multiple second-level feature maps into the temporal continuity modeling module. Through the continuity unit of the temporal continuity modeling module, perform continuity modeling on the feature changes along the waveform sequence direction in the second-level feature maps, and extract the continuity relationship of the waveform sequence in the time dimension as the waveform temporal continuity feature.

[0085] In one implementation, step S334 may specifically include the following steps S3341 to S3345:

[0086] Step S3341: Divide each second-level feature map into segments according to the waveform sequence direction to generate feature slices corresponding to multiple time steps. Each feature slice corresponds to the feature representation of a time point in the waveform sequence.

[0087] Segmentation involves cutting a two-dimensional feature map along its width (i.e., the time axis) into a series of vertical strips. Each strip contains information about all channels and height at that moment, representing the comprehensive characteristics of the waveform at that time point. For example, suppose there are C second-level feature maps, each with a size of H (corresponding to the spatial position direction) × T (corresponding to the waveform time direction). Segmenting along the T direction will yield T slices. Each slice is a three-dimensional tensor with a size of C × H × 1, capturing the response of all spatial locations (in the H direction) and all feature channels (in the C direction) at a specific time point. This transforms the spatial feature map sequence into time-series data organized by time steps, with each time step containing a feature vector (or feature map).

[0088] Step S3342: Input the feature slice of the first time step into the input gate of the receiving unit, and generate the input gate control signal corresponding to the memory information to be received in the current time step through the activation processing of the input gate.

[0089] Regarding the receiving unit, taking the Long Short-Term Memory (LSTM) unit as an example, it contains multiple gating structures. The input gating is responsible for determining which information from the current input is worth storing in the unit's memory cells. Specifically, the feature slice of the first time step is linearly transformed (multiplied by a weight matrix) and then passed through a sigmoid activation function, compressing its output value to between 0 and 1. This output value is the input gating control signal, which is essentially a vector with the same dimension as the memory cell. Each element is between 0 and 1, representing the proportion of memory information at the corresponding position that is allowed to be stored in the cell; 1 indicates complete retention, and 0 indicates complete neglect. For example, the feature slice x1 of the first time step is first multiplied by a weight matrix W... i Multiply and add the bias b. i Then, the signal is input into the Sigmoid function σ to obtain the input gate signal i1 = σ(W). i *x1+b i Simultaneously, x1 will also generate candidate memory information c through another linear transformation with a Tanh activation function. 1tilde =tanh(W c *x1+b c The input gate signal i1 will be compared with the candidate memory c. 1tilde Element-by-element multiplication is performed to jointly determine the new information that will ultimately be stored in the memory cell.

[0090] Step S3343: Input the feature slice of the current time step and the hidden state of the previous time step into the forgetting gate of the receiving unit, and generate the forgetting gate control signal corresponding to the proportion of the memory information of the previous time step that needs to be retained through the activation processing of the forgetting gate.

[0091] The forgetting gate determines which information to discard from the memory cells of the previous time step. Its inputs are the feature slice of the current time step and the hidden state of the previous time step. These two inputs are concatenated, then subjected to a linear transformation and a sigmoid activation function to generate the forgetting gate control signal. This signal is also a vector of 0 to 1 with the same dimension as the memory cell, used to control the degree to which information from the memory cell state of the previous time step is retained. For the first time step, the previous hidden state is typically initialized to a zero vector. Continuing the example, the current time step is t, and the feature slice is x. t The hidden state at the previous time step was h. t-1 Forgetting gate signal f t =σ(W f *[h t-1 ,x t ]+b f ). Here [h t-1 ,x t The symbol ] indicates concatenation of two vectors. t The closer a value in a vector is to 1, the more likely the corresponding old memory information should be retained; the closer it is to 0, the more likely it should be forgotten.

[0092] Step S3344: Update the memory cell state of the receiving unit according to the input gating control signal and the forgetting gating control signal. Input the feature slice of the current time step and the updated memory cell state into the output gating of the receiving unit. Generate the hidden state of the current time step through the activation processing of the output gating.

[0093] New memory cell state c t It consists of two parts: one part is the memory cell state c from the previous moment. t-1 With the forgetting gating signal f t The element-wise product (i.e., selectively forgetting old information) is one part, and the other part is the input gating signal i. t With candidate memory information c t_tilde The element-wise product (i.e., selectively adding new information). The update formula is c. t =f t *c t-1 +i t *c t_tilde Then, the output gating determines which information from the current memory cell state is output as the hidden state h at the current time step. t Its input is also the current feature slice x. t And the previous hidden state h t-1 The output gate signal o is obtained after linear transformation and Sigmoid function. t =σ(W o *[h t-1,x t ]+b o Finally, the updated memory cell state c t The signal is compressed to between -1 and 1 using the Tanh function, and then compared with the output gate signal o. t Perform element-wise multiplication to obtain the hidden state h at the current time step. t =o t *tanh(c t ), h t It contains both the input information at the current moment and the information inherited from the historical sequence, and is used for the calculation of the next time step.

[0094] Step S3345: Stack the hidden states of all time steps in chronological order to generate a hidden state sequence, and perform global maximum feature extraction on the hidden state sequence to extract the most significant temporal sequence continuity relationship in the entire waveform sequence as the waveform temporal sequence continuity feature.

[0095] After completing the calculations for all T time steps, T hidden state vectors h1, h2, ..., h will be obtained. t These vectors are stacked in chronological order to form a hidden state sequence matrix of shape T×D, where D is the dimension of the hidden states. Global maximum feature extraction (GMP) takes the maximum value of each feature dimension along the time dimension; that is, for each column of the matrix (representing the value of a feature dimension at all time steps), only the maximum value is retained. This operation condenses the information of the entire time series into a fixed-length vector, which represents the strongest response that has appeared in each feature dimension during the evolution of the entire waveform sequence, thus extracting the most significant temporal connections. For example, global maximum pooling of the hidden states at all time steps yields a vector v of length D, where v[d] = max(h1[d], h2[d], ..., h...). t [d]) This vector v is the waveform timing sequence feature to be extracted. It ignores the specific time when it occurs and only cares about which timing patterns are most prominent during the sequence evolution.

[0096] Step S335: Perform feature fusion between the waveform timing features and the second-level feature mapping map to generate a fused feature map. Then, perform global feature condensation on the fused feature map to obtain a fixed-dimensional feature map spectrum as the signal waveform depth representation spectrum corresponding to the pointing path.

[0097] Feature fusion combines features from different sources and dimensions to obtain a more comprehensive information representation. The waveform temporal sequence feature is a one-dimensional vector that captures the global temporal pattern of the entire sequence. The second-level feature map is a three-dimensional tensor (channel × height × width) that captures the morphological evolution of the waveform in space (between points) and within local time windows. Fusion methods can be varied; for example, the temporal sequence feature vector can be dimensionally expanded and copied to have the same spatial dimensions as the second-level feature map, and then concatenated along the channel dimension. Based on this, the fused feature map contains both fine-grained spatial-local temporal features and global temporal dependency information. Global feature condensation typically employs global average pooling or global max pooling to compress the fused multi-channel feature map into a fixed-length one-dimensional vector, ultimately obtaining a signal waveform depth representation map. For example, suppose the waveform temporal sequence feature is a vector of length 256, and the second-level feature map is a tensor of size 512 × 8 × 16. First, the 256-dimensional vector is expanded into a 64×8×16 tensor through a fully connected layer and a reshape operation. Then, this tensor is concatenated with the second-level feature map along the channel dimension to obtain a 576×8×16 fused feature map. Next, global average pooling is applied to this fused feature map to obtain a feature vector of length 576. This vector is the final signal waveform depth representation map generated for this pointing path, integrating both morphological evolution and temporal sequence information.

[0098] Step S340: In each independent data processing channel, extract the regional optical scan images of all test points in the adjacent area of ​​the pointing point indicated by the corresponding regional pointing identifier, and combine the extracted regional optical scan images according to the spatial arrangement order of the test points in the adjacent area to generate the optical image combination map corresponding to the pointing path.

[0099] Similar to the electrical signal waveform processing in step S320, this step processes optical image data within each channel. After locating the corresponding set of pointing points based on the area pointing identifier, the regional optical scan image of each test point is extracted from the initial test response set. These images are typically two-dimensional grayscale or color images of the same size. Then, following the spatial arrangement of the test points within the area (e.g., sorted by coordinates), these individual images are stitched together into a large, two-dimensional grid structure, which is the optical image composite atlas. The number of rows and columns in this atlas depends on the spatial layout of the points within the area. For example, for the area "SPOT_022", its pointing point set contains four points, which are roughly arranged in a 2×2 grid in space. The channel stitches together four 128×128 pixel regional optical scan images into a large 256×256 pixel image, i.e., the optical image composite atlas, according to this 2×2 grid order. This atlas completely presents the optical morphology of the entire area.

[0100] Step S350: Input the optical image composite map into the optical image local structure mining sub-network of the multi-path exploration model of the test data, and extract the line edge direction features and solder joint area texture features in the optical image composite map through the multi-level feature extraction operation of the optical image local structure mining sub-network, and generate the optical image local structure representation map corresponding to the pointing path.

[0101] The optical image local structure mining sub-network is a deep convolutional neural network used to process image data. Multi-level feature extraction operations also abstract semantic-level features from pixel-level information through a series of convolutional and pooling layers. Line edge orientation features refer to abstract features learned by the network from the image that characterize the direction, continuity, and sharpness of line boundaries; for example, the presence of jagged edges or edge breaks. Solder joint texture features describe the subtle texture patterns formed on the solder joint surface due to reflow soldering, oxidation, or voids, such as smoothness, roughness, or ring-like patterns. The optical image local structure representation map is the final output of the sub-network, a high-dimensional feature tensor that compactly and efficiently encodes all visible, defect-related physical structural information within the region. For example, the optical image local structure mining sub-network can use a ResNet-50 network pre-trained on ImageNet, removing its final fully connected classification layer, inputting the combined optical image map into the network, and passing it through multiple convolutional blocks (conv1 to conv5) for forward propagation, finally obtaining the feature map output by the conv5 layer. The feature map may be 7×7×2048 in size. This three-dimensional tensor is the local structural representation map of the optical image corresponding to the pointing path, which condenses the rich structural information in the input image.

[0102] Step S400: Based on the signal waveform depth characterization map and the optical image local structure characterization map, perform cross-path feature comparison and screening, determine the pointing path that meets the preset conditions as the dominant path of feature evolution, and generate the path feature association map corresponding to the dominant path of feature evolution.

[0103] In one implementation, step S400 may specifically include the following steps S410 to S450:

[0104] Step S410: Obtain the signal waveform depth representation map and optical image local structure representation map corresponding to all pointing paths, and construct a path feature vector for each pointing path. The path feature vector is formed by feature splicing of its signal waveform depth representation map and optical image local structure representation map.

[0105] The output of all pointing paths is obtained. Each path's output consists of two parts: a signal waveform depth representation map (assumed to be a one-dimensional vector of length N) and an optical image local structure representation map (assumed to be a one-dimensional vector of length M). Feature concatenation connects these two vectors end-to-end to form a new vector of length N+M, i.e., the path feature vector. This vector integrates deep information from both electrical response and optical physics, providing a unified descriptor for subsequent path comparisons. For example, assuming the signal waveform depth representation map is 256-dimensional and the optical image local structure representation map is 512-dimensional, the resulting path feature vector will be 768-dimensional. For a total of K pointing paths, K 768-dimensional path feature vectors will be obtained.

[0106] Step S420: Determine the feature distance between the feature vectors of any two pointing paths, and generate a feature difference matrix between each pair of all pointing paths. Each element of the feature difference matrix represents the degree of feature difference between the corresponding two paths.

[0107] Feature distance is a quantitative measure of how close two vectors are in a feature space, such as Euclidean distance, cosine distance, or Manhattan distance. For K paths, the distance between each pair of paths needs to be calculated. The results can be organized into a K×K symmetric matrix called the feature dissimilarity matrix. The element in the i-th row and j-th column of the matrix represents the distance between the feature vectors of the i-th path and the j-th path. The diagonal elements are 0 because the distance between a path and itself is 0. This matrix completely describes the pairwise similarity relationships between all paths. For example, for K=10 paths, a 10×10 matrix D will be constructed. For i and j from 1 to 10, the distance between vectors v is calculated. i and v j Euclidean distance d ij =||v i -vj ||_2, and d ij Assign values ​​to D[i][j] and D[j][i] of the matrix (because the distance is symmetric).

[0108] Step S430: Normalize the feature difference matrix by mapping all element values ​​in the matrix to a uniform range to generate a normalized feature difference matrix.

[0109] Normalization is used to eliminate the influence of different dimensions caused by different batches of data or different distance metrics, making the dissimilarity matrices comparable under different conditions. Typically, all element values ​​in the matrix are mapped to the interval [0,1]. A common method is to find the maximum and minimum values ​​of all off-diagonal elements in the matrix, and then apply a linear transformation to each element, for example, new value = (old value - minimum value) / (maximum value - minimum value). After this processing, the original maximum distance becomes 1, the minimum non-zero distance becomes 0, and the 0s on the diagonal remain 0. This yields the normalized feature dissimilarity matrix. For example, for the 10×10 distance matrix D obtained in the previous step, find the maximum value max excluding the 0s on the diagonal. D and minimum value min D Then for each element d in the matrix ij Calculate d' ij =(d ij -min D ) / (max D -min D In the resulting new matrix D', all elements are in the interval [0,1], representing the degree of difference in features after normalization between paths.

[0110] Step S440: For each pointing path, determine the cumulative value of the normalized feature difference between the path and all other paths as the total difference of the path, and mark the pointing path with the smallest total difference as the dominant path of initial feature evolution. The pointing path with the smallest total difference indicates that the features of the path have the highest similarity and representativeness with the features of other paths as a whole.

[0111] For the normalized feature dissimilarity matrix D', for each path i, calculate the sum of all elements in its row (or column) (excluding those compared to itself, i.e., diagonal elements). This sum is the total dissimilarity of path i. A smaller total dissimilarity indicates a smaller average dissimilarity between this path and all other paths, meaning its features are relatively central in the set and best represent the commonalities of other paths. Therefore, the path with the smallest total dissimilarity is marked as the dominant path for initial feature evolution. For example, for 10 paths, calculate the total dissimilarity S for each path: i=sum(D'[i][j])forj=1to10,j≠i. This yields S1,S2,...,S 10 Find the minimum value among them. Assuming S3 is the minimum, then mark path 3 as the dominant path for the initial feature evolution.

[0112] Step S450: Obtain the signal waveform depth representation map and optical image local structure representation map corresponding to the dominant path of initial feature evolution. Concatenate these two representation maps in the feature channel dimension to generate the initial path feature association map. Perform graph structure modeling on the initial path feature association map, taking each feature point in the representation map as a node in the graph and the spatial positional relationship between adjacent feature points as an edge in the graph to generate the path feature association map corresponding to the dominant path of initial feature evolution.

[0113] In one implementation, step S450 involves graph structure modeling of the initial path feature association graph, where each feature point in the graph is treated as a node, and the spatial relationship between adjacent feature points is treated as an edge, thus generating the path feature association graph corresponding to the dominant path of the initial feature evolution. Specifically, this may include the following steps S451-S455:

[0114] Step S451: Parse the dimensional information of the initial path feature association graph, obtain the height, width and number of feature channels of the representation graph, and regard the feature vector at each spatial location in the representation graph as a graph node. Each graph node contains feature values ​​corresponding to the number of feature channels.

[0115] From the initial path feature association graph, we read its height H and width W in a 3D tensor, then the total number of nodes N = H * W. Next, we extract a vector of length C (number of feature channels) at each spatial location (i, j). This vector represents the initial feature of the graph node at that location. For example, for a graph with dimensions 8×8×768, we know that H=8, W=8, C=768. Therefore, we will construct a graph containing N=64 nodes. Each node... k (where k = i * W + j) corresponds to a 768-dimensional vector v. i,j .

[0116] Step S452: Based on the spatial resolution of the representation graph, construct the adjacency relationship between nodes. For each node, take its neighboring nodes in each neighborhood direction in the representation graph as the first-order neighboring nodes of the node, and take the connection between the node and the first-order neighboring nodes as the edge in the graph.

[0117] Based on a regular grid, there are various definitions of adjacency relationships, such as 4-neighborhood or 8-neighborhood. A 4-neighborhood connects a node to its nearest nodes in the four directions above, below, left, and right. An 8-neighborhood, in addition, includes nodes in the four diagonal directions. These connections generated by adjacency relationships are the edges in the graph. The existence of an edge indicates that the two nodes it connects are close in the original space, and the features they represent may be related. For example, for a node at position (i,j), if a 4-neighborhood is used, then its neighbor set is {(i-1,j),(i+1,j),(i,j-1),(i,j+1)}. As long as the coordinates of these neighbors are within the valid range (1≤i≤H,1≤j≤W), an edge is established between this node and each of its neighboring nodes.

[0118] Step S453: Assign initial weights to each edge, calculate the distance influence coefficient based on the spatial distance between adjacent nodes, and use the distance influence coefficient as the initial weight of the edge. The distance influence coefficient is obtained by normalizing the spatial distance so that the distance influence coefficient varies in the range of 0 to 1. The smaller the spatial distance, the closer the distance influence coefficient is to 1, and the larger the spatial distance, the closer the distance influence coefficient is to 0. Generate the initial adjacency weight graph.

[0119] In a regular grid, the spatial distance between two adjacent nodes is fixed. For example, the distance between horizontally and vertically adjacent nodes is 1 (based on one grid unit), while the distance between diagonally adjacent nodes is √2. The distance influence coefficient is a value obtained by normalizing these distances. Its purpose is to make the edge weight of nodes that are spatially closer have a larger weight (closer to 1), indicating a closer relationship; conversely, the edge weight of nodes that are farther apart has a smaller weight (closer to 0). A simple mapping function is to take the reciprocal of the distance and then normalize it to the interval [0,1]. The weights of all edges constitute an initial adjacency weight graph, which is stored in the form of an adjacency matrix. The element in the u-th row and v-th column of the matrix represents the weight of the edge from node u to node v.

[0120] Step S454: Perform feature transformation on the feature vector of each graph node, mapping the original feature vector to the preset graph feature dimension space, and generating the transformed feature vector corresponding to each node.

[0121] The purpose of feature transformation is to convert the original features of nodes into a vector space more suitable for subsequent graph convolution operations. This is typically achieved through a learnable linear transformation (i.e., a fully connected layer). This transformation maps the C-dimensional original feature vector of each node to a new F-dimensional vector, where F is the predefined graph feature dimension. This transformation enhances the expressive power of the features and unifies their dimensionality. For example, each node originally has a 768-dimensional feature vector. This is achieved through a weight matrix W... transformThe transformation is performed on a fully connected layer of dimension F×768, resulting in a new F-dimensional vector for each node. If F is preset to 256, then the features of each node become 256-dimensional. This transformation is shared by all nodes.

[0122] Step S455: Based on the initial adjacency weight graph and the transformed feature vectors of all nodes, construct the Laplacian matrix of the graph, and perform a graph convolution operation between the Laplacian matrix and the transformed feature vectors to generate the updated graph feature vector for each node. Arrange the graph feature vectors of all nodes according to their original spatial positions to obtain the feature graph after graph structure modeling. The node feature vectors in the feature graph after graph structure modeling and the adjacency weight graph between nodes are used together as the path feature association graph corresponding to the dominant path of the initial feature evolution.

[0123] Graph convolution utilizes the adjacency relationships of a graph to aggregate information from neighboring nodes, thereby updating the feature representation of the central node. First, a Laplacian matrix needs to be constructed based on the initial adjacency weight graph, such as a symmetric normalized Laplacian matrix L. Then, the graph convolution operation can be represented as H'=σ(LHW_conv), where H is a matrix (dimension N×F) composed of the transformed feature vectors of all nodes, and W... conv σ is a learnable convolution kernel parameter matrix, where σ is a non-linear activation function (such as ReLU). After the convolution operation, the features of each node are fused with information from its neighboring nodes, resulting in an updated node feature vector matrix H' (dimension N x F'). Finally, the feature vectors of each node in H' are rearranged back into the H x W grid structure to obtain the feature map after graph structure modeling. This final feature map, together with the adjacency weight map (or adjacency matrix) used for convolution, constitutes the complete path feature association map of the pointing path, containing both spatial structure information and node features enhanced by the graph neural network.

[0124] In another implementation, step S450 may include the following steps S45A to S45F:

[0125] Step S45A: Extract the signal waveform depth representation map corresponding to the dominant path of initial feature evolution, evaluate the confidence level of the signal waveform depth representation map, calculate the feature consistency distribution between each feature point in the map and its neighboring feature points, and generate a confidence weight map of the signal waveform depth representation map based on the feature consistency distribution.

[0126] Graph confidence assessment aims to measure the reliability or representativeness of features at each location in a signal waveform depth representation graph. Feature consistency distribution is calculated by comparing the similarity of the feature vectors of each feature point with those of other points in its surrounding neighborhood (e.g., a 3x3 window). If a feature at a point is highly consistent with its neighbors (e.g., high cosine similarity between feature vectors), the point is considered to have high confidence because it represents a locally stable pattern; conversely, if it differs significantly from its neighbors, it may be an outlier or noise, and its confidence is low. The confidence weight graph is a two-dimensional graph with the same spatial dimensions as the original graph. The value of each pixel represents the confidence of the feature point at that location; a higher value indicates greater reliability. For example, for an 8×8×768 signal waveform depth representation graph of the dominant path, each spatial location (i,j) is traversed, and its 768-dimensional feature vector v is extracted. ij Then, within its 3x3 neighborhood (ignoring boundary cases), calculate v. ij The average cosine similarity between the feature vectors of the point and all other points in its neighborhood (excluding itself) is used as the confidence value conf_ij for that point. After traversing all positions, an 8x8 confidence weight map is obtained, with element values ​​between 0 and 1, reflecting the degree of local consistency of each feature point.

[0127] Step S45B: Extract the optical image local structure representation map corresponding to the dominant path of the initial feature evolution, evaluate the structural integrity of the optical image local structure representation map, calculate the continuity distribution of the line edge direction represented by each feature point in the map, and generate the structural integrity weight map of the optical image local structure representation map based on the continuity distribution of the line edge direction.

[0128] For a local structural characterization map of an optical image, each feature vector encodes the image structure information of a local region, particularly the orientation of the path edges. By analyzing the spatial variations of these feature vectors, the continuity of the edges can be assessed. For example, the feature similarity between each feature point and its adjacent points along the edge orientation direction can be calculated. If the feature variation along a certain direction is gradual and consistent, it indicates that the edge structure at that location is intact; if the feature changes drastically, there may be edge breaks or damage. The structural integrity weight map is also a two-dimensional graph, and its values ​​represent the degree of structural integrity represented by the features at the corresponding location. For example, for an 8×8×512 local structural characterization map of an optical image along a dominant path, first, principal component analysis is performed on each feature vector to extract its principal direction as an estimate of the edge orientation at that point. Then, for point (i,j), adjacent points (e.g., (i,j+1)) are found along its principal direction, and the Euclidean distance between the feature vectors of these two points is calculated. The smaller the distance, the more continuous the features along the orientation, and the more intact the structure. The negative correlation or inverse of this distance can be mapped to an integrity weight. After traversing all points, an 8x8 structural integrity weight map is generated.

[0129] Step S45C: The signal waveform depth characterization map and the optical image local structure characterization map are stitched together in the feature channel dimension to generate an initial stitched feature map. The confidence weight map and the structural integrity weight map are stitched together in the weight channel dimension to generate an initial stitched weight map.

[0130] Feature stitching is performed in step S450, yielding an initial stitched feature map with dimensions H×W×(C1+C2). Weight stitching involves stacking two weight maps of the same size (H×W) to form an H×W×2 tensor, called the initial stitched weight map. This multi-channel weight map provides confidence information for subsequent graph node initialization. For example, stitching an 8×8×768 signal map and an 8×8×512 optical map yields an 8×8×1280 initial stitched feature map. Simultaneously, stacking an 8×8 confidence weight map and an 8×8 structural integrity weight map yields an 8×8×2 initial stitched weight map.

[0131] Step S45D: Initialize the graph nodes of the initial spliced ​​feature map. Treat each feature point in the initial spliced ​​feature map as a node to be processed in the graph structure, extract the feature vector of each node to be processed, and assign the corresponding weight coefficient to each node to be processed according to the initial spliced ​​weight map.

[0132] Graph node initialization is the process of converting grid data into graph nodes. Each spatial location (i,j) becomes a node, and its initial feature vector is taken from the C1+C2 dimensional vector of the initial stitched feature map at that location. Simultaneously, a 2-dimensional vector [w1,w2] is extracted from the same location (i,j) in the initial stitched weight map. This vector is the weight coefficient assigned to that node, containing prior evaluation information regarding signal waveform confidence and optical image integrity, which will play a role in subsequent graph structure construction. For example, for location (3,4), its node feature vector is a 1280-dimensional v... 34 Simultaneously, a 2D weight vector w is obtained from the weight graph. 34 =[conf 34 ,integ 34 ].

[0133] Step S45E: Construct node adjacency relationships based on the spatial resolution of the initial spliced ​​feature map. For each node to be processed, search for other nodes to be processed within its preset neighborhood. The searched nodes to be processed are taken as the neighboring nodes of this node. The initial connection strength between nodes is determined based on the combination of spatial distance and weight coefficient between nodes.

[0134] When constructing adjacency relationships, the edge weights (i.e., initial connection strength) are no longer based solely on spatial distance, but rather incorporate the node weight coefficients. For example, for nodes u and v, the spatial distance between them is d. The initial connection strength can be defined as a combination of the spatial distance influence coefficient and the similarity or product of the weight coefficients of the two nodes. For example, connection strength = (1 / d)*(wu1*wv1+wu2*wv2) or its normalized form. Based on this, even if two nodes are spatially close, if their confidence or integrity is low, the connection strength between them will decrease accordingly, thereby reducing the impact of low-quality features in subsequent information transmission. Conversely, two spatially distant nodes with high weights may also establish a connection. For example, for nodes u and v, the spatial distance is d. euc Their respective weight vectors are w u and w v A weighted harmonic factor α = min(w) can be calculated. u [0],w v [0])*min(w u [1],w v [1]), representing the lowest confidence level of both aspects. Then the initial connection strength s uv =(1 / d euc )*α. Calculate this strength for all node pairs within a preset neighborhood (e.g., a range where Manhattan distance <= 2) to obtain a weighted adjacency relationship.

[0135] Step S45F: Based on the feature vector of each node to be processed, the corresponding weight coefficient, and the initial connection strength between nodes, construct an initial graph structure with the node feature vector as the node attribute and the initial connection strength as the edge attribute, and use the initial graph structure as the path feature association graph corresponding to the dominant path of the initial feature evolution.

[0136] Finally, all the information is integrated into a complete graph data structure. This graph contains a set of nodes V, where each node v∈V carries its 1280-dimensional feature vector as a node attribute, along with a 2-dimensional weight coefficient as the node's metadata. It also contains a set of edges E, where each edge e∈E connects two nodes and carries a scalar value (initial connection strength) as an edge attribute. This rich initial graph structure, with node and edge weights, is the final generated path feature association graph. It provides a more powerful and flexible data representation for subsequent defect identification than a simple regular grid. For example, the final path feature association graph is a graph object G=(V,E), where |V|=64, each node has 1280-dimensional features and 2-dimensional weights; |E| is determined by the neighborhood search result, and each edge has a floating-point attribute representing the connection strength.

[0137] Step S500: Determine the distribution of defect categories and defect locations in the circuit board to be tested based on the path feature association map, and generate test optimization instructions containing test point identifiers and test timing adjustment identifiers based on the defect category distribution and defect location distribution. Transmit the test optimization instructions to the circuit board test equipment to perform dynamic switching operations of the test process.

[0138] In one implementation, step S500 may specifically include the following steps S510 to S560:

[0139] Step S510: Perform graph decomposition on the path feature association graph, decompose the path feature association graph into a linear combination of multiple base graphs, extract the feature pattern vector corresponding to each base graph, and perform similarity matching between each feature pattern vector and the template in the pre-stored defect category feature template library.

[0140] In one implementation, step S510 may specifically include the following steps S511 to S516:

[0141] Step S511: Use the path feature association graph as the target graph to be decomposed, initialize multiple base graphs and corresponding combination coefficient graphs. The dimension of the base graph is the same as the row dimension of the path feature association graph, and the dimension of the combination coefficient graph is the same as the column dimension of the path feature association graph.

[0142] This step sets initial values ​​for the decomposition operation. The path feature association graph is considered as a matrix X with dimensions R×C, where R is the number of rows (e.g., the number of graph nodes after a certain sorting) and C is the number of columns (e.g., the dimension of each node's feature vector). The number of base graphs to be decomposed is set to K. K base graph matrices W are initialized. k Each W k The dimension is RxD, and there are K combination coefficient spectrum matrices H. k Each H k The dimension of X is D x C. Here, D is an intermediate dimension, typically smaller than R and C. The goal is to approximate X as all W... k With H k Sum of products: X ≈ Σ(W) k *H k Initialization typically uses random numbers or is based on some heuristic rule.

[0143] Step S512: With the base map fixed, update the element values ​​in the combination coefficient map by minimizing the reconstruction deviation between the target map and the base map combined with the combination coefficient map.

[0144] Fix all W k Keeping it unchanged, compare X with the current W. k The gap is used as the optimization objective, and H is adjusted accordingly. k To minimize this gap. Reconstruction bias is often represented by the Frobenius norm, i.e., ||X-Σ(W k *H k )|| F Update H k When this is the case, gradient descent or its variants can be used. Calculate the objective function with respect to H. k The gradient is calculated, and then H is updated in the opposite direction of the gradient. k The value of makes the reconstruction deviation gradually decrease.

[0145] Step S513: With the combination coefficient spectrum fixed, update the element values ​​in the base spectrum by minimizing the reconstruction deviation between the target spectrum and the base spectrum combined with the combination coefficient spectrum.

[0146] Now fix all H k Unchanged, and still with the objective of minimizing reconstruction bias, for W k Update. Calculate the objective function with respect to W. k The gradient, and adjust W accordingly. k The element value.

[0147] Step S514: Repeat the operations of updating the combination coefficient map when the base map is fixed and updating the base map when the combination coefficient map is fixed, until the reconstruction deviation between the target map and the reconstructed map formed by combining the base map and the combination coefficient map meets the preset deviation convergence condition.

[0148] By iterating through steps S512 and S513 multiple times, W is continuously and alternately optimized. k and H k In each iteration, the reconstruction deviation gradually decreases. When the reconstruction deviation falls below a pre-set threshold, or when the decrease in deviation over multiple consecutive iterations falls below another threshold, the preset deviation convergence condition is considered met, and the iteration stops. At this point, W... k and H k That is the final decomposition result.

[0149] In one implementation, step S514 may specifically include the following steps S5141~S5145:

[0150] Step S5141: Generate a reconstructed map based on the current base map and the current combination coefficient map, and determine the difference between the target map and the reconstructed map as a measure of the reconstruction deviation.

[0151] In the current iteration round, use the current W. k and H k According to formula X recon =Σ(W k *H k The reconstructed graph is calculated. Then, the target graph X and the reconstructed graph X are compared. recon The difference between them, for example, is calculated as the Frobenius norm of the difference between the two, and used as a measure of the current reconstruction bias.

[0152] Step S5142: Determine whether the current reconstruction deviation metric meets the preset deviation convergence condition. If it does, stop the iteration and use the current base map spectrum and combination coefficient map spectrum as the final decomposition result.

[0153] The deviation value calculated in step S5141 is compared with a preset threshold. If the deviation value is less than the threshold, or the maximum number of iterations has been reached, the convergence condition is considered met. The iteration stops, and the current W is set. k and H k The final output is the result of the graph decomposition.

[0154] Step S5143: If the current reconstruction deviation metric does not meet the preset deviation convergence condition, determine the update direction of the combined coefficient map according to the difference status, and update the element values ​​in the combined coefficient map according to the update direction.

[0155] If the convergence condition is not met, continue optimization. First, fix the base map W. k Calculate the objective function with respect to the spectrum of combination coefficients H. k The gradient. The gradient direction indicates the direction in which the bias increases the most, and therefore its opposite direction is the direction in which the bias decreases. Following this opposite direction, H is adjusted with a certain step size (learning rate). k The value of .

[0156] Step S5144: Based on the updated combination coefficient map, redetermine the differences between the target map and the reconstructed map formed by combining the updated combination coefficient map with the base map, and determine the update direction of the base map based on the new differences, and update the element values ​​in the base map according to the update direction.

[0157] Use the H updated in step S5143 k Then, recalculate the reconstructed map and bias. Then, this time, fix H. k Calculate the objective function with respect to the basis spectrum W k The gradient of W is calculated, and the gradient is applied in the opposite direction to W. k Update.

[0158] Step S5145: Use the updated base map and combination coefficient map to determine the metric of reconstruction deviation again, and repeat the above direction determination and map update process until the metric of reconstruction deviation meets the preset deviation convergence condition or reaches the preset upper limit of the number of iterations.

[0159] Complete the work on W k and H k After one round of updates, return to step S5141, recalculate the deviation using the updated parameters, and proceed to the next round of iteration. This process is repeated until the deviation converges or the preset maximum number of iterations is reached.

[0160] Step S5145: Extract column vectors from the updated base map spectrum, take each column of each base map spectrum as a feature pattern vector, and normalize each feature pattern vector to obtain a set of normalized feature pattern vectors.

[0161] When the iteration stops, the final base map set {W} is obtained. k}. Each base map W k Given an RxD matrix, each column of this matrix, i.e., a column vector of length R, is extracted as a feature pattern vector. Based on this, each basemap contributes D feature pattern vectors. The column vectors of all basemaps are then aggregated to obtain a set of feature pattern vectors. Finally, each vector in the set is normalized, for example, its length is scaled to 1, to facilitate subsequent similarity comparisons.

[0162] Step S5146: Use the normalized set of feature pattern vectors as the feature pattern vectors extracted by the graph decomposition operation.

[0163] The normalized vector set obtained in step S5145 is used as the final output of the graph decomposition operation in step S510.

[0164] Step S520: The identifier of the defect category template corresponding to the feature pattern vector with similarity exceeding the preset matching threshold is taken as the defect category corresponding to the path, and the influence intensity distribution of the defect category on the circuit board to be detected is determined according to the weight distribution of the feature pattern vector in the path feature association map.

[0165] For each feature pattern vector successfully matched in step S510, if its similarity to a certain defect category template exceeds a preset threshold, the region represented by that feature pattern vector is considered to contain that type of defect. The identifier of the defect category template (e.g., "short circuit")... 001 ) was recorded. Furthermore, during the decomposition process, each base map W k Each has a corresponding combination coefficient spectrum H k H k The element values ​​in the matrix reflect the contribution intensity of the mode represented by the base map at different positions in the original map. By combining W... k and H k This allows us to reconstruct the influence intensity of the defect pattern at various spatial locations in the original map, forming a distribution of the influence intensity of defect categories. For example, if feature pattern vector v3 successfully matches the template "poor weld joint," with a similarity of 0.85, exceeding the threshold of 0.8, then "poor weld joint" can be considered a defect category for that region. Simultaneously, we can examine the base map W to which v3 belongs. k and its corresponding combination coefficient H k By calculating W k *H k An intensity map of the same size as the original spectrum can be obtained, where the value at each location represents the intensity of the "solder joint cold solder joint" mode at that location.

[0166] Step S530: Analyze the spatial location information of each graph node in the path feature association graph, map the graph node coordinates back to the original physical coordinates of the circuit board, and generate a defect category distribution graph and a defect location distribution graph based on the influence intensity of the defect category corresponding to each graph node.

[0167] Each node in the path feature association map corresponds to a specific physical region on the original circuit board. During map construction in step S450, the nodes correspond one-to-one with their spatial locations in the original image or waveform map. Therefore, by looking up the mapping relationship recorded during map construction, the coordinates of each map node (e.g., the row and column of the node in an 8x8 grid) can be converted back to the original physical coordinates on the circuit board (e.g., coordinate values ​​in micrometers or millimeters). Then, the influence intensity values ​​of various defects obtained from step S520 at each node are used as attributes at that physical location. This ultimately generates two results: a defect category distribution map, which may be a multi-channel map where each channel corresponds to a defect category, and the value of each pixel on the map represents the intensity of that type of defect at that location; and a defect location distribution map, which may be a list or a set of coordinate points directly indicating the specific location of the defect. For example, the coordinates of node (3,4) in the 8×8 grid are mapped back to the physical coordinates on the circuit board (x=15.2mm, y=23.8mm), and the influence intensity value of 0.75 for "solder joint cold solder joint" at that node is assigned to that coordinate point. This process is repeated for all nodes to obtain a heat map of defect distribution covering the entire circuit board.

[0168] Step S540: Extract all defect category identifiers from the defect category distribution map, and determine the corresponding test priority level according to the influence intensity distribution range of each defect category. The test priority level corresponding to the defect category with the highest upper limit of the influence intensity distribution range is determined as the highest test priority level. The influence intensity distribution range is obtained by dividing the influence intensity value of the defect category into the total influence intensity value of all defect categories.

[0169] This step is used to prioritize the testing of different defects. First, the types of defects, such as "short circuit," "cold solder joint," and "impedance anomaly," are identified from the defect category distribution map. Then, for each defect, its influence intensity values ​​at all locations are summarized to form an intensity distribution. This distribution can be an interval, for example, from minimum to maximum value. Comparing this interval with the total intensity value of all defects yields a relative proportion. For example, the total influence intensity (the sum of the intensities of all defects) is 100. The intensity distribution interval for "short circuit" is [20, 40], for "cold solder joint" it is [10, 25], and for "impedance anomaly" it is [5, 15]. Based on the upper limit of the intensity interval, the defect categories are prioritized: "short circuit" (40), with the highest upper limit, is assigned the highest testing priority level, such as priority 1; followed by "cold solder joint" (25), priority 2; and finally "impedance anomaly" (15), priority 3. The defect with the highest upper limit of the influence intensity distribution interval means that its most severe area has the highest proportion of defect energy in the entire board, and therefore requires the highest priority.

[0170] Step S550: Extract all defect location coordinates from the defect location distribution map, sort the defect location coordinates according to the test priority level, generate a test point sorting sequence, and generate a test timing adjustment identifier containing the test point identifier based on the test point sorting sequence.

[0171] This step associates defect locations with test points and generates executable sorting instructions. First, the physical coordinates of each defect are obtained from the defect location distribution map. Then, the test points closest to these physical coordinates are found, or these coordinates are directly used as new test points. Next, all defect locations are sorted according to the test priority level determined in step S540: defect locations belonging to the highest priority level are placed at the beginning of the test sequence, and within the same level, they can be further sorted according to their impact intensity. This generates a test point sorting sequence. The test timing adjustment identifier is the encoding of this new sorting rule; for example, it can be an instruction string instructing the device to "test the first N points in sequence S first." For example, based on the defect location distribution, 5 locations are diagnosed as having "short circuit" defects, and they are assigned to priority 1. Another 3 locations are "cold solder joints," with priority 2. The generated test point sorting sequence would first list the test point identifiers of the 5 short circuit points, and then list the identifiers of the 3 cold solder joint points. The test timing adjustment identifier can be a JSON object {"priority";} sequence ":["P 001 ","P 002 ","P 003 ","P 004 ","P 005 ","P 006 ","P 007 ","P 008 "]}.

[0172] Step S560: Encapsulate the test priority level, test point sorting sequence, and test timing adjustment flag to generate a test optimization instruction. The test optimization instruction is used to instruct the circuit board test equipment to rearrange the test timing of the test points according to the test timing adjustment flag, and to focus on repeating the test on the defect location coordinates with the highest test priority level.

[0173] Finally, all information is packaged into a final instruction. The test optimization instruction is a structured data packet containing the definition of test priority levels, the specific test point sequence, and timing adjustment flags. This instruction is sent to the circuit board testing equipment via the network or interface. The equipment's control system parses the instruction and reconfigures its test program: First, tests will be executed according to the "test point sequence," meaning higher-priority points will be tested first. Second, for the highest-priority test points, the instruction may also include a retest count flag, instructing the equipment to automatically jump back to these highest-priority points for one or more additional retests after completing a round of testing all points, to ensure the reliability of the test results. For example, the generated test optimization instruction might be: {"priority_levels":{"1":"short circuit","2":"cold solder joint"},"test sequence ":["P 001 ","P 002 ",...,"P 008 "],"retest high_priority ":true,"retest count ":2}. After receiving the instruction, the test equipment will follow P 001 To P 008 The tests were conducted in sequence, and immediately after all 8 points were tested, P was... 001 To P 005 These five short-circuit points were tested a second time.

[0174] This application provides a computer-readable storage medium storing computer-executable instructions or a computer program. When the computer-executable instructions or the computer program are executed by a processor, the processor will execute the test data analysis method for circuit board testing provided in this application, for example, such as... Figure 3 The test data analysis method applied to circuit board testing is shown.

[0175] In some embodiments, the computer-readable storage medium may be a read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, magnetic surface memory, optical disk, or CD-ROM, etc.; or it may be a device that includes one or any combination of the above-mentioned memories.

[0176] The above description is merely an embodiment of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, and improvements made within the spirit and scope of this application are included within the scope of protection of this application.

Claims

1. A test data analysis method applied to circuit board testing, characterized in that, include: Obtain the initial test response set of the circuit board to be tested, which includes the electrical signal response waveform sequence collected for each test point on the circuit board and the regional optical scan image of the corresponding test point. The initial test response set is subjected to preliminary differentiation processing based on response characteristics. According to the waveform contour fluctuation trend of the electrical signal response waveform sequence and the image gray level distribution of the regional optical scanning image, a set of pointing marks to be analyzed corresponding to each test point is generated. A pre-set test data multi-path exploration model is invoked to perform path-independent mining operations on the set of directional markers to be analyzed, generating a signal waveform depth characterization map and an optical image local structure characterization map corresponding to each directional path. Specifically, this includes: inputting the set of directional markers to be analyzed into the path allocation layer of the test data multi-path exploration model; the path allocation layer creates a corresponding number of independent data processing channels based on the number of regional directional markers contained in the set of directional markers, with each independent data processing channel corresponding to one directional path; in each independent data processing channel, extracting the electrical signal response waveform sequences of all test points within the adjacent area of ​​the directional point indicated by the corresponding regional directional marker; combining the extracted electrical signal response waveform sequences according to the spatial arrangement order of the test points within the adjacent area to generate a waveform sequence combination map corresponding to that directional path; and inputting the waveform sequence combination map into the test data multi-path exploration model. A signal waveform depth mining subnetwork is used to extract waveform morphology evolution features and waveform temporal continuity features from the waveform sequence combination map through multi-level feature extraction operations, generating a signal waveform depth representation map corresponding to the pointing path. In each independent data processing channel, regional optical scan images of all test points in the adjacent area of ​​the pointing point indicated by the corresponding regional pointing marker are extracted. The extracted regional optical scan images are combined according to the spatial arrangement order of the test points in the adjacent area to generate an optical image combination map corresponding to the pointing path. The optical image combination map is input into the optical image local structure mining subnetwork of the test data multi-path exploration model. Through multi-level feature extraction operations of the optical image local structure mining subnetwork, the line edge orientation features and solder joint area texture features in the optical image combination map are extracted to generate an optical image local structure representation map corresponding to the pointing path. Based on the signal waveform depth characterization map and the optical image local structure characterization map, cross-path feature comparison and screening are performed. The pointing path that meets the preset conditions is determined as the dominant path of feature evolution, and the path feature association map corresponding to the dominant path of feature evolution is generated. The defect category distribution and defect location distribution in the circuit board to be tested are determined based on the path feature association map, and a test optimization instruction containing test point identifiers and test timing adjustment identifiers is generated based on the defect category distribution and defect location distribution, and the test optimization instruction is transmitted to the circuit board test equipment.

2. The test data analysis method for circuit board testing according to claim 1, characterized in that, The initial test response aggregation set is subjected to preliminary response characteristic differentiation processing. Based on the waveform contour fluctuation trend of the electrical signal response waveform sequence and the image grayscale distribution of the regional optical scan image, a set of pointing markers to be analyzed corresponding to each test point is generated, including: Extract the electrical signal response waveform sequence of each test point, perform waveform profile trend analysis on the electrical signal response waveform sequence, determine the cumulative amplitude difference between the peak position and the trough position in each waveform sequence as the waveform profile fluctuation trend, and mark the test points whose waveform profile fluctuation trend meets the preset fluctuation trend conditions as waveform analysis target points according to the comparison results between the waveform profile fluctuation trend and the preset fluctuation trend conditions. Extract the regional optical scan image of each test point, perform grayscale level analysis on the regional optical scan image, determine the distribution range of grayscale values ​​of all pixels in the image as the image grayscale level distribution, and mark the test points whose image grayscale level distribution meets the preset grayscale level conditions as the image points to be analyzed according to the comparison results between the image grayscale level distribution and the preset grayscale level conditions. Obtain the physical layout coordinates of each test point, construct a test point layout map based on the physical layout coordinates, and mark the test points that are simultaneously marked as waveform analysis points and image analysis points as first-level points on the test point layout map, and mark the test points that are only marked as waveform analysis points or only marked as image analysis points as second-level points. The test point layout map is processed by merging adjacent regions. Points with adjacent physical layout coordinates and the same level of labeling are aggregated to generate multiple adjacent regions of point points, and a unique region pointing identifier is assigned to each adjacent region of point points. The region pointing identifier corresponding to the adjacent region of each pointing point is associated and stored with the hierarchical labeling information of all test points in that region to generate a set of pointing marks to be analyzed for each test point. The set of pointing marks to be analyzed includes the first-level pointing point adjacent region identifier and the second-level pointing point adjacent region identifier.

3. The test data analysis method for circuit board testing according to claim 2, characterized in that, The adjacent region merging process for the test point layout map involves aggregating directional points with adjacent physical layout coordinates and the same level of labeling to generate multiple adjacent directional point regions, including: Boundary tracking processing is performed on the test point layout map to extract the physical layout coordinates of each pointing point, and the spatial proximity between pointing points is calculated based on the physical layout coordinates. Pointing point pairs whose spatial proximity meets the preset proximity condition are marked as point pairs to be aggregated. Based on the points to be aggregated, an initial association graph is constructed, with each pointing point as a node in the initial association graph and the connection relationship between the pointing points corresponding to the points to be aggregated as an edge in the initial association graph, thus generating an initial association topology structure with nodes and edges. The initial associated topology is partitioned into connected subgraphs. All nodes in the initial associated topology are traversed. Starting from any unvisited node, a depth-first search is performed along the edges. All nodes that can be reached from each other through the edges are partitioned into the same connected subgraph, generating multiple sets of connected subgraphs. For each connected subgraph set, contour extraction is performed to obtain the physical layout coordinates of all pointing points in the connected subgraph set. The convex hull of all coordinates is calculated as the initial adjacent region boundary of the connected subgraph. The set of pointing points contained in the region is determined based on the initial adjacent region boundary. The initial adjacent region boundary is smoothed and corrected by removing outliers that deviate from the main contour on the boundary. The corrected adjacent region boundary is then refitted based on the remaining boundary points. At the same time, the geometric center coordinates of the region corresponding to the corrected adjacent region boundary are extracted. The corrected adjacent region boundaries, region geometric center coordinates, and the set of pointing points contained in the region are associated and stored to generate the adjacent regions of the pointing points corresponding to each connected subgraph, and a unique region pointing identifier is assigned to each adjacent region of the pointing points.

4. The test data analysis method for circuit board testing according to claim 3, characterized in that, The process involves associating and storing the corrected adjacent region boundaries, the geometric center coordinates of the regions, and the set of pointing points contained within the regions to generate the adjacent regions of the pointing points corresponding to each connected subgraph, and assigning a unique region pointing identifier to each adjacent region of the pointing points, including: Obtain the corrected adjacent region boundary corresponding to each connected subgraph, convert the corrected adjacent region boundary into a closed boundary ring structure, and perform ring filling processing on the boundary ring structure to generate a solid region mask with the boundary ring as the outline. The solid region mask is used to indicate the coverage range of the adjacent region of the pointing point in the test point layout map. Extract the coordinates of the geometric center of the region corresponding to each connected subgraph, and launch radial probe lines in multiple directions starting from the coordinates of the geometric center of the region. Record the coordinates of the intersection of each radial probe line with the corresponding corrected boundary of the adjacent region. Generate a radial span feature set of the adjacent region of the pointing point based on the distance between all the intersection coordinates and the coordinates of the geometric center of the region. For each connected subgraph, a point distribution density analysis is performed on the set of pointing points corresponding to each point. The coordinates of all points in the set of pointing points are projected onto a two-dimensional plane to construct a point distribution density map. The number and location of density peak regions are extracted from the point distribution density map as point clustering features. The radial span feature set and the point cluster feature are input into the region type discrimination unit. The region type discrimination unit jointly evaluates the multi-directional distance distribution in the radial span feature set and the peak region distribution in the point cluster feature to generate the region morphology category identifier pointing to the adjacent region of the point. Based on the region morphology category identifier, the corresponding identifier encoding template is retrieved from the preset identifier encoding library, and the identifier encoding template is combined with the numbering information of the connected subgraph to generate a unique region pointing identifier for each pointing point's adjacent region. The solid region mask, the geometric center coordinates of the region, the set of pointing points, and the unique region pointing identifier are encapsulated and stored to construct a record entry for the adjacent region of the pointing point, and all the record entries for the adjacent region of the pointing point are summarized to generate a set of record entries for the adjacent region of the pointing point.

5. The test data analysis method for circuit board testing according to claim 1, characterized in that, The signal waveform depth mining sub-network of the multi-path exploration model inputs the waveform sequence combination map into the test data. Through multi-level feature extraction operations of the signal waveform depth mining sub-network, waveform morphological evolution features and waveform temporal continuity features are extracted from the waveform sequence combination map to generate a signal waveform depth representation map corresponding to the pointing path, including: The waveform sequence combination map is subjected to first-level feature extraction. Multiple first-feature extraction kernels are used to perform feature operations with the waveform sequence combination map to generate multiple first-level feature mapping maps. Each first-level feature mapping map corresponds to the local morphological features of the waveform at different scales in the waveform sequence combination map. A feature condensation operation is performed on the multiple first-level feature maps to reduce the spatial resolution of the first-level feature maps, while retaining the significant response regions in the local morphological features of the waveform, thereby generating a condensed set of first-level feature maps. The condensed first-level feature map set is subjected to second-level feature extraction. Multiple second-level feature extraction kernels are used to perform feature operations with each condensed first-level feature map to generate multiple second-level feature maps. Each second-level feature map corresponds to the combined correlation features between different waveform local morphological features. The multiple second-level feature maps are input into the temporal continuity modeling module. The continuity unit of the temporal continuity modeling module performs continuity modeling on the feature changes along the waveform sequence direction in the second-level feature maps, and extracts the preceding and following continuity relationship of the waveform sequence in the time dimension as the waveform temporal continuity feature. The waveform timing features are fused with the second-level feature map to generate a fused feature map. The fused feature map is then subjected to global feature condensation to obtain a fixed-dimensional feature map spectrum, which serves as the signal waveform depth representation spectrum corresponding to the pointing path.

6. The test data analysis method for circuit board testing according to claim 5, characterized in that, The process involves inputting the multiple second-level feature maps into the temporal continuity modeling module. The module's continuity unit performs continuity modeling on the feature changes along the waveform sequence direction in the second-level feature maps, extracting the sequential continuity relationship of the waveform sequence in the time dimension as the waveform temporal continuity feature. This includes: Each second-level feature map is segmented according to the waveform sequence direction to generate feature slices corresponding to multiple time steps. Each feature slice corresponds to the feature representation of a time point in the waveform sequence. The feature slice of the first time step is input into the input gate of the receiving unit. The input gate activation process generates the input gate control signal corresponding to the memory information to be received in the current time step. The feature slice of the current time step and the hidden state of the previous time step are input into the forgetting gate of the receiving unit. The forgetting gate activation process generates a forgetting gate control signal corresponding to the proportion of memory information from the previous time step that needs to be retained. The memory cell state of the receiving unit is updated according to the input gating control signal and the forgetting gating control signal. The feature slice of the current time step and the updated memory cell state are input into the output gating of the receiving unit. The hidden state of the current time step is generated through the activation processing of the output gating. The hidden states of all time steps are stacked in chronological order to generate a hidden state sequence. The hidden state sequence is then subjected to global maximum feature extraction, and the most significant temporal sequence relationship in the entire waveform sequence is extracted as the waveform temporal sequence feature.

7. The test data analysis method for circuit board testing according to claim 1, characterized in that, The step of performing cross-path feature comparison and filtering based on the signal waveform depth characterization map and the optical image local structure characterization map, determining the pointing path that meets the preset conditions as the dominant feature evolution path, and generating the path feature association map corresponding to the dominant feature evolution path, includes: Obtain the signal waveform depth representation map and optical image local structure representation map corresponding to all pointing paths, and construct a path feature vector for each pointing path. The path feature vector is formed by feature splicing of its signal waveform depth representation map and optical image local structure representation map. Determine the feature distance between the feature vectors of any two pointing paths, and generate a feature difference matrix between each pair of all pointing paths. Each element of the feature difference matrix represents the degree of feature difference between the corresponding two paths. The feature difference matrix is ​​normalized to map all element values ​​in the matrix to a unified range, thereby generating a normalized feature difference matrix. For each pointing path, the cumulative value of the normalized feature difference between the path and all other paths is determined as the total difference of the path, and the pointing path with the smallest total difference is marked as the dominant path of the initial feature evolution. The pointing path with the smallest total difference indicates that the features of the path have the highest similarity and representativeness with the features of other paths as a whole. Obtain the signal waveform depth representation map and optical image local structure representation map corresponding to the initial feature evolution dominant path. Concatenate these two representation maps along the feature channel dimension to generate an initial path feature association map. Perform graph structure modeling on the initial path feature association map, taking each feature point in the representation map as a node in the graph and the spatial positional relationship between adjacent feature points as an edge in the graph, to generate the path feature association map corresponding to the initial feature evolution dominant path.

8. The test data analysis method for circuit board testing according to claim 7, characterized in that, The step of performing graph structure modeling on the initial path feature association graph, treating each feature point in the graph as a node and the spatial relationship between adjacent feature points as edges, generates the path feature association graph corresponding to the dominant path of the initial feature evolution, including: The dimensional information of the initial path feature association graph is analyzed to obtain the height, width and number of feature channels of the representation graph. The feature vector at each spatial location in the representation graph is regarded as a graph node, and each graph node contains feature values ​​corresponding to the number of feature channels. Based on the spatial resolution of the representation graph, the adjacency relationship between nodes is constructed. For each node, its neighboring nodes in each neighborhood direction in the representation graph are taken as the first-order neighboring nodes of the node, and the connection between the node and the first-order neighboring nodes is taken as the edge in the graph. An initial weight is assigned to each edge. The distance influence coefficient is calculated based on the spatial distance between adjacent nodes. The distance influence coefficient is used as the initial weight of the edge. The distance influence coefficient is obtained by normalizing the spatial distance so that the distance influence coefficient varies in the range of 0 to 1. The smaller the spatial distance, the closer the distance influence coefficient is to 1, and the larger the spatial distance, the closer the distance influence coefficient is to 0. An initial adjacency weight graph is generated. For each graph node's feature vector, a feature transformation is performed, mapping the original feature vector to a preset graph feature dimension space, generating the transformed feature vector for each node. Based on the initial adjacency weight graph and the transformed feature vectors of all nodes, a Laplacian matrix of the graph is constructed. The Laplacian matrix is ​​then convolved with the transformed feature vectors to generate the updated graph feature vector for each node. The graph feature vectors of all nodes are arranged according to their original spatial positions to obtain the feature graph after graph structure modeling. The node feature vectors and the adjacency weight graph between nodes in the feature graph after graph structure modeling are used together as the path feature association graph corresponding to the dominant path of the initial feature evolution.

9. A server, characterized in that, include: Memory is used to store executable instructions or computer programs. The processor, when executing computer-executable instructions or computer programs stored in the memory, implements the test data analysis method for circuit board testing as described in any one of claims 1 to 8.

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