Time-triggered Ethernet bus simulation equivalent equipment and construction method thereof

By constructing a time-triggered Ethernet bus simulation equivalent device, the simulation verification problem of the new generation manned launch vehicle bus design was solved, and the functional testing and data flow analysis of the time-triggered Ethernet bus were realized, improving the system's test coverage and reliability.

CN122027489APending Publication Date: 2026-05-12BEIJING AEROSPACE AUTOMATIC CONTROL RES INST
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Patent Information

Application Number
CN202512046506.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-31
Publication Date
2026-05-12

AI Technical Summary

Technical Problem

Existing Ethernet testing technologies cannot effectively evaluate the time-triggered Ethernet bus design of the new generation of manned launch vehicles, making it difficult to simulate and verify the rationality and correctness of information flow scheduling.

Method used

This invention provides a time-triggered Ethernet bus simulation equivalent device that simulates the communication node of a real device, listens for and records data, and enables normal and abnormal coverage testing of the system or interface protocol. It supports functions such as AS6802 synchronization process, precise timestamp marking, traffic generation, and fault injection, and meets the SAE AS6802, ARINC 664-part 7 and IEEE 802.3-2008 specifications.

Benefits of technology

It enables functional testing of time-triggered Ethernet buses, allowing for comprehensive detection of the system network, analysis of data flow design rationality, improvement of test coverage and system reliability, and data flow analysis in compliance with RFC2544 and 2889 specifications.

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Abstract

The invention provides a time-triggered Ethernet bus simulation equivalent device and a construction method thereof, the device injects a bus data stream consistent with a real system by simulating a working mode of a communication node after bus parameter configuration, and the time-triggered Ethernet bus simulation equivalent device is constructed according to information receiving and transmitting conditions in a simulation environment. And the reasonability of bus parameter configuration is subjected to physical simulation analysis, so that the correctness of bus communication is ensured. And the bus simulation equivalent equipment is used for equivalently replacing part of equipment in the TTE network, simulating real equipment to send / receive messages of other equipment in the network, monitoring and recording data in the system network, simulating network faults and application message abnormities on a network node protocol layer and above, and realizing normal and abnormal coverage test on a system or interface protocol.
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Description

Technical Field

[0001] This invention belongs to the field of network simulation and verification, and specifically relates to a time-triggered Ethernet bus simulation equivalent device. Background Technology

[0002] The new generation of manned launch vehicles adopts a unified TTE bus as its backbone network, and faces new characteristics such as large-scale site size and high network cascading hop count. Therefore, it is necessary to conduct research on the simulation and verification of this new bus. Ordinary Ethernet bus network simulation and verification capabilities are insufficient for evaluating the launch vehicle bus design and for simulating and verifying the rationality and correctness of information flow scheduling. Based on existing Ethernet testing and simulation technologies, adaptive extensions and improvements are made to develop a simulation equivalent and testing device for time-triggered Ethernet. Summary of the Invention

[0003] The purpose of this invention is to solve the problems existing in the prior art. By simulating the working mode of the communication node after bus parameter configuration, injecting a bus data stream consistent with the real system, and performing physical simulation analysis on the rationality of bus parameter configuration based on the information transmission and reception in the simulation environment, the correctness of bus communication is guaranteed.

[0004] This invention provides a time-triggered Ethernet bus simulation equivalent device, used to equivalently replace some devices in a TTE network, simulate real devices sending / receiving messages from other devices in the network, monitor and record data in the system network, simulate network faults and application message anomalies at the network node protocol layer and above, and achieve coverage testing of normal and abnormal system or interface protocols.

[0005] Main functions include:

[0006] (1) Simulation of AS6802 synchronization process;

[0007] The TTE equivalent test module needs to simulate the time synchronization process based on PCF frames.

[0008] (2) Precise timestamp marking;

[0009] The TTE equivalent test module must be able to accurately timestamp the received data frames.

[0010] (3) Traffic generation;

[0011] Supports the following traffic types: PCF frames, conforming to the SAEAS6802 standard integrity specification; TT frames, conforming to the SAEAS6802 specification; RC frames, conforming to the ARINC 664-part 7 specification; BE frames, conforming to the IEEE 802.3-2008 specification; supports traffic priority: TT>PCF>RC>BE; supports unicast and multicast for TT, RC, and BE traffic; PCF packets are fixed at 64 bytes; TT and RC traffic packets have a length range of 64-1518 bytes; BE traffic packets support a length range of 64-1518 bytes; the user data area of ​​TT, RC, and BE packets supports both automatic generation and application software setting. The automatic generation method includes four types: fixed, incremental, random, and mixed. The application software setting method involves the host computer software writing the complete frame to be sent into the module's transmission buffer.

[0012] (4) Loading network configuration;

[0013] The traffic generator supports network configuration updates, including configuration and querying. The TTE equivalent test module provides interface functions to configure module operating parameters one by one according to the module configuration register address. The module's test software provides configuration file reading and configuration register viewing and editing functions, realizing graphical module operating mode settings.

[0014] (5) Traffic capture;

[0015] The traffic generator supports frame capture based on filter templates and frame capture based on error packets. It also needs to support functions such as data frame acquisition filtering and statistical counting.

[0016] (6) Fault injection;

[0017] Faults can be artificially injected into the system network through modules. The types of faults include: injectable faults mainly include CRC errors in BE frames, frame loss, transmission redundancy control of PRP frames, inconsistency between LDSP and frame length, inconsistency between channel number, discontinuous frame sequence number, CRC errors, transmission redundancy control of TT / RC frames, discontinuous frame sequence number, CRC errors, VL time window errors, VL Bubbling errors, etc.

[0018] (7) Testing software

[0019] The testing software supports configuration of TT, RC, BE and PCF transmissions, supports saving received data as PCAP files, and supports setting and displaying data transmission and reception.

[0020] The beneficial effects of this invention are as follows:

[0021] 1. This invention adapts and improves upon existing Ethernet testing technologies to achieve functional testing of the time-triggered portion, namely the time synchronization and time-triggered communication functions specified in the SAEAS6802 standard;

[0022] 2. This invention strictly adheres to standards and technical requirements, enabling comprehensive testing of all functions and parameters of the system network. It can record physical layer data, perform analysis, and handle large-capacity data recording. It can effectively analyze the design validity and rationality of the system's data flow. The network system is subjected to data traffic that meets the RFC2544 and 2889 specifications. It can statistically analyze key indicators such as network latency and jitter, thereby enhancing test coverage and improving system reliability. Attached Figure Description

[0023] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0024] Figure 1 This is a schematic diagram of the device of the present invention. Detailed Implementation

[0025] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0026] This embodiment provides a time-triggered Ethernet bus simulation equivalent device, the schematic diagram of which is shown below. Figure 1 As shown, the construction method steps are as follows:

[0027] (1) Construction of TTE simulation nodes;

[0028] Step 1: Use the synchronization interface with the TTE virtual bus to periodically send a synchronization signal to the virtual bus, while pausing the software to wait for the confirmation signal. Once the confirmation signal is received, continue running.

[0029] Step 2: Data interaction interface with the TTE virtual bus, involving various buses, links, and interfaces;

[0030] Step 3: Connect to the TTE virtual bus control interface, receive control and status acquisition commands from the virtual bus, and reply with status information to the virtual bus.

[0031] (2) TTE virtual bus configuration;

[0032] Step 1: The simulation beat synchronization module is responsible for the transmission of synchronization signals, and the simulation connection is responsible for the source address and destination address management of data transmission;

[0033] Step 2: Real-time data parsing and real-time data monitoring are responsible for processing the interactive data of each node, including system operating status information, control commands, and fault modes.

[0034] (3) System configuration and operation;

[0035] Step 1: Number of TTE simulation nodes, configuration item software represented by the nodes, communication method between configuration items, system synchronization cycle, etc.;

[0036] Step 2: Provide a system status interface, including system running time, timing of each configuration item (ignition, takeoff, first stage flight segment, etc.), and data exchanged between each node.

[0037] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for constructing a time-triggered Ethernet bus analog equivalent device, characterized in that, Includes the following steps: (1) Construction of TTE simulation nodes; (2) TTE virtual bus configuration; (3) System configuration and operation.

2. The method for constructing a time-triggered Ethernet bus analog equivalent device according to claim 1, characterized in that, The construction of the TTE simulation node specifically includes: Step 1: Use the synchronization interface with the TTE virtual bus to periodically send a synchronization signal to the virtual bus, while pausing the software to wait for the confirmation signal. Once the confirmation signal is received, continue running. Step 2: Data interaction interface with the TTE virtual bus, involving various buses, links, and interfaces; Step 3: Connect to the control interface of the TTE virtual bus, receive commands such as control and status acquisition from the virtual bus, and reply with status information to the virtual bus.

3. The method for constructing a time-triggered Ethernet bus analog equivalent device according to claim 1, characterized in that, The TTE virtual bus configuration specifically includes: Step 1: The simulation beat synchronization module is responsible for the transmission of synchronization signals, and the simulation connection is responsible for the source address and destination address management of data transmission; Step 2: Real-time data parsing and real-time data monitoring are responsible for processing the interactive data of each node, including system operating status information, control commands, and fault modes.

4. The method for constructing a time-triggered Ethernet bus analog equivalent device according to claim 1, characterized in that, The system configuration and operation specifically include: Step 1: Number of TTE simulation nodes, configuration item software represented by the nodes, communication method between configuration items, system synchronization cycle, etc.; Step 2: Provide a system status interface, including the system running time, the timing of each configuration item, and the data exchanged between each node.

5. A time-triggered Ethernet bus analog equivalent device, characterized in that, Constructed by the construction method of any one of claims 1-4.

6. The time-triggered Ethernet bus simulation equivalent device according to claim 5, characterized in that, The device is used to equivalently replace some devices in the TTE network, simulate real devices sending and receiving messages from other devices in the network, monitor and record data in the system network, simulate network faults and application message anomalies at the network node protocol layer and above, and achieve normal and abnormal coverage testing of the system or interface protocol.

7. The time-triggered Ethernet bus simulation equivalent device according to claim 5, characterized in that, The device's functions include: AS6802 synchronization process simulation, precise timestamp marking, traffic generation, network configuration loading, traffic capture, fault injection, and test software.

8. The time-triggered Ethernet bus simulation equivalent device according to claim 7, characterized in that, The fault types in the fault injection include: CRC error of BE frame, frame loss, transmission redundancy control of PRP frame, LDSP and frame length inconsistency, channel number inconsistency, discontinuous frame sequence number, CRC error, transmission redundancy control of TT / RC frame, discontinuous frame sequence number, CRC error, VL time window error, and VL Bubbling error.

9. The time-triggered Ethernet bus simulation equivalent device according to claim 7, characterized in that, The traffic types include: PCF frames, TT frames, RC frames, and BE frames; and the traffic priority is: TT>PCF>RC>BE.

10. The time-triggered Ethernet bus simulation equivalent device according to claim 9, characterized in that, The user data area of ​​the TT frame, RC frame, and BE frame messages can be generated automatically or configured by application software.