Multi-graphics card mass production test system and test method
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- WUHAN LINGJIU MICROELECTRONICS CO LTD
- Filing Date
- 2026-01-14
- Publication Date
- 2026-05-15
Smart Images
Figure CN122044968A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of graphics card testing technology, specifically to a multi-graphics card mass production testing system and testing method. Background Technology
[0002] As a core component of a computer system, the graphics card is primarily responsible for various graphics processing and computing tasks. During the mass production phase of graphics cards, they must be placed in a complete system to simulate high-load application scenarios of real users in order to fully expose system-level defects such as compatibility, stability, and heat dissipation that may exist under complex interactions. Therefore, mass production testing is a crucial step in ensuring the reliability of graphics card products. However, the current industry-standard "one host, one graphics card" testing model, where each graphics card under test requires its own dedicated test host and is operated by testers on a per-host basis, has significant drawbacks:
[0003] The traditional "one host, one graphics card" testing architecture suffers from low resource utilization and high overall costs: Current mainstream testing solutions employ a distributed architecture of "one host, one graphics card," where each graphics card under test requires its own complete host system (including motherboard, CPU, memory, and power supply). This directly leads to a linear increase in the hardware scale of the testing system, server room space occupation, and energy consumption costs with the number of tests, resulting in low equipment utilization and extremely high purchase and maintenance costs for large-scale testing.
[0004] The multi-GPU switching process relies on manual intervention, resulting in insufficient automation and difficulty meeting mass production efficiency requirements. Even on platforms capable of connecting multiple GPUs, the switching mechanism still heavily depends on manual settings in the underlying firmware (UEFI / BIOS). Testers must interrupt the process and access the system configuration interface to perform specific operations. This method is cumbersome, requires a high level of expertise, and is prone to errors, failing to achieve continuous and fully automated testing processes and severely limiting the throughput and consistency of mass production testing.
[0005] To improve testing efficiency, the only option is to linearly increase the number of test hosts and corresponding operators, resulting in high hardware costs, large human resource requirements, low efficiency of manual operation, difficulty in ensuring consistency, and low degree of automation. Summary of the Invention
[0006] In view of the above problems, the purpose of this invention is to provide a multi-GPU mass production testing system, which aims to solve the above technical problems.
[0007] This invention provides the following technical solution:
[0008] On one hand, the multi-graphics card mass production testing system includes a test host 1, a processor 3, a PCIe link switching module 2, a display switching module 5, and a display module 6;
[0009] The PCIe link switching module is connected to the processor 3 and has multiple PCIe slots. Each PCIe slot is equipped with an in-situ detection circuit, a switching control circuit, and a reference clock circuit. The PCIe slots are connected to the same PCIe bus. The graphics card under test is inserted into the PCIe slot. The in-situ detection circuit is used to detect whether a graphics card is currently inserted in the PCIe slot. The switching control circuit is used to control the selection and switching of the graphics card. The reference clock circuit provides a reference clock signal for the selected PCIe slot.
[0010] The test host is connected to the processor and includes the driver for the graphics card under test and mass production test cases. When a specified graphics card under test is selected, the motherboard firmware program guides different types of graphics cards under test to power on and drive the display during the power-on process of the test host. At the same time, after the graphics card is powered on, the processor communicates with the test host through the first communication module to obtain the basic information of the graphics card under test and sends control commands to call the mass production test cases.
[0011] The display switching module is connected to the processor and consists of a multi-input, one-output display switcher. It receives the display switching signal output by the processor's control signal line and completes the display switching.
[0012] The processor is used to acquire the status of the PCIe link switching module and control the switching of the PCIe connection channel and the display channel of the display switching module, and communicates with the test host through the first communication module.
[0013] Furthermore, the testing system also includes a result indication module connected to the processor. The result indication module consists of an array of indicator lights, which are divided into three types: red, green, and orange. Each graphics card under test is indicated by a green indicator light to indicate that the test has passed, a red indicator light to indicate that the test has failed, and an orange indicator light to indicate that the graphics card under test is in the testing state.
[0014] Furthermore, the testing system also includes a monitoring module connected to the processor via a second communication module. The monitoring module receives instructions from the processor via the second communication module to acquire images from the display module, saves the image data of the display module when the test is completed, and updates the test data of the graphics card under test. When all graphics cards under test have been tested, a test report for all graphics cards under test is generated.
[0015] Furthermore, the display switcher includes a VGA switcher, an HDMI switcher, and a DP switcher, and each switcher is a multi-input, one-output type. The number of input channels for each type of switcher is determined according to the number of graphics cards under test. The display module consists of multiple monitors, and each monitor has a corresponding type of signal input interface according to the display interface type of the graphics card under test.
[0016] Furthermore, the display switcher controls the selection of a specified channel through high and low level signals. Specifically, the processor controls the I / O expansion chip to output different level signals through the I2C bus to switch the display channel.
[0017] Furthermore, the presence detection pin of the PCIe slot is connected to a presence detection circuit, which is a pull-up resistor to the 3.3V power supply. When no graphics card is inserted into the slot, the signal of the presence detection pin is pulled high by default. When a graphics card is inserted, the presence detection pin is connected to the slot ground pin through the graphics card, and the signal of the presence detection pin is pulled low. The presence detection pin signal level is used to determine whether the graphics card is inserted. The switching control circuit includes two field-effect transistors, which are connected to the 3.3V power supply and the 12V power supply respectively. The processor connects to the two field-effect transistors through two GPIO enable pins to control the on / off state of the field-effect transistors and provides 12V and 3.3V voltage supply to the slot through the field-effect transistors. For PCIe slots selected by the field-effect transistors, the reference clock circuit outputs a reference clock signal. For PCIe slots that are not selected due to power failure, the reference clock circuit is directly turned off.
[0018] On the other hand, the multi-GPU mass production testing method is applied to the testing system, and the testing method includes the following steps:
[0019] Step S1, Initialization
[0020] The test system is powered on and initialized, obtains the number of graphics cards under test inserted in the PCIe slots, and the specific slot where each graphics card under test is located, and starts the test upon receiving the test start signal;
[0021] Step S2: Link switching and update
[0022] Control the PCIe link to connect to the next graphics card under test, perform a power-on operation, and update the number of graphics cards under test;
[0023] Step S3: Status reading and information comparison
[0024] Read the current connection status of the graphics card and obtain the graphics card processor information. After successfully obtaining the information, compare it with the information database to determine whether the graphics card information is in the supported list and whether the display channel is within the supported quantity. If both are true, proceed to step S4; otherwise, proceed to step S5.
[0025] Step S4: Test and check the results
[0026] Control the switching of display channels, output test cases, and detect the display results of the graphics card under test and the test sample running results to obtain the test results, and proceed to step S5;
[0027] Step S5: Record the test results
[0028] Update the current test status based on the test results, record the test results, control the test result indicator light of the current graphics card under test, and determine whether the current graphics card under test has completed the test. If it has, proceed to step S6; otherwise, proceed to step S2.
[0029] Step S6, Test ends
[0030] The system outputs audio-visual signals to alert the tester that the test is complete and displays a test report. The tester then uses the test report and result indicator lights to determine the test results for each graphics card under test.
[0031] Compared with the prior art, the technical solution of this application has the following beneficial effects:
[0032] This invention proposes a multi-graphics card mass production testing system and method. By designing a dedicated test motherboard equipped with multiple PCIe slots—including a PCIe link switching module, processor, display switching module, and display module—it innovatively transforms the traditional distributed architecture of "one host, one graphics card" into an integrated testing platform of "one host for multiple graphics cards." This system can perform fully automated serial testing of dozens of graphics cards on a single host, significantly reducing the number of test hosts and personnel required, and achieving a significant improvement in testing efficiency through automation. It provides an innovative and efficient hardware foundation and system solution for graphics card mass production testing. Attached Figure Description
[0033] Figure 1 This is a schematic diagram of the multi-GPU mass production testing system provided by the present invention.
[0034] Figure 2 This is a schematic diagram of a PCIe link switching module.
[0035] Figure 3 Schematic diagram of a single PCIe slot;
[0036] Figure 4 A flowchart of the multi-GPU mass production testing method provided by the present invention. Detailed Implementation
[0037] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0038] Please see Figure 1-3This embodiment of a multi-GPU mass production testing system includes a test host 1, a processor 3, a PCIe link switching module 2, a display switching module 5, and a display module 6. The display module 6 consists of multiple monitors, each with a corresponding signal input interface based on the display interface type of the GPU under test. The processor, PCIe link switching module, and display switching module are integrated on a dedicated test motherboard.
[0039] The PCIe link switching module 2 is connected to the processor 3 and has multiple PCIe slots for inserting the graphics card under test. For example... Figure 2-3 As shown, each PCIe slot is equipped with an presence detection circuit, a switching control circuit, and a reference clock circuit, and each PCIe slot is independent. Communication-related lines are connected to the same PCIe bus through the PCIe slots. The presence detection circuit detects whether a graphics card is currently inserted in the PCIe slot, the switching control circuit controls the selection and switching of the graphics card, and the reference clock circuit provides a reference clock signal for the selected PCIe slot. In this embodiment, a specific circuit structure is as follows:
[0040] The PCIe slot's presence detection pin is connected to a presence detection circuit, which is a 10kΩ pull-up resistor pulling up to a 3.3V power supply. When no graphics card is inserted into the slot, the presence detection pin is pulled high by default. When a graphics card is inserted, the presence detection pin is connected to the slot's ground pin through the graphics card's internal circuitry. Figure 3 As shown, the signal of the presence detection pin is pulled low, so the presence detection pin signal level can be used to determine whether the graphics card is inserted. The switching control circuit includes two field-effect transistors (PMOS transistors), connected to the 3.3V and 12V power supplies respectively. The processor connects to the two PMOS transistors via two GPIO enable pins to control the on / off state of the PMOS transistors, providing 12V and 3.3V voltage supplies to the slots. For PCIe slots selected by the PMOS transistors, the reference clock circuit (the PCIe reference clock for each slot is output by the clock generation chip) outputs a reference clock signal. For PCIe slots that are not selected due to power failure, the reference clock circuit is directly turned off. Therefore, the graphics card connection switching can be controlled by outputting the GPIO enable signal and the reference clock signal.
[0041] The test host 1 is connected to the processor 3 and includes the driver for the graphics card under test (GPU) and mass production test cases. When a specified GPU is selected, the motherboard firmware program guides the different types of GPUs under test to power on and drive the display during the power-on process of the test host. Simultaneously, after the GPU powers on, the processor 3 communicates with the test host 1 through the first communication module 4 to obtain basic information about the GPU under test and sends control commands to invoke the mass production test cases. In one embodiment, the test host is an x86 architecture host, and the test host 1 and processor 3 are connected via a PCIe extension cable. The first communication module 4 includes a UART communication channel and uses a UART conversion chip CH340C to convert the processor's UART signal into a USB signal that the test host can recognize.
[0042] Here, mass production test cases include firmware testing, video memory read / write testing, graphics processing testing, and full-load capacity testing, etc., to evaluate whether the overall performance of the graphics card under test meets the requirements within the preset time of the test vector.
[0043] The display switching module 5 is connected to the processor 3 and consists of a multi-input, one-output display switcher. It receives the display switching signal output from the control signal line of the processor 3 and completes the display switching. For example, the display switcher may include a VGA switcher, an HDMI switcher, and a DP switcher, and each switcher is of the multi-input, one-output type. The number of input channels for each type of switcher is determined according to the number of graphics cards under test. In this embodiment, there are 5 graphics cards under test. For multi-input, one-output, an 8-input, one-output switcher is suitable. The VGA switcher and the HDMI switcher are both 8-input, one-output switchers. For the DP switcher, a 4-input, one-output DP switcher and a monitor supporting 2 DP input signals are selected. One DP input signal of the monitor is connected to the output port of the DP switcher, and the other DP input signal is directly connected to the 5th graphics card under test. The display module consists of multiple monitors, and the monitors have corresponding signal input interfaces according to the display interface type of the graphics cards under test. The display switcher controls the selection of a specified channel through high and low level signals. Specifically, the processor controls the I / O expansion chip (TCA9539 chip) through the I2C bus to output different level signals to the display switcher to switch display channels.
[0044] The processor 3 is used to acquire the status of the PCIe link switching module and control the switching of the PCIe connection channel and the display channel of the display switching module. It communicates with the test host through the first communication module. The processor model is STM32G030C8T6. It acquires the status of the PCIe link switching module through GPIO, controls the switching of the PCIe connection channel and the display channel, and implements the communication module function through the UART interface.
[0045] The testing system also includes a result indication module 7 connected to the processor 3. The result indication module 7 consists of an array of indicator lights, which are divided into three types: red, green, and orange. Each graphics card under test is indicated by a green indicator light to indicate that the test has passed, a red indicator light to indicate that the test has failed, and an orange indicator light to indicate that the graphics card under test is in the testing state.
[0046] The testing system also includes a monitoring module 8 connected to the processor 3 via a second communication module 9. The monitoring module 8 receives instructions from the processor 3 through the second communication module 9 to acquire images from the display module, saves the display module image data upon test completion, and updates the test data of the graphics cards under test. When all graphics cards under test have completed testing, a test report for all graphics cards under test is generated. The second communication module 9 is identical to the first communication module, featuring a UART communication channel. It uses a UART converter chip CH340C to convert the processor's UART signal into a USB signal recognizable by the monitoring module 8. The monitoring module 8 consists of an X86 monitoring host and a high-definition camera. When testing the graphics cards under test, the processor 3 sends instructions via the UART interface to control the X86 monitoring host to acquire images, save the display module image data upon test completion, and update the test data of the graphics cards under test. When all graphics cards under test have completed testing, the processor sends instructions to switch the display output to the X86 monitoring host and controls the X86 monitoring host to generate test reports for all graphics cards under test. The test report includes the number of graphics cards under test, basic information of each graphics card, test results and screenshots of the test results, and photos of the test results, enabling testers to quickly identify and confirm the test results of each graphics card under test.
[0047] Based on the above testing system, such as Figure 4 As shown, this embodiment also provides a multi-GPU mass production testing method, applied to the testing system, the testing method including the following steps:
[0048] Step S1, Initialization
[0049] The test system powers on and initializes, acquiring the number of graphics cards under test inserted in the PCIe slots and their specific slot locations. Upon receiving the test start signal, the test begins. The graphics cards in the PCIe slots are connected to the test host via PCIe. The number of graphics cards under test and their slot locations are determined by reading the presence signal status of each PCIe interface. This step initializes the system and acquires the current number of graphics cards under test and their slot locations. After receiving the test start signal, the test proceeds to step S2.
[0050] Step S2: Link switching and update
[0051] Control the PCIe link to connect to the next graphics card under test, perform a power-on operation, and update the number of graphics cards under test.
[0052] The preceding steps have determined the number of graphics cards and their slots to be inserted. This step switches the graphics card connections sequentially according to the testing order. The first connection is made for the first graphics card. After each test, this step switches to select the next graphics card to be tested. The PCIe slot interface provides 3.3V and 12V power to the graphics card, as well as a PCIe interface protocol reference clock signal. Power is supplied to the current PCIe slot, and a reference clock signal is provided. Power is cut off to the graphics cards in other slots, and no reference clock signal is provided, thus ensuring that only one graphics card is connected to the test host. This mechanism can be extended to the testing process for each graphics card, thereby achieving automated testing of multiple graphics cards.
[0053] Step S3: Status reading and information comparison
[0054] Read the current connection status of the graphics card and obtain the graphics card processor information. After successfully obtaining the information, compare it with the information database to determine whether the graphics card information is in the supported list and whether the display channel is within the supported quantity. If both are true, proceed to step S4; otherwise, proceed to step S5.
[0055] In this embodiment, multiple different models of graphics cards can be selected for the test. The manufacturers and models of the graphics card processors and the display interfaces can be different. By reading the firmware information of the graphics card under test, relevant information is obtained to determine whether the processor manufacturer and model are in the information database support list and whether the number of display interfaces exceeds the maximum number of display channels supported by the system.
[0056] Step S4: Test and check the results
[0057] Control the switching of display channels, output test cases, and detect the display results of the graphics card under test and the test sample running results to obtain the test results, and then proceed to step S5.
[0058] In this step, display channel information is obtained by reading the information of the graphics card under test. The test system controls the corresponding interface type to open a specified number of display channels according to the read number of display channels and display interface type. The test system obtains the test results of the test cases by communicating with the test host. After running the test cases, the test host generates a test result file and reads the latest result file to obtain the test results of the current graphics card under test.
[0059] Step S5: Record the test results
[0060] Update the current test status based on the test results, record the test results, control the test result indicator light of the graphics card under test, and determine whether the graphics card under test has completed the test. If it has, proceed to step S6; otherwise, proceed to step S2.
[0061] Test results include the serial number of the graphics card under test, processor manufacturer, processor model, whether the test was completed normally, communication read results, reasons for test failure, screenshots of test results, and photos of test results. Recording this data is helpful for analyzing the production status of mass-produced graphics cards. At the same time, when the graphics card malfunctions during use by the user, the data helps to trace the initial state of the graphics card, making the process executable and the results traceable.
[0062] Step S6, Test ends
[0063] The system outputs audio and visual signals to alert the tester that the test is complete and displays a test report. The tester then uses the test report and test result indicator lights to determine the test results for each graphics card under test.
[0064] This invention constructs a novel mass production testing solution for multiple graphics cards by designing a dedicated test motherboard integrating multiple PCIe lanes and a test system with deep collaborative intelligent scheduling and control. The invention aims to eliminate manual intervention in the testing process, enabling fully automated continuous identification, switching, and testing of multiple graphics cards under test on a single host machine. This fundamentally improves hardware resource utilization, test automation, and system management efficiency, significantly reducing the overall cost of large-scale mass production testing.
[0065] In summary, the following effects can be achieved through this invention:
[0066] I. Reduce testing costs and improve hardware resource utilization. This invention designs a dedicated hardware platform that supports multiple graphics cards, enabling a single test host to test dozens of graphics cards sequentially, achieving centralized time-sharing reuse of core hardware resources. This fundamentally changes the traditional "one host, one graphics card" model where the number of devices increases linearly with the scale of testing, thereby significantly reducing the number of hardware purchases, investment in supporting equipment, and data center space and energy consumption, significantly reducing the overall cost of large-scale testing.
[0067] II. Achieving Full Automation and Continuity in Mass Production Testing Processes, Improving Testing Efficiency. This invention, through a deeply integrated hardware and software control system, achieves automatic identification, switching, and initialization among multiple graphics cards. This process requires no manual modification of underlying firmware settings or physical intervention by testers, reducing operational complexity and the risk of human error. More importantly, it eliminates the inevitable process interruptions in traditional switching methods, enabling unattended, continuous, and automatic execution of testing tasks, thereby greatly improving testing efficiency.
[0068] III. Optimizing the overall architecture to improve system manageability and maintainability. Based on the aforementioned hardware and automation capabilities, this invention constructs a highly integrated multi-GPU mass production testing system and methodology. All test scheduling, status monitoring, data collection, and diagnostics can be centrally controlled through a unified interface, changing the cumbersome operation and maintenance situation under the previous distributed architecture. This simplifies system management workload, improves the speed and accuracy of operation and maintenance response, and provides reliable assurance for large-scale, long-term stable mass production testing.
[0069] It should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0070] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.
Claims
1. A multi-GPU mass production testing system, characterized in that: The test system includes a test host, a processor, a PCIe link switching module, a display switching module, and a display module; The PCIe link switching module is connected to the processor and has multiple PCIe slots. Each PCIe slot is equipped with an in-situ detection circuit, a switching control circuit, and a reference clock circuit. The PCIe slots are connected to the same PCIe bus. The graphics card under test is used to be inserted into the PCIe slot. The presence detection circuit is used to detect whether a graphics card is currently inserted into the PCIe slot. The switching control circuit is used to control the selection and switching of the graphics card. The reference clock circuit provides a reference clock signal for the selected PCIe slot. The test host is connected to the processor and includes the driver for the graphics card under test and mass production test cases. When a specified graphics card under test is selected, the motherboard firmware program guides different types of graphics cards under test to power on and drive the display during the power-on process of the test host. At the same time, after the graphics card is powered on, the processor communicates with the test host through the first communication module to obtain the basic information of the graphics card under test and sends control commands to call the mass production test cases. The display switching module is connected to the processor and consists of a multi-input, one-output display switcher. It receives the display switching signal output by the processor's control signal line and completes the display switching. The processor is used to acquire the status of the PCIe link switching module and control the switching of the PCIe connection channel and the display channel of the display switching module, and communicates with the test host through the first communication module.
2. The multi-GPU mass production testing system as described in claim 1, characterized in that: The testing system also includes a result indication module connected to the processor. The result indication module consists of an array of indicator lights, which are divided into three types: red, green, and orange. Each graphics card under test is indicated by a green indicator light to indicate that the test has passed, a red indicator light to indicate that the test has failed, and an orange indicator light to indicate that the graphics card under test is in the testing state.
3. The multi-GPU mass production testing system as described in claim 2, characterized in that: The testing system also includes a monitoring module connected to the processor via a second communication module. The monitoring module receives instructions from the processor via the second communication module to acquire images from the display module, saves the image data of the display module when the test is completed, and updates the test data of the graphics card under test. When all graphics cards under test have been tested, a test report for all graphics cards under test is generated.
4. The multi-GPU mass production testing system as described in claim 3, characterized in that: The display switcher includes a VGA switcher, an HDMI switcher, and a DP switcher, and each switcher is a multi-input, one-output type. The number of input channels for each type of switcher is determined according to the number of graphics cards under test. The display module consists of multiple monitors, and each monitor has a corresponding type of signal input interface according to the display interface type of the graphics card under test.
5. The multi-GPU mass production testing system as described in claim 4, characterized in that: The display switcher controls the selection of a specified channel through high and low level signals. Specifically, the processor controls the I / O expansion chip to output different level signals through the I2C bus to switch the display channel.
6. The multi-GPU mass production testing system as described in claim 1, characterized in that: The PCIe slot's presence detection pin is connected to a presence detection circuit, which is a pull-up resistor to the 3.3V power supply. When no graphics card is inserted into the slot, the presence detection pin signal is pulled high by default. When a graphics card is inserted, the presence detection pin is connected to the slot's ground pin through the graphics card's internal circuitry, and the presence detection pin signal is pulled low. The presence detection pin signal level is used to determine whether the graphics card is inserted. The switching control circuit includes two MOSFETs, connected to the 3.3V and 12V power supplies respectively. The processor connects to the two MOSFETs via two GPIO enable pins to control the switching of the MOSFETs, providing 12V and 3.3V voltage supplies to the slots. For PCIe slots selected by the MOSFETs, the reference clock circuit outputs a reference clock signal; for PCIe slots that are not selected due to power failure, the reference clock circuit is directly turned off.
7. A multi-GPU mass production testing method, applied to the testing system according to any one of claims 1-6, the testing method comprising the following steps: Step S1, Initialization The test system is powered on and initialized, obtains the number of graphics cards under test inserted in the PCIe slots, and the specific slot where each graphics card under test is located, and starts the test upon receiving the test start signal; Step S2: Link switching and update Control the PCIe link to connect to the next graphics card under test, perform a power-on operation, and update the number of graphics cards under test; Step S3: Status reading and information comparison Read the current connection status of the graphics card and obtain the graphics card processor information. After successfully obtaining the information, compare it with the information database to determine whether the graphics card information is in the supported list and whether the display channel is within the supported quantity. If both are true, proceed to step S4; otherwise, proceed to step S5. Step S4: Test and check the results Control the switching of display channels, output test cases, and detect the display results of the graphics card under test and the test sample running results to obtain the test results, and proceed to step S5; Step S5: Record the test results Update the current test status based on the test results, record the test results, control the test result indicator light of the current graphics card under test, and determine whether the current graphics card under test has completed the test. If it has, proceed to step S6; otherwise, proceed to step S2. Step S6, Test ends The system outputs audio and visual signals to alert the tester that the test is complete and displays a test report. The tester then uses the test report and test result indicator lights to determine the test results for each graphics card under test.