MCU chip communication fault intelligent diagnosis method, device, equipment and medium
By constructing a nonlinear hypersurface decision boundary using a multi-task deep learning model, the efficiency and accuracy issues of identifying potential signal quality problems in MCU testing are solved, enabling multi-dimensional quantitative evaluation of signal quality and improving the reliability and testing efficiency of MCU chips.
Patent Information
- Application Number
- CN202610128240.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-29
- Publication Date
- 2026-05-15
AI Technical Summary
Existing MCU testing technologies struggle to efficiently and accurately identify potential signal quality issues in communication interfaces within a limited timeframe, especially for chips in a suboptimal state. Furthermore, existing intelligent diagnostic methods lack the ability to predict and quantify the physical parameters of signals.
A multi-task deep learning model is adopted to train the fault detection and parameter prediction model through simulation dataset, extract deep features of communication waveforms, construct nonlinear hypersurface decision boundaries, quantify communication security margin, and realize multi-dimensional and quantifiable evaluation of signal quality.
It effectively identifies sub-healthy chips in a critical state, reduces the false negative rate, improves the reliability and testing efficiency of MCU chips, and provides quantitative signal quality assessment results.
Smart Images

Figure CN122044974A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of circuit testing technology, and in particular to a method, apparatus, device, and medium for intelligent diagnosis of communication faults in MCU chips. Background Technology
[0002] Microcontrollers (MCUs) are widely used in industrial detection and control. The signal quality of their communication interfaces (such as UART, I²C, SPI, etc.) directly affects the functional reliability of the system. For example, in the detection and control of industrial interferometric images, unreliable communication interfaces can cause bit errors, leading to a decrease in image quality and even causing the image sensor to malfunction. In engineering practice, test systems typically need to verify the functionality of communication interfaces within a limited test time, while simultaneously identifying potential signal quality issues such as timing jitter, voltage overshoot, and insufficient noise margin. This places high demands on the efficiency, accuracy, and intelligence of communication interface testing.
[0003] In current MCU testing, a typical approach is to perform interface function verification based on automated test equipment (ATE). For example, an existing ATE-based MCU testing method and system designs test programs and hardware interfaces on the ATE platform to perform automated functional testing on the MCU chip and provide pass / fail results based on preset conditions. This type of method helps improve testing efficiency, but because it only compares levels at a small number of sampling points, it is difficult to reflect the detailed characteristics of the signal waveform. It has poor sensitivity to "sub-healthy" samples in a critical functional state, such as chips with slightly degraded edges that have not yet triggered threshold switching, posing a risk that potentially problematic chips may be judged as qualified. Another common approach is to use a high-bandwidth oscilloscope to manually analyze the MCU communication waveform to discover deeper signal quality problems that are difficult to detect in a timely manner during ATE testing. Operators usually judge whether there are potential risks in the interface by observing waveform overshoot, ringing, rise time, jitter, and other characteristics, combined with experience. However, this type of method relies heavily on the subjective experience of engineers, has low analysis efficiency, and is difficult to perform comprehensive and consistent automated diagnosis of massive waveform data under large-scale chip testing or long-term operating conditions.
[0004] To address the aforementioned trade-off between efficiency and accuracy, the industry has begun to explore data-driven intelligent diagnostic technologies. Existing methods utilize big data analytics to build fault detection and location models. For example, Chinese invention patent CN120197067A discloses a digital chip fault detection method and system based on big data, which determines the type and root cause of chip faults by collecting historical failure data and extracting multi-dimensional features. Another approach employs deep learning, treating the collected signals as images or time series inputs to a classification network, directly outputting fault labels. However, most of these data-driven methods remain "black box" models, providing only qualitative classification or location results. They lack the ability to regress and predict signal physical parameters (such as overshoot amplitude and jitter) and do not offer a quantitative safety margin reflecting the distance of the signal from the communication failure boundary.
[0005] In view of this, there is an urgent need to provide a method that can provide a multi-dimensional, interpretable, and quantifiable in-depth evaluation of signal quality, and can resolve the current contradictions in the field of MCU testing. Summary of the Invention
[0006] To overcome the problems existing in related technologies, this disclosure provides an intelligent diagnosis method, apparatus, device and medium for MCU chip communication faults, so as to solve the technical problems in related technologies.
[0007] This specification provides one or more embodiments of an intelligent diagnostic method for communication faults in MCU chips, including the following steps: The communication waveform data is obtained by acquiring the communication interface signal of the MCU chip, and then the time series data is obtained after preprocessing. Time series data is input into a fault detection and parameter prediction model trained using a communication waveform dataset of simulated MCU chip communication fault types to obtain fault classification results and predicted values of physical parameters for fault determination. The fault detection and parameter prediction model extracts deep features from the time series through a feature extraction module and maps inputs of different lengths into fixed-dimensional feature vectors. The feature vectors are then processed through parallel classification and regression task branches to obtain fault classification results and predicted values of fault physical parameters. A nonlinear hypersurface is obtained by fitting historical multidimensional physical parameter samples to determine the decision boundary. Then, the predicted physical parameter values are mapped to the multidimensional physical parameter space to obtain a vector, and the minimum weighted distance from the vector to the decision boundary is calculated to determine the corresponding MCU chip communication security margin. The communication status of the MCU chip is determined by comparing it with the preset security margin judgment threshold. The decision boundary is a nonlinear hypersurface obtained by fitting historical multidimensional physical parameter samples, and the physical parameter space is divided into a "communication security domain" and a "communication failure domain" to form a multidimensional physical parameter space.
[0008] This specification provides one or more embodiments of an intelligent diagnostic device for communication faults in an MCU chip, comprising: The signal acquisition and processing module is used to acquire communication waveform data from the communication interface of the MCU chip, and then preprocess the data to obtain time series data. The classification and prediction module is used to input time series data into a fault detection and parameter prediction model trained on a communication waveform dataset of simulated MCU chip communication fault types, and obtain fault classification results and predicted values of physical parameters for fault determination. The fault detection and parameter prediction model extracts deep features from the time series through a feature extraction module and maps inputs of different lengths into fixed-dimensional feature vectors. The feature vectors are then processed through parallel classification task branches and regression task branches to obtain fault classification results and predicted values of fault physical parameters. The communication status determination module is used to obtain a nonlinear hypersurface by fitting historical multidimensional physical parameter samples to determine the decision boundary; then, the predicted physical parameter values are mapped to the multidimensional physical parameter space to obtain a vector, and the minimum weighted distance from the vector to the decision boundary is calculated to determine the corresponding MCU chip communication security margin. The module then compares the result with a preset security margin judgment threshold to determine the MCU chip communication status. The decision boundary is a nonlinear hypersurface obtained by fitting historical multidimensional physical parameter samples, and the physical parameter space is divided into a "communication security domain" and a "communication failure domain" to form a multidimensional physical parameter space.
[0009] This specification provides a computer device according to one or more embodiments, including a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor, when executing the computer program, implements the intelligent diagnosis method for MCU chip communication faults as described above.
[0010] This specification provides one or more embodiments of a computer-readable storage medium storing a computer program that, when executed by a processor, implements the intelligent diagnosis method for MCU chip communication faults as described above.
[0011] This disclosure provides an intelligent diagnostic method, apparatus, device, and medium for MCU chip communication faults. Its advantage lies in addressing the difficulty of obtaining real fault samples. Firstly, a fault detection and parameter prediction model is trained using a simulated MCU chip communication fault type communication waveform dataset. This model includes classification and regression task branches for detecting the probability of each fault and predicting the range of physical parameters. Based on the predicted physical parameters, a communication safety margin reflecting the distance of the signal from the communication failure boundary is determined. Then, the fitted physical parameter decision boundary and safety margin judgment threshold are used to predict the chip's health status. The method proposed in this embodiment can be embedded in automated testing processes. Through in-depth quantitative evaluation of signal quality, a multi-dimensional and quantifiable evaluation of communication signal quality is achieved using a multi-task deep learning model. It effectively identifies "sub-healthy" chips in a critical state, effectively reducing the false negative rate of "sub-healthy" chips, thereby improving the reliability of the final MCU chip and the overall testing and verification efficiency, resolving the contradiction between efficiency and depth in existing testing technologies. Attached Figure Description
[0012] To more clearly illustrate the technical solutions in one or more embodiments of this specification or in the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments recorded in this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0013] Figure 1 A flowchart illustrating an intelligent diagnostic method for communication faults in an MCU chip, provided for one or more embodiments of this specification; Figure 2 A schematic diagram of the network architecture of the fault detection and parameter prediction model provided in one or more embodiments of this specification. Figure 3 Hardware block diagram of a high-precision signal acquisition system provided in one or more embodiments of this specification; Figure 4 A schematic diagram of the parameter space and decision boundary provided for one or more embodiments of this specification; Figure 5 A block diagram of an intelligent diagnostic device for communication faults of an MCU chip provided for one or more embodiments of this specification; Figure 6 This is a schematic diagram of the structure of a computer device provided for one or more embodiments of this specification. Detailed Implementation
[0014] To enable those skilled in the art to better understand the technical solutions in one or more embodiments of this specification, the technical solutions in one or more embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this specification, and not all of the embodiments. Based on one or more embodiments of this specification, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of this invention.
[0015] The present invention will now be described in detail with reference to specific embodiments and accompanying drawings.
[0016] Method Implementation Examples According to embodiments of the present invention, an intelligent diagnostic method for communication faults in MCU chips is provided, such as... Figure 1 The diagram shown is a flowchart of the intelligent diagnosis method for MCU chip communication faults provided in this embodiment. The intelligent diagnosis method for MCU chip communication faults according to this embodiment includes the following steps: Step S1: Acquire communication waveform data by collecting the communication interface signal of the MCU chip, and obtain time series data after preprocessing; Step S2: Input the time series data into the fault detection and parameter prediction model trained by the communication waveform dataset of the simulated MCU chip communication fault types to obtain the fault classification result and the predicted value of the physical parameters for fault determination. The fault detection and parameter prediction model extracts deep features from the time series through the feature extraction module and maps inputs of different lengths into fixed-dimensional feature vectors. The feature vectors are then processed by parallel classification task branches and regression task branches to obtain the fault classification result and the predicted value of the fault physical parameters.
[0017] Step S3: A nonlinear hypersurface is obtained by fitting historical multidimensional physical parameter samples to determine the decision boundary; then, the predicted physical parameter values are mapped to the multidimensional physical parameter space to obtain a vector, and the minimum weighted distance from the vector to the decision boundary is calculated to determine the corresponding MCU chip communication security margin. The communication status of the MCU chip is determined by comparing it with the preset security margin judgment threshold. The decision boundary is a nonlinear hypersurface obtained by fitting historical multidimensional physical parameter samples. This hypersurface divides the physical parameter space into a "communication security domain" and a "communication failure domain", forming a multidimensional physical parameter space.
[0018] The intelligent diagnostic method for MCU chip communication faults provided in this embodiment addresses the difficulty of obtaining real fault samples. Firstly, it trains a fault detection and parameter prediction model using a simulated MCU chip communication fault type communication waveform dataset. This model includes classification and regression task branches for detecting the probability of each fault and predicting the range of physical parameters. Based on the predicted physical parameters, it determines a communication safety margin reflecting the distance of the signal from the communication failure boundary. Then, it uses the fitted physical parameter decision boundary and safety margin threshold to predict the chip's health status. The method proposed in this embodiment can be embedded in automated testing processes. Through in-depth quantitative evaluation of signal quality, it achieves multi-dimensional and quantifiable evaluation of communication signal quality using a multi-task deep learning model. It effectively identifies "sub-healthy" chips in a critical state, significantly reducing the false negative rate of "sub-healthy" chips, thereby improving the reliability of the final MCU chip and the overall testing and verification efficiency, resolving the contradiction between efficiency and depth in existing testing technologies.
[0019] In this embodiment, the multidimensional physical parameter samples include binary signal sequences and protocol-level fault parameters, such as the random drift coefficient of baud rate, the deviation rate of bit width duration, and logical missing start / stop bits. Furthermore, complex physical effects, such as bandwidth limitations, crosstalk intensity, reflection coefficient, EMI interference, overshoot, and ringing, are superimposed on the protocol waveform. By simulating the signal processing mechanism of the MCU hardware receiver, a simulation dataset with success / fail labels is obtained. Then, an N-dimensional space is constructed using all the quantized features of the simulation data (covering both the physical and protocol layers). N physical indicators constitute the coordinate axes of this space, forming an N-dimensional feature space. All subsequent decision boundary fitting, vector mapping, and safety margin calculations are performed within this geometric space defined by preset physical parameters. This embodiment uses simulation fitting to obtain the hypersurface because it is difficult to obtain fault samples with "precise quantitative labels" in real-world environments. To ensure realism, the parameter range covers industrial scenarios, and the consistency between the simulated waveform and the real waveform feature distribution is verified from a statistical perspective (t-SNE distribution visualization, etc.), ensuring effectiveness as much as possible. This part is not a protected technical feature of this invention, so it will not be elaborated further. In this embodiment, the hypersurface is the minimum envelope surface fitted based on all historical "communication success (Pass)" samples. The internal space region completely enclosed by this hypersurface is defined as the "communication safety domain," representing that the physical parameters are within a healthy and verifiable normal distribution range. The infinite space region outside the hypersurface is defined as the "communication failure domain," representing that the physical parameters have deviated from the normal distribution, meaning that communication has a very high probability of failure. The purpose of the fitted hypersurface is to introduce directionality (i.e., positive or negative sign) into the "safety margin" index. If only the absolute value of "distance from the point to the boundary" is calculated, it will be impossible to distinguish between a healthy sample in the safety domain and a completely damaged sample in the failure domain (the distance may be the same). By introducing a region determination, the margin is defined as positive when falling into the safety domain and negative when falling into the failure domain. This signed expression allows us not only to distinguish between Pass (positive value) and Fail (negative value), but also to accurately identify those "sub-healthy" states that have achieved communication success but are close to failure by the specific magnitude of the positive value (e.g., a small positive value). Without defining the region, the core logic of this patent regarding the refined assessment of sub-health will not be mathematically sound.
[0020] In this embodiment, reference Figure 2 The diagram shown is a network architecture diagram of the fault detection and parameter prediction model provided in this embodiment. The fault detection and parameter prediction model includes a feature extraction module, a classification task branch, and a regression task branch.
[0021] The feature extraction module can be a 1D-CNN network, including cascaded convolutional blocks and adaptive average pooling layers. Each convolutional block contains Conv1D layers, BN layers, ReLU activation layers, and Pool layers. ReLU activation avoids the problem that the gradient of the traditional sigmoid function tends to zero when the absolute value of the input is large. Deep 1D-CNN networks can be trained stably and extract deep waveform features better. This module is used to extract deep time-frequency features related to faults in time series and map inputs of different lengths into fixed-dimensional feature vectors. In this embodiment, the classification task branch and the regression task branch have the same trunk. The main difference lies in the different activation logic and loss function of the output layer, which clarifies their respective tasks. The intermediate layer only fine-tunes the dimensions according to the final output requirements, and the core function is to process features.
[0022] The classification task branch network structure includes a fully connected layer, a ReLU activation layer, a Dropout layer, and a connected output layer connected in sequence. The output layer uses the Sigmoid activation function to map the prediction result of each fault category to the [0,1] interval to obtain the occurrence probability of each type of fault. Combined with a preset probability threshold, it is determined whether the sample has a corresponding fault mode. That is, if the probability is higher than the threshold, it is determined that there is a corresponding fault.
[0023] The regression and classification branches receive feature vectors from the feature extraction module in parallel, ensuring that physical parameter-related features are not lost and enabling feature reuse to improve efficiency. The output layer also uses the Sigmoid activation function to normalize the prediction results to the [0,1] interval, obtaining normalized physical parameter prediction values. Then, combined with the normalization ratio of physical parameters when constructing the dataset, the normalized prediction values output by the model are denormalized to obtain the actual fault physical parameter prediction values, such as overshoot voltage amplitude, timing jitter, and ringing-related feature parameters, such as ringing amplitude, frequency, and number of rings.
[0024] In this embodiment, the fault detection and parameter prediction model shares the 1D-CNN backbone network and intermediate feature processing layers. This avoids redundant feature extraction, reducing computational load and ensuring feature consistency between the two branches, thus improving the overall model accuracy. The intermediate layer structure of the two branches is exactly the same because, whether identifying fault types or predicting physical parameters, the core requires extracting fault-related features from the original waveform. For example, an overshoot waveform will have a sharp peak, which is used to determine "whether it is an overshoot" and to calculate "how much overshoot voltage". Therefore, the only difference is the output dimension of the last fully connected layer. The output dimension of the classification branch is equal to the number of fault categories, and that of the regression branch is equal to the number of physical parameters. This is to ensure a smooth data flow throughout the entire branch, allowing for seamless connection with the subsequent output layers.
[0025] In this embodiment, considering the difficulty in obtaining real fault samples, the communication waveform dataset for simulating MCU chip communication fault types is obtained through the following steps: A data generation method based on physical behavior simulation is adopted, and the signal processing mechanism of the MCU hardware receiver is simulated to generate communication waveform samples covering multiple single faults (such as bandwidth limitation, overshoot, ringing, and noise) and compound fault modes. The communication waveform samples are then acquired and processed by a signal acquisition system. Label the fault type and physical parameter truth labels , and obtain the training sample set.
[0026] For details, please refer to Figure 3 The diagram shows the hardware block diagram of the high-precision signal acquisition system provided in this embodiment. It includes a host computer, a transmission module, an FPGA (Field-Programmable Gate Array), and an analog-to-digital converter (ADC). The host computer sends control signals to the FPGA through the transmission module. The FPGA coordinates the operation of the ADC through a protocol conversion module and a data buffer control module. The ADC performs high-precision sampling of the test signal (voltage signal) from the MCU communication interface, converting the analog signal into a digital signal. The sampled data is then buffered and processed by the FPGA and transmitted to the host computer through the data readout channel, forming real communication waveform data that can be used for model analysis. By acquiring the test signal from the real MCU communication interface through this system, the data can be used as a real sample to verify the effectiveness of the simulation training model, or supplemented to the dataset to improve the model's generalization ability.
[0027] This embodiment preprocesses the data input to the model, including the original discrete-time series signal. The amplitude normalization process is performed using the following formula: ; in, The voltage at the original sampling point. and This is the preset reference voltage extreme value or equipment range; This is the normalized input sequence. The statistical extreme values of the current sample are not used for normalization here to avoid affecting the absolute amplitude information of the signal and to ensure that the model can effectively identify fault modes caused by excessively low or high signal amplitudes.
[0028] In this embodiment, a joint loss function is used for end-to-end training of the model during training. Specifically, the model's total loss function... Classification branch loss and regression branch loss The total loss function is constructed by weighted summation. As shown in the following formula: ; Among them, classification branch loss For multi-label classification tasks, a binary cross-entropy loss function is used. It is assumed that there are a total of... The first type of failure mode, for the second type of failure mode For each sample, its true label vector is... The model predicts the probability vector as follows: ,but: .
[0029] Regression branch loss For physical parameter regression tasks, the Mean Squared Error Loss function is employed to minimize the deviation between predicted and true values, thereby improving parameter prediction accuracy. Assume there are a total of... There are physical parameters, and the true normalized parameter vector is . The model predicts the value. (After Sigmoid activation), the regression branch loss is... As shown in the following formula:
[0030] Among them, the weighting coefficient and Minimize the hyperparameters using the backpropagation algorithm This updates the network parameters. This approach balances the contributions of the two tasks to the total loss, preventing one task from dominating the gradient update direction.
[0031] In this embodiment, during the calculation of the communication security margin of the MCU chip, in order to eliminate the differences in the dimensions and sensitivity of different physical parameters, it is preferable to use weighted Euclidean distance or Mahalanobis distance to quantize and calculate the minimum weighted distance from the vector to the decision boundary S as the security margin. The calculation formula is as follows:
[0032] in, Let be any point on the hypersurface; It is a diagonal weight matrix used to balance the differences in the dimensions and sensitivity of different physical parameters, such as voltage amplitude and time jitter; For symbolic functions, This is a vector constructed using the predicted physical parameters output from the regression branch. When the vector... The value is positive when the value is in the safe domain and negative when the value is in the failure domain. (See reference.) Figure 4 The diagram shown is a schematic diagram of the parameter space and decision boundary provided in this embodiment.
[0033] In step S3 of another embodiment, the communication status of the MCU chip is determined by comparing it with a preset safety margin threshold as follows: Based on the set safety margin warning threshold ( The communication status includes, but is not limited to, the following three states: (1) If The error was determined to be a communication failure (Fail). (2) If The chip has been identified as being in a sub-healthy state, indicating a potential risk. It is recommended to re-examine the chip and use it with caution. (3) If The result is deemed healthy (Pass).
[0034] Through the above implementation methods, the method of this embodiment can not only provide "on / off" results in the automated testing process, but also accurately quantify the "margin" of signal quality from the failure boundary, thereby significantly improving the coverage and reliability of MCU testing. The system finally outputs a report containing the fault type, physical parameter values and safety margin. For MCU chips marked as "sub-healthy" risk, the system prompts for further review or rejection.
[0035] The intelligent diagnostic method for communication faults in MCU chips provided by this invention achieves multi-dimensional and quantifiable evaluation of communication signal quality through a multi-task deep learning model. It also provides an automated testing framework that combines efficiency and analytical depth. The method enables in-depth quantitative evaluation of signal quality and achieves multi-dimensional comprehensive evaluation of fault type, physical parameters, and communication security margin. This results in diagnostic results with quantifiable indicators and engineering interpretability, effectively reducing the false negative rate of "sub-healthy" chips, thereby improving the reliability of the final MCU chip and the overall testing and verification efficiency.
[0036] Device Examples According to embodiments of the present invention, an intelligent diagnostic device for communication faults in MCU chips is provided, such as... Figure 5 The diagram shown is a block diagram of the intelligent diagnostic device for MCU chip communication faults provided in this embodiment. The intelligent diagnostic device for MCU chip communication faults according to this embodiment includes: The signal acquisition and processing module 10 is used to acquire communication waveform data by acquiring the communication interface signal of the MCU chip, and to obtain time series data after preprocessing. The classification and prediction module 20 is used to input time series data into a fault detection and parameter prediction model trained on a communication waveform dataset of simulated MCU chip communication fault types, and obtain fault classification results and predicted values of physical parameters for fault determination. The fault detection and parameter prediction model extracts deep features from the time series through a feature extraction module and maps inputs of different lengths into fixed-dimensional feature vectors. The feature vectors are then processed through parallel classification task branches and regression task branches to obtain fault classification results and predicted values of fault physical parameters.
[0037] The communication status determination module 30 is used to obtain a nonlinear hypersurface by fitting historical multidimensional physical parameter samples to determine the decision boundary; then, it maps the predicted physical parameter values to the multidimensional physical parameter space to obtain a vector, calculates the minimum weighted distance of the vector to the decision boundary, determines the corresponding MCU chip communication security margin, and compares it with the preset security margin judgment threshold to determine the MCU chip communication status. The decision boundary is a nonlinear hypersurface obtained by fitting historical multidimensional physical parameter samples. This hypersurface divides the physical parameter space into a "communication security domain" and a "communication failure domain", forming a multidimensional physical parameter space.
[0038] The intelligent diagnostic device for MCU chip communication faults provided in this embodiment addresses the difficulty of obtaining real fault samples. First, the classification and prediction module 20 trains the model using a simulated MCU chip communication fault type communication waveform dataset to obtain a fault detection and parameter prediction model. This model includes classification and regression task branches for detecting the probability of each fault and predicting the range of physical parameters, respectively. Then, the communication state determination module 30 determines the communication safety margin, reflecting the distance of the signal from the communication failure boundary, based on the predicted physical parameters. Finally, it uses the fitted physical parameter decision boundary and safety margin judgment threshold to predict the chip's health status. The device proposed in this embodiment achieves multi-dimensional and quantifiable evaluation of communication signal quality through a multi-task deep learning model, effectively identifying "sub-healthy" chips in a critical state. This effectively reduces the false negative rate of "sub-healthy" chips, thereby improving the reliability of the final MCU chip and the overall testing and verification efficiency, resolving the contradiction between efficiency and depth in existing testing technologies.
[0039] In this embodiment, the fault detection and parameter prediction model includes a feature extraction module, a classification task branch, and a regression task branch; The feature extraction module can be a 1D-CNN network, including cascaded convolutional blocks and adaptive average pooling layers. Each convolutional block contains Conv1D layers, BN layers, ReLU activation layers, and Pool layers. ReLU activation avoids the problem that the gradient of the traditional sigmoid function tends to zero when the absolute value of the input is large. Deep 1D-CNN networks can be trained stably and extract deep waveform features better. This module is used to extract deep time-frequency features related to faults in time series and map inputs of different lengths into fixed-dimensional feature vectors. In this embodiment, the classification task branch and the regression task branch have the same trunk. The main difference is that the classification task branch uses the Sigmoid activation function to determine the probability of occurrence of various faults, and combines it with a preset probability threshold to determine whether the sample has a corresponding fault mode; the regression task branch uses the Sigmoid activation function to obtain the normalized physical parameter prediction value, and then combines it with the normalization ratio of the physical parameters when the dataset is constructed to perform inverse normalization processing on the output normalized physical parameter prediction value to obtain the actual fault physical parameter prediction value.
[0040] In this embodiment, the fault detection and parameter prediction model uses a joint loss function for end-to-end training. Specifically, the total loss function... Classification branch loss and regression branch loss The total loss function is constructed by weighted summation. As shown in the following formula: ; Among them, classification loss For multi-label classification tasks, a binary cross-entropy loss function is used. It is assumed that there are a total of... The first type of failure mode, for the second type of failure mode For each sample, its true label vector is... The model predicts the probability vector as follows: ,but: .
[0041] Regression branch loss For physical parameter regression tasks, the Mean Squared Error Loss function is employed to minimize the deviation between predicted and true values, thereby improving parameter prediction accuracy. Assume there are a total of... There are physical parameters, and the true normalized parameter vector is . The model predicts the value. (After Sigmoid activation), the regression branch loss is... As shown in the following formula:
[0042] Among them, the weighting coefficient and Minimize the hyperparameters using the backpropagation algorithm This updates the network parameters. This approach balances the contributions of the two tasks to the total loss, preventing one task from dominating the gradient update direction.
[0043] In this embodiment, the communication status of the MCU chip is determined by comparing it with a preset safety margin threshold as follows: Based on the set safety margin warning threshold ( The communication status includes, but is not limited to, the following three states: (1) If The error was determined to be a communication failure (Fail). (2) If The chip has been identified as being in a sub-healthy state, indicating a potential risk. It is recommended to re-examine the chip and use it with caution. (3) If The result is deemed healthy (Pass).
[0044] The embodiments of the present invention are device embodiments corresponding to the above method embodiments. The specific operations of each module processing step can be understood with reference to the description of the method embodiments, and will not be repeated here.
[0045] like Figure 6 As shown, the present invention also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the intelligent diagnosis method for MCU chip communication faults described in the above embodiments.
[0046] The present invention also provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, it implements the intelligent diagnosis method for MCU chip communication faults described in the above embodiments. When the computer program is executed by the processor, it implements the following method steps: Step S1: Acquire communication waveform data by collecting the communication interface signal of the MCU chip, and obtain time series data after preprocessing; Step S2: Input the time series data into the fault detection and parameter prediction model trained by the communication waveform dataset of the simulated MCU chip communication fault types to obtain the fault classification result and the predicted value of the physical parameters for fault determination. The fault detection and parameter prediction model extracts deep features from the time series through the feature extraction module and maps inputs of different lengths into fixed-dimensional feature vectors. The feature vectors are then processed by parallel classification task branches and regression task branches to obtain the fault classification result and the predicted value of the fault physical parameters.
[0047] Step S3: A nonlinear hypersurface is obtained by fitting historical multidimensional physical parameter samples to determine the decision boundary; then the predicted physical parameter values are mapped to the multidimensional physical parameter space to obtain a vector, and the minimum weighted distance from the vector to the decision boundary is calculated to determine the corresponding MCU chip communication security margin. The communication status of the MCU chip is determined by comparing it with the preset security margin judgment threshold. The decision boundary is a nonlinear hypersurface obtained by fitting historical multidimensional physical parameter samples, which divides the physical parameter space into a "communication security domain" and a "communication failure domain".
[0048] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), Rambus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM), etc.
[0049] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for apparatus or system embodiments, since they are basically similar to method embodiments, the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments. The apparatus and system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.
[0050] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention, and the contents not described in detail in the specification of the present invention are well known to those skilled in the art.
Claims
1. A method for intelligent diagnosis of communication faults in MCU chips, characterized in that, Includes the following steps: The communication waveform data is obtained by acquiring the communication interface signal of the MCU chip, and then the time series data is obtained after preprocessing. Time series data is input into a fault detection and parameter prediction model trained using a communication waveform dataset of simulated MCU chip communication fault types to obtain fault classification results and predicted values of physical parameters for fault determination. The fault detection and parameter prediction model extracts deep features from the time series through a feature extraction module and maps inputs of different lengths into fixed-dimensional feature vectors. The feature vectors are then processed through parallel classification and regression task branches to obtain fault classification results and predicted values of fault physical parameters. A nonlinear hypersurface is obtained by fitting historical multidimensional physical parameter samples to determine the decision boundary. Then, the predicted physical parameter values are mapped to the multidimensional physical parameter space to obtain a vector, and the minimum weighted distance from the vector to the decision boundary is calculated to determine the corresponding MCU chip communication security margin. The communication status of the MCU chip is determined by comparing it with the preset security margin judgment threshold. The decision boundary is a nonlinear hypersurface obtained by fitting historical multidimensional physical parameter samples, and the physical parameter space is divided into a "communication security domain" and a "communication failure domain" to form a multidimensional physical parameter space.
2. The intelligent diagnosis method for MCU chip communication faults as described in claim 1, characterized in that, The fault detection and parameter prediction model includes a feature extraction module, a classification task branch, and a regression task branch; The feature extraction module includes cascaded convolutional blocks and adaptive average pooling layers, used to extract deep time-frequency features related to faults in the time series, and to map inputs of different lengths into fixed-dimensional feature vectors; The classification task branch uses the Sigmoid activation function to determine the probability of occurrence of each type of fault, and combines it with a preset probability threshold to determine whether the sample has the corresponding fault mode. The regression task branch uses the Sigmoid activation function to obtain normalized physical parameter predictions. Combined with the normalization ratio of physical parameters when constructing the dataset, the output normalized physical parameter predictions are denormalized to obtain the actual fault physical parameter predictions.
3. The intelligent diagnosis method for MCU chip communication faults as described in claim 1, characterized in that, The communication waveform dataset for the simulated MCU chip communication fault types is obtained through the following steps: A data generation method based on physical behavior simulation is adopted, and a communication waveform sample including multiple single faults and compound fault modes is generated by simulating the signal processing mechanism of the MCU hardware receiver. The sample is then collected by a signal acquisition system, and the communication waveform samples are labeled with fault type labels and physical parameter truth value labels to obtain a training sample set.
4. The intelligent diagnosis method for MCU chip communication faults as described in claim 1, characterized in that, The fault detection and parameter prediction model training adopts a joint loss function, which is composed of a weighted sum of classification branch loss and regression branch loss. The classification branch loss adopts the binary cross-entropy loss function, and the regression branch loss adopts the mean squared error loss function.
5. The intelligent diagnosis method for MCU chip communication faults as described in claim 1, characterized in that, The comparison with the preset safety margin threshold is used to determine the communication status of the MCU chip as follows: Based on the set safety margin warning threshold Communication status includes: (1) If The problem was determined to be a communication failure. (2) If This condition is classified as sub-healthy. (3) If The condition was determined to be healthy.
6. An intelligent diagnostic device for communication faults in MCU chips, characterized in that, include: The signal acquisition and processing module is used to acquire communication waveform data from the communication interface of the MCU chip, and then preprocess the data to obtain time series data. The classification and prediction module is used to input time series data into a fault detection and parameter prediction model trained on a communication waveform dataset of simulated MCU chip communication fault types, and obtain fault classification results and predicted values of physical parameters for fault determination. The fault detection and parameter prediction model extracts deep features from the time series through a feature extraction module and maps inputs of different lengths into fixed-dimensional feature vectors. The feature vectors are then processed through parallel classification task branches and regression task branches to obtain fault classification results and predicted values of fault physical parameters. The communication status determination module is used to obtain a nonlinear hypersurface by fitting historical multidimensional physical parameter samples to determine the decision boundary; then, the predicted physical parameter values are mapped to the multidimensional physical parameter space to obtain a vector, and the minimum weighted distance from the vector to the decision boundary is calculated to determine the corresponding MCU chip communication security margin. The module then compares the result with a preset security margin judgment threshold to determine the MCU chip communication status. The decision boundary is a nonlinear hypersurface obtained by fitting historical multidimensional physical parameter samples, and the physical parameter space is divided into a "communication security domain" and a "communication failure domain" to form a multidimensional physical parameter space.
7. The intelligent diagnostic device for MCU chip communication faults as described in claim 6, characterized in that, The fault detection and parameter prediction model includes a feature extraction module, a classification task branch, and a regression task branch; The feature extraction module includes cascaded convolutional blocks and adaptive average pooling layers, used to extract deep time-frequency features related to faults in the time series, and to map inputs of different lengths into fixed-dimensional feature vectors; The classification task branch uses the Sigmoid activation function to determine the probability of occurrence of each type of fault, and combines it with a preset probability threshold to determine whether the sample has the corresponding fault mode. The regression task branch uses the Sigmoid activation function to obtain normalized physical parameter predictions. Combined with the normalization ratio of physical parameters when constructing the dataset, the output normalized physical parameter predictions are denormalized to obtain the actual fault physical parameter predictions.
8. The intelligent diagnostic device for MCU chip communication faults as described in claim 6, characterized in that, The comparison with the preset safety margin threshold is used to determine the communication status of the MCU chip as follows: Based on the set safety margin warning threshold Communication status includes: (1) If The problem was determined to be a communication failure. (2) If This condition is classified as sub-healthy. (3) If The condition was determined to be healthy.
9. A computer device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the intelligent diagnosis method for MCU chip communication faults as described in any one of claims 1 to 5.
10. A computer-readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the intelligent diagnosis method for MCU chip communication faults as described in any one of claims 1 to 5.