SVD file generation method, system and device, medium and program product

Abstract

The invention provides an SVD file generation method, system and device, a medium and a program product. The SVD file generation method comprises the steps of obtaining an Excel table storing SOC peripheral device register information, preprocessing the Excel table to form a data format of a corresponding register, and generating a target SVD file according to the data format of the register. According to the method and the device, the Excel table storing the register information is obtained, the Python is utilized to preprocess the Excel table to obtain the corresponding register data format, and then the Python script command is utilized to generate the target file according to the register data format, so that the existing problems of data omission, update delay and the like caused by manual operation are solved, the labor cost is reduced, and the efficiency is improved. The file generation efficiency and accuracy are remarkably improved, the file generation requirement of the user can be efficiently and individually met, and the use experience of the user is effectively improved.

Description

Technical Field

[0001] This disclosure relates to the field of SVD file processing technology, and in particular to an SVD file generation method, system, device, medium and program product. Background Technology

[0002] In the field of chip development, SVD (System View Description File) is a key file based on formatted XML (Extensible Markup Language) that carries peripheral information and device parameters. Its content usually matches the information in the chip supplier's device reference manual, which is equivalent to a "digital" presentation of the chip manual. The manual is intended for human reading, while the SVD is in the form of XML structure for machines, development environments, and software such as MDK (Keil Microcontroller Development Kit, an embedded development tool) / IAR (IAR Embedded Workbench, an embedded development tool) to recognize and use. It defines detailed chip information, covering on-chip peripherals, peripheral hardware registers, register data bit values ​​and descriptions, etc.

[0003] Currently, in the development and debugging of large-scale SOC (System on Chip) projects, SVD file generation typically relies on chip developers manually writing XML format files based on the SOC peripheral register tables. However, manual operation is prone to oversights due to the large number of project modules and the complexity of register and data bit information. Furthermore, changes to the register tables require meticulous code modification, resulting in low file generation efficiency and a high error rate. Additionally, manual modifications struggle to quickly respond to table updates, severely impacting the work progress of verification personnel and project advancement. Summary of the Invention

[0004] The technical problem to be solved by this disclosure is to overcome the defects of existing technologies that generate files based on manual operation, such as data omission and update delay. The purpose is to provide an SVD file generation method, system, electronic device, storage medium and program product.

[0005] This disclosure solves the above-mentioned technical problems through the following technical solution:

[0006] In a first aspect, this disclosure provides a method for generating SVD files, the method comprising:

[0007] Retrieve the Excel spreadsheet containing SOC peripheral device register information;

[0008] The Excel spreadsheet is preprocessed to form the corresponding register data format;

[0009] Generate the target SVD file based on the data format of the register.

[0010] Optionally, the first table in the Excel spreadsheet is named the SOC project name. The header information of the first table includes the module name, module description information, group name of the same peripheral in the module, module base address, module register bit size, module register read / write attributes, module code storage size, module interrupt name, and module interrupt name description. The module is an SOC peripheral device.

[0011] Optionally, the Excel spreadsheet also includes tables for each module, wherein the names of the tables for each module are consistent with the information in the names of the modules in the first table, and the header information of the tables for each module includes the name of the register, the offset address of the register, the bit width of the register, the read / write attributes of the register, the name of the field (bit field), the length of the field, the attributes of the field, the default value of the field, and the description information of the field.

[0012] Optionally, the step of preprocessing the Excel spreadsheet to form the corresponding register data format includes:

[0013] The Excel spreadsheet is read using a Python script (a computer programming language) via the open_workbook function (a function in the xlrd library).

[0014] Read the first table in the Excel spreadsheet;

[0015] Extract the header information of the first table;

[0016] The algorithm iterates through the first table to extract all non-blank rows except the first row. It then combines the non-blank rows with the table header information to form a dictionary data type using the zip function. Finally, it pushes the dictionary data type onto the stack in a list named peripherals, which is a global variable.

[0017] Customize the data format of the registers used for table information in each module;

[0018] Use a Python script to create and open a blank target SVD file;

[0019] Write chip-related information, CPU (Central Processing Unit) information, and default register information of the SOC peripheral devices into the blank target SVD file in XML format. The default register information of the peripheral devices includes register width, register size, register read / write attributes, register reset value, and the number of bits used in the register.

[0020] Optionally, the data format of the registers for the table information of each module includes:

[0021] The dictionary data type includes the register name, register description, register size, register read / write attributes, register reset value, and the number of bits used by the register.

[0022] A list data type, named after a field, includes the field name, field length, field attributes, field default values, and field description information.

[0023] Optionally, the step of generating the target SVD file according to the data format of the register includes:

[0024] Use Python's `write` function to write the starting label for the global variable `peripherals`;

[0025] Use Python to iterate through the list named by the global variable peripherals, generate a sub-tag for each list item, and obtain the content of the sub-tag by passing parameters;

[0026] The `openyxl_dictreader` function is called to read the register information of the corresponding module based on the module name and return a reader. The reader is then used to generate sub-tags for the module. The sub-tags of the module include the read / write attributes of the register, the reset value of the register, and the number of bits used by the register.

[0027] A second aspect of this disclosure provides an SVD file generation system, the SVD file generation system comprising:

[0028] The table acquisition unit is used to acquire an Excel table containing SOC peripheral device register information;

[0029] The preprocessing unit is used to preprocess the data format of the Excel table to form the corresponding register;

[0030] The file generation unit is used to generate a target SVD file according to the data format of the register.

[0031] Optionally, the first table in the Excel spreadsheet is named the SOC project name. The header information of the first table includes the module name, module description information, group name of the same peripheral in the module, module base address, module register bit size, module register read / write attributes, module code storage size, module interrupt name, and module interrupt name description. The module is an SOC peripheral device.

[0032] Optionally, the Excel spreadsheet also includes tables for each module, wherein the names of the tables for each module are consistent with the information in the names of the modules in the first table, and the header information of the tables for each module includes the name of the register, the offset address of the register, the bit width of the register, the read / write attributes of the register, the name of the field, the length of the field, the attributes of the field, the default value of the field, and the description information of the field.

[0033] Optionally, the preprocessing module includes:

[0034] The first reading subunit is used to read the Excel spreadsheet using the xlrd open_workbook function based on a Python script;

[0035] The second reading subunit is used to read the first table in the Excel spreadsheet;

[0036] An information extraction subunit is used to extract the header information of the first table;

[0037] The sub-unit is iterated through to extract the non-blank rows other than the first row in the first table. The non-blank rows and the table header information are combined into a dictionary data type using the zip function, and the dictionary data type is pushed onto the stack into a list named by the global variable peripherals.

[0038] A custom subunit is used to customize the data format of the registers used for table information in each module;

[0039] The file creation subunit is used to create and open blank target SVD files using a Python script;

[0040] The information writing subunit is used to write chip-related information, CPU information, and default register information of the SOC peripheral devices into the blank target SVD file in XML format. The default register information of the peripheral devices includes register width, register size, register read / write attributes, register reset value, and the number of bits used in the register.

[0041] Optionally, the data format of the registers for the table information of each module includes:

[0042] The dictionary data type includes the register name, register description, register size, register read / write attributes, register reset value, and the number of bits used by the register.

[0043] A list data type, named after a field, includes the field name, field length, field attributes, field default values, and field description information.

[0044] Optionally, the file generation module includes:

[0045] Write a subunit to write the starting label of the global variable peripherals using Python's write function;

[0046] List traversal sub-units are used to traverse the list named by the global variable peripherals using Python, generate sub-labels for each list item, and obtain the content of the sub-labels through parameters;

[0047] The function call subunit is used to call the openyxl_dictreader function, which reads the register information of the corresponding module according to the module name and returns a reader. The reader is used to generate a sub-tag of the module. The sub-tag of the module includes the read and write attributes of the register, the reset value of the register, and the number of bits used by the register.

[0048] A third aspect of this disclosure provides an electronic device, including a memory, a processor, and a computer program stored in the memory and for running on the processor, wherein the processor executes the computer program to implement the SVD file generation method of the first aspect described above.

[0049] In a fourth aspect, this disclosure provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the SVD file generation method of the first aspect described above.

[0050] In a fifth aspect, this disclosure provides a computer program product, including a computer program that, when executed by a processor, implements the SVD file generation method of the first aspect described above.

[0051] Based on common knowledge in the field, the above-mentioned preferred conditions can be combined arbitrarily to obtain various preferred embodiments of this disclosure.

[0052] The positive and progressive effects of this disclosure are as follows:

[0053] In this disclosure, an Excel spreadsheet containing register information is obtained, and Python is used to preprocess the Excel spreadsheet to obtain the corresponding register data format. Then, a Python script command is used to generate the target file based on the register data format. This solves the problems of data omission and update delay that occur in existing manual operations, reduces labor costs, significantly improves the efficiency and accuracy of file generation, can efficiently and personalized meet users' file generation needs, and effectively improves the user experience. Attached Figure Description

[0054] Figure 1 A flowchart of an SVD file generation method provided in Embodiment 1 of this disclosure;

[0055] Figure 2 This is a flowchart of step S102 in an SVD file generation method provided in Embodiment 2 of this disclosure;

[0056] Figure 3 This is a flowchart of step S103 in an SVD file generation method provided in Embodiment 3 of this disclosure;

[0057] Figure 4 This is a schematic diagram of a module of an SVD file generation system provided in Embodiment 4 of this disclosure;

[0058] Figure 5 This is a schematic diagram of a module of an SVD file generation system provided in Embodiment 5 of this disclosure;

[0059] Figure 6 This is a schematic diagram of the structure of an electronic device provided in Embodiment 6 of this disclosure. Detailed Implementation

[0060] The present disclosure is further illustrated below by way of embodiments, but the present disclosure is not limited to the scope of the embodiments described herein.

[0061] The prefixes such as "first" and "second" used in this disclosure are merely for distinguishing different descriptive objects and do not limit the position, order, priority, quantity, or content of the described objects. The use of ordinal numbers and other prefixes used to distinguish descriptive objects in this disclosure does not constitute a limitation on the described objects. The description of the described objects is given in the claims or the context of the embodiments, and should not be construed as an unnecessary limitation. Furthermore, in the description of this embodiment, unless otherwise stated, "multiple" means two or more.

[0062] In this embodiment of the disclosure, the collection, storage, use, processing, transmission, provision, and disclosure of user personal information comply with relevant laws and regulations and do not violate public order and good morals.

[0063] Example 1

[0064] Figure 1 This is a flowchart of an SVD file generation method provided in Embodiment 1 of this disclosure. The SVD file generation method of this embodiment includes:

[0065] S101. Obtain an Excel spreadsheet containing SOC peripheral device register information;

[0066] The first table in the Excel spreadsheet is named the SOC project name. The header information of this first table includes the name of the SOC peripheral device, its description, the group name of the same peripheral device within the SOC peripheral device, the base address of the SOC peripheral device, the size of the SOC peripheral device registers, the read / write attributes of the SOC peripheral device registers, the storage size of the SOC peripheral device code, the SOC peripheral device interrupt name, and its interrupt name description. The header name can vary, but it must match the keywords in the custom data types defined in the script. The order of the headers can also vary, but all the content must be included.

[0067] In addition, the Excel spreadsheet includes tables for each SOC peripheral device. The table names for each SOC peripheral device match the information in the first table. The header information for each SOC peripheral device table includes the register name, register offset address, register bit width, register read / write attributes, field name, field length, field attributes, field default value, and field description. The header names can vary, but must match the keywords in the custom data types defined in the script. The order of the headers can also change, but all content must be included.

[0068] S102. Preprocess the Excel spreadsheet to form the corresponding register data format;

[0069] Preprocessing an Excel spreadsheet to create the corresponding register data format first requires defining the original structure of the spreadsheet, including worksheets divided by peripheral device modules, header field definitions, and special formatting conventions. Based on this, core information is extracted. First, key information from the first spreadsheet is extracted, such as the module name, module description, group name of the same peripheral within the module, module base address, and module register bit size. This information is then converted into a dictionary data type using the zip function. Next, the spreadsheets for each module are preprocessed. The outer layer stores basic information in a dictionary for each module, while the inner layer contains nested register lists, with each register including its own attributes and bit field list. This preprocessing transforms the Excel spreadsheet into the corresponding register data format, providing a reliable foundation for subsequent steps to directly read and generate compliant SVD file tags. This series of processes transforms the loose data from the original spreadsheet into structured, verifiable, and easily mappable register information, reducing errors and redundancy from manual processing.

[0070] S103. Generate the target SVD file according to the data format of the register.

[0071] Based on the preprocessed structured register data, Python functions are used to generate SVD files according to the register data format. The generated files can be correctly parsed by development tools such as MDK and IAR, and can accurately reflect the register information of the chip's peripheral devices. This achieves automated conversion from structured data to standardized SVD files, greatly improving file generation efficiency and reducing the error rate of manual writing.

[0072] This solution obtains an Excel spreadsheet containing register information, preprocesses the spreadsheet using Python to obtain the corresponding register data format, and then uses Python scripts to generate the target file based on the register data format. This solves the problems of data omission and update delays that occur with existing manual operations, reduces labor costs, significantly improves the efficiency and accuracy of file generation, and can efficiently and personalizedly meet users' file generation needs, effectively enhancing the user experience.

[0073] Example 2

[0074] The SVD file generation method in this embodiment is a further improvement on Embodiment 1, specifically:

[0075] In a feasible solution, such as Figure 2 As shown, step S102 includes:

[0076] S1021. Read an Excel spreadsheet using the xlrd open_workbook function based on a Python script;

[0077] xlrd is a Python third-party library primarily used for reading data from Excel files. It provides a series of functions and classes that facilitate easy manipulation of Excel spreadsheets. The `open_workbook` function loads and returns an Excel file, allowing for the reading of cell data and extraction of header information. When processing register-related Excel spreadsheets, xlrd can help parse the table content, extracting key information such as peripheral device module names, register addresses, and register read / write attributes, providing raw data support for subsequently converting this data into structured tags in SVD files.

[0078] S1022. Read the first table in the Excel spreadsheet;

[0079] S1023. Extract the header information of the first table;

[0080] S1024. Loop through the first table to extract the non-blank rows except the first row, combine the non-blank rows and the table header information into a dictionary data type using the zip function, and push the dictionary data type onto the stack into a list named by the global variable peripherals;

[0081] When processing register Excel spreadsheet data, the first step is to filter out all non-blank rows, which contain valid register information. Simultaneously, the header information of the first table is extracted as the keys for subsequent dictionaries. Then, Python's `zip` function is used to pair the header information with the specific data in each non-blank row. This converts each row into a dictionary with the header as the key and the corresponding cell content as the value. This dictionary format clearly maps the attributes of each register record. These converted dictionaries are then added sequentially to a global list named `peripherals`. The data is stored in an ordered manner by pushing it onto a stack, making the `peripherals` list a collection containing all valid register information, with each element being a dictionary fully describing a specific register attribute. This process preserves the original data's relevance while transforming the scattered tabular data into a structured form that is easy for the program to manipulate. It provides a unified and convenient data access method for generating various tags in the SVD file based on this data. Furthermore, the global variable feature ensures that this data can be flexibly called and processed in different stages of the program, reducing the complexity of data transfer.

[0082] S1025. Define the data format of the registers used for table information in each module;

[0083] A custom data type is defined to store information about the registers of related modules. Its design revolves around the core attributes of the registers. The properties (property collection) contains a dictionary with the register name, register description, register size, register read / write attributes, register reset value, and the number of bits used by the register as keys. This accurately covers the core information required by the register tags in the SVD file. The list named "field" is used to store detailed information about all bit fields in the register. Each bit field can also contain the field name, field length, field attributes, field default value, and field description. This structure not only ensures the integrity of the information of a single register, but also achieves the orderly organization of data through hierarchical division (register-field), providing a clear data mapping foundation for the subsequent generation of corresponding XML tags.

[0084] The corresponding function is the custom _readRgmInfo function, which takes an Excel spreadsheet of the SOC peripheral device registers as input and outputs the custom data type that stores the relevant module register information on a module-by-module basis. Finally, it forms a list collection _rgmItemList [] composed of elements of this data type. This list collection completely contains all the register information of the peripheral device modules, providing a structured and directly callable data foundation for the entire SVD file generation process.

[0085] S1026. Use a Python script to create and open a blank target SVD file;

[0086] S1027. Write chip-related information, CPU information, and default register information of SOC peripheral devices in XML format to the blank target SVD file. The default register information of peripheral devices includes register width, register size, register read / write attributes, register reset value, and number of bits used in the register.

[0087] During the SVD file generation process, Python's `write` function is used to sequentially write the chip's basic information, CPU-related configurations, and default register information for peripheral devices, with all content strictly adhering to XML format specifications. First, the basic chip information is processed, using the `write` function to write the chip developer information, chip name, chip series, chip version, chip description information, and licensing information into XML format, for example... <vendor> ...< / vendor> , <name> ...< / name> This ensures that the top-level information clearly presents the chip's basic identity and attributes, providing a fundamental identifier for the entire SVD file.

[0088] Next, for the CPU-related configuration information, use the write function to create a node with <cpu> For the start tag,< / cpu> as the end tag, and nest the various feature tags of the CPU inside it, including the CPU name, version information, endianness, memory protection unit, floating-point unit, and the bit positions of the interrupt priorities. Each sub-item is written through the write function in the XML format of <sub-item name>value< / sub-item name> to accurately describe the hardware characteristics of the CPU and provide key basis for the development tools to identify the processor architecture.

[0089] Finally, for the default register information of all peripherals, it is also written according to the XML specification through the write function. The register width, register size, read / write attributes of the register, reset value of the register, and the number of bits used by the register are encapsulated into the corresponding tags, so that the generated SVD file not only complies with the CMSIS (Cortex Microcontroller Software Interface Standard) standard but can also be correctly parsed and used by the development tools.

[0090] In this solution, a compliant SVD file is generated from an Excel table through a Python script. First, use the open_workbook function of the xlrd library to read the specified Excel table, select the first table and extract the header information, and at the same time customize the register data format suitable for the table information of each module. Then, create and open a blank target SVD file, write the chip-related information, CPU information, and the default register information of the SOC peripherals in XML format into it, and finally realize the conversion of the register information stored in the Excel into a standardized SVD file that can be recognized by the development tools.

[0091] Embodiment 3

[0092] In an implementable solution, as Figure 3 shown, step S103 includes:

[0093] S1031. Write the start tag of the global variable peripherals using the write function of Python;

[0094] S1032. Use Python to traverse the list named by the global variable peripherals, generate sub-tags for each list item, and obtain the content of the sub-tags through parameter passing;

[0095] S1033. Call the openyxl_dictreader function to read the register information of the corresponding module according to the module name and return the reader. Use the reader to generate the module's sub-tag. The module's sub-tag includes the register's read / write attributes, the register's reset value, and the number of bits used by the register.

[0096] When generating the SOC peripheral device information section of the SVD file, the Python `write` function is first used to write the information. <peripherals>The start tag serves as the top-level container for all SOC peripheral device register information, providing the structural preparation for adding information one by one later. Next, it iterates through the previously defined `peripherals[]` list, using `item` as the loop variable, processing the information for each peripheral device one by one, ensuring that the header information of the first table is completely converted into the corresponding XML tag structure.

[0097] Inside the loop, the write function is used to write first. <peripheral>The initial tag serves as an independent container for the current SOC peripheral device. It then begins constructing its internal sub-tags: first, it creates sub-tags such as name, description, groupName, baseAddress, size, and access. The content of these tags is obtained from the item through parameter passing, corresponding to item['ModuleName'] (SOC peripheral device name), item['Module Description'] (SOC peripheral device description), item['Group Name'] (group of the same peripheral device within the SOC peripheral device), item['Base Address'] (SOC peripheral device base address), item['Size'] (SOC peripheral device register bit size), and item['Access'] (SOC peripheral device read / write attribute). This accurately maps the basic information of the SOC peripheral device into the XML structure.

[0098] Created afterward <addressblock>The sub-tags are further subdivided into offset, size, and usage sub-tags. The content of these sub-tags is also passed as parameters from the item's ['Address BlockOffset'] (address offset of the SOC peripheral device), ['Address Block size'] (storage size of the SOC peripheral device), and ['Address Block Usage'] (use of the SOC peripheral device), which are used to describe the allocation details of the SOC peripheral device's address space.

[0099] For interrupt information of SOC peripheral devices, it is necessary to create <interrupt>The sub-tags contain the names, descriptions, and values, which are taken from item ['Interrupt Name'] (interrupt name of the SOC peripheral device), item ['Interrupt Description'] (interrupt description of the SOC peripheral device), and item ['Interrupt Value'] (interrupt value of the SOC peripheral device), respectively, thus completely recording the interrupt-related configurations.

[0100] Next, the write function will be used to write. <registers>The initial tag serves as a container for the current SOC peripheral device register information. The `openpyxl_dictreader` function is then called. Its core function is to convert the data in the Excel spreadsheet into a more easily manipulated dictionary format based on the "header-row data" correspondence, facilitating subsequent extraction and use of structured information from the spreadsheet. The detailed register data corresponding to the peripheral device is located and read using `item['Module Name']`, returning a `reader` object. This `reader` will serve as the data source for extracting specific register information. Finally, using this `reader` object, various sub-tags for the registers under `Module Name` are created sequentially, including the register's read / write attributes, enumerated values ​​(possible values ​​and meanings of corresponding bit fields), and the allocation of register bit fields (such as the name, bit range, and function description of each bit field). This ensures that the details of each register are written according to the XML format specification, ultimately forming a complete structure of SOC peripheral device and its register information. This allows the generated SVD file to accurately reflect all the characteristics of the hardware peripheral device, meeting the needs of development tools for parsing and use.

[0101] Example 4

[0102] like Figure 4 As shown, the SVD file generation system of this embodiment includes:

[0103] Table acquisition unit 1 is used to acquire an Excel table containing SOC peripheral device register information;

[0104] Preprocessing unit 2 is used to preprocess the data format of the Excel spreadsheet to form the corresponding register;

[0105] File generation unit 3 is used to generate target SVD files according to the data format of the registers.

[0106] This solution obtains an Excel spreadsheet containing register information, preprocesses the spreadsheet using Python to obtain the corresponding register data format, and then uses Python scripts to generate the target file based on the register data format. This solves the problems of data omission and update delays that occur with existing manual operations, reduces labor costs, significantly improves the efficiency and accuracy of file generation, and can efficiently and personalizedly meet users' file generation needs, effectively enhancing the user experience.

[0107] For the system embodiments, since they basically correspond to the method embodiments, the relevant parts can be referred to in the description of the method embodiments. The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this disclosure according to actual needs.

[0108] Example 5

[0109] like Figure 5 As shown, the SVD file generation system in this embodiment is a further improvement on embodiment 4, specifically:

[0110] In one feasible embodiment, preprocessing module 2 includes:

[0111] The first reading subunit 21 is used to read an Excel spreadsheet based on a Python script using the xlrd open_workbook function;

[0112] The second reading subunit 22 is used to read the first table in the Excel spreadsheet.

[0113] Information extraction subunit 23 is used to extract the header information of the first table;

[0114] Loop through sub-unit 24 to extract all non-blank rows except the first row in the first table. Combine the non-blank rows and the table header information into a dictionary data type using the zip function, and push the dictionary data type onto the stack into a list named peripherals in the global variable.

[0115] Custom subunit 25 is used to customize the data format of the registers used for table information in each module;

[0116] File creation subunit 26 is used to create and open blank target SVD files using a Python script;

[0117] Information writing subunit 27 is used to write chip-related information, CPU information, and default register information of SOC peripheral devices in XML format to a blank target SVD file. The default register information of peripheral devices includes register width, register size, register read / write attributes, register reset value, and number of bits used in the register.

[0118] In one feasible solution, the information extraction module 3 includes:

[0119] Write subunit 31 to write the starting label for the global variable peripherals using Python's write function;

[0120] List traversal sub-unit 32 is used to traverse a list named by the global variable peripherals using Python, generate a sub-label for each list item, and obtain the content of the sub-label through parameters;

[0121] Function call subunit 33 is used to call the openyxl_dictreader function, which reads the register information of the corresponding module according to the module name and returns a reader. The reader is used to generate the module's sub-tags. The module's sub-tags include the register's read / write attributes, the register's reset value, and the number of bits used by the register.

[0122] For the system embodiments, since they basically correspond to the method embodiments, the relevant parts can be referred to in the description of the method embodiments. The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this disclosure according to actual needs.

[0123] Example 6

[0124] Figure 6 This is a schematic diagram of the structure of an electronic device according to an example embodiment of the present disclosure. The electronic device includes a memory, a processor, and a computer program stored in the memory and used to run on the processor. When the processor executes the computer program, it implements the file generation method described in any of the above embodiments. Figure 6 The electronic device 90 shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments disclosed herein.

[0125] like Figure 6 As shown, the electronic device 90 can be manifested as a general-purpose computing device, such as a server device. The components of the electronic device 90 may include, but are not limited to: at least one processor 91, at least one memory 92, and a bus 93 connecting different system components (including memory 92 and processor 91).

[0126] Bus 93 includes a data bus, an address bus, and a control bus.

[0127] The memory 92 may include volatile memory, such as random access memory (RAM) 921 and / or cache memory 922, and may further include read-only memory (ROM) 923.

[0128] The memory 92 may also include a program tool 925 (or utility) having a set (at least one) program module 924, such program module 924 including but not limited to: an operating system, one or more application programs, other program modules, and program data, each or some combination of these examples may include an implementation of a network environment.

[0129] The processor 91 executes various functional applications and data processing by running computer programs stored in the memory 92, such as the SVD file generation method provided in any of the above embodiments.

[0130] Electronic device 90 can also communicate with one or more external devices 94 (e.g., keyboard, pointing device, etc.). This communication can be performed through input / output (I / O) interface 95. Furthermore, electronic device 90 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public network, such as the Internet) via network adapter 96. As shown, network adapter 96 communicates with other modules of electronic device 90 via bus 93. It should be understood that, although not shown in the figure, other hardware and / or software modules can be used in conjunction with electronic device 90, including but not limited to: microcode, device drivers, redundant processors, external disk drive arrays, RAID (disk array) systems, tape drives, and data backup storage systems.

[0131] It should be noted that although several units / modules or sub-units / modules of the electronic device have been mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more units / modules described above can be embodied in one unit / module. Conversely, the features and functions of one unit / module described above can be further divided and embodied by multiple units / modules.

[0132] Example 7

[0133] This disclosure also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the SVD file generation method provided in any of the above embodiments.

[0134] The readable storage medium may be more specifically adopted, including but not limited to: portable disk, hard disk, random access memory, read-only memory, erasable programmable read-only memory, optical storage device, magnetic storage device, or any suitable combination thereof.

[0135] Example 8

[0136] This disclosure also provides a computer program product, including a computer program that, when executed by a processor, implements the SVD file generation method described in any of the preceding embodiments.

[0137] The program code for executing the computer program product of this disclosure can be written in any combination of one or more programming languages, and the program code can be executed entirely on a user device, partially on a user device, as a stand-alone software package, partially on a user device and partially on a remote device, or entirely on a remote device.

[0138] While specific embodiments of this disclosure have been described above, those skilled in the art should understand that these are merely illustrative examples, and the scope of protection of this disclosure is defined by the appended claims. Those skilled in the art can make various changes or modifications to these embodiments without departing from the principles and essence of this disclosure, but all such changes and modifications fall within the scope of protection of this disclosure.< / registers> < / interrupt> < / addressblock> < / peripheral> < / peripherals>

Claims

1. A method for generating SVD files, characterized in that, The SVD file generation method includes: Retrieve the Excel spreadsheet containing SOC peripheral device register information; The Excel spreadsheet is preprocessed to form the corresponding register data format; Generate the target SVD file based on the data format of the register.

2. The SVD file generation method as described in claim 1, characterized in that, The first table in the Excel spreadsheet is named the SOC project name. The header information of the first table includes the module name, module description information, group name of the same peripherals in the module, module base address, module register bit size, module register read / write attributes, module code storage size, module interrupt name, and module interrupt name description. The module is an SOC peripheral device.

3. The SVD file generation method as described in claim 2, characterized in that, The Excel spreadsheet also includes tables for each module. The names of the tables for each module are consistent with the information in the names of the modules in the first table. The header information of each module's table includes the name of the register, the offset address of the register, the bit width of the register, the read / write attributes of the register, the name of the field, the length of the field, the attributes of the field, the default value of the field, and the description information of the field.

4. The SVD file generation method as described in claim 3, characterized in that, The step of preprocessing the Excel spreadsheet to form the corresponding register data format includes: The Excel spreadsheet is read using the xlrd open_workbook function based on a Python script; Read the first table in the Excel spreadsheet; Extract the header information of the first table; Loop through the first table to extract all non-blank rows except the first row, combine the non-blank rows and the table header information into a dictionary data type using the zip function, and push the dictionary data type onto the stack into a list named by the global variable peripherals; Customize the data format of the registers used for table information in each module; Use a Python script to create and open a blank target SVD file; Write chip-related information, CPU information, and default register information of the SOC peripheral devices into the blank target SVD file in XML format. The default register information of the peripheral devices includes register width, register size, register read / write attributes, register reset value, and the number of bits used in the register.

5. The SVD file generation method as described in claim 4, characterized in that, The data format of the registers for the table information of each module includes: The dictionary data type includes the register name, register description, register size, register read / write attributes, register reset value, and the number of bits used by the register. A list data type, named after a field, includes the field name, field length, field attributes, field default values, and field description information.

6. The SVD file generation method as described in claim 5, characterized in that, The step of generating the target SVD file according to the data format of the register includes: Use Python's `write` function to write the starting label for the global variable `peripherals`; Use Python to iterate through the list named by the global variable peripherals, generate a sub-tag for each list item, and obtain the content of the sub-tag by passing parameters; The `openyxl_dictreader` function is called to read the register information of the corresponding module based on the module name and return a reader. The reader is then used to generate a sub-tag for the module. The sub-tag of the module includes the read / write attributes of the register, the reset value of the register, and the number of bits used by the register.

7. An SVD file generation system, characterized in that, The SVD file generation system includes: The table acquisition unit is used to acquire an Excel table containing SOC peripheral device register information; The preprocessing unit is used to preprocess the data format of the Excel table to form the corresponding register; The file generation unit is used to generate a target SVD file according to the data format of the register.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and for running on the processor, characterized in that, When the processor executes the computer program, it implements the SVD file generation method according to any one of claims 1 to 6.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the SVD file generation method according to any one of claims 1 to 6.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the SVD file generation method as described in any one of claims 1 to 6.

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