Hardware image analysis method and system for EMC optimization

Abstract

The invention discloses a hardware image analysis method and system for EMC (Electro Magnetic Compatibility) optimization. The method comprises the following steps: acquiring an image of a hardware circuit to be subjected to EMC optimization; identifying a plurality of key circuit element images and connection parameters in the image based on an image analysis algorithm; determining a radiation parameter corresponding to each key circuit element image based on an electromagnetic interference correlation analysis rule and the connection parameter; and predicting an optimized circuit area and an optimization strategy corresponding to the hardware circuit according to the radiation parameters corresponding to all the key circuit element images. Therefore, accurate EMC optimization area positioning and strategy recommendation based on image intelligent analysis can be realized, the electromagnetic compatibility design efficiency and reliability of a hardware circuit are improved, and the EMC optimization failure risk caused by interference source misjudgment is reduced.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a hardware image analysis method and system for EMC optimization. Background Technology

[0002] With the rapid increase in the complexity of electronic devices and the growing requirements for electromagnetic compatibility (EMC), enterprises and users are placing increasing emphasis on ensuring circuit reliability and compliance through precise EMC optimization. A key technical challenge is accurately identifying interference sources and determining optimization strategies. Existing technologies typically employ manual review or simple rule-based checks to determine EMC optimization schemes based on hardware circuit design information. However, these solutions lack deep analysis algorithms for circuit images to extract component and connection parameters and dynamically apply EMC correlation rules. This makes it difficult to accurately predict radiation parameters and generate targeted optimization strategies, resulting in insufficient accuracy in locating EMC optimization areas. Misjudgments of interference sources can easily lead to optimization failures or repeated iterations, limiting the efficiency and reliability of hardware circuit EMC design. Therefore, existing technologies have shortcomings that urgently need to be addressed. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to provide a hardware image analysis method and system for EMC optimization, which can realize accurate EMC optimization area positioning and strategy recommendation based on intelligent image analysis, improve the efficiency and reliability of EMC design of hardware circuits, and reduce the risk of EMC optimization failure caused by misjudgment of interference sources.

[0004] To address the aforementioned technical problems, the first aspect of this invention discloses a hardware image analysis method for EMC optimization, the method comprising: Obtain an image of the hardware circuit to be optimized for EMC; Based on image analysis algorithms, multiple key circuit component images and connection parameters in the image were identified; Based on the electromagnetic interference correlation analysis rules and the connection parameters, the radiation parameters corresponding to each key circuit element image are determined. Based on the radiation parameters corresponding to the images of all the key circuit elements, predict the optimized circuit region and optimization strategy corresponding to the hardware circuit.

[0005] As an optional implementation, in the first aspect of the present invention, the circuit element corresponding to the key circuit element image is a crystal oscillator element, a power supply element, a power inductor element, or an MCU element.

[0006] As an optional implementation, in the first aspect of the invention, the connection parameters are at least one of the connection relationship between any two of the key circuit elements, the connection line type, and the connection distance.

[0007] As an optional implementation, in the first aspect of the invention, the step of identifying multiple key circuit element images and connection parameters in the image based on an image analysis algorithm includes: The image is input into a trained classifier model to obtain the circuit type corresponding to the image; The image recognition model corresponding to the circuit type is determined from the preset image recognition model library; The image is input into the image recognition model to obtain the output images of multiple key circuit components and connection parameters.

[0008] As an optional implementation, in the first aspect of the present invention, the image recognition model includes a component region segmentation model, a component type recognition model, and a component connection parameter prediction model.

[0009] As an optional implementation, in the first aspect of the invention, the component region segmentation model is used to segment the region image belonging to a single circuit component in the image to obtain multiple component region images for output. The component type recognition model is used to identify the circuit component parameters corresponding to each component region image, and output the key circuit component images belonging to the preset key circuit component types; The component connection parameter prediction model is used to perform the following steps: For any two images of the key circuit elements, calculate the image distance between the two images of the key circuit elements in the image; When the image distance is less than a preset distance threshold, obtain the minimum envelope image of the image that includes the two images of the key circuit elements; The minimum envelope image is input into the trained component connection parameter prediction model to obtain the connection parameters between the circuit elements corresponding to the two key circuit element images.

[0010] As an optional implementation, in the first aspect of the present invention, determining the radiation parameters corresponding to each key circuit element image based on a preset correlation analysis rule between components and electromagnetic interference includes: For each of the key circuit element images, obtain the set of connection parameters between the key circuit element image and all other key circuit element images to obtain the corresponding parameter set; The parameter set is input into the trained electromagnetic interference prediction model to obtain the interference parameters of the surrounding components corresponding to the output image of the key circuit component. Based on the pre-defined correlation between components and electromagnetic interference, the radiation level parameter corresponding to the circuit component type corresponding to the key circuit component image is determined. The product of the radiation level parameter and the interference parameter of the surrounding components is calculated to obtain the radiation parameter corresponding to the image of the key circuit component.

[0011] As an optional implementation, in the first aspect of the invention, predicting the optimized circuit region and optimization strategy corresponding to the hardware circuit based on the radiation parameters corresponding to the images of all the key circuit elements includes: For any of the key circuit element images, determine whether the radiation parameter corresponding to the key circuit element image is greater than a preset parameter threshold, and obtain a first determination result; When the first judgment result is yes, the image of the key circuit element is determined as the optimized circuit area corresponding to the hardware circuit. The key circuit element image and the corresponding connection parameters and radiation parameters are input into the trained optimization strategy prediction model to obtain the corresponding output optimization strategy; the optimization strategy includes at least one of the following: metal shielding, adding filter circuit, ferrite bead isolation, adding a new ground plane, linewidth modification, and separate power supply layer arrangement.

[0012] A second aspect of this invention discloses a hardware image analysis system for EMC optimization, the system comprising: The acquisition module is used to acquire images of the hardware circuit to be optimized for EMC. The identification module is used to identify multiple key circuit component images and connection parameters in the image based on image analysis algorithms; The determination module is used to determine the radiation parameters corresponding to each key circuit element image based on electromagnetic interference correlation analysis rules and the connection parameters. The prediction module is used to predict the optimized circuit region and optimization strategy corresponding to the hardware circuit based on the radiation parameters corresponding to the images of all the key circuit elements.

[0013] As an optional implementation, in the second aspect of the present invention, the circuit element corresponding to the key circuit element image is a crystal oscillator element, a power supply element, a power inductor element, or an MCU element.

[0014] As an optional implementation, in a second aspect of the invention, the connection parameters are at least one of the connection relationship between any two of the key circuit elements, the connection line type, and the connection distance.

[0015] As an optional implementation, in a second aspect of the invention, the identification module identifies the specific method by which it identifies multiple key circuit element images and connection parameters in the image based on an image analysis algorithm, including: The image is input into a trained classifier model to obtain the circuit type corresponding to the image; The image recognition model corresponding to the circuit type is determined from the preset image recognition model library; The image is input into the image recognition model to obtain the output images of multiple key circuit components and connection parameters.

[0016] As an optional implementation, in a second aspect of the invention, the image recognition model includes a component region segmentation model, a component type recognition model, and a component connection parameter prediction model.

[0017] As an optional implementation, in a second aspect of the invention, the component region segmentation model is used to segment the region image belonging to a single circuit component in the image to obtain multiple component region images for output. The component type recognition model is used to identify the circuit component parameters corresponding to each component region image, and output the key circuit component images belonging to the preset key circuit component types; The component connection parameter prediction model is used to perform the following steps: For any two images of the key circuit elements, calculate the image distance between the two images of the key circuit elements in the image; When the image distance is less than a preset distance threshold, obtain the minimum envelope image of the image that includes the two images of the key circuit elements; The minimum envelope image is input into the trained component connection parameter prediction model to obtain the connection parameters between the circuit elements corresponding to the two key circuit element images.

[0018] As an optional implementation, in a second aspect of the invention, the determining module determines the specific method by which it determines the radiation parameters corresponding to each key circuit element image based on a preset correlation analysis rule between components and electromagnetic interference, including: For each of the key circuit element images, obtain the set of connection parameters between the key circuit element image and all other key circuit element images to obtain the corresponding parameter set; The parameter set is input into the trained electromagnetic interference prediction model to obtain the interference parameters of the surrounding components corresponding to the output image of the key circuit component. Based on the pre-defined correlation between components and electromagnetic interference, the radiation level parameter corresponding to the circuit component type corresponding to the key circuit component image is determined. The product of the radiation level parameter and the interference parameter of the surrounding components is calculated to obtain the radiation parameter corresponding to the image of the key circuit component.

[0019] As an optional implementation, in a second aspect of the invention, the prediction module predicts the specific method by which it predicts the optimized circuit region and optimization strategy corresponding to the hardware circuit based on the radiation parameters corresponding to the images of all the key circuit elements, including: For any of the key circuit element images, determine whether the radiation parameter corresponding to the key circuit element image is greater than a preset parameter threshold, and obtain a first determination result; When the first judgment result is yes, the image of the key circuit element is determined as the optimized circuit area corresponding to the hardware circuit. The key circuit element image and the corresponding connection parameters and radiation parameters are input into the trained optimization strategy prediction model to obtain the corresponding output optimization strategy; the optimization strategy includes at least one of the following: metal shielding, adding filter circuit, ferrite bead isolation, adding a new ground plane, linewidth modification, and separate power supply layer arrangement.

[0020] A third aspect of the present invention discloses another hardware image analysis system for EMC optimization, the system comprising: Memory containing executable program code; A processor coupled to the memory; The processor calls the executable program code stored in the memory to execute some or all of the steps in the hardware image analysis method for EMC optimization disclosed in the first aspect of the present invention.

[0021] The fourth aspect of the present invention discloses a computer storage medium storing computer instructions, which, when invoked, are used to execute some or all of the steps in the hardware image analysis method for EMC optimization disclosed in the first aspect of the present invention.

[0022] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: This invention acquires images of hardware circuits to be optimized for EMC and identifies key circuit component images and connection parameters based on image analysis algorithms. It then determines radiation parameters by combining electromagnetic interference correlation analysis rules, predicts the optimization circuit area and optimization strategy, thereby enabling precise EMC optimization area location and strategy recommendation based on intelligent image analysis. This improves the efficiency and reliability of hardware circuit electromagnetic compatibility design and reduces the risk of EMC optimization failure due to misjudgment of interference sources. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a flowchart illustrating a hardware image analysis method for EMC optimization disclosed in an embodiment of the present invention.

[0025] Figure 2 This is a schematic diagram of the structure of a hardware image analysis system for EMC optimization disclosed in an embodiment of the present invention.

[0026] Figure 3 This is a schematic diagram of another hardware image analysis system for EMC optimization disclosed in an embodiment of the present invention. Detailed Implementation

[0027] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0028] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this invention are used to distinguish different objects, not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, apparatus, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0029] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0030] This invention discloses a hardware image analysis method and system for EMC optimization. By acquiring images of the hardware circuit to be optimized for EMC and identifying key circuit component images and connection parameters based on image analysis algorithms, and combining electromagnetic interference correlation analysis rules to determine radiation parameters, the method predicts the optimization circuit area and optimization strategy. This enables precise EMC optimization area location and strategy recommendation based on intelligent image analysis, improving the efficiency and reliability of hardware circuit electromagnetic compatibility design and reducing the risk of EMC optimization failure due to misjudgment of interference sources. Detailed explanations follow.

[0031] Example 1 Please see Figure 1 , Figure 1 This is a flowchart illustrating a hardware image analysis method for EMC optimization disclosed in an embodiment of the present invention. Wherein, Figure 1 The described hardware image analysis method for EMC optimization can be applied to data processing systems / data processing equipment / data processing servers (including local processing servers or cloud processing servers). For example... Figure 1 As shown, the hardware image analysis method for EMC optimization may include the following operations: 101. Obtain an image of the hardware circuit to be optimized for EMC.

[0032] Optionally, the image of the hardware circuit can be a high-resolution photograph of the front and back of the printed circuit board, a schematic scan, or an image exported from design software, with a resolution of not less than 2000×2000 pixels. This invention does not impose any limitations on this.

[0033] 102. Based on image analysis algorithms, identify multiple key circuit component images and connection parameters in the image. Optionally, the circuit elements corresponding to the key circuit element images are crystal oscillators, power supply elements, power inductors, or MCU elements.

[0034] Optionally, the key circuit component image can be a switching power supply chip, a high-frequency crystal oscillator, an RF module, a high-power MOSFET, or a long trace; this invention does not limit the scope of the invention.

[0035] Optionally, the connection parameters can be at least one of the following: the connection relationship between any two key circuit elements, the connection line type, and the connection distance.

[0036] 103. Based on electromagnetic interference correlation analysis rules and connection parameters, determine the radiation parameters corresponding to the image of each key circuit element. Optionally, the radiation parameter can be the expected radiation intensity (dB / µV / m) or a risk score, which is not limited in this invention.

[0037] 104. Based on the radiation parameters corresponding to the images of all key circuit components, predict the optimized circuit region and optimization strategy for the hardware circuit.

[0038] As can be seen, the above-described embodiments of the invention acquire images of the hardware circuit to be optimized for EMC and identify key circuit component images and connection parameters based on image analysis algorithms. They then combine electromagnetic interference correlation analysis rules to determine radiation parameters, predict the optimization circuit area and optimization strategy, thereby enabling accurate EMC optimization area location and strategy recommendation based on image intelligent analysis. This improves the efficiency and reliability of hardware circuit electromagnetic compatibility design and reduces the risk of EMC optimization failure due to misjudgment of interference sources.

[0039] As an optional embodiment, the step described above, which involves identifying multiple key circuit component images and connection parameters in the image based on an image analysis algorithm, includes: The image is input into the trained classifier model to obtain the circuit type corresponding to the image; The image recognition model corresponding to the circuit type is determined from the preset image recognition model library; The image is input into the image recognition model to obtain the output images of multiple key circuit components and connection parameters.

[0040] Optionally, the classifier model can be a 5-layer convolutional neural network, with the first layer having 64 filters and a 7×7 kernel, the second layer having 128 filters and a 5×5 kernel, the third layer having 256 filters and a 3×3 kernel, the fourth layer being global average pooling, and the fifth layer being fully connected to output the circuit type probability. After training on 80,000 labeled circuit images for 100 training epochs, the classification accuracy reaches 96.8%. This invention does not impose any limitations.

[0041] Optionally, the image recognition model library may pre-store dedicated models according to circuit type (such as switching power supply board, radio frequency board, digital motherboard), but this invention does not limit this.

[0042] As can be seen, through the above optional embodiments, by inputting images into a classifier model to determine the circuit type and selecting the corresponding image recognition model, the key circuit component images and connection parameters are output, thereby achieving accurate component and connection recognition based on circuit type adaptation, improving the targeting and accuracy of image analysis, and reducing the risk of component recognition errors caused by circuit type misjudgment.

[0043] As an optional embodiment, the image recognition model in the above steps includes a component region segmentation model, a component type recognition model, and a component connection parameter prediction model.

[0044] Optionally, the component region segmentation model is used to segment the region image belonging to a single circuit component in the image to obtain multiple component region images as output; Optionally, the component region segmentation model can be a U-Net structure, with the encoder using ResNet-50 pre-trained weights, the decoder having 4 layers of upsampling, and the output segmentation mask trained on 120,000 labeled circuit board images for 80 training rounds, achieving an average intersection-over-union ratio of 0.92. This invention does not impose any limitations.

[0045] Optionally, the component type recognition model is used to identify the circuit component parameters corresponding to each component region image and output the key circuit component images belonging to the preset key circuit component types; Optionally, the component type recognition model can be an EfficientNet-B4 classifier, trained for 60 training epochs on 150,000 component cropped images, with a Top-1 accuracy of 98.3%. Key types include switching chips, crystal oscillators, inductors, etc., which are not limited in this invention.

[0046] Optionally, the component connection parameter prediction model is used to perform the following steps: For any two key circuit element images, calculate the image distance between the two key circuit element images in the image; When the image distance is less than a preset distance threshold, obtain the minimum envelope image that includes the images of the two key circuit components in the image; The minimum envelope image is input into the trained component connection parameter prediction model to obtain the connection parameters between the circuit components corresponding to the two key circuit component images.

[0047] Optionally, the image distance is the pixel distance between the center points of the components, but this invention does not limit it.

[0048] Optionally, the component connection parameter prediction model can be a Vision Transformer (ViT-B / 16) + regression head, trained for 50 training epochs on 100,000 connection pair images, with prediction errors of less than 5% for trace length, width, and number of layers. This invention does not impose any limitations on this model.

[0049] As can be seen, through the above optional embodiments, the component region image is segmented by the component region segmentation model, the key component image is output by the component type recognition model, and the connection parameter prediction model predicts the connection parameters based on the minimum envelope image. This achieves step-by-step accurate component identification and connection parameter extraction, improves the completeness and accuracy of the determination of key circuit component images and connection parameters, and reduces the risk of analysis deviation caused by segmentation or connection misjudgment.

[0050] As an optional embodiment, the step described above, determining the radiation parameters corresponding to each key circuit component image based on preset correlation analysis rules between components and electromagnetic interference, includes: For each critical circuit element image, obtain the set of connection parameters between the critical circuit element image and all other critical circuit element images to obtain the corresponding parameter set; The parameter set is input into the trained electromagnetic interference prediction model to obtain the interference parameters of the surrounding components corresponding to the output image of the key circuit component. Based on the pre-defined correlation between components and electromagnetic interference, the radiation level parameter corresponding to the circuit component type corresponding to the key circuit component image is determined. The radiation parameters corresponding to the key circuit element image are obtained by multiplying the radiation level parameter and the interference parameter of the surrounding components.

[0051] Optionally, the electromagnetic interference prediction model can be a 4-layer fully connected neural network with 512-256-128-64 hidden layers, using the ReLU activation function, trained for 100 training epochs on 180,000 simulated and measured interference cases, with an interference intensity prediction error of less than 8%. This invention does not impose any limitations.

[0052] Optionally, the association can be determined in advance by an expert rule base or by the operator based on experimental data; this invention does not limit this.

[0053] As can be seen, through the above optional embodiments, by collecting a set of surrounding connection parameters for each key circuit component image and inputting it into the electromagnetic interference prediction model to obtain surrounding interference parameters, and combining the radiation parameters with the component type radiation degree parameters to obtain radiation parameters, accurate radiation quantification based on dual evaluation of connection and type is achieved, improving the comprehensiveness and reliability of radiation parameter calculation, and reducing the risk of radiation evaluation distortion caused by ignoring surrounding interference.

[0054] As an optional embodiment, the step above, predicting the optimized circuit region and optimization strategy corresponding to the hardware circuit based on the radiation parameters corresponding to the images of all key circuit components, includes: For any image of a critical circuit element, determine whether the radiation parameter corresponding to the image of the critical circuit element is greater than a preset parameter threshold, and obtain the first judgment result; When the first judgment result is yes, the image of the key circuit element is identified as the optimized circuit area corresponding to the hardware circuit. The key circuit element image, along with the corresponding connection and radiation parameters, is input into the trained optimization strategy prediction model to obtain the corresponding output optimization strategy.

[0055] Optional optimization strategies include at least one of the following: metal shielding, adding filter circuitry, ferrite bead isolation, adding a new ground plane, modifying linewidth, and arranging power supplies on a separate layer.

[0056] Optionally, the prediction model for this optimization strategy can be a BERT+ fully connected head for multi-label classification, trained for 70 training epochs on 250,000 optimization cases, with a multi-label F1 score of 0.91. The output strategy includes at least one of the following: metal shielding, adding filter circuits, ferrite bead isolation, adding a new ground plane, modifying linewidth, and arranging power supply on a separate layer. This invention does not limit the specific strategies.

[0057] As can be seen, through the above optional embodiments, the optimized circuit area is determined by judging whether the radiation parameters of the key circuit component image exceed the threshold, and the radiation parameters and connection parameters are input to the optimization strategy prediction model to output the optimization strategy. This achieves accurate optimization area positioning and strategy generation based on radiation threshold and model prediction, improves the pertinence and practicality of EMC optimization schemes, and reduces the risk of residual electromagnetic interference caused by improper optimization area or strategy.

[0058] Example 2 Please see Figure 2 , Figure 2 This is a schematic diagram of the structure of a hardware image analysis system for EMC optimization disclosed in an embodiment of the present invention. Figure 2 The described hardware image analysis system for EMC optimization can be applied to data processing systems / data processing equipment / data processing servers (including local processing servers or cloud processing servers). For example... Figure 2 As shown, the hardware image analysis system for EMC optimization may include: The acquisition module 201 is used to acquire an image of the hardware circuit to be optimized for EMC.

[0059] The recognition module 202 is used to identify multiple key circuit component images and connection parameters in an image based on an image analysis algorithm. The determination module 203 is used to determine the radiation parameters corresponding to the image of each key circuit element based on electromagnetic interference correlation analysis rules and connection parameters. The prediction module 204 is used to predict the optimized circuit region and optimization strategy corresponding to the hardware circuit based on the radiation parameters corresponding to the images of all key circuit components.

[0060] As can be seen, the above-described embodiments of the invention acquire images of the hardware circuit to be optimized for EMC and identify key circuit component images and connection parameters based on image analysis algorithms. They then combine electromagnetic interference correlation analysis rules to determine radiation parameters, predict the optimization circuit area and optimization strategy, thereby enabling accurate EMC optimization area location and strategy recommendation based on image intelligent analysis. This improves the efficiency and reliability of hardware circuit electromagnetic compatibility design and reduces the risk of EMC optimization failure due to misjudgment of interference sources.

[0061] As an optional embodiment, the circuit element corresponding to the key circuit element image is a crystal oscillator element, a power supply element, a power inductor element, or an MCU element.

[0062] As can be seen, the above optional embodiments limit the types of circuit components corresponding to the images of key circuit components, so that this solution can be optimized based on components that are more prone to electromagnetic radiation problems, assisting in the accurate EMC optimization area location and strategy recommendation based on image intelligent analysis, and improving the efficiency and reliability of hardware circuit electromagnetic compatibility design.

[0063] As an optional embodiment, the connection parameters are at least one of the following: the connection relationship between any two key circuit elements, the connection line type, and the connection distance.

[0064] As can be seen, the above optional embodiments limit the content of the connection parameters, enabling this solution to optimize the circuit based on a more comprehensive set of connection characteristics between components. This helps to achieve accurate EMC optimization area location and strategy recommendation based on image intelligent analysis, thereby improving the efficiency and reliability of hardware circuit electromagnetic compatibility design.

[0065] As an optional embodiment, the recognition module identifies the specific methods by which it identifies multiple key circuit component images and connection parameters in an image based on image analysis algorithms, including: The image is input into the trained classifier model to obtain the circuit type corresponding to the image; The image recognition model corresponding to the circuit type is determined from the preset image recognition model library; The image is input into the image recognition model to obtain the output images of multiple key circuit components and connection parameters.

[0066] As can be seen, through the above optional embodiments, by inputting images into a classifier model to determine the circuit type and selecting the corresponding image recognition model, the key circuit component images and connection parameters are output, thereby achieving accurate component and connection recognition based on circuit type adaptation, improving the targeting and accuracy of image analysis, and reducing the risk of component recognition errors caused by circuit type misjudgment.

[0067] As an optional embodiment, the image recognition model includes a component region segmentation model, a component type recognition model, and a component connection parameter prediction model.

[0068] As can be seen, the model details of the image recognition model are defined through the above optional embodiments, so as to more accurately identify key circuit components and connection parameters in the image, assist in realizing accurate EMC optimization area positioning and strategy recommendation based on image intelligent analysis, and improve the efficiency and reliability of hardware circuit electromagnetic compatibility design.

[0069] As an optional embodiment, the component region segmentation model is used to segment the region image of a single circuit component in an image to obtain multiple component region images as output. The component type recognition model is used to identify the circuit component parameters corresponding to each component region image and output the key circuit component images that belong to the preset key circuit component types; The component connection parameter prediction model is used to perform the following steps: For any two key circuit element images, calculate the image distance between the two key circuit element images in the image; When the image distance is less than a preset distance threshold, obtain the minimum envelope image that includes the images of the two key circuit components in the image; The minimum envelope image is input into the trained component connection parameter prediction model to obtain the connection parameters between the circuit components corresponding to the two key circuit component images.

[0070] As can be seen, through the above optional embodiments, the component region image is segmented by the component region segmentation model, the key component image is output by the component type recognition model, and the connection parameter prediction model predicts the connection parameters based on the minimum envelope image. This achieves step-by-step accurate component identification and connection parameter extraction, improves the completeness and accuracy of the determination of key circuit component images and connection parameters, and reduces the risk of analysis deviation caused by segmentation or connection misjudgment.

[0071] As an optional embodiment, the determination module determines the specific method for determining the radiation parameters corresponding to each key circuit component image based on preset correlation analysis rules of components and electromagnetic interference, including: For each critical circuit element image, obtain the set of connection parameters between the critical circuit element image and all other critical circuit element images to obtain the corresponding parameter set; The parameter set is input into the trained electromagnetic interference prediction model to obtain the interference parameters of the surrounding components corresponding to the output image of the key circuit component. Based on the pre-defined correlation between components and electromagnetic interference, the radiation level parameter corresponding to the circuit component type corresponding to the key circuit component image is determined. The radiation parameters corresponding to the key circuit element image are obtained by multiplying the radiation level parameter and the interference parameter of the surrounding components.

[0072] As can be seen, through the above optional embodiments, by collecting a set of surrounding connection parameters for each key circuit component image and inputting it into the electromagnetic interference prediction model to obtain surrounding interference parameters, and combining the radiation parameters with the component type radiation degree parameters to obtain radiation parameters, accurate radiation quantification based on dual evaluation of connection and type is achieved, improving the comprehensiveness and reliability of radiation parameter calculation, and reducing the risk of radiation evaluation distortion caused by ignoring surrounding interference.

[0073] As an optional embodiment, the prediction module predicts the specific method of optimizing the circuit region and optimization strategy corresponding to the hardware circuit based on the radiation parameters corresponding to the images of all key circuit components, including: For any image of a critical circuit element, determine whether the radiation parameter corresponding to the image of the critical circuit element is greater than a preset parameter threshold, and obtain the first judgment result; When the first judgment result is yes, the image of the key circuit element is identified as the optimized circuit area corresponding to the hardware circuit. The key circuit component image and its corresponding connection and radiation parameters are input into the trained optimization strategy prediction model to obtain the corresponding optimization strategy output. The optimization strategy includes at least one of the following: metal shielding, adding filter circuit, ferrite bead isolation, adding a new ground plane, linewidth modification, and separate power supply layer arrangement.

[0074] As can be seen, through the above optional embodiments, the optimized circuit area is determined by judging whether the radiation parameters of the key circuit component image exceed the threshold, and the radiation parameters and connection parameters are input to the optimization strategy prediction model to output the optimization strategy. This achieves accurate optimization area positioning and strategy generation based on radiation threshold and model prediction, improves the pertinence and practicality of EMC optimization schemes, and reduces the risk of residual electromagnetic interference caused by improper optimization area or strategy.

[0075] Example 3 Please see Figure 3 , Figure 3 This is another hardware image analysis system for EMC optimization disclosed in the embodiments of the present invention. Figure 3 The described hardware image analysis system for EMC optimization is applied in data processing systems / data processing equipment / data processing servers (wherein, the server includes a local processing server or a cloud processing server). Figure 3 As shown, the hardware image analysis system for EMC optimization may include: Memory 301 storing executable program code; Processor 302 coupled to memory 301; The processor 302 calls the executable program code stored in the memory 301 to execute the steps of the hardware image analysis method for EMC optimization described in Embodiment 1.

[0076] Example 4 This invention discloses a computer read storage medium that stores a computer program for electronic data interchange, wherein the computer program causes a computer to execute the steps of the hardware image analysis method for EMC optimization described in Embodiment 1.

[0077] Example 5 This invention discloses a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program, and the computer program is operable to cause a computer to perform the steps of the hardware image analysis method for EMC optimization described in Embodiment 1.

[0078] The foregoing has described specific embodiments of this specification; other embodiments are within the scope of the appended claims. In some cases, the actions or steps described in the claims may be performed in a different order than those shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily have to follow the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0079] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer. Specifically, a computer can be, for example, a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0080] For ease of description, the above devices are described in terms of function, divided into various units. Of course, in implementing this specification, the functions of each unit can be implemented in one or more software and / or hardware components.

[0081] Those skilled in the art will understand that the embodiments of this specification can be provided as methods, systems, or computer program products. Therefore, the embodiments of this specification can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the embodiments of this specification can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0082] This specification is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this specification. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create a machine for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0083] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0084] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0085] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0086] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0087] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0088] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0089] This specification can be described in the general context of computer-executable instructions that are executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform a specific task or implement a specific abstract data type. This specification can also be practiced in distributed computing environments, where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer storage media, including storage devices.

[0090] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. In particular, the system embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments.

[0091] Finally, it should be noted that the hardware image analysis method and system for EMC optimization disclosed in the embodiments of the present invention are merely preferred embodiments of the present invention, and are only used to illustrate the technical solutions of the present invention, not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A hardware image analysis method for EMC optimization, characterized in that, The method includes: Obtain an image of the hardware circuit to be optimized for EMC; Based on image analysis algorithms, multiple key circuit component images and connection parameters in the image were identified; Based on the electromagnetic interference correlation analysis rules and the connection parameters, the radiation parameters corresponding to each key circuit element image are determined. Based on the radiation parameters corresponding to the images of all the key circuit elements, predict the optimized circuit region and optimization strategy corresponding to the hardware circuit.

2. The hardware image analysis method for EMC optimization according to claim 1, characterized in that, The circuit elements corresponding to the images of the key circuit elements are crystal oscillators, power supply elements, power inductors, or MCU elements.

3. The hardware image analysis method for EMC optimization according to claim 1, characterized in that, The connection parameters are at least one of the following: the connection relationship between any two key circuit elements, the connection line type, and the connection distance.

4. The hardware image analysis method for EMC optimization according to claim 1, characterized in that, The image analysis algorithm identifies multiple key circuit component images and connection parameters in the image, including: The image is input into a trained classifier model to obtain the circuit type corresponding to the image; The image recognition model corresponding to the circuit type is determined from the preset image recognition model library; The image is input into the image recognition model to obtain the output images of multiple key circuit components and connection parameters.

5. The hardware image analysis method for EMC optimization according to claim 4, characterized in that, The image recognition model includes a component region segmentation model, a component type recognition model, and a component connection parameter prediction model.

6. The hardware image analysis method for EMC optimization according to claim 5, characterized in that, The component region segmentation model is used to segment the region image belonging to a single circuit component in the image to obtain multiple component region images for output. The component type recognition model is used to identify the circuit component parameters corresponding to each component region image, and output the key circuit component images belonging to the preset key circuit component types; The component connection parameter prediction model is used to perform the following steps: For any two images of the key circuit elements, calculate the image distance between the two images of the key circuit elements in the image; When the image distance is less than a preset distance threshold, obtain the minimum envelope image of the image that includes the two images of the key circuit elements; The minimum envelope image is input into the trained component connection parameter prediction model to obtain the connection parameters between the circuit elements corresponding to the two key circuit element images.

7. The hardware image analysis method for EMC optimization according to claim 1, characterized in that, The radiation parameters corresponding to each key circuit component image are determined based on the preset correlation analysis rules of components and electromagnetic interference, including: For each of the key circuit element images, obtain the set of connection parameters between the key circuit element image and all other key circuit element images to obtain the corresponding parameter set; The parameter set is input into the trained electromagnetic interference prediction model to obtain the interference parameters of the surrounding components corresponding to the output image of the key circuit component. Based on the pre-defined correlation between components and electromagnetic interference, the radiation level parameter corresponding to the circuit component type corresponding to the key circuit component image is determined. The product of the radiation level parameter and the interference parameter of the surrounding components is calculated to obtain the radiation parameter corresponding to the image of the key circuit component.

8. The hardware image analysis method for EMC optimization according to claim 1, characterized in that, The step of predicting the optimized circuit region and optimization strategy corresponding to the hardware circuit based on the radiation parameters corresponding to the images of all the key circuit components includes: For any of the key circuit element images, determine whether the radiation parameter corresponding to the key circuit element image is greater than a preset parameter threshold, and obtain a first determination result; When the first judgment result is yes, the image of the key circuit element is determined as the optimized circuit area corresponding to the hardware circuit. The key circuit element image and the corresponding connection parameters and radiation parameters are input into the trained optimization strategy prediction model to obtain the corresponding output optimization strategy; the optimization strategy includes at least one of the following: metal shielding, adding filter circuit, ferrite bead isolation, adding a new ground plane, linewidth modification, and separate power supply layer arrangement.

9. A hardware image analysis system for EMC optimization, characterized in that, The system includes: The acquisition module is used to acquire images of the hardware circuit to be optimized for EMC. The identification module is used to identify multiple key circuit component images and connection parameters in the image based on image analysis algorithms; The determination module is used to determine the radiation parameters corresponding to each key circuit element image based on electromagnetic interference correlation analysis rules and the connection parameters. The prediction module is used to predict the optimized circuit region and optimization strategy corresponding to the hardware circuit based on the radiation parameters corresponding to the images of all the key circuit elements.

10. A hardware image analysis system for EMC optimization, characterized in that, The system includes: Memory containing executable program code; A processor coupled to the memory; The processor calls the executable program code stored in the memory to execute the hardware image analysis method for EMC optimization as described in any one of claims 1-8.

Images