Lightweight time-sensitive network configuration, time synchronization and verification method and system

Abstract

This invention discloses a lightweight time-sensitive network (TSN) configuration, time synchronization, and verification method and system, belonging to the field of TSN technology. The invention receives network topology and device configuration parameters through a graphical interface, generates a configuration file and derives configuration files for each module, and automatically executes network interface initialization, time synchronization, traffic shaping configuration, and frame transmission / reception verification sequentially, summarizing and exporting the results. Specifically, time synchronization uses a three-reading method to measure clock deviation, calibrates the system clock using a PI servo algorithm, and calculates the maximum absolute deviation within a statistical period to quantify synchronization accuracy. Frame transmission employs an absolute time frame transmission and preheating alignment mechanism, prioritizing transmission in case of multi-flow conflicts. Traffic shaping supports both credit shaping and gated list modes. This invention integrates the dispersed configuration and verification processes into a unified closed-loop process, lowering the deployment threshold of TSN and improving experimental repeatability and result traceability.

Description

Technical Field

[0001] This invention relates to the fields of Time-Sensitive Networking (TSN) and Ethernet control, specifically to a lightweight method and system for configuring, synchronizing, and verifying time-sensitive networks. Background Technology

[0002] TSN (Time Sequencing Network) provides deterministic data transmission guarantees for scenarios with stringent real-time requirements, such as industrial control, automotive Ethernet, and rail transportation, by introducing high-precision time synchronization, traffic scheduling, and shaping mechanisms on top of standard Ethernet. The engineering implementation and verification of TSN typically involves the following key steps: initial configuration of network interfaces and VLANs (Virtual Local Area Networks); deployment and accuracy calibration of high-precision time synchronization protocols; parameter setting and distribution of queue scheduling and traffic shaping strategies; and measurement and verification of performance indicators such as end-to-end latency and jitter.

[0003] Currently, relevant technical solutions have been proposed in this field for testing and verifying the high-precision time synchronization and traffic scheduling mechanisms of Time-Sensitive Networks (TSNs). For example, Chinese Patent CN115277519A discloses a traffic shaping test method and system, which uses a test device with time synchronization and packet simulation capabilities connected to a TSN switch. The test device outputs simulated traffic of different quality of service levels, which is then gated by the switch and returned to the test device for analysis to determine the gating accuracy of the switch. Another example is Chinese Patent CN113347065A, which discloses a traffic scheduling test device and method in time-sensitive networks. It uses three hosts and three TSN switches to build a specific test topology, and verifies the synchronization and scheduling performance of the switches by aggregating background traffic and TSN traffic.

[0004] However, the aforementioned existing technical solutions still have shortcomings in practical engineering applications and verification: On the one hand, they rely on a combination of multiple independent tools or manual commands to complete operations such as network interface configuration, synchronization parameter setting, shaping rule distribution, and verification packet capture. Different devices, different network card drivers, and different operating system versions have different support for command formats and parameters, making the configuration process cumbersome, error-prone, and difficult to reproduce. On the other hand, key indicators such as clock deviation, link latency, and frequency adjustment during the synchronization process are often scattered in system logs, lacking a unified collection, statistics, and visualization mechanism. Users cannot intuitively know whether the current synchronization is stable or whether the accuracy meets the standards, which is not conducive to problem localization and system acceptance. In addition, end-to-end latency measurement is usually achieved through independent packet sending tools. Details such as frame sending time alignment at the sending end and sending order control of multi-priority streams are not standardized and encapsulated. The measurement results lack correlation records with the current shaping configuration and time synchronization accuracy, resulting in poor traceability of experimental results and difficulty in supporting comparative verification and engineering reproduction under different configuration strategies.

[0005] In summary, how to provide a TSN verification method that is simple to configure, has an automated process, observable status, and traceable results has become a technical problem that urgently needs to be solved in this field. Summary of the Invention

[0006] To address the problems of fragmented TSN configuration processes, poor observability of time synchronization status, and disconnect between verification and configuration in existing technologies, this invention provides a lightweight method and system for time-sensitive network configuration, time synchronization, and verification. It uses a graphical interface to uniformly input experimental parameters and generate a global configuration file. The system automatically executes network initialization, high-precision time synchronization, traffic shaping configuration, and transmit / receive frame verification in sequence. Finally, it summarizes and exports the synchronization accuracy, shaping configuration, and measurement results, thereby integrating the fragmented configuration and verification processes into a unified closed-loop process. This lowers the barrier to TSN deployment while improving the repeatability of experiments and the traceability of results.

[0007] To achieve the above objectives, the present invention adopts the following technical solution:

[0008] This invention proposes a lightweight time-sensitive network configuration, time synchronization, and verification method, comprising the following steps:

[0009] S1. Receive network topology and device configuration parameters through a graphical interface, and generate a configuration file containing device configuration parameters, including network interface parameters, clock role, traffic shaping mode, and frame transmission parameters.

[0010] S2. Generate module configuration files for driving network interface configuration, time synchronization management, traffic shaping configuration, and transmit / receive frame verification based on the configuration files.

[0011] S3. Automatically perform network interface initialization based on the module configuration file configured for the network interface;

[0012] S4. Based on the time synchronization management module configuration file, automatically execute the time synchronization process, which includes:

[0013] S401. The clock deviation sample between PHC (PTP Hardware Clock, Precision Time Protocol Hardware Clock) and system clock is obtained by three readings. In one round of multiple sampling, the sample with the smallest system side reading time interval is taken as the best sample, and the clock deviation is calculated based on the sample.

[0014] S402. Input the calculated clock deviation into the PI (Proportional Integral) servo algorithm to generate the frequency adjustment amount, and perform synchronization calibration of the system clock based on PHC.

[0015] S403. Real-time statistics of the clock deviation calculated each time. In each statistical period, update the minimum and maximum values ​​of the clock deviation within the statistical period based on the clock deviation calculated each time. At the end of the statistical period, calculate the maximum absolute deviation of the clock deviation within the statistical period.

[0016] S5. Based on the module configuration file of the traffic shaping configuration, automatically execute the traffic shaping configuration and generate shaping configuration parameters. The shaping configuration parameters include the queue and shaping rules corresponding to the traffic shaping mode.

[0017] S6. Based on the module configuration file for frame transmission and reception verification, automatically execute the frame transmission method and end-to-end delay measurement based on the frame transmission parameters, wherein the frame transmission method is absolute time frame transmission;

[0018] S7. Summarize the maximum absolute deviation obtained from S4, the shaping configuration parameters obtained from S5, and the frame transmission method and end-to-end delay measurement results obtained from S6, and display and export them.

[0019] Furthermore, in S1, the frame transmission parameters include destination address, destination port, frame transmission period, payload length, number of frames to be transmitted, and frame priority.

[0020] Furthermore, in S3, the network interface initialization includes: configuring the physical interface address and enabling it according to the configuration file; creating a VLAN interface on the physical interface and enabling it, and configuring the VLAN interface address; configuring the VLAN interface egress mapping table based on the preset priority mapping rules; and verifying the interface status and address configuration results.

[0021] Furthermore, in S401, the three-reading method specifically includes: for each sampling, reading the first reading of the system clock, reading the PHC, reading the second reading of the system clock, calculating the time interval between the two readings of the system clock, and using the time interval as the system side reading time interval.

[0022] Furthermore, in S402, the PI servo algorithm dynamically calculates the proportional coefficient and integral coefficient based on the synchronization interval, wherein the proportional coefficient is inversely proportional to the synchronization interval, and the integral coefficient is directly proportional to the synchronization interval.

[0023] Furthermore, the formula for calculating the maximum absolute deviation is:

[0024] Maximum absolute deviation = .

[0025] Furthermore, in S5, the traffic shaping mode is a credit shaping mode, and the shaping configuration parameters include idle slope. The system automatically calculates the sending slope, credit upper bound, and credit lower bound based on the idle slope.

[0026] Furthermore, in S5, the traffic shaping mode is a time-aware shaping mode based on a gating list, and the shaping configuration parameters include: a gating scheduling entry list and the base-time when the gating list takes effect.

[0027] This invention also proposes a lightweight time-sensitive network configuration, time synchronization, and verification system for implementing the above method, comprising:

[0028] The graphical user interface module is used to receive input of network topology and device configuration parameters and generate configuration files;

[0029] The configuration file parsing module is used to generate module configuration files for driving network interface configuration, time synchronization management, traffic shaping configuration, and transmit / receive frame verification based on the configuration file.

[0030] The network interface configuration module is used to automatically perform network interface initialization based on its module 407 configuration file.

[0031] The time synchronization management module automatically executes the time synchronization process according to its module configuration file. The time synchronization management module includes a deviation measurement unit, a synchronization calibration unit, and an accuracy statistics unit. The deviation measurement unit uses a three-reading method to obtain clock deviation samples between the PHC and the system clock. In a round of multiple sampling, the sample with the smallest system-side reading time interval is selected as the optimal sample, and the clock deviation is calculated based on this sample. The synchronization calibration unit inputs the calculated clock deviation into the PI servo algorithm to generate a frequency adjustment amount and performs synchronization calibration on the system clock using the PHC as a reference. The accuracy statistics unit updates the minimum and maximum values ​​of the clock deviation within each statistical period based on the calculated clock deviation each time, and calculates the maximum absolute deviation of the clock deviation within the statistical period at the end of the statistical period.

[0032] The traffic shaping configuration module is used to automatically execute traffic shaping configuration according to its module configuration file and generate shaping configuration parameters. The shaping configuration parameters include the queue and shaping rules corresponding to the traffic shaping mode.

[0033] The frame transmission and reception verification module is used to automatically perform frame transmission mode and end-to-end delay measurement based on the frame transmission parameters according to its module configuration file, wherein the frame transmission mode is absolute time frame transmission;

[0034] The results summary module is used to summarize the maximum absolute deviation obtained by the time synchronization management module, the shaping configuration parameters obtained by the traffic shaping configuration module, and the frame transmission method and end-to-end latency measurement results obtained by the frame transmission and reception verification module, and then display and export them.

[0035] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0036] (1) This invention uses a graphical interface to uniformly input experimental topology and equipment configuration parameters, generate configuration files and automatically derive configuration files for each module, and automatically execute network interface initialization, time synchronization, traffic shaping configuration, frame sending and receiving verification and result summarization in sequence, integrating the scattered configuration and verification links into an integrated closed-loop process. Users do not need to remember complex command line syntax or manually connect each configuration step, which significantly reduces the experimental and deployment threshold of time-sensitive network technology.

[0037] (2) This invention uses a three-reading method to measure the clock deviation between the PHC and the system clock. In a round of multiple sampling, the sample with the smallest system-side reading time interval is selected as the best sample, effectively reducing the impact of interruptions or delays during the reading process on the measurement accuracy. The PI servo algorithm is used to convert the clock deviation into a frequency adjustment amount to achieve smooth synchronization. When the deviation exceeds a preset threshold, a one-time clock jump is performed and the servo is reset to achieve rapid recovery under large deviation conditions. In each statistical period, the minimum and maximum values ​​of the clock deviation are updated according to each calculation, and the maximum absolute deviation is calculated as the synchronization accuracy index to achieve quantitative display and traceability of synchronization accuracy, solving the problem of unobservable synchronization status in the prior art.

[0038] (3) This invention adopts an absolute time frame transmission method. When multiple streams have the same scheduling time, they are sent in order according to priority to ensure the priority transmission of time-sensitive service traffic. At the same time, this invention supports credit shaping mode and time-aware shaping mode based on gating list. Users only need to configure a few key parameters, and the system automatically completes parameter conversion, rule generation and distribution. Before distribution, it automatically cleans up existing rules and detects conflicts, effectively reducing the configuration error rate.

[0039] (4) This invention unifies all configuration parameters and verification results, visualizes them in a graphical interface, and supports exporting them as structured files, making it convenient for users to archive, reproduce experiments, or conduct comparative analysis of different configuration strategies. When the verification results do not meet expectations, users can adjust the parameters according to the displayed results, and the system will automatically re-execute the configuration and verification process to achieve rapid iterative verification, which greatly improves experimental efficiency and the traceability of results. Attached Figure Description

[0040] Figure 1 The flowchart illustrates a lightweight time-sensitive network configuration, time synchronization, and verification method provided in an embodiment of the present invention. Detailed Implementation

[0041] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0042] Example 1

[0043] refer to Figure 1This embodiment provides a lightweight time-sensitive network configuration, time synchronization and verification method, which is applied to a lightweight time-sensitive network configuration, time synchronization and verification system. The system includes a graphical interface module, a configuration file parsing module, a network interface configuration module, a time synchronization management module, a traffic shaping configuration module, a frame sending and receiving verification module, and a result summarization module.

[0044] The time synchronization management module includes a deviation measurement unit, a synchronization calibration unit, an accuracy statistics unit, and a PHC calibration unit.

[0045] The traffic shaping configuration module includes a credit shaping configuration unit, a gating list shaping configuration unit, and a rule cleaning and conflict detection unit;

[0046] The frame verification module includes a sending end scheduling unit, a receiving end acquisition unit, and an end-to-end index calculation unit.

[0047] The method provided in this embodiment is performed according to the following steps:

[0048] S1. Users input network topology and device configuration parameters through the graphical interface module, generating a configuration file containing device configuration parameters, which serves as the configuration source for subsequent steps.

[0049] The network topology includes the connection relationships and port correspondences between each terminal device and the time-sensitive network switch. The device configuration parameters include: network interface parameters, clock role, traffic shaping mode, and frame transmission parameters.

[0050] The network interface parameters include physical interface name, VLAN identifier and interface name, IP address, etc.; the clock role includes master clock, slave clock, or backup clock; the traffic shaping mode is either credit shaping mode or time-aware shaping mode based on a gating list, where credit shaping mode corresponds to the IEEE 802.1Qav protocol, and time-aware shaping mode based on a gating list corresponds to the IEEE 802.1Qbv protocol; the frame transmission parameters include destination address, destination port, frame transmission period, payload length, number of frames transmitted, and frame priority. Users can customize these parameters according to experimental requirements.

[0051] S2, the configuration file parsing module reads the configuration file generated by S1, and generates module configuration files for driving network interface configuration, time synchronization management, traffic shaping configuration, and frame sending and receiving verification based on the device configuration parameters contained therein.

[0052] Each module's configuration file contains specific parameters required for that module. For example, the network interface configuration module's configuration file contains information such as the physical interface name, VLAN identifier and interface name, and IP address; the time synchronization management module's configuration file contains parameters such as clock role and synchronization period.

[0053] S3. The network interface configuration module automatically performs network interface initialization based on its module configuration file, specifically including:

[0054] S301. Configure the IP address of the physical interface according to the configuration file and set it to enabled. The physical interface refers to the physical network interface, such as eth0, ens33, etc.

[0055] S302. Create a VLAN interface on the physical interface and enable it, then configure an IP address for the VLAN interface. For example, create a VLAN interface eth0.10 with the identifier 10 on the physical interface eth0 and configure the corresponding IP address.

[0056] S303. Configure the egress mapping table of the VLAN interface based on the preset priority mapping rules. The priority mapping rules define how data frames of different priorities are mapped to different egress queues, which is the basis for achieving quality of service assurance.

[0057] S304. Verify the interface status and address configuration results. If the verification passes, proceed to S4; if the verification fails, the network interface configuration module records the error information and prompts the user to modify the device configuration parameters; the system re-executes S1 to S3 to ensure the correctness of the network interface configuration.

[0058] S4. The time synchronization management module automatically executes the time synchronization process according to its module configuration file. This embodiment adds high-precision deviation measurement and statistical functions based on the IEEE 802.1AS protocol. Specifically, it includes:

[0059] S401, the deviation measurement unit uses a three-reading method to acquire the sampled data between the PHC and the system clock. Specifically, for each sample, the following operations are performed sequentially:

[0060] S4011, Read the first reading of the system clock, denoted as... ;

[0061] S4012, Read PHC, and record it as... ;

[0062] S4013, Read the second reading of the system clock, and record it as... ;

[0063] S4014. Calculate the system reading time interval using the following formula. :

[0064]

[0065] This interval reflects the time overhead of the reading process.

[0066] To improve measurement accuracy, the deviation measurement unit employs multiple sampling in one round. In this embodiment, each round involves 10 consecutive samplings, and the results of each sampling are recorded. , , and In this round of sampling, the system reading time interval was selected. The smallest sample is taken as the best sample for that round, and the clock skew for that round is calculated based on the best sample. Clock skew The calculation formula is:

[0067]

[0068] In this step, by selecting the sample with the smallest system reading time interval, the impact of interruption or delay during the reading process on measurement accuracy can be minimized.

[0069] S402 The synchronization calibration unit inputs the clock deviation calculated by S401 into the PI servo algorithm to generate the frequency adjustment amount, and performs synchronization calibration of the system clock based on PHC.

[0070] The PI servo algorithm is based on the synchronization interval. Dynamic calculation of proportional coefficient and integral coefficient Among them, the proportionality coefficient With synchronization interval Inversely proportional, integral coefficient With synchronization interval It is directly proportional, and the specific calculation formula is as follows:

[0071]

[0072]

[0073] in, This is the baseline value for the proportionality coefficient. The baseline value for the integral coefficient, and It can be adjusted according to system characteristics.

[0074] The PI servo algorithm calculates the current clock skew using the following formula. Convert to frequency adjustment amount :

[0075]

[0076]

[0077]

[0078]

[0079] In the formula, For the proportion term, This is the points status, updated each time. This is the integral increment.

[0080] When the clock deviation is detected to exceed the preset step threshold, the synchronization calibration unit performs a one-time clock transition and resets the servo, so that the drift and convergence can be re-estimated subsequently; when the clock deviation does not exceed the preset step threshold, the synchronization calibration unit performs PI servo calibration normally.

[0081] S403, the accuracy statistics unit receives the clock deviation output by the deviation measurement unit in real time. Within each statistical cycle, it updates the minimum and maximum clock deviation values ​​based on the calculated clock deviation for each cycle. At the end of the statistical cycle, it calculates the maximum absolute clock deviation within that cycle using the following formula:

[0082] Maximum absolute deviation =

[0083] The maximum absolute deviation serves as a synchronization accuracy indicator, used for subsequent visualization and result export. By analyzing the maximum absolute deviation within the statistical period, users can intuitively understand the stability and accuracy of time synchronization.

[0084] Furthermore, in this embodiment, the PHC calibration unit also provides an interface for reading and calibrating the PHC. Users can trigger the reading of the current PHC value through the graphical interface module, and it supports applying a given calibration amount or calibration target to the PHC adjustment.

[0085] S5, the traffic shaping configuration module automatically performs traffic shaping configuration based on its module configuration file and generates shaping configuration parameters.

[0086] Before issuing new shaping rules, the rule cleanup and conflict detection unit cleans up existing shaping rules on the current port and checks whether there are any conflicts between the new rules and the existing configuration. If a conflict exists, the rule cleanup and conflict detection unit records the error information and prompts the user to modify the device configuration parameters. The system then re-executes S1 to S4 and then executes S5 again. If there is no conflict, the corresponding configuration is executed according to the traffic shaping mode selected by the user.

[0087] When the traffic shaping mode in the device configuration parameters is set to credit shaping mode, the shaping configuration parameters include idleslope. Users only need to configure idleslope; the credit shaping configuration unit automatically calculates the sending slope (sendslope), the upper credit limit (hiCredit), and the lower credit limit (loCredit) based on idleslope. The specific calculation formula is as follows:

[0088]

[0089]

[0090]

[0091] in, This is the port line speed constant. The length of the maximum interfering frame (i.e., the maximum data frame length that may be sent from other queues competing with the current queue). This represents the maximum frame length of the current queue.

[0092] When the traffic shaping mode in the device configuration parameters is set to a time-aware shaping mode based on a gating list, the shaping configuration parameters include a gating schedule entry list and a base-time for the gating list to take effect. The gating list shaping configuration unit generates a gating schedule entry list based on the user-input gating entries. Each gating entry contains a gating mask and a corresponding duration. The gating list shaping configuration unit calculates the base-time for the gating list to take effect. This base-time is based on the synchronized clock domain and includes a preset delivery delay to form the future effective time, ensuring the consistency and observability of gating effectiveness.

[0093] Regardless of the shaping mode used, the shaping configuration parameters include the queue and shaping rules corresponding to the traffic shaping mode selected by the user, ensuring that business traffic is scheduled as expected.

[0094] S6. The frame transmission and reception verification module automatically performs frame transmission mode and end-to-end latency measurement based on its module configuration file; specifically including:

[0095] S601, the sending end scheduling unit sends frames using absolute time framing, meaning the sending end sends data frames precisely according to absolute time points based on the synchronized clock domain. Specifically, a warm-up alignment process is performed before actual frame transmission: based on the user-specified base-time and the preset warm-up duration, the initial scheduling time is aligned with the sum of the base-time and the warm-up duration. The warm-up process allows the system to enter a stable state, ensuring the determinism of subsequent frame transmission.

[0096] When multiple flows have the same scheduling time, the sending scheduling unit sends them in order of priority, with higher priority flows sent first. This ensures that in time-sensitive networks, critical service flows can get priority in sending opportunities, reducing their latency and jitter.

[0097] The sending end scheduling unit generates data frames based on the frame transmission parameters (destination address, destination port, frame transmission period, payload length, number of frames to be transmitted, and frame priority) and sends them at the determined scheduling time.

[0098] S602. The receiving end acquisition unit collects the receiving timestamp for each received data stream and parses the sending time information or stream identifier information in the message for subsequent delay calculation.

[0099] S603, the end-to-end index calculation unit calculates the end-to-end latency of each data frame by combining the scheduling time of the sending end and the receiving time of the receiving end, and statistically analyzes the average latency, maximum latency, minimum latency and jitter index of each stream, and supports outputting statistical results by stream and by priority.

[0100] S7. The result summary module receives and summarizes the maximum absolute deviation (synchronization accuracy index) obtained from S4, the shaping configuration parameters obtained from S5, and the frame transmission method and end-to-end delay measurement results obtained from S6.

[0101] The synchronization accuracy index reflects the stability of time synchronization; the shaping configuration parameters record the shaping mode and specific parameters configured by the user; the end-to-end delay measurement results include delay statistics and jitter analysis for each stream.

[0102] The results aggregation module sends the aggregated results to the graphical interface module for visualization, including synchronization accuracy curves, integer configuration summaries, and latency statistics charts. The results aggregation module also supports exporting the aggregated results to structured files (such as JSON and CSV formats) for easy archiving, experiment reproduction, or further analysis.

[0103] The specific embodiments of the present invention are provided to enable those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention.

[0104] It should be understood that the present invention is not limited to the content already described above, and various modifications and changes can be made without departing from its scope. The scope of the present invention is limited only by the appended claims.

Claims

1. A lightweight time-sensitive network configuration, time synchronization, and verification method, characterized in that, Includes the following steps: S1. Receive network topology and device configuration parameters through a graphical interface, and generate a configuration file containing device configuration parameters, including network interface parameters, clock role, traffic shaping mode, and frame transmission parameters. S2. Generate module configuration files for driving network interface configuration, time synchronization management, traffic shaping configuration, and transmit / receive frame verification based on the configuration files. S3. Automatically perform network interface initialization based on the module configuration file configured for the network interface; S4. Based on the time synchronization management module configuration file, automatically execute the time synchronization process, which includes: S401. The clock deviation sample between PHC and system clock is obtained by three-reading method. In one round of multiple sampling, the sample with the smallest system side reading time interval is taken as the best sample, and the clock deviation is calculated based on the sample. S402. Input the calculated clock deviation into the PI servo algorithm to generate the frequency adjustment amount, and perform synchronization calibration of the system clock based on PHC. S403. Real-time statistics of the clock deviation calculated each time. In each statistical period, update the minimum and maximum values ​​of the clock deviation within the statistical period based on the clock deviation calculated each time. At the end of the statistical period, calculate the maximum absolute deviation of the clock deviation within the statistical period. S5. Based on the module configuration file of the traffic shaping configuration, automatically execute the traffic shaping configuration and generate shaping configuration parameters. The shaping configuration parameters include the queue and shaping rules corresponding to the traffic shaping mode. S6. Based on the module configuration file for frame transmission and reception verification, automatically execute the frame transmission method and end-to-end delay measurement based on the frame transmission parameters, wherein the frame transmission method is absolute time frame transmission; S7. Summarize the maximum absolute deviation obtained from S4, the shaping configuration parameters obtained from S5, and the frame transmission method and end-to-end delay measurement results obtained from S6, and display and export them. 2.The method of claim 1, wherein, In S1, the frame transmission parameters include destination address, destination port, frame transmission period, payload length, number of frames to be transmitted, and frame priority. 3.The method of claim 1, wherein, In S3, the network interface initialization includes: configuring the physical interface address and enabling it according to the configuration file; creating a VLAN interface on the physical interface and enabling it, and configuring the VLAN interface address; configuring the VLAN interface's egress mapping table based on preset priority mapping rules; and verifying the interface status and address configuration results. 4.The method of claim 1, wherein, In S401, the three-reading method specifically includes: for each sampling, reading the first reading of the system clock, reading the PHC, reading the second reading of the system clock, calculating the time interval between the two readings of the system clock, and using the time interval as the system side reading time interval.

5. The method of claim 1, wherein, In S402, the PI servo algorithm dynamically calculates the proportional coefficient and integral coefficient based on the synchronization interval, wherein the proportional coefficient is inversely proportional to the synchronization interval, and the integral coefficient is directly proportional to the synchronization interval.

6. The method of claim 1, wherein, The formula for calculating the maximum absolute deviation is: Maximum absolute deviation = .

7. The method of claim 1, wherein, In S5, the traffic shaping mode is the credit shaping mode, and the shaping configuration parameters include idleslope. The system automatically calculates the sending slope, credit upper bound, and credit lower bound based on idleslope. 8.The method of claim 1, wherein, In S5, the traffic shaping mode is a time-aware shaping mode based on a gating list. The shaping configuration parameters include: a gating schedule entry list and the base-time when the gating list takes effect.

9. A lightweight time-sensitive network configuration, time synchronization, and verification system for implementing the method of any one of claims 1-8, characterized in that, include: The graphical user interface module is used to receive input of network topology and device configuration parameters and generate configuration files; The configuration file parsing module is used to generate module configuration files for driving network interface configuration, time synchronization management, traffic shaping configuration, and transmit / receive frame verification based on the configuration file. The network interface configuration module is used to automatically perform network interface initialization based on its module configuration file. The time synchronization management module automatically executes the time synchronization process according to its module configuration file. The time synchronization management module includes a deviation measurement unit, a synchronization calibration unit, and an accuracy statistics unit. The deviation measurement unit uses a three-reading method to obtain clock deviation samples between the PHC and the system clock. In a round of multiple sampling, the sample with the smallest system-side reading time interval is selected as the optimal sample, and the clock deviation is calculated based on this sample. The synchronization calibration unit inputs the calculated clock deviation into the PI servo algorithm to generate a frequency adjustment amount and performs synchronization calibration on the system clock using the PHC as a reference. The accuracy statistics unit updates the minimum and maximum values ​​of the clock deviation within each statistical period based on the calculated clock deviation each time, and calculates the maximum absolute deviation of the clock deviation within the statistical period at the end of the statistical period. The traffic shaping configuration module is used to automatically execute traffic shaping configuration according to its module configuration file and generate shaping configuration parameters. The shaping configuration parameters include the queue and shaping rules corresponding to the traffic shaping mode. The frame transmission and reception verification module is used to automatically perform frame transmission mode and end-to-end delay measurement based on the frame transmission parameters according to its module configuration file, wherein the frame transmission mode is absolute time frame transmission; The results summary module is used to summarize the maximum absolute deviation obtained by the time synchronization management module, the shaping configuration parameters obtained by the traffic shaping configuration module, and the frame sending method and end-to-end latency measurement results obtained by the frame sending and receiving verification module, and then display and export them.

Images