Semiconductor device
By introducing a combined structure of a back gate and an RC-IGBT region into the semiconductor device, the current path and carrier control are optimized, the problems of suppressing quickback and tail current are solved, and the characteristics of the device and the diode performance are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- KK TOSHIBA
- Filing Date
- 2025-07-07
- Publication Date
- 2026-05-15
AI Technical Summary
Existing semiconductor devices have limitations in improving characteristics, particularly in maintaining good diode characteristics while suppressing quick-back and tail currents.
A semiconductor device structure is adopted, including a first electrode, a second electrode, a third electrode, a fourth electrode, a semiconductor component, and an insulating component. By setting a back gate and an RC-IGBT region, combined with cross-arranged semiconductor regions and electrodes, effective control of charge carriers and optimization of current paths are achieved.
It effectively suppresses backflow and tail current, improves diode characteristics, and achieves higher performance and current control efficiency.
Smart Images
Figure CN122054675A_ABST
Abstract
Description
[0001] This application is based on Japanese Patent Application 2024-199165 (filed on November 14, 2024), from which it enjoys priority benefits. This application incorporates the entire contents of that application by reference. Technical Field
[0002] Embodiments of the present invention relate to a semiconductor device. Background Technology
[0003] For example, in semiconductor devices, improvements in performance are desired. Summary of the Invention
[0004] Embodiments of the present invention provide a semiconductor device capable of improving performance.
[0005] Solution for solving the problem
[0006] According to an embodiment of the present invention, a semiconductor device includes a first electrode, a second electrode, a third electrode, a fourth electrode, a semiconductor component, a first insulating component, and a second insulating component. The first electrode includes a first electrode portion and a second electrode portion. The semiconductor component includes a first semiconductor portion and a second semiconductor portion. The first semiconductor portion is located between the first electrode portion and the second electrode in a first direction from the first electrode to the second electrode. The second semiconductor portion is located between the second electrode portion and the second electrode in the first direction. The direction from the first electrode portion to the second electrode portion intersects the first direction. The first semiconductor portion and the second semiconductor portion respectively include a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region of the first conductivity type. The second electrode is electrically connected to the third semiconductor region. The second semiconductor region is located between the first semiconductor region and the third semiconductor region. At least a portion of the first insulating component is disposed between the plurality of third electrodes and the semiconductor component. The first semiconductor portion includes a fourth semiconductor region of a second conductivity type and a fifth semiconductor region of the first conductivity type. The fourth electrode is located between the first electrode portion and the first semiconductor portion. The fifth semiconductor region is electrically connected to the first electrode portion. The fourth semiconductor region is located between the fifth semiconductor region and the first semiconductor region included in the first semiconductor portion. The second insulating component is located between the fourth electrode and the first semiconductor portion. The second semiconductor portion includes a sixth semiconductor region of the second conductivity type and a seventh semiconductor region of the first conductivity type. The sixth and seventh semiconductor regions are located between the second electrode portion and the first semiconductor region included in the second semiconductor portion.
[0007] The semiconductor device configured as described above can provide a semiconductor device with improved characteristics. Attached Figure Description
[0008] Figure 1 This is a schematic cross-sectional view illustrating the semiconductor device of the first embodiment.
[0009] Figure 2 This is a schematic diagram illustrating the operation of the semiconductor device according to the first embodiment.
[0010] Figure 3 This is a schematic cross-sectional view illustrating a semiconductor device according to the second embodiment.
[0011] Figure 4 This is a schematic diagram illustrating the operation of the semiconductor device according to the second embodiment.
[0012] Figure 5 (a)~ Figure 5 (c) is a schematic top view of a semiconductor device illustrating an embodiment.
[0013] Explanation of reference numerals in the attached figures
[0014] 10M: Semiconductor components;
[0015] 10a, 10b: First semiconductor section, second semiconductor section;
[0016] 11–18: First semiconductor region to eighth semiconductor region;
[0017] 41-43: First insulating component to third insulating component;
[0018] 51~56: First electrode~Sixth electrode;
[0019] 51a, 51b: First electrode section, second electrode section;
[0020] 70: Control Department;
[0021] 70a, 70b: First circuit, second circuit;
[0022] 110, 111: Semiconductor devices;
[0023] D1~D3: First direction~Third direction;
[0024] V1~V6: First potential~Sixth potential;
[0025] t4~t7: Fourth thickness to seventh thickness;
[0026] tm: time;
[0027] TM1~TM9: First moment to ninth moment Detailed Implementation
[0028] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
[0029] The accompanying drawings are schematic or conceptual, and the relationship between the thickness and width of each part, as well as the proportions between the parts, may not be the same as in reality. Even when representing the same part, there may be cases where the dimensions and proportions of the parts are represented differently according to the accompanying drawings.
[0030] In this application specification and various figures, elements that are the same as those described in the existing figures are labeled with the same reference numerals and detailed descriptions are omitted where appropriate.
[0031] (First Implementation)
[0032] Figure 1 This is a schematic cross-sectional view illustrating a semiconductor device according to the first embodiment.
[0033] like Figure 1 As shown, the semiconductor device 110 of the embodiment includes a first electrode 51, a second electrode 52, a plurality of third electrodes 53, a fourth electrode 54, a semiconductor component 10M, a first insulating component 41, and a second insulating component 42.
[0034] The first electrode 51 includes a first electrode portion 51a and a second electrode portion 51b. The semiconductor component 10M includes a first semiconductor portion 10a and a second semiconductor portion 10b. The first semiconductor portion 10a is located between the first electrode portion 51a and the second electrode 52 in a first direction D1 from the first electrode 51 to the second electrode 52. The second semiconductor portion 10b is located between the second electrode portion 51b and the second electrode 52 in the first direction D1.
[0035] Set the first direction D1 as the Z-axis direction. Set a direction perpendicular to the Z-axis direction as the X-axis direction. Set a direction perpendicular to both the Z-axis and X-axis directions as the Y-axis direction.
[0036] For example, the first electrode 51 and the second electrode 52 are along the XY plane. The semiconductor component 10M is along the XY plane.
[0037] The direction from the first electrode portion 51a to the second electrode portion 51b intersects the first direction D1. The direction from the first semiconductor portion 10a to the second semiconductor portion 10b also intersects the first direction D1.
[0038] The first semiconductor portion 10a and the second semiconductor portion 10b respectively include a first semiconductor region 11 of a first conductivity type, a second semiconductor region 12 of a second conductivity type, and a third semiconductor region 13 of a first conductivity type.
[0039] The first conductivity type is either n-type or p-type. The second conductivity type is either n-type or p-type. Hereinafter, the first conductivity type will be designated as n-type, and the second conductivity type as p-type.
[0040] The second electrode 52 is electrically connected to the third semiconductor region 13. The second semiconductor region 12 is located between the first semiconductor region 11 and the third semiconductor region 13. The first semiconductor region 11 can function as a drift layer, for example. The second semiconductor region 12 can function as a base layer, for example. The third semiconductor region 13 can function as a source layer, for example.
[0041] At least a portion of the first insulating member 41 is disposed between the plurality of third electrodes 53 and the semiconductor component 10M. The first insulating member 41 insulates the plurality of third electrodes 53 from the semiconductor component 10M.
[0042] The first semiconductor portion 10a includes a fourth semiconductor region 14 of a second conductivity type and a fifth semiconductor region 15 of a first conductivity type. A fourth electrode 54 is located between the first electrode portion 51a and the first semiconductor portion 10a. The fifth semiconductor region 15 is electrically connected to the first electrode 51 (e.g., the first electrode portion 51a). The fourth semiconductor region 14 is located between the fifth semiconductor region 15 and the first semiconductor region 11 included in the first semiconductor portion 10a.
[0043] The second insulating member 42 is located between the fourth electrode 54 and the first semiconductor portion 10a. A portion of the second insulating member 42 may be disposed between the fourth electrode 54 and the first electrode 51. The second insulating member 42 insulates the fourth electrode 54 from the semiconductor portion 10M (the first semiconductor portion 10a). This insulates the second insulating member 42, the fourth electrode 54, and the first electrode 51.
[0044] The second semiconductor portion 10b includes a sixth semiconductor region 16 of a second conductivity type and a seventh semiconductor region 17 of a first conductivity type. The sixth semiconductor region 16 and the seventh semiconductor region 17 are located between the second electrode portion 51b and the first semiconductor region 11 included in the second semiconductor portion 10b.
[0045] In the semiconductor device 110, the current flowing between the first electrode 51 and the second electrode 52 is controlled by the potentials of a plurality of third electrodes 53. The potentials of the plurality of third electrodes 53 may, for example, be potentials referenced to the potential of the second electrode 52. The first electrode 51 functions, for example, as a collector electrode. The second electrode 52 functions, for example, as an emitter electrode. The plurality of third electrodes 53 function as gate electrodes (e.g., main gate electrodes). The semiconductor device 110 is, for example, an IGBT (Insulated Gate Bipolar Transistor).
[0046] In the semiconductor device 110, a fourth electrode 54 is provided. By controlling the potential of the fourth electrode 54, the flow of charge carriers between the semiconductor component 10M and the first electrode 51 can be controlled. The fourth electrode 54 functions, for example, as a back gate.
[0047] The first electrode portion 51a and the first semiconductor portion 10a are regions where a back gate is disposed. The second electrode portion 51b and the second semiconductor portion 10b are regions where no back gate is disposed. The second semiconductor portion 10b is a region where a p-type sixth semiconductor region 16 and an n-type seventh semiconductor region 17 are disposed. The second electrode portion 51b and the second semiconductor portion 10b correspond to the RC-IGBT (Reverse Conductive Insulated Gate Bipolar Transistor) region.
[0048] In one embodiment, a back gate region and an RC-IGBT region are provided within a continuous semiconductor component 10M. This enables the provision of a semiconductor device with improved characteristics.
[0049] For example, in an RC-IGBT, to suppress sudden return, a first reference example could be considered where a large area of a p-type semiconductor region is formed on one side (back side) of the first electrode 51. This large-area p-type semiconductor region functions as a trigger region to suppress sudden return.
[0050] In this first reference example, there is no path for electrons to escape within the large area of the p-type semiconductor. As a result, for example, a tail current is generated. Furthermore, in this first reference example, no diode current flows when it should be in diode mode. Therefore, the diode characteristics are degraded.
[0051] In this embodiment, accumulated electrons can be discharged through the channel of the back gate. This suppresses tail current. Furthermore, diode current can flow through the channel of the back gate. This results in good diode characteristics. According to this embodiment, shunt current and tail current can be suppressed, resulting in good diode characteristics. According to this embodiment, performance can be improved.
[0052] Furthermore, in the second reference example, in addition to providing the large-area p-type semiconductor region as in the first reference example, a control gate electrode is also provided. In the second reference example, since no diode current flows through the large-area p-type semiconductor region, the function of the control gate electrode is not obtained.
[0053] In this implementation, diode current can flow through the back gate, thus enabling control of the gate electrode's operation (e.g., loss suppression).
[0054] On the other hand, there is a third reference example where the RC-IGBT portion (second electrode portion 51b) is not provided, and the back gate is provided on the entire surface. In the third reference example, in order for the back gate to operate properly, the area ratio of the p-type semiconductor region to the n-type semiconductor region on the back side is easily limited. As a result, there is a limit to the improvement of characteristics.
[0055] In this implementation, the RC-IGBT portion and the back gate portion are positioned on both sides. This alleviates the limitation on area ratio, thereby enabling higher performance.
[0056] In the implementation, the direction from the sixth semiconductor region 16 to the seventh semiconductor region 17 intersects with the first direction D1.
[0057] The second semiconductor portion 10b may include a plurality of sixth semiconductor regions 16 and a plurality of seventh semiconductor regions 17. One of the plurality of sixth semiconductor regions 16 is located between one of the plurality of seventh semiconductor regions 17 and another of the plurality of seventh semiconductor regions 17. One of the plurality of seventh semiconductor regions 17 is located between one of the plurality of sixth semiconductor regions 16 and another of the plurality of sixth semiconductor regions 16.
[0058] The sixth semiconductor region 16 and the seventh semiconductor region 17 can be arranged alternately in the direction intersecting the first direction D1.
[0059] like Figure 1As shown, the first semiconductor portion 10a and the second semiconductor portion 10b may each further include an eighth semiconductor region 18 of a first conductivity type. A fourth semiconductor region 14 is located between the first electrode portion 51a and a portion of the eighth semiconductor region 18. A sixth semiconductor region 16 and a seventh semiconductor region 17 are located between the second electrode portion 51b and another portion of the eighth semiconductor region 18.
[0060] The concentration of the eighth impurity of the first conductivity type in the eighth semiconductor region 18 is higher than the concentration of the first impurity of the first conductivity type in the first semiconductor region 11. For example, the concentration of the eighth impurity can be 1 × 10⁻⁶. 18 cm -3 Above and 1×10 21 cm -3 The concentration of the first impurity can be, for example, 1 × 10⁻⁶. 12 cm -3 Above and 1×10 15 cm -3 the following.
[0061] like Figure 1 As shown, the direction from a portion of the fourth electrode 54 to a portion of the eighth semiconductor region 18 can be along the first direction D1. A portion of the fourth semiconductor region 14 is located between a portion of the eighth semiconductor region 18 and the fifth semiconductor region 15 in a direction intersecting the first direction D1.
[0062] exist Figure 1 In this example, multiple third electrodes 53 are arranged along a second direction D2 that intersects the first direction D1. For example, multiple third electrodes 53 extend along a third direction D3. The third direction D3 intersects a plane that includes both the first direction D1 and the second direction D2. A fourth electrode 54 extends along the third direction D3.
[0063] like Figure 1 As shown, multiple fourth electrodes 54 can be provided. The direction from one of the multiple fourth electrodes 54 to another of the multiple fourth electrodes 54 can be along the second direction D2. The direction in which the multiple fourth electrodes 54 are arranged can be along the direction in which the multiple third electrodes 53 are arranged. Thus, the current path controlled by the multiple third electrodes 53 follows the current path controlled by the multiple fourth electrodes 54. Current can be effectively controlled. In an embodiment, the direction in which the fourth electrodes 54 extend can also intersect the direction in which the multiple third electrodes 53 extend.
[0064] In this embodiment, the spacing between the plurality of sixth semiconductor regions 16 (sixth semiconductor region spacing) is preferably, for example, more than three times and less than 2000 times the spacing between the plurality of third electrodes 53 (third electrode spacing). Therefore, by reducing the back gate spacing, for example, the efficiency of electron injection from the back side can be improved during diode operation. For example, the overall diode current efficiency of the chip can be improved. In one example, the sixth semiconductor region spacing is, for example, more than 100 μm and less than 1000 μm. The third electrode spacing is, for example, more than 0.5 μm and less than 30 μm.
[0065] The spacing between the plurality of fourth electrodes 54 (fourth electrode spacing) is preferably more than 1 and less than 2000 times the spacing between the plurality of third electrodes 53 (third electrode spacing). The fourth electrode spacing can be larger than the third electrode spacing. In one example, the fourth electrode spacing is, for example, more than 0.5 μm and less than 1000 μm.
[0066] The spacing between the plurality of fourth electrodes 54 (fourth electrode spacing) is preferably more than 0.0005 times and less than 10 times the spacing between the plurality of sixth semiconductor regions 16 (sixth semiconductor region spacing). The fourth electrode spacing can be smaller than the sixth semiconductor region spacing.
[0067] The concentration of the fourth impurity of the second conductivity type in the fourth semiconductor region 14 is preferably 0.1 times or more and 1000 times less than the concentration of the sixth impurity of the second conductivity type in the sixth semiconductor region 16. This facilitates efficient flow of IGBT current throughout the chip, for example. Alternatively, the concentration of the fourth impurity may be higher than the concentration of the sixth impurity.
[0068] The concentration of the fifth impurity of the first conductivity type in the fifth semiconductor region 15 is preferably 0.001 times or more and 10 times less than the concentration of the seventh impurity of the first conductivity type in the seventh semiconductor region 17. This allows for efficient and convenient flow of diode current, for example. Alternatively, the concentration of the fifth impurity may be lower than the concentration of the seventh impurity.
[0069] like Figure 1 As shown, the thickness of the fourth semiconductor region 14 along the first direction D1 is defined as the fourth thickness t4. The thickness of the sixth semiconductor region 16 along the first direction D1 is defined as the sixth thickness t6. In one example, the fourth thickness t4 is 10 nm or more and 100 μm or less. In another example, the sixth thickness t6 is 1 nm or more and 100 μm or less.
[0070] The thickness of the fifth semiconductor region 15 along the first direction D1 is defined as the fifth thickness t5. The thickness of the seventh semiconductor region 17 along the first direction D1 is defined as the seventh thickness t7. In one example, the fifth thickness t5 is greater than 1 nm and less than 100 μm. In one example, the seventh thickness t7 is greater than 1 nm and less than 100 μm.
[0071] like Figure 1 As shown, the direction from the third electrode 53 to the second semiconductor region 12 intersects the first direction D1. The direction from the third electrode 53 to the third semiconductor region 13 also intersects the first direction D1. The third electrode 53 is a trench-type gate electrode. In an embodiment, a planar gate electrode structure can be used.
[0072] like Figure 1 As shown, in this example, the semiconductor device 110 further includes a sixth electrode 56. The sixth electrode 56 is located between one of the plurality of third electrodes 53 and another of the plurality of third electrodes 53. A portion of a first insulating member 41 is in contact with a portion of the plurality of third electrodes 53 and the third semiconductor region 13. The first insulating member 41 is not in contact with the third semiconductor region 13 between the sixth electrode 56 and the third semiconductor region 13.
[0073] The semiconductor device 110 may also include a third insulating component 43. The third insulating component 43 is disposed between a plurality of third electrodes 53 and second electrodes 52. The third insulating component 43 is disposed between a sixth electrode 56 and second electrodes 52.
[0074] like Figure 1 As shown, a control unit 70 can be provided. The control unit 70 can be included in the semiconductor device 110. The control unit 70 can be provided separately from the semiconductor device 110. The control unit 70 is electrically connected to the first electrode 51, the second electrode 52, the third electrode 53, and the fourth electrode 54. The control unit 70 is configured to control the potential of the plurality of third electrodes 53 (third electrode potential VE3). The control unit 70 is configured to control the potential of the fourth electrode 54 (fourth electrode potential VE4). The third electrode potential VE3 can, for example, be a potential based on the potential of the second electrode 52.
[0075] Figure 2 This is a schematic diagram illustrating the operation of the semiconductor device according to the first embodiment.
[0076] Figure 2 The horizontal axis represents time tm. Figure 2 The vertical axis represents the third electrode potential VE3 or the fourth electrode potential VE4.
[0077] The control unit 70 is configured to cause the plurality of third electrodes 53 to change from a first potential V1 to a second potential V2, which is higher than the first potential V1, at a first time tm1. The control unit 70 is configured to cause the plurality of third electrodes 53 to change from the second potential V2 to the first potential V1 at a second time tm2, following the first time tm1. The control unit 70 is configured to cause the plurality of third electrodes 53 to change from the first potential V1 to the second potential V2 at a third time tm3, following the second time tm3. The control unit 70 is configured to cause the plurality of third electrodes 53 to change from the second potential V2 to the first potential V1 at a fourth time tm4, following the third time tm3. The control unit 70 is configured to cause the plurality of third electrodes 53 to change from the first potential V1 to the second potential V2 at a fifth time tm5, following the fourth time tm4. The first potential V1 and the second potential V2 are potentials based on the potential of the second electrode 52.
[0078] The control unit 70 is configured to set the fourth electrode 54 to the third potential V3 at a first time tm1. The control unit 70 is configured to change the fourth electrode 54 from the third potential V3 to a fourth potential V4, which is higher than the third potential V3, at a sixth time tm6, between the first time tm1 and the second time tm2. The control unit 70 is configured to change the fourth electrode 54 from the fourth potential V4 to the third potential V3 at a seventh time tm7, between the sixth time tm6 and the third time tm3. The control unit 70 is configured to change the fourth electrode 54 from the third potential V3 to the fourth potential V4 at an eighth time tm8, between the seventh time tm7 and the third time tm3. The control unit 70 is configured to change the fourth electrode 54 from the fourth potential V4 to the third potential V3 at a ninth time tm9, after the fourth time tm4. The third potential V3 and the fourth potential V4 are potentials based on the potential of the first electrode 51.
[0079] The seventh time step tm7 can also be substantially the same as the second time step tm2. The ninth time step tm9 can also be substantially the same as the fifth time step tm5.
[0080] The period between the first time tm1 and the second time tm2 corresponds, for example, to the IGBT mode period. The period between the eighth time tm8 and the fourth time tm4 corresponds to the diode mode period. The period between the third time tm3 and the fourth time tm4 corresponds to the DESAT control period. During the DESAT control period, carriers are extracted by controlling the surface gate.
[0081] During the period between time tm6 (sixth time) and tm7 (seventh time), carriers are discharged through the operation of the fourth electrode 54 (back gate). The period between time tm8 (eighth time) and tm9 (ninth time) corresponds to the conduction period of the back gate in diode mode.
[0082] like Figure 2 As shown, the control unit 70 may include a first circuit 70a and a second circuit 70b. The first circuit 70a is configured to control the potential of a plurality of third electrodes 53 (third electrode potential VE3). The second circuit 70b is configured to control the potential of a fourth electrode 54 (fourth electrode potential VE4). These circuits may be insulated from each other. Insulation may be achieved, for example, by an optocoupler or a DC-DC converter.
[0083] (Second Implementation)
[0084] Figure 3 This is a schematic cross-sectional view illustrating a semiconductor device according to the second embodiment.
[0085] like Figure 3 As shown, the semiconductor device 111 in this embodiment also includes a fifth electrode 55. The configuration of the semiconductor device 111, other than this, can be the same as that of the semiconductor device 110.
[0086] In the semiconductor device 111, a fifth electrode 55 is located between one of a plurality of third electrodes 53 and another of the plurality of third electrodes 53. A portion of a first insulating member 41 is disposed between the fifth electrode 55 and the semiconductor device 10M. The portion of the first insulating member 41 insulates the fifth electrode 55 from the semiconductor device 10M.
[0087] The fifth electrode 55 functions, for example, as a control gate. The fifth electrode 55 can be driven separately from the third electrode 53.
[0088] A control unit 70 may be provided in the semiconductor device 111. The control unit 70 may be configured to control, in addition to controlling, [other aspects related to...]. Figure 2 In addition to the described actions, the fifth electrode potential VE5 of the fifth electrode 55 is also controlled. For example, the first circuit 70a is configured to control the fifth electrode potential VE5.
[0089] Figure 4 This is a schematic diagram illustrating the operation of the semiconductor device according to the second embodiment.
[0090] Figure 4 The horizontal axis represents time tm. Figure 4 The vertical axis represents the third electrode potential VE3, the fourth electrode potential VE4, or the fifth electrode potential VE5.
[0091] like Figure 4 As shown, the control unit 70 is configured to, in addition to implementing the control unit regarding... Figure 2In addition to the described actions, the following actions are also performed. The control unit 70 is configured to change the fifth electrode 55 from a fifth potential V5 to a sixth potential V6, which is higher than the fifth potential V5, at a first time tm1. The control unit 70 is configured to change the fifth electrode 55 from the sixth potential V6 to the fifth potential V5 at the sixth time tm6. The control unit 70 is configured to change the fifth electrode 55 from the fifth potential V5 to the sixth potential V6 at a ninth time tm9. For example, the control unit 70 is configured to keep the fifth electrode 55 at the fifth potential V5 continuously between the sixth time tm6 and the ninth time tm9.
[0092] For example, at the sixth time tm6, the fifth electrode 55 changes from the sixth potential V6 to the fifth potential V5, thereby expelling charge carriers in the vicinity of the fifth electrode 55.
[0093] Figure 5 (a)~ Figure 5 (c) is a schematic top view of a semiconductor device illustrating an embodiment.
[0094] These figures show top views of the first electrode portion 51a and the second electrode portion 51b. These figures also show top views of the first semiconductor portion 10a and the second semiconductor portion 10b.
[0095] like Figure 5 (a) and Figure 5 As shown in (b), the first electrode portion 51a may be disposed between a portion of the second electrode portion 51b and another portion of the second electrode portion 51b in a direction intersecting the first direction D1. The first semiconductor portion 10a may be disposed between a portion of the second semiconductor portion 10b and another portion of the second semiconductor portion 10b in a direction intersecting the first direction D1. The top view patterns of the first electrode portion 51a and the first semiconductor portion 10a are arbitrary.
[0096] like Figure 5 As shown in (c), a plurality of first electrode portions 51a may be provided. One of the plurality of first electrode portions 51a may be provided between a portion of a second electrode portion 51b and another portion of the second electrode portion 51b. A plurality of first semiconductor portions 10a may be provided. One of the plurality of first semiconductor portions 10a may be provided between a portion of a second semiconductor portion 10b and another portion of the second semiconductor portion 10b.
[0097] In this embodiment, at least one of the first electrode 51 and the second electrode 52 may contain a metal. The metal may, for example, contain at least one selected from the group consisting of Al, Ti, Ni, Au, Ag, and Cu. At least one of the third electrode 53, the fourth electrode 54, the fifth electrode 55, and the sixth electrode 56 may contain polycrystalline silicon. The semiconductor component 10M may contain silicon. The semiconductor component 10M may contain a compound semiconductor. The compound semiconductor may contain at least one selected from the group consisting of SiC, GaN, GaO, and GaAs.
[0098] In the implementation, information related to the shape of the semiconductor region is obtained, for example, through electron microscope images. Information related to composition and elemental concentration is obtained, for example, through EDX (Energy Dispersive X-ray Spectroscopy) or SIMS (Secondary Ion Mass Spectrometry).
[0099] The implementation methods may include the following technical solutions.
[0100] (Technical Solution 1)
[0101] A semiconductor device comprising:
[0102] A first electrode comprising a first electrode portion and a second electrode portion;
[0103] Second electrode;
[0104] Multiple third electrodes;
[0105] Fourth electrode;
[0106] A semiconductor component comprising a first semiconductor portion and a second semiconductor portion;
[0107] First insulating component; and
[0108] Second insulating component,
[0109] The first semiconductor portion is located between the first electrode portion and the second electrode in a first direction from the first electrode to the second electrode.
[0110] The second semiconductor portion is located between the second electrode portion and the second electrode in the first direction.
[0111] The direction from the first electrode portion to the second electrode portion intersects with the first direction.
[0112] The first semiconductor portion and the second semiconductor portion each include:
[0113] First semiconductor region of first conductivity type;
[0114] The second semiconductor region of the second conductivity type; and
[0115] The third semiconductor region of the first conductivity type,
[0116] The second electrode is electrically connected to the third semiconductor region.
[0117] The second semiconductor region is located between the first semiconductor region and the third semiconductor region.
[0118] At least a portion of the first insulating component is disposed between the plurality of third electrodes and the semiconductor component.
[0119] The first semiconductor portion includes:
[0120] The fourth semiconductor region of the second conductivity type; and
[0121] The fifth semiconductor region of the first conductivity type.
[0122] The fourth electrode is located between the first electrode portion and the first semiconductor portion.
[0123] The fifth semiconductor region is electrically connected to the first electrode portion.
[0124] The fourth semiconductor region is located between the fifth semiconductor region and the first semiconductor region contained within the first semiconductor portion.
[0125] The second insulating component is located between the fourth electrode and the first semiconductor portion.
[0126] The second semiconductor portion includes:
[0127] The sixth semiconductor region of the second conductivity type; and
[0128] The seventh semiconductor region of the first conductivity type.
[0129] The sixth semiconductor region and the seventh semiconductor region are located between the second electrode portion and the first semiconductor region contained in the second semiconductor portion.
[0130] (Technical Solution 2)
[0131] According to the semiconductor device of claim 1, wherein...
[0132] The direction from the sixth semiconductor region to the seventh semiconductor region intersects with the first direction.
[0133] (Technical Solution 3)
[0134] According to the semiconductor device described in technical solution 2, wherein,
[0135] The second semiconductor portion includes a plurality of the sixth semiconductor regions and a plurality of the seventh semiconductor regions.
[0136] One of the plurality of sixth semiconductor regions is located between one of the plurality of seventh semiconductor regions and another of the plurality of seventh semiconductor regions.
[0137] One of the plurality of seventh semiconductor regions is located between one of the plurality of sixth semiconductor regions and another of the plurality of sixth semiconductor regions.
[0138] (Technical Solution 4)
[0139] The semiconductor device according to any one of technical solutions 1 to 3, wherein...
[0140] The spacing between the sixth semiconductor regions of the plurality of sixth semiconductor regions is more than 3 times and less than 2000 times the spacing between the third electrodes of the plurality of third electrodes.
[0141] (Technical Solution 5)
[0142] The semiconductor device according to any one of technical solutions 1 to 3, wherein...
[0143] The plurality of third electrodes are arranged along a second direction that intersects the first direction.
[0144] The plurality of third electrodes extend along a third direction intersecting a plane that includes the first direction and the second direction.
[0145] The fourth electrode extends along the third direction.
[0146] (Technical Solution 6)
[0147] The semiconductor device according to technical solution 1 or 2, wherein,
[0148] Multiple fourth electrodes are provided.
[0149] The distance between the fourth electrodes of the plurality of fourth electrodes is more than 1 and less than 2000 times the distance between the third electrodes of the plurality of third electrodes.
[0150] (Technical Solution 7)
[0151] According to the semiconductor device described in technical solution 3, wherein...
[0152] Multiple fourth electrodes are provided.
[0153] The spacing between the fourth electrodes of the plurality of fourth electrodes is more than 0.0005 times and less than 10 times the spacing between the sixth semiconductor regions of the plurality of sixth semiconductor regions.
[0154] (Technical Solution 8)
[0155] The semiconductor device according to any one of technical solutions 1 to 7, wherein,
[0156] The concentration of the fourth impurity of the second conductivity type in the fourth semiconductor region is more than 0.1 times and less than 1000 times the concentration of the sixth impurity of the second conductivity type in the sixth semiconductor region.
[0157] (Technical Solution 9)
[0158] The semiconductor device according to any one of technical solutions 1 to 8, wherein,
[0159] The concentration of the fifth impurity of the first conductivity type in the fifth semiconductor region is more than 0.001 times and less than 10 times the concentration of the seventh impurity of the first conductivity type in the seventh semiconductor region.
[0160] (Technical Solution 10)
[0161] The semiconductor device according to any one of technical solutions 1 to 9, wherein,
[0162] The sixth semiconductor region and the seventh semiconductor region are arranged alternately in a direction intersecting the first direction.
[0163] (Technical Solution 11)
[0164] The semiconductor device according to any one of technical solutions 1 to 3, wherein...
[0165] The direction in which the fourth electrode extends intersects the direction in which the plurality of third electrodes extend.
[0166] (Technical Solution 12)
[0167] The semiconductor device according to any one of technical solutions 1 to 11, wherein,
[0168] The first semiconductor portion and the second semiconductor portion each further include an eighth semiconductor region of the first conductivity type.
[0169] The fourth semiconductor region is located between the first electrode portion and a portion of the eighth semiconductor region.
[0170] The sixth semiconductor region and the seventh semiconductor region are located between the second electrode portion and another portion of the eighth semiconductor region.
[0171] (Technical Solution 13)
[0172] The semiconductor device according to any one of technical solutions 1 to 12, wherein,
[0173] The semiconductor device also includes a sixth electrode.
[0174] The sixth electrode is located between one of the plurality of third electrodes and another of the plurality of third electrodes.
[0175] A portion of the first insulating component is connected to a portion of the plurality of third electrodes and the third semiconductor region.
[0176] The first insulating component is not in contact with the third semiconductor region between the sixth electrode and the third semiconductor region.
[0177] (Technical Solution 14)
[0178] The semiconductor device according to any one of technical solutions 1 to 13, wherein,
[0179] It also has a control unit.
[0180] The control unit is configured to, at a first moment, cause the plurality of third electrodes to change from a first potential to a second potential that is higher than the first potential.
[0181] The control unit is configured to cause the plurality of third electrodes to switch from the second potential to the first potential at a second time after the first time.
[0182] The control unit is configured to cause the plurality of third electrodes to switch from the first potential to the second potential at a third time after the second time.
[0183] The control unit is configured to cause the plurality of third electrodes to switch from the second potential to the first potential at a fourth time after the third time.
[0184] The control unit is configured to cause the plurality of third electrodes to switch from the first potential to the second potential at a fifth time after the fourth time.
[0185] The control unit is configured to set the fourth electrode to a third potential at the first moment.
[0186] The control unit is configured to change the fourth electrode from the third potential to a fourth potential higher than the third potential at a sixth time between the first time and the second time.
[0187] The control unit is configured to cause the fourth electrode to switch from the fourth potential to the third potential at a seventh time between the sixth time and the third time.
[0188] The control unit is configured to cause the fourth electrode to switch from the third potential to the fourth potential at an eighth time between the seventh time and the third time.
[0189] The control unit is configured to change the fourth electrode from the fourth potential to the third potential at a ninth time after the fourth time.
[0190] (Technical Solution 15)
[0191] The semiconductor device according to any one of technical solutions 1 to 12, wherein,
[0192] The semiconductor device also includes a fifth electrode.
[0193] The fifth electrode is located between one of the plurality of third electrodes and another of the plurality of third electrodes.
[0194] A portion of the first insulating component is disposed between the fifth electrode and the semiconductor component.
[0195] (Technical Solution 16)
[0196] According to the semiconductor device of technical solution 15, wherein...
[0197] It also has a control unit.
[0198] The control unit is configured to, at a first moment, cause the plurality of third electrodes to change from a first potential to a second potential that is higher than the first potential.
[0199] The control unit is configured to cause the plurality of third electrodes to switch from the second potential to the first potential at a second time after the first time.
[0200] The control unit is configured to cause the plurality of third electrodes to switch from the first potential to the second potential at a third time after the second time.
[0201] The control unit is configured to cause the plurality of third electrodes to switch from the second potential to the first potential at a fourth time after the third time.
[0202] The control unit is configured to cause the plurality of third electrodes to switch from the first potential to the second potential at a fifth time after the fourth time.
[0203] The control unit is configured to set the fourth electrode to a third potential at the first moment.
[0204] The control unit is configured to change the fourth electrode from the third potential to a fourth potential higher than the third potential at a sixth time between the first time and the second time.
[0205] The control unit is configured to cause the fourth electrode to switch from the fourth potential to the third potential at a seventh time between the sixth time and the third time.
[0206] The control unit is configured to cause the fourth electrode to switch from the third potential to the fourth potential at an eighth time between the seventh time and the third time.
[0207] The control unit is configured to cause the fourth electrode to change from the fourth potential to the third potential at a ninth time after the fourth time.
[0208] The control unit is configured to change the fifth electrode from a fifth potential to a sixth potential that is higher than the fifth potential at the first moment.
[0209] The control unit is configured to cause the fifth electrode to change from the sixth potential to the fifth potential at the sixth time.
[0210] The control unit is configured to change the fifth electrode from the fifth potential to the sixth potential at the ninth time.
[0211] (Technical Solution 17)
[0212] The semiconductor device according to technical solution 16, wherein,
[0213] The control unit is configured to keep the fifth electrode at the fifth potential between the sixth time and the ninth time.
[0214] (Technical Solution 18)
[0215] The semiconductor device according to any one of technical solutions 1 to 17, wherein,
[0216] The first electrode portion is disposed between a portion of the second electrode portion and another portion of the second electrode portion in a direction intersecting the first direction.
[0217] (Technical Solution 19)
[0218] The semiconductor device according to any one of technical solutions 1 to 18, wherein,
[0219] The first semiconductor portion is disposed between one part of the second semiconductor portion and another part of the second semiconductor portion in a direction intersecting the first direction.
[0220] (Technical Solution 20)
[0221] The semiconductor device according to any one of technical solutions 1 to 17, wherein,
[0222] Multiple first electrode portions are provided.
[0223] One of the plurality of first electrode portions is located between a portion of the second electrode portion and another portion of the second electrode portion.
[0224] According to an embodiment, a semiconductor device capable of improving characteristics is provided.
[0225] The embodiments of the present invention have been described above with reference to examples. However, the present invention is not limited to these examples. For example, any specific configuration of elements such as electrodes, semiconductor components, semiconductor regions, and insulating components included in a semiconductor device is included within the scope of the present invention, provided that a person skilled in the art can appropriately select from the known scope to similarly implement the present invention and obtain the same effects.
[0226] Any solution obtained by combining any two or more elements of the various examples within the technically possible range, as long as it contains the spirit of the present invention, is also included within the scope of the present invention.
[0227] As an embodiment of the present invention, any semiconductor device that can be implemented by those skilled in the art with appropriate design modifications based on the above-described semiconductor device is also within the scope of the present invention, as long as it contains the spirit of the present invention.
[0228] Within the scope of the present invention, those skilled in the art will be able to conceive of various modifications and alterations, and it should be understood that these modifications and alterations also fall within the scope of the present invention.
[0229] Several embodiments of the present invention have been described, but these embodiments are provided by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their variations are included in the scope and spirit of the invention, and are included within the scope of the invention as described in the claims and its equivalents.
Claims
1. A semiconductor device, characterized in that, have: A first electrode comprising a first electrode portion and a second electrode portion; Second electrode; Multiple third electrodes; Fourth electrode; A semiconductor component comprising a first semiconductor portion and a second semiconductor portion; First insulating component; as well as Second insulating component, The first semiconductor portion is located between the first electrode portion and the second electrode in a first direction from the first electrode to the second electrode. The second semiconductor portion is located between the second electrode portion and the second electrode in the first direction. The direction from the first electrode portion to the second electrode portion intersects with the first direction. The first semiconductor portion and the second semiconductor portion each include: First semiconductor region of first conductivity type; The second semiconductor region of the second conductivity type; and The third semiconductor region of the first conductivity type, The second electrode is electrically connected to the third semiconductor region. The second semiconductor region is located between the first semiconductor region and the third semiconductor region. At least a portion of the first insulating component is disposed between the plurality of third electrodes and the semiconductor component. The first semiconductor portion includes: The fourth semiconductor region of the second conductivity type; as well as The fifth semiconductor region of the first conductivity type. The fourth electrode is located between the first electrode portion and the first semiconductor portion. The fifth semiconductor region is electrically connected to the first electrode portion. The fourth semiconductor region is located between the fifth semiconductor region and the first semiconductor region contained within the first semiconductor portion. The second insulating component is located between the fourth electrode and the first semiconductor portion. The second semiconductor portion includes: The sixth semiconductor region of the second conductivity type; and The seventh semiconductor region of the first conductivity type. The sixth semiconductor region and the seventh semiconductor region are located between the second electrode portion and the first semiconductor region contained in the second semiconductor portion.
2. The semiconductor device according to claim 1, characterized in that, The direction from the sixth semiconductor region to the seventh semiconductor region intersects with the first direction.
3. The semiconductor device according to claim 2, characterized in that, The second semiconductor portion includes a plurality of the sixth semiconductor regions and a plurality of the seventh semiconductor regions. One of the plurality of sixth semiconductor regions is located between one of the plurality of seventh semiconductor regions and another of the plurality of seventh semiconductor regions. One of the plurality of seventh semiconductor regions is located between one of the plurality of sixth semiconductor regions and another of the plurality of sixth semiconductor regions.
4. The semiconductor device according to claim 1, characterized in that, The plurality of third electrodes are arranged along a second direction that intersects the first direction. The plurality of third electrodes extend along a third direction intersecting a plane that includes the first direction and the second direction. The fourth electrode extends along the third direction.
5. The semiconductor device according to claim 1, characterized in that, The first semiconductor portion and the second semiconductor portion each further include an eighth semiconductor region of the first conductivity type. The fourth semiconductor region is located between the first electrode portion and a portion of the eighth semiconductor region. The sixth semiconductor region and the seventh semiconductor region are located between the second electrode portion and another portion of the eighth semiconductor region.
6. The semiconductor device according to claim 1, characterized in that, The semiconductor device also includes a sixth electrode. The sixth electrode is located between one of the plurality of third electrodes and another of the plurality of third electrodes. A portion of the first insulating component is connected to a portion of the plurality of third electrodes and the third semiconductor region. The first insulating component is not in contact with the third semiconductor region between the sixth electrode and the third semiconductor region.
7. The semiconductor device according to claim 1, characterized in that, It also has a control unit. The control unit is configured to, at a first moment, cause the plurality of third electrodes to change from a first potential to a second potential that is higher than the first potential. The control unit is configured to cause the plurality of third electrodes to switch from the second potential to the first potential at a second time after the first time. The control unit is configured to cause the plurality of third electrodes to switch from the first potential to the second potential at a third time after the second time. The control unit is configured to cause the plurality of third electrodes to switch from the second potential to the first potential at a fourth time after the third time. The control unit is configured to cause the plurality of third electrodes to switch from the first potential to the second potential at a fifth time after the fourth time. The control unit is configured to set the fourth electrode to a third potential at the first moment. The control unit is configured to change the fourth electrode from the third potential to a fourth potential higher than the third potential at a sixth time between the first time and the second time. The control unit is configured to cause the fourth electrode to switch from the fourth potential to the third potential at a seventh time between the sixth time and the third time. The control unit is configured to cause the fourth electrode to switch from the third potential to the fourth potential at an eighth time between the seventh time and the third time. The control unit is configured to change the fourth electrode from the fourth potential to the third potential at a ninth time after the fourth time.
8. The semiconductor device according to claim 1, characterized in that, The semiconductor device also includes a fifth electrode. The fifth electrode is located between one of the plurality of third electrodes and another of the plurality of third electrodes. A portion of the first insulating component is disposed between the fifth electrode and the semiconductor component.
9. The semiconductor device according to claim 8, characterized in that, It also has a control unit. The control unit is configured to, at a first moment, cause the plurality of third electrodes to change from a first potential to a second potential that is higher than the first potential. The control unit is configured to cause the plurality of third electrodes to switch from the second potential to the first potential at a second time after the first time. The control unit is configured to cause the plurality of third electrodes to switch from the first potential to the second potential at a third time after the second time. The control unit is configured to cause the plurality of third electrodes to switch from the second potential to the first potential at a fourth time after the third time. The control unit is configured to cause the plurality of third electrodes to switch from the first potential to the second potential at a fifth time after the fourth time. The control unit is configured to set the fourth electrode to a third potential at the first moment. The control unit is configured to change the fourth electrode from the third potential to a fourth potential higher than the third potential at a sixth time between the first time and the second time. The control unit is configured to cause the fourth electrode to switch from the fourth potential to the third potential at a seventh time between the sixth time and the third time. The control unit is configured to cause the fourth electrode to switch from the third potential to the fourth potential at an eighth time between the seventh time and the third time. The control unit is configured to cause the fourth electrode to change from the fourth potential to the third potential at a ninth time after the fourth time. The control unit is configured to change the fifth electrode from a fifth potential to a sixth potential that is higher than the fifth potential at the first moment. The control unit is configured to cause the fifth electrode to change from the sixth potential to the fifth potential at the sixth time. The control unit is configured to change the fifth electrode from the fifth potential to the sixth potential at the ninth time.
10. The semiconductor device according to claim 1, characterized in that, The first semiconductor portion is disposed between one part of the second semiconductor portion and another part of the second semiconductor portion in a direction intersecting the first direction.