Organic light emitting diode display with pixel definition layer
By introducing a pixel definition layer into an organic light-emitting diode (OLED) display and forming an undercut to break the continuity of the OLED layer, the pixel crosstalk problem is solved, and the resolution and display performance of the display are improved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- APPLE INC
- Filing Date
- 2020-01-21
- Publication Date
- 2026-05-15
AI Technical Summary
In existing organic light-emitting diode (OLED) displays, pixel crosstalk is caused by lateral conduction in the OLED layer, which affects display performance and causes color shift in the image. Furthermore, as the pixel pitch decreases, the crosstalk worsens, making it difficult to improve resolution.
Introducing a pixel definition layer into the display breaks the continuity of the OLED layer by forming an undercut between adjacent anodes, thereby preventing leakage current transmission and maintaining the continuity of the cathode layer.
It effectively reduces leakage current and crosstalk between pixels, improves the resolution of the display, and maintains the continuity of the cathode layer, thus improving display performance.
Smart Images

Figure CN122054849A_ABST
Abstract
Description
[0001] This application is a divisional application of the application with international application number PCT / US2020 / 014426, international application date of January 21, 2020, entry into the Chinese national phase date of September 24, 2021, national application number 202080024252.1, and invention title "Organic Light Emitting Diode Display with Pixel Definition Layer".
[0002] This application claims priority to U.S. Patent Application No. 16 / 745055, filed January 16, 2020, and U.S. Provisional Patent Application No. 62 / 825694, filed March 28, 2019, which are incorporated herein by reference in their entirety. Background Technology
[0003] This disclosure relates in general to electronic devices, and more specifically to electronic devices having a display.
[0004] Electronic devices typically include displays. For example, an electronic device may have an organic light-emitting diode (OLED) display based on organic light-emitting diode pixels. In this type of display, each pixel includes a light-emitting diode and a thin-film transistor (TFT), which controls the application of signals to the light-emitting diode to generate light. The light-emitting diode may include an OLED layer positioned between an anode and a cathode.
[0005] To emit light from a given pixel in an organic light-emitting diode (OLED) display, a voltage is applied to the anode of that pixel. Ideally, the voltage at the anode of a given pixel should not affect any adjacent pixels. However, the conductivity of the OLED layer at the anode allows lateral conduction from the anode of a given pixel to the anodes of adjacent pixels. This can cause pixel crosstalk, which allows nominally 'off' pixels to emit light due to leakage from adjacent 'on' pixels. Pixel crosstalk can degrade display performance and cause color shifts in the resulting image.
[0006] It may be desirable to reduce the distance between pixels in a display in order to increase the display's resolution. However, pixel crosstalk caused by lateral conduction through the OLED layer can worsen as the distance between pixels decreases.
[0007] Therefore, there is a desire to provide improved displays for electronic devices. Summary of the Invention
[0008] This invention discloses an electronic device that may have a display such as an organic light-emitting diode (OLED) display. The OLED display may have an array of OLED pixels, each of which has an OLED layer interposed between a cathode and an anode.
[0009] Each organic light-emitting diode (OLED) pixel may have a corresponding anode. A voltage can be applied to the anode of each OLED pixel to control how much light is emitted from each OLED pixel. One or more OLED layers formed above the anode can be conductive. The conductivity of the OLED layers allows leakage current to pass between adjacent anodes in the display.
[0010] To reduce leakage current and associated crosstalk in a display, a pixel definition layer interposed between adjacent anodes can be used to disrupt the continuity of the OLED layer and prevent leakage current from propagating between adjacent pixels. The pixel definition layer may have an undercut defined by two or three discrete pixel definition layer portions. The undercut can result in gaps being interposed between different portions of the OLED layer to disrupt its continuity.
[0011] Undercutting can disrupt some, but not all, of the continuity in the OLED layers of a display. Although undercutting exists in the pixel definition layer, some of the OLED layers and the cathode layer in the display can remain continuous. Attached Figure Description
[0012] Figure 1 This is a schematic diagram of an exemplary electronic device with a display according to one embodiment.
[0013] Figure 2 This is a schematic diagram of an exemplary display according to one implementation scheme.
[0014] Figure 3 This is a diagram illustrating an exemplary pixel circuit according to the implementation scheme.
[0015] Figure 4 A cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment shows lateral current leakage between adjacent anodes.
[0016] Figure 5 A cross-sectional side view of an exemplary organic light-emitting diode (OLED) display according to an embodiment is shown, illustrating different layers of the OLED.
[0017] Figure 6 This is a cross-sectional side view of an exemplary organic light-emitting diode display with a pixel definition layer according to an implementation scheme.
[0018] Figure 7 This is a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display with a pixel definition layer according to an embodiment, wherein the pixel definition layer is formed by two discrete portions and an interruption portion is formed in at least one OLED layer.
[0019] Figure 8This is a cross-sectional side view of an exemplary organic light-emitting diode (OLED) display with a pixel definition layer according to an embodiment, wherein the pixel definition layer is formed by three discrete portions and an interruption portion is formed in at least one OLED layer.
[0020] Figure 9 A cross-sectional side view of an exemplary organic light-emitting diode display according to an embodiment is shown. Figure 8 How undercutting in the pixel definition layer can result in gaps interposed between portions of at least one organic light-emitting diode layer. Detailed Implementation
[0021] Figure 1 The illustration shows exemplary electronic devices of various types that may have displays. Electronic device 10 may be a computing device such as a laptop computer, a computer monitor containing an embedded computer, a tablet computer, a cellular phone, a media player or other handheld or portable electronic device, a smaller device (such as a wristwatch, a hanging device, a headset or handset, a device embedded in glasses or other equipment worn on a user's head, or other wearable or micro-devices), a display, a computer monitor containing an embedded computer, a computer monitor not containing an embedded computer, a gaming device, a navigation device, an embedded system (such as a system in which electronic equipment with a display is installed in an information kiosk or a car), or other electronic equipment. Electronic device 10 may have the shape of a pair of glasses (e.g., a support frame), may be formed with a helmet-shaped shell, or may have other configurations for helping to mount and secure components of one or more displays on or near a user's head.
[0022] like Figure 1 As shown, the electronic device 10 may include control circuitry 16 for supporting the operation of the device 10. The control circuitry may include memory, such as hard disk drive memory, non-volatile memory (e.g., flash memory configured to form a solid-state drive or other electrically programmable read-only memory), volatile memory (e.g., static random access memory or dynamic random access memory), and so on. Processing circuitry in the control circuitry 16 can be used to control the operation of the device 10. This processing circuitry may be based on one or more microprocessors, microcontrollers, digital signal processors, baseband processors, power management units, audio chips, application-specific integrated circuits, etc.
[0023] Input-output circuitry in device 10, such as input-output device 12, can be used to allow data to be supplied to device 10 and to be supplied from device 10 to external devices. Input-output device 12 may include buttons, joysticks, scroll wheels, touchpads, keypads, keyboards, microphones, speakers, audio generators, vibrators, cameras, sensors, LEDs and other status indicators, data ports, etc. Users can control the operation of device 10 by supplying commands through input-output device 12 and can receive status information and other outputs from device 10 using the output resources of input-output device 12.
[0024] Input-output device 12 may include one or more displays, such as display 14. Display 14 may be a touchscreen display including touch sensors for acquiring touch input from a user, or display 14 may be touch-insensitive. The touch sensor of display 14 may be based on an array of capacitive touch sensor electrodes, an acoustic touch sensor structure, a resistive touch component, a force-based touch sensor structure, a light-based touch sensor, or other suitable touch sensor arrangement. The touch sensor for display 14 may be formed by electrodes formed on a common display substrate having pixels of display 14, or may be formed by a separate touch sensor panel overlapping the pixels of display 14. If desired, display 14 may be touch-insensitive (i.e., the touch sensor may be omitted). Display 14 in electronic device 10 may be a head-up display, which can be viewed without requiring the user to move away from a typical viewpoint, or may be a head-mounted display incorporated into a device worn on the user's head. If desired, display 14 may also be a holographic display for displaying holograms.
[0025] The control circuit 16 can be used to run software, such as operating system code and applications, on the device 10. During operation of the device 10, the software running on the control circuit 16 can display images on the display 14.
[0026] Figure 2 The illustration shows a typical display. Figure 2 As shown, the display 14 may include layers, such as a substrate layer 26. The substrate layer, such as layer 26, may be formed of a rectangular planar material layer or a material layer having other shapes (e.g., circular or other shapes having one or more curved edges and / or straight edges). The substrate layer of the display 14 may include a glass layer, a polymer layer, a silicon layer, a composite film comprising polymeric and inorganic materials, a metal foil, etc.
[0027] Display 14 may have an array of pixels 22 for displaying images to a user, such as a pixel array 28. The pixels 22 in array 28 may be arranged in rows and columns. The edges of array 28 may be straight or curved (i.e., each row and / or column of pixels 22 in array 28 may have the same length or may have different lengths). Any suitable number of rows and columns may exist in array 28 (e.g., ten or more, one hundred or more, or one thousand or more, etc.). Display 14 may include pixels 22 of different colors. For example, display 14 may include red pixels, green pixels, and blue pixels.
[0028] The display driver circuit 20 can be used to control the operation of the pixel 28. The display driver circuit 20 may be formed of an integrated circuit, a thin-film transistor circuit, and / or other suitable circuits. Figure 2 An exemplary display driver circuit 20 includes a display driver circuit 20A and additional display driver circuitry such as a gate driver circuit 20B. The gate driver circuit 20B may be formed along one or more edges of the display 14. For example, the gate driver circuit 20B may be arranged along the left and right sides of the display 14, such as... Figure 2 As shown.
[0029] like Figure 2 As shown, the display driver circuit 20A (e.g., one or more display driver integrated circuits, thin-film transistor circuits, etc.) may include communication circuitry for communicating with system control circuitry via signal path 24. Path 24 may be formed by traces or other cables on a flexible printed circuit. Control circuitry may be located on one or more printed circuits in the electronic device 10. During operation, the control circuitry (e.g., Figure 1 The control circuit 16) can provide image data to circuits such as the display driver integrated circuit in circuit 20 for displaying the image on the display 14. Figure 2 The display driver circuit 20A is located at the top of the display 14. This is merely illustrative. The display driver circuit 20A may be located at both the top and bottom of the display 14, or it may be located in other parts of the device 10.
[0030] In order to display an image on pixel 22, display driver circuit 20A can supply corresponding image data to data line D when a control signal is sent to a supporting display driver circuit, such as gate driver circuit 20B, via signal path 30. Utilizing Figure 2 In an exemplary arrangement, the data line D extends vertically through the display 14 and is associated with the corresponding column of the pixel 22.
[0031] The gate driver circuit 20B (sometimes referred to as the gate line driver circuit or the horizontal control signal circuit) may be implemented using one or more integrated circuits, and / or using thin-film transistor circuitry on the substrate 26. Horizontal control lines G (sometimes referred to as gate lines, scan lines, emit control lines, etc.) extend horizontally through the display 14. Each gate line G is associated with a corresponding row of pixels 22. Multiple horizontal control lines, such as gate lines G associated with each row of pixels, may be present if desired. Individually controlled signal paths and / or global signal paths in the display 14 may also be used to issue other signals (e.g., power signals, etc.).
[0032] Gate driver circuit 20B asserts control signals on gate lines G in display 14. For example, gate driver circuit 20B may receive clock signals and other control signals from circuit 20A on path 30, and in response to the received signals, may sequentially assert gate line signals on gate lines G, starting from the gate line signals G in the first row of pixels 22 in array 28. When each gate line is asserted, data from data line D may be loaded into the corresponding row of the pixel. In this way, control circuits such as display driver circuits 20A and 20B may provide signals to pixel 22 to instruct pixel 22 to display a desired image on display 14. Each pixel 22 may have light-emitting diodes and circuitry (e.g., thin-film circuitry on substrate 26) that respond to control signals and data signals from display driver circuit 20.
[0033] Gate driver circuitry 20B may include gate driver circuit blocks, such as gate driver row blocks. Each gate driver row block may include circuitry such as output buffers and other output driver circuitry, register circuitry (e.g., registers that may be linked together to form a shift register), and signal lines, power lines, and other interconnects. Each gate driver row block may provide one or more gate signals to one or more corresponding gate lines in the corresponding pixel row of the pixel array in the effective area of display 14.
[0034] A schematic diagram of an exemplary pixel circuit of the type that can be used for each pixel 22 in array 28 is shown in Figure 3 It is shown in the middle. For example... Figure 3 As shown, display pixel 22 may include a light-emitting diode 38. A positive power supply voltage ELVDD can be provided to a positive power supply terminal 34, and a ground power supply voltage ELVSS can be provided to a ground power supply terminal 36. Diode 38 has an anode (terminal AN) and a cathode (terminal CD). The state of drive transistor 32 controls the amount of current flowing through diode 38, and thus controls the amount of emitted light 40 from display pixel 22. Since the cathode CD of diode 38 is coupled to ground terminal 36, the cathode terminal CD of diode 38 may sometimes be referred to as the ground terminal of diode 38.
[0035] To ensure that transistor 38 remains in the desired state between consecutive data frames, display pixel 22 may include a storage capacitor, such as storage capacitor Cst. A voltage on storage capacitor Cst is applied to the gate of transistor 32 at node A to control transistor 32. One or more switching transistors, such as switching transistor 30, may be used to load data into storage capacitor Cst. When switching transistor 30 is off, data line D is isolated from storage capacitor Cst, and the gate voltage at terminal A is equal to the data value stored in storage capacitor Cst (i.e., the data value from the previous frame of display data displayed on display 14). When a gate line G (sometimes referred to as a scan line) in the row associated with display pixel 22 is determined, switching transistor 30 is turned on, and a new data signal on data line D is loaded into storage capacitor Cst. The new signal on capacitor Cst is applied to the gate of transistor 32 at node A, thereby regulating the state of transistor 32 and adjusting the corresponding amount of light 40 emitted by light-emitting diode 38. If desired, light-emitting diodes (e.g., such as...) used to control display pixels in display 14... Figure 3 The circuitry for operating the display pixel circuit (including transistors, capacitors, etc.) can be configured in other ways (e.g., including a configuration for compensating for changes in the threshold voltage in the drive transistor 32). Figure 3 The display pixel circuit is only illustrative.
[0036] Figure 4 This is a cross-sectional side view of an exemplary display having organic light-emitting diode (OLED) display pixels. As shown, the display 14 may include a substrate 26. The substrate 26 may be formed of glass, plastic, polymer, silicon, or any other desired material. Anodes such as anodes 42-1, 42-2, and 42-3 may be formed on the substrate. Anodes 42-1, 42-2, and 42-3 may be formed of a conductive material and may be covered by an OLED layer 45 and a cathode 54. The OLED layer 45 may include one or more layers for forming organic light-emitting diodes. For example, layer 45 may include one or more of the following: a hole injection layer (HIL), a hole transport layer (HTL), an emitter layer (EML), an electron transport layer (ETL), an electron injection layer (EIL), a charge generation layer (CGL), etc. The cathode 54 may be a conductive layer formed on the OLED layer 45. The cathode layer 54 may form a common cathode terminal for all diodes in the display 14 (see example...). Figure 3The cathode terminal CD). The cathode layer 54 can be formed of a transparent conductive material (e.g., indium tin oxide, a metal layer thin enough to be transparent, a combination of a thin metal and indium tin oxide, etc.). Each anode in the display 14 can be controlled independently, so that each diode in the display 14 can be controlled independently. This allows each pixel 22 to produce an independently controlled amount of light.
[0037] Anodes 42-1, 42-2, and 42-3 can each be associated with a corresponding pixel. For example, anode 42-1 can be associated with pixel 22-1, anode 42-2 with pixel 22-2, and anode 42-3 with pixel 22-3. To emit light from a pixel, a voltage can be applied to the anode of the corresponding pixel. For example, where it is desired to emit light from pixel 22-2 (but not from pixels 22-1 and 22-3), a voltage can be applied to anode 42-2, causing light 56 to be emitted from pixel 22-2. As mentioned earlier, it would be ideal if no light was emitted from pixels 22-1 and 22-3 due to the voltage applied to anode 42-2. However, as shown, leakage can occur through the OLED layer 45 between anodes 42-2 and 42-1, and between anodes 42-2 and 42-3. A resistance 58 (i.e., a resistance associated with the OLED layer) may be present between anode 42-2 and the adjacent anode, which helps prevent leakage. The higher the resistance, the less leakage current will reach anodes 42-1 and 42-3. However, the resistance may not be high enough to completely eliminate leakage between anode 42-2 and anodes 42-1 and 42-3. As shown, light 56 can be emitted from pixels 22-1 and 22-3 even if pixels 22-1 and 22-3 are intended to be off. The resistance 58 between adjacent anodes can decrease as the distance 60 between adjacent anodes decreases. To maximize display resolution, a smaller distance 60 between adjacent anodes is desirable. However, this reduces the resistance 58 between anodes and increases crosstalk between pixels.
[0038] Although Figure 4 As not shown, display 14 may optionally include a pixel definition layer (PDL). The pixel definition layer may be formed of a dielectric material and may be interposed between adjacent anodes of the display. The pixel definition layer may have openings in which anodes are formed, thereby defining the area of each pixel. Each of the following embodiments of an organic light-emitting diode display may optionally include a pixel definition layer. In some cases, the pixel definition layer may be shaped in a manner that reduces leakage between adjacent pixels.
[0039] Figure 5 A cross-sectional side view of an exemplary display having organic light-emitting diode (OLED) display pixels. Figure 5 It shows Figure 4Details of the OLED layer 45. As shown in the figure, the OLED layer 45 (sometimes referred to as an organic stack, organic stack, or organic light-emitting diode stack) may include multiple conductive organic light-emitting diode layers. Figure 5 Five exemplary organic light-emitting diode (OLED) layers are shown. OLED layer 45-1 is formed above anodes 42-1 and 42-2. The distance between adjacent anodes within the display (e.g., edge-to-edge distance between anodes 42-1 and 42-2) can be less than 100 micrometers, less than 50 micrometers, less than 20 micrometers, less than 10 micrometers, less than 5 micrometers, less than 3 micrometers, less than 2 micrometers, less than 1 micrometer, between 1 and 5 micrometers, between 0.5 and 10 micrometers, greater than 0.5 micrometers, greater than 0.1 micrometers, etc. OLED layer 45-2 is formed above OLED layer 45-1, OLED layer 45-3 is formed above OLED layer 45-2, OLED layer 45-4 is formed above OLED layer 45-3, OLED layer 45-5 is formed above OLED layer 45-4, and cathode layer 54 is formed above OLED layer 45-5. Each organic light-emitting diode (OLED) layer can sometimes be referred to as a conductive OLED layer, a common OLED layer, a side-conducting OLED layer, etc.
[0040] There are many possible arrangements for the organic light-emitting diode (OLED) layers in the display 14. In one exemplary embodiment, OLED layer 45-1 can be a hole injection layer, OLED layer 45-2 can be a hole transport layer, OLED layer 45-3 can be an emission layer, OLED layer 45-4 can be an electron transport layer, and OLED layer 45-5 can be an electron injection layer. If desired, the OLEDs can be inverted, such that the cathode is patterned pixel-by-pixel and the anode is a common layer. In this case, OLED layer 45-1 can be an electron injection layer, OLED layer 45-2 can be an electron transport layer, OLED layer 45-3 can be an emission layer, OLED layer 45-4 can be a hole transport layer, and OLED layer 45-5 can be a hole injection layer.
[0041] Included Figure 5The example of the layer between the anode 42 and the cathode 54 is merely illustrative. These layers may include electron blocking layers, charge generating layers, hole blocking layers, etc., if desired. Hole injection layers and hole transport layers may be collectively referred to as hole layers. Electron transport layers and electron injection layers may be collectively referred to as electron layers. In an exemplary arrangement, organic light-emitting diode (OLED) layer 45-1 may be a hole layer, OLED layer 45-2 may be a first emitting layer, OLED layer 45-3 may be a charge generating layer (e.g., a layer including n-doped and p-doped layers for injecting electrons and holes in a series diode), OLED layer 45-4 may be a second emitting layer, and OLED layer 45-5 may be an electron layer.
[0042] Generally, any desired layer can be included between the anode and cathode, and any layer formed on the display and having non-zero conductivity can be considered a common lateral conductive layer. Each layer in OLED layer 45 can be formed of any desired material. In some embodiments, layers may be formed of organic materials. However, in some cases, one or more layers may be formed of inorganic materials or materials doped with organic or inorganic dopants. The emitting layer may include an organic electroluminescent material.
[0043] In subsequent embodiments, the patterned anode is described as being positioned below the common cathode layer. However, it should be understood that in each of these embodiments, the anode and cathode may be inverted as previously described.
[0044] Regardless of the specific arrangement of the OLED layers, the presence of a shared lateral conductive layer can provide an opportunity for leakage current to flow laterally from one diode into an adjacent diode, potentially damaging the latter. The conductivity of each layer can contribute to the amount of leakage current transferred to adjacent diodes. For example, an OLED layer with low resistivity (and therefore high conductivity) may be susceptible to transferring leakage current to adjacent pixels. An OLED layer with high resistivity (and therefore low conductivity) may be less susceptible to transferring leakage current to adjacent pixels. As the distance between pixels decreases (to increase the resolution of the display), the threshold of conductivity required to produce detectable leakage can become smaller. To reduce leakage between anodes through the OLED layers, it may be advantageous to form interruptions in the OLED layers between adjacent anodes. These interruptions will disrupt the conductive leakage path in the OLED layers, preventing leakage current from being transferred through the OLED layers.
[0045] Forming interruptions in the organic light-emitting diode (OLED) layers can reduce leakage current between adjacent pixels. However, it may be desirable for the cathode layer 54 to remain continuous across the pixels. Additionally, as previously mentioned, some of the OLED layers can have higher conductivity than others. Therefore, the display can be optimized to have interruptions in both the high-conductivity OLED layers and the continuous cathode layer across the display.
[0046] In some cases, a pixel definition layer can be used to form interruptions in some parts of the organic light-emitting diode layer while maintaining continuity in the cathode layer. Figure 6 This is a cross-sectional side view of an exemplary organic light-emitting diode display with pixel definition layers. (Example:) Figure 6 As shown, a pixel definition layer 76 can be formed on a substrate 26 between the anodes of the display. The pixel definition layer can be opaque, thus defining the area of each pixel emitting light. The pixel definition layer can be formed of any desired material. The pixel definition layer can be formed of one or more materials (e.g., silicon nitride, silicon dioxide, etc.). If desired, the pixel definition layer can also be formed of an organic material. The shape of each pixel definition layer can be interrupted in the overlying organic light-emitting diode display layer, such as... Figures 7 to 9 As described in more detail below.
[0047] As previously mentioned, it may be desirable to create interruptions in one or more of the organic light-emitting diode (OLED) layers in the display (to prevent lateral leakage through the OLED layers). However, it may also be desirable to maintain continuity in one or more other layers in the display (e.g., cathode 54). Therefore, the shape of the pixel definition layer can be designed such that one or more desired OLED layers deposited above the pixel definition layer have interruptions, while additional OLED layers and / or cathode 54 deposited above the pixel definition layer do not have interruptions. A detailed view of the pixel definition layer shaped to form interruptions in the selected overlay layer is provided in... Figure 7 and Figure 8 As shown in the image.
[0048] Figure 7 This is a cross-sectional side view of an exemplary pixel definition layer that can form interrupted portions in the organic light-emitting diode layer of a display. (Example:) Figure 7 As shown, the pixel definition layer (PDL) 76 has an undercut 102. The undercut 102 may also be referred to as a recess 102, cavity 102, void 102, indentation 102, etc. An undercut is a gap in the edge of the pixel definition layer material that is partially covered by the pixel definition layer. For example... Figure 7As shown, the undercut 102 can have a width 104 and a height 106. In this arrangement, the width 104 is defined as the distance between the edge of portion 76-1 of the pixel definition layer and the edge of portion 76-2 of the pixel definition layer. The height 106 is defined as the distance between the lower surface of portion 76-1 of the pixel definition layer and the anode 42. The width 104 and the height 106 can each be any desired distance (e.g., less than 1 micrometer, less than 500 nanometers, less than 250 nanometers, less than 150 nanometers, less than 100 nanometers, less than 75 nanometers, less than 50 nanometers, less than 35 nanometers, less than 25 nanometers, less than 20 nanometers, greater than 10 nanometers, greater than 15 nanometers, greater than 20 nanometers, between 10 and 100 nanometers, etc.). The height 106 and the width 104 can be the same or different. In one example, the height 106 can be less than 50 nanometers, and the width 104 can be greater than 15 nanometers.
[0049] exist Figure 7 In the example, the pixel definition layer 76 can be formed from portions 76-1 and 76-2 (sometimes referred to as layers 76-1 and 76-2), each formed from a different material. In other words, portions 76-1 and 76-2 can be deposited separately when forming the pixel definition layer. Each portion can be formed from any desired material (e.g., silicon nitride, silicon dioxide, organic materials, etc.). In one example, portion 76-1 can be formed from silicon dioxide (SiO2), and portion 76-2 can be formed from silicon nitride (SiN). This example is merely illustrative.
[0050] Part 76-1 may have a thickness of 110, and part 76-2 may have a thickness of 108. Thicknesses 108 and 110 can each be any desired distance (e.g., less than 1 micrometer, less than 500 nanometers, less than 250 nanometers, less than 150 nanometers, less than 100 nanometers, less than 75 nanometers, less than 50 nanometers, less than 35 nanometers, less than 25 nanometers, less than 20 nanometers, greater than 10 nanometers, greater than 20 nanometers, between 10 nanometers and 100 nanometers, etc.). Thicknesses 108 and 110 may be the same or different. It should be noted that the thickness of pixel definition layer part 76-2 can vary due to the presence of anode 42. For example, in Figure 7 In this example, portion 76-2 has a thickness of 108 in the portion of substrate 26 above the region excluding anode 42. Portion 76-2 has a thickness smaller than the thickness of 108 in the portion overlapping with anode 42 (e.g., equal to height 106). This example is merely illustrative. If desired, portion 76-2 may have a uniform thickness (with a step change above the edge of the anode).
[0051] The angle of the edges of sections 76-1 and 76-2 can be selected to control the interrupted portions of the organic light-emitting diode layer. For example... Figure 7As shown, portion 76-2 has an edge surface 112 that forms an angle 116 with respect to the upper planar surface of anode 42 (and with respect to the lower planar surface of portion 76-2). Portion 76-1 has an edge surface 114 that forms an angle 118 with respect to the upper planar surface of anode 42 (and with respect to the lower planar surface of portion 76-1). Thicknesses 116 and 118 can be the same or different. Each angle can be any desired angle (e.g., between 45° and 90°, between 25° and 135°, between 45° and 55°, between 55° and 65°, between 75° and 85°, between 85° and 95°, between 45° and 65°, between 70° and 90°, between 10° and 45°, less than 90°, etc.).
[0052] Any size of the pixel definition layer can be adjusted to impart desired interruptions on the organic light-emitting diode (OLED) layer formed above the pixel definition layer. For example, the thicknesses 108 and 110 mm of each pixel definition layer portion, the width 104 and height 106 mm of the undercut 102, and the angles 116 and 118 mm can be selected such that desired interruptions are formed when the OLED layer is deposited above the pixel definition layer. The pixel definition layer portions and the OLED layer can be formed using vapor deposition, photolithography, or other techniques. To modify the dimensions of the pixel definition layer portions, exposure levels, mask profiles, deposition pressures, gas composition, and / or other desired fabrication characteristics can be adjusted.
[0053] Figure 8 This is another example of a pixel definition layer that can form interrupted portions in the organic light-emitting diode layer of a display. (e.g.) Figure 8 As shown, the pixel definition layer (PDL) 76 also has an undercut 102. The undercut 102 can sometimes be referred to as a recess 102, cavity 102, void 102, indentation 102, etc. The undercut is a void in the pixel definition layer material that is still covered by a portion of the pixel definition layer. For example... Figure 8As shown, the undercut 102 can have a width 104 and a height 106. In this arrangement, the width 104 is defined as the distance between the edge of portion 76-1 of the pixel definition layer and the edge of portion 76-2 of the pixel definition layer. The height 106 is defined as the distance between the lower surface of portion 76-1 of the pixel definition layer and the upper surface of portion 76-3 of the pixel definition layer. The width 104 and the height 106 can each be any desired distance (e.g., less than 1 micrometer, less than 500 nanometers, less than 250 nanometers, less than 150 nanometers, less than 100 nanometers, less than 75 nanometers, less than 50 nanometers, less than 35 nanometers, less than 25 nanometers, less than 20 nanometers, greater than 10 nanometers, greater than 20 nanometers, between 10 and 100 nanometers, etc.). The height 106 and the width 104 can be the same or different. In one example, the height 106 can be less than 50 nanometers, the width 104 can be greater than 20 nanometers, the thickness 108 can be less than 50 nanometers, the thickness 110 can be less than 20 nanometers, and the thickness 122 can be less than 50 nanometers.
[0054] exist Figure 8 In the example, the pixel definition layer 76 can be formed from portions 76-1, 76-2, and 76-3 (sometimes referred to as layers 76-1, 76-2, and 76-3), each formed from a different material. In other words, when forming the pixel definition layer, portions 76-1, 76-2, and 76-3 can be deposited individually. Each portion can be formed from any desired material (e.g., silicon nitride, silicon dioxide, organic materials, etc.). In one example, portions 76-1 and 76-3 can be formed from silicon dioxide (SiO2), and portion 76-2 can be formed from silicon nitride (SiN). This example is merely illustrative.
[0055] Part 76-1 can have a thickness of 110, part 76-2 can have a thickness of 108, and part 76-3 can have a thickness of 122. Thicknesses 108, 110, and 122 can each be any desired distance (e.g., less than 1 micrometer, less than 500 nanometers, less than 250 nanometers, less than 150 nanometers, less than 100 nanometers, less than 75 nanometers, less than 50 nanometers, less than 35 nanometers, less than 25 nanometers, less than 20 nanometers, greater than 10 nanometers, greater than 20 nanometers, between 10 and 100 nanometers, etc.). Thicknesses 108, 110, and 122 can be the same or different. It should be noted that the thickness of pixel definition layer part 76-3 can vary due to the presence of anode 42. For example, in Figure 8In the substrate 26, portion 76-3 has a thickness 122 in the region above the anode 42. Portion 76-3 has a thickness 130 that is smaller than the thickness 122 in the portion overlapping with the anode 42. The thickness 130 of portion 76-3 in the reduced thickness region can be any desired distance (e.g., less than 1 micrometer, less than 500 nanometers, less than 250 nanometers, less than 150 nanometers, less than 100 nanometers, less than 75 nanometers, less than 50 nanometers, less than 35 nanometers, less than 25 nanometers, less than 20 nanometers, greater than 10 nanometers, greater than 20 nanometers, between 10 and 100 nanometers, etc.). This example is merely illustrative. If desired, portion 76-3 can have a uniform thickness (with a step change above the edge of the anode).
[0056] The angles of the edges of portions 76-1, 76-2, and 76-3 can be selected to control the interruption portions of the organic light-emitting diode layer. For example... Figure 8 As shown, portion 76-3 has an edge surface 126 that forms an angle 128 relative to the upper planar surface of anode 42 (and relative to the lower planar surface of portion 76-3). Portion 76-2 has an edge surface 112 that forms an angle 116 relative to the upper planar surface of anode 42 (and relative to the lower planar surface of portion 76-2). Portion 76-1 has an edge surface 114 that forms an angle 118 relative to the upper planar surface of anode 42 (and relative to the lower planar surface of portion 76-1). Angles 116, 118, and 128 may be the same or different. Each angle can be any desired angle (e.g., between 45° and 90°, between 25° and 135°, between 45° and 55°, between 55° and 65°, between 75° and 85°, between 85° and 95°, between 45° and 65°, between 70° and 90°, between 10° and 45°, less than 90°, etc.).
[0057] exist Figure 8 In this layer, a portion of layer 76-3 may not be covered by layer 76-1. In other words, layer 76-3 extends beyond the edge of layer 76-1 (e.g., towards the center of the anode). The width 124 of the portion of layer 76-3 not covered by layer 76-1 can be any desired distance (e.g., less than 1 micrometer, less than 500 nanometers, less than 250 nanometers, less than 150 nanometers, less than 100 nanometers, less than 75 nanometers, less than 50 nanometers, less than 35 nanometers, less than 25 nanometers, less than 20 nanometers, greater than 10 nanometers, greater than 20 nanometers, between 10 and 100 nanometers, etc.). The portion of layer 76-3 not covered by layer 76-1 can be referred to as the stepped portion of the pixel-defining layer. The width 124 can be greater than 40 nanometers.
[0058] Any size of the pixel definition layer can be adjusted to impart a desired interruption on the organic light-emitting diode (OLED) layer formed above the pixel definition layer. For example, the thicknesses 108, 110, 122, and 130 mm of each pixel definition layer portion, the width 104 and height 106 mm of the undercut 102, angles 116, 118, and 128 mm, and the step width 124 mm can all be selected to form the desired interruption when the OLED layer is deposited above the pixel definition layer. The pixel definition layer portions and the OLED layer can be formed using vapor deposition, photolithography, or other techniques. To modify the dimensions of the pixel definition layer portions, the exposure level, mask profile, deposition pressure, gas composition, and / or other desired fabrication characteristics can be adjusted.
[0059] Figure 9 A cross-sectional side view showing how interrupted portions can be formed in an organic light-emitting diode deposited above a pixel definition layer. Figure 8 The pixel definition layer in Figure 9 As shown in the image. However, it should be understood that alternative methods can be used if necessary. Figure 7 The pixel definition layer. For example... Figure 9 As shown, organic light-emitting diode layers 45-1, 45-2, 45-3, 45-4, and 45-5 are formed above the pixel definition layer 76 and the anode 42. A cathode layer 54 is formed above the organic light-emitting diode layers.
[0060] The presence of undercut 102 can result in a gap 142 between the pixel definition layer and the organic light-emitting diode layer. Figure 9 In the example, gap 142 (sometimes referred to as air-filled gap 142, air-filled region 142, insulator-filled gap 142, etc.) forms an interruption between corresponding portions of organic light-emitting diode layer 45-1. The gap can be filled with air or any other desired material. The gap also forms an interruption between corresponding portions of organic light-emitting diode layer 45-2. Finally, the gap forms an interruption between corresponding portions of organic light-emitting diode layer 45-3. This prevents lateral leakage through organic light-emitting diode layers 45-1, 45-2, and 45-3. When gaps form interruptions in organic light-emitting diode layers 45-1, 45-2, and 45-3, an interruption may not be formed between organic light-emitting diode layer 45-4, organic light-emitting diode layer 45-5, and cathode layer 54.
[0061] The shape of the pixel definition layer 76 determines how many organic light-emitting diode layers are interrupted by gaps 142. Figure 9In this arrangement, three organic light-emitting diode (OLED) layers (45-1, 45-2, and 45-3) are interrupted by gap 142, while two OLED layers (45-4 and 45-5) are not interrupted by gap 142. As previously described, in one exemplary arrangement, OLED layer 45-1 can be a hole injection layer, OLED layer 45-2 can be a hole transport layer, OLED layer 45-3 can be an emission layer, OLED layer 45-4 can be an electron transport layer, and OLED layer 45-5 can be an electron injection layer. In another exemplary arrangement, OLED layer 45-1 can be a hole layer, OLED layer 45-2 can be a first emission layer, OLED layer 45-3 can be a charge generation layer, OLED layer 45-4 can be a second emission layer, and OLED layer 45-5 can be an electron layer.
[0062] The organic light-emitting diode (OLED) layer 45-3 (e.g., the last layer interrupted by a gap) can have a higher conductivity than the OLED layer 45-4 (e.g., the first layer not interrupted by a gap). In other words, the interrupted portion in the OLED layer can conduct to ensure that the interrupted portion is a high-conductivity OLED layer. This can effectively reduce lateral leakage between pixels in the display. Continuity in the remaining OLED layers (e.g., 45-4 and 45-5) can be maintained while still ensuring a satisfactory level of light leakage.
[0063] Generally, each of the organic light-emitting diode (OLED) layers can have any desired conductivity, and the interruption can be conducted through the OLED layers by the pixel definition layer 76 until lateral light leakage is reduced to a satisfactory level (while maintaining the continuity of the cathode layer). In other words, in an example where OLED layer 45-3 has low conductivity and OLED layer 45-2 has high conductivity (e.g., above layer 45-3), the interruption can exist only in OLED layers 45-1 and 45-2 (while OLED layers 45-3, 45-4, and 45-5 remain continuous). In yet another example where OLED layer 45-2 has low conductivity and OLED layer 45-1 has high conductivity (e.g., above layer 45-2), the interruption can exist only in OLED layer 45-1 (while OLED layers 45-2, 45-3, 45-4, and 45-5 remain continuous).
[0064] Figure 7 and Figure 8 The pixel-defining layer arrangement can achieve high yields in the fabrication of organic light-emitting diode (OLED) displays. The displays can be fabricated at the wafer or mother glass level and then cut into individual displays. In this type of process, Figure 7 and Figure 8 The robust design ensures that the display on the wafer or mother glass has satisfactory display performance (e.g., with reduced lateral leakage and cathode continuity).
[0065] According to one embodiment, a display is provided, the display comprising: a substrate; a pixel array including a first organic light-emitting diode (OLED) pixel and a second OLED pixel, wherein the first OLED pixel includes a first patterned electrode located on the substrate and the second OLED pixel includes a second patterned electrode located on the substrate; a pixel defining layer located on the substrate, the pixel defining layer being interposed between the first patterned electrode and the second patterned electrode; and a conductive layer formed above the pixel defining layer, the conductive layer having a first portion and a second portion, the first portion forming a portion of the first OLED pixel, the second portion being electrically isolated from the first portion by a gap defined at least partially by an undercut in the edge of the pixel defining layer.
[0066] According to another embodiment, the pixel definition layer has a first portion formed of a first material and a second portion formed of a second material different from the first material.
[0067] According to another embodiment, the first material is silicon dioxide, and the second material is silicon nitride.
[0068] According to another implementation, the first portion of the pixel definition layer extends through the edge of the second portion of the pixel definition layer to define the undercut in the edge of the pixel definition layer.
[0069] According to another embodiment, the undercut has a width that is the distance between the edge of the first part of the pixel definition layer and the edge of the second part of the pixel definition layer.
[0070] According to another implementation, the width of the undercut is greater than 15 nanometers.
[0071] According to another embodiment, the undercut has a height that is the distance between the lower surface of the first portion of the pixel definition layer and the upper surface of the first patterned electrode.
[0072] According to another implementation, the height of the undercut is greater than ten nanometers.
[0073] According to another embodiment, the pixel definition layer includes a third portion that is interposed between the second portion of the pixel definition layer and the first patterned electrode.
[0074] According to another embodiment, the undercut has a height that is the distance between the lower surface of the first portion of the pixel definition layer and the upper surface of the third portion of the pixel definition layer.
[0075] According to another implementation, the height of the undercut is greater than 20 nanometers.
[0076] According to another implementation, the third part of the pixel definition layer extends through the edge of the first part of the pixel definition layer.
[0077] According to another embodiment, the first portion of the pixel definition layer is formed of silicon dioxide, the second portion of the pixel definition layer is formed of silicon nitride, and the third portion of the pixel definition layer is formed of silicon dioxide.
[0078] According to another embodiment, the display includes: a second conductive layer formed over a first conductive layer, the second conductive layer having a third portion and a fourth portion, the third portion forming part of a first organic light-emitting diode pixel, the third portion being electrically isolated from the fourth portion by a gap; and a third conductive layer formed over the second conductive layer, the third conductive layer having a fifth portion formed over the third portion of the second conductive layer, the third conductive layer having a sixth portion formed over the fourth portion of the second conductive layer, the fifth portion of the third conductive layer forming part of the first organic light-emitting diode pixel, and the fifth and sixth portions of the third conductive layer being electrically connected and not interrupted by the gap.
[0079] According to another embodiment, the second conductive layer has a higher conductivity than the third conductive layer.
[0080] According to another embodiment, the second conductive layer includes a charge generation layer.
[0081] According to one embodiment, a display is provided, the display comprising: a substrate; a pixel array including a first organic light-emitting diode (OLED) pixel and a second OLED pixel; the first OLED pixel including a first patterned electrode located on the substrate, and the second OLED pixel including a second patterned electrode located on the substrate; and an opaque pixel definition layer located on the substrate, the opaque pixel definition layer being interposed between the first patterned electrode and the second patterned electrode, the pixel definition layer including a first portion formed on the first patterned electrode, a second portion formed on the first portion and having an edge, and a third portion formed on the second portion and having an edge, wherein the edge of the third portion extends toward the center of the first patterned electrode through the edge of the second portion.
[0082] According to another embodiment, the first part of the pixel definition layer is a silicon dioxide layer, the second part of the pixel definition layer is a silicon nitride layer, and the third part of the pixel definition layer is a silicon dioxide layer.
[0083] According to another embodiment, the first portion of the pixel definition layer has an upper surface that overlaps with both the second and third portions of the pixel definition layer in a first region, does not overlap with both the second and third portions of the pixel definition layer in a second region, and overlaps only with the third portion of the pixel definition layer in a third region, the third region being interposed between the first and second regions.
[0084] According to one embodiment, a display is provided, the display comprising: a substrate; a pixel array including a first organic light-emitting diode (OLED) pixel and a second OLED pixel, the first OLED pixel including a first patterned electrode on the substrate, and the second OLED pixel including a second patterned electrode on the substrate; a pixel definition layer on the substrate, the pixel definition layer being interposed between the first patterned electrode and the second patterned electrode; and a plurality of conductive OLED layers formed above the pixel definition layer and the first and second patterned electrodes, the pixel definition layer having an undercut forming an interruption portion in at least one of the plurality of conductive OLED layers to reduce lateral leakage between the first OLED pixel and the second OLED pixel through the plurality of conductive OLED layers.
[0085] The foregoing description is merely illustrative, and various modifications can be made by those skilled in the art without departing from the scope and substance of the described embodiments. The aforementioned embodiments can be implemented independently or in any combination.
Claims
1. A display, comprising: substrate; A pixel array, the pixel array including a first organic light-emitting diode pixel and a second organic light-emitting diode pixel, wherein the first organic light-emitting diode pixel includes a first electrode on the substrate, and wherein the second organic light-emitting diode pixel includes a second electrode on the substrate; A first dielectric layer, the first dielectric layer being formed of a first material and having a first edge; A second dielectric layer, the second dielectric layer being formed of a second material and having a second edge; A third dielectric layer, the third dielectric layer being formed of the first material and having a third edge, wherein the first dielectric layer, the second dielectric layer and the third dielectric layer are interposed between the first electrode and the second electrode, the second dielectric layer being interposed between the first dielectric layer and the third dielectric layer, wherein the third edge extends beyond the second edge, and wherein the first edge extends beyond the third edge; as well as A conductive layer is formed over the third dielectric layer, wherein the conductive layer has at least one discontinuity caused by the first dielectric layer, the second dielectric layer and the third dielectric layer.
2. The display according to claim 1, wherein the first material is silicon dioxide.
3. The display according to claim 1, wherein the second material is silicon nitride.
4. The display according to claim 1, wherein the second dielectric layer is formed on the upper surface of the first dielectric layer, and wherein the third dielectric layer is formed on the upper surface of the second dielectric layer.
5. The display of claim 4, wherein the first dielectric layer, the second dielectric layer and the third dielectric layer together define an undercut, and wherein at least one discontinuity is caused by the undercut.
6. The display of claim 1, wherein the first edge has an edge surface at a non-orthogonal angle relative to the upper surface of the first electrode.
7. The display of claim 1, wherein the third edge has an edge surface at a non-orthogonal angle relative to the upper surface of the first electrode.
8. The display according to claim 7, wherein the non-orthogonal angle is less than 90 degrees.
9. The display of claim 1, wherein the first material comprises silicon dioxide, wherein the second material comprises silicon nitride, wherein the first edge has a first edge surface at a first angle relative to the upper surface of the first electrode, wherein the second edge has a second edge surface at a second angle relative to the upper surface of the first electrode, wherein the third edge has a third edge surface at a third angle relative to the upper surface of the first electrode, wherein the first angle is less than 90 degrees, wherein the second angle is between 25 degrees and 135 degrees, wherein the third angle is less than 90 degrees, wherein the third edge extends beyond the second edge by a distance between 20 and 150 nm, wherein the first edge extends beyond the second edge by an additional distance of less than 250 nm, and wherein the lower surface of the third dielectric layer and the upper surface of the first dielectric layer are separated by the thickness of the second dielectric layer, the thickness being between 20 and 100 nm.
10. A display comprising: substrate; A pixel array, the pixel array including a first organic light-emitting diode pixel and a second organic light-emitting diode pixel, wherein the first organic light-emitting diode pixel includes a first electrode on the substrate, and wherein the second organic light-emitting diode pixel includes a second electrode on the substrate; A dielectric layer, wherein the dielectric layer is inserted between the first electrode and the second electrode, wherein the dielectric layer comprises: A first dielectric layer having a first edge surface forming a first non-orthogonal angle with respect to the upper surface of the first electrode; A second dielectric layer is formed on the upper surface of the first dielectric layer; and A third dielectric layer is formed on the upper surface of the second dielectric layer, wherein the third dielectric layer has a second edge surface forming a second non-orthogonal angle with respect to the upper surface of the first electrode; and A conductive layer is formed over the dielectric layer, wherein the conductive layer has a first portion forming a portion of the first organic light-emitting diode pixel and a second portion electrically isolated from the first portion.
11. The display of claim 10, wherein the first non-orthogonal angle is less than 90 degrees.
12. The display of claim 10, wherein the first non-orthogonal angle is between 10 degrees and 45 degrees.
13. The display of claim 10, wherein the first non-orthogonal angle is between 45 degrees and 65 degrees.
14. The display of claim 10, wherein the second non-orthogonal angle is less than 90 degrees.
15. The display of claim 10, wherein the second edge surface of the third dielectric layer extends beyond the edge of the second dielectric layer.
16. The display of claim 10, wherein the first dielectric layer and the third dielectric layer comprise silicon dioxide, wherein the second dielectric layer comprises silicon nitride, wherein the first non-orthogonal angle is less than 90 degrees, wherein the second non-orthogonal angle is less than 90 degrees, wherein the second dielectric layer has an additional edge surface, wherein the third edge surface extends beyond the additional edge surface by a distance between 20 and 150 nm, wherein the first edge surface extends beyond the additional edge surface by an additional distance of less than 250 nm, wherein the first edge surface extends beyond the third edge surface, and wherein the lower surface of the third dielectric layer and the upper surface of the first dielectric layer are separated by the thickness of the second dielectric layer, the thickness being between 20 and 100 nm.
17. A display comprising: substrate; A pixel array, the pixel array including a first organic light-emitting diode pixel and a second organic light-emitting diode pixel, wherein the first organic light-emitting diode pixel includes a first electrode on the substrate, and wherein the second organic light-emitting diode pixel includes a second electrode on the substrate; A first layer, a second layer, and a third layer, wherein the first layer, the second layer, and the third layer are inserted between the first electrode and the second electrode; as well as A conductive layer is formed over the first layer, the second layer, and the third layer, wherein: The conductive layer has at least one discontinuity caused by the first layer, the second layer, and the third layer; The second layer is formed on the upper surface of the first layer; The third layer is formed on the upper surface of the second layer; as well as The lower surface of the third layer and the upper surface of the first layer are separated by the thickness of the second layer, which is between 20 and 100 nm.
18. The display of claim 17, wherein the first layer has a first edge, the second layer has a second edge, and the third layer has a third edge, wherein the third edge extends beyond the second edge by a distance between 20 and 150 nm.
19. The display of claim 18, wherein the first edge extends beyond the second edge by an additional distance of less than 250 nm.
20. The display of claim 18, wherein the first layer, the second layer, and the third layer define an undercut having a height and a width, wherein the height is equal to the thickness of the second layer, wherein the width is equal to the distance by which the third edge extends beyond the second edge, and wherein the at least one discontinuity in the conductive layer is caused by the undercut.
21. The display of claim 17, wherein the first layer and the third layer comprise silicon dioxide, and wherein the second layer comprises silicon nitride.
22. The display of claim 17, wherein the third layer has an edge surface at a non-orthogonal angle relative to the upper surface of the first electrode.
23. The display of claim 17, wherein the first layer and the third layer comprise silicon dioxide, wherein the second layer comprises silicon nitride, wherein the first layer has a first edge surface at a first angle relative to the upper surface of the first electrode, wherein the second layer has a second edge surface at a second angle relative to the upper surface of the first electrode, wherein the third layer has a third edge surface at a third angle relative to the upper surface of the first electrode, wherein the first angle is less than 90 degrees, wherein the second angle is between 25 degrees and 135 degrees, wherein the third angle is less than 90 degrees, wherein the third edge surface extends beyond the second edge surface by a distance between 20 and 150 nm, wherein the first edge surface extends beyond the second edge surface by an additional distance of less than 250 nm, and wherein the first edge surface extends beyond the third edge surface.
24. A display comprising: substrate; A pixel array, the pixel array including a first organic light-emitting diode pixel and a second organic light-emitting diode pixel, wherein the first organic light-emitting diode pixel includes a first electrode on the substrate, and wherein the second organic light-emitting diode pixel includes a second electrode on the substrate; A first layer and a second layer, wherein the first layer and the second layer are inserted between the first electrode and the second electrode; as well as A conductive layer is formed over the first layer and the second layer, wherein: The second layer is formed on the upper surface of the first layer. The first and second layers define an undercut having height and width. The height is less than the thickness of the first layer. The width is equal to the distance by which the second edge of the second layer extends beyond the first edge of the first layer, and The conductive layer has at least one discontinuity caused by the undercut.
25. The display of claim 24, wherein the first layer has a first edge surface at a first angle relative to the upper surface of the first electrode, wherein the second layer has a second edge surface at a second angle relative to the upper surface of the first electrode, wherein the first angle is between 85 degrees and 95 degrees, and wherein the second angle is between 85 degrees and 95 degrees.
26. A display comprising: Grounding power supply voltage; Positive power supply voltage; Cathode layer, the cathode layer being coupled to the ground power supply voltage; An organic light-emitting diode (OLED) layer, the OLED layer being adjacent to the cathode layer, wherein the OLED layer has at least one discontinuity; as well as Multiple pixels, where each pixel includes: A light-emitting diode, the light-emitting diode including an anode, a portion of the cathode layer, and a portion of the organic light-emitting diode layer interposed between the anode and the portion of the cathode layer; A driving transistor, wherein the driving transistor is connected in series with the light-emitting diode, and wherein the terminals of the driving transistor are coupled to the positive power supply voltage. A storage capacitor coupled between the gate terminal of the driving transistor and the anode; and A switching transistor configured to load data into the storage capacitor, wherein the switching transistor is coupled between a data line and the gate terminal of the driving transistor.
27. The display of claim 26, wherein the organic light-emitting diode layer comprises a hole injection layer, a hole transport layer, an emission layer, an electron transport layer, or an electron injection layer.
28. A display having a plurality of pixels, wherein the display comprises: substrate; Electrodes, the electrodes being formed on the substrate; An organic light-emitting diode (OLED) layer, the OLED layer overlapping the anode, wherein the OLED comprises: A hole injection layer, wherein the hole injection layer has at least one discontinuity between two adjacent anodes in the anode; A hole transport layer, wherein the hole transport layer has at least one discontinuity between the two adjacent anodes; An emission layer, wherein the hole transport layer is interposed between the hole injection layer and the emission layer; An electron transport layer, wherein the emitter layer is interposed between the hole transport layer and the electron transport layer; and An electron injection layer, wherein the electron transport layer is interposed between the emission layer and the electron injection layer; and A cathode layer is formed above the organic light-emitting diode layer, wherein the cathode is continuous across the plurality of pixels.
29. The display of claim 28, wherein the emitting layer has at least one discontinuity between the two adjacent anodes, wherein the electron transport layer has at least one discontinuity between the two adjacent anodes, and wherein the electron injection layer has at least one discontinuity between the two adjacent anodes.