Filtering method and device, equipment, storage medium and computer program product
By performing time-off alignment and filtering on historical PDPs, the problem of decreased PDP estimation accuracy due to time offset by a few fractional samples was solved, thus improving the receiver's performance in variable channel environments.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- XINSHENG TECHNOLOGY CO LTD
- Filing Date
- 2025-12-31
- Publication Date
- 2026-05-19
AI Technical Summary
Existing PDP filtering methods struggle to achieve effective alignment and filtering when the time offset is a fraction of the sample points, leading to a decrease in PDP estimation accuracy and consequently affecting the overall performance of the receiver in variable channel environments.
By determining the time offset adjustment value, separating the integer and fractional parts, time offset alignment is performed on the historical PDP, and the power delay distribution is determined in combination with the current PDP. Then, filtering is performed, including interpolation and recursive filtering, to eliminate noise.
It achieves accurate alignment and filtering under arbitrary time offset conditions, improves the accuracy and robustness of PDP estimation, adapts to more realistic wireless channel environments, and provides smoother estimation results.
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Figure CN122068985A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of wireless communication technology, and in particular to a filtering method, apparatus, device, storage medium, and computer program product. Background Technology
[0002] The Power Delay Profile (PDP) is a crucial parameter characterizing the time-domain properties of multipath channels, and the accuracy of PDP prediction directly impacts the performance of subsequent channel equalization and data detection. To suppress noise and improve the robustness of PDP estimation, existing techniques typically employ filtering methods, specifically weighted smoothing using historical PDP information and the current PDP.
[0003] However, due to time skew, historical PDPs and current PDPs are often not aligned on the time axis. In this case, direct filtering will further degrade performance.
[0004] To address the time offset problem, existing technologies mainly employ two approaches: one is to directly reset the filter and discard historical information when a time offset difference is detected, but this results in the loss of filter gain when the time offset changes; the other is to perform an integer multiple cyclic shift on the historical PDPs to achieve alignment, but this method cannot handle time offsets of fractional multiples of PDP samples, while the time offset adjustment accuracy in actual systems includes such cases.
[0005] Therefore, how to provide a PDP filtering method that can simultaneously handle time offsets of both integer and fractional multiples of sample points has become a technical problem that urgently needs to be solved in the existing technology. Summary of the Invention
[0006] This application provides a filtering method to solve the problem that existing PDP filtering methods are difficult to achieve effective alignment and filtering when the time offset is a fraction of the sample points, which leads to a decrease in PDP estimation accuracy and thus affects the overall performance of the receiver in variable channel environments.
[0007] This application also provides a filtering device to solve the problem that existing PDP filtering methods are difficult to achieve effective alignment and filtering when the time offset is a fraction of the sample points, which leads to a decrease in PDP estimation accuracy and thus affects the overall performance of the receiver in variable channel environments.
[0008] This application also provides a filtering device to solve the problem that existing PDP filtering methods are difficult to achieve effective alignment and filtering when the time offset is a fraction of the sample points, which leads to a decrease in PDP estimation accuracy and thus affects the overall performance of the receiver in variable channel environments.
[0009] This application also provides a computer-readable storage medium to address the problem that existing PDP filtering methods struggle to achieve effective alignment and filtering when the time offset is a fraction of the sample points, leading to a decrease in PDP estimation accuracy and consequently affecting the overall performance of the receiver in variable channel environments.
[0010] A computer program product is provided to address the problem that existing PDP filtering methods struggle to achieve effective alignment and filtering when the time offset is a fraction of the sample points, leading to a decrease in PDP estimation accuracy and consequently affecting the overall performance of the receiver in variable channel environments.
[0011] The embodiments of this application adopt the following technical solutions: A filtering method includes: determining a time offset adjustment value based on an acquired historical power delay spectrum (PDP) and a current PDP; when the time offset adjustment value is not zero, determining the integer part and the fractional part of the sampling point position deviation based on the time offset adjustment value; performing time offset alignment processing on the historical PDP based on the integer part and the fractional part to obtain a time offset aligned PDP; and determining the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; when the time offset adjustment value is zero, determining the historical PDP as a time offset aligned PDP; and determining the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; and performing filtering processing on the current PDP based on the time offset aligned PDP and the power delay distribution to obtain a filtered PDP.
[0012] A filtering device includes: a time offset adjustment value determination unit, configured to determine a time offset adjustment value based on an acquired historical power delay spectrum (PDP) and a current PDP; a time offset alignment unit, configured to, when the time offset adjustment value is not zero, determine the integer part and the fractional part of the sampling point position deviation based on the time offset adjustment value, perform time offset alignment processing on the historical PDP based on the integer part and the fractional part to obtain a time offset aligned PDP, and determine the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; a delay distribution determination unit, configured to, when the time offset adjustment value is zero, determine the historical PDP as a time offset aligned PDP, and determine the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; and a filtering unit, configured to perform filtering processing on the current PDP based on the time offset aligned PDP and the power delay distribution to obtain a filtered PDP.
[0013] A filtering device, comprising: The processor; and a memory configured to store computer-executable instructions, which, when executed, cause the processor to perform the following operations: determining a time offset adjustment value based on an acquired historical power delay spectrum (PDP) and a current PDP; when the time offset adjustment value is not zero, determining the integer part and the fractional part of the sampling point position deviation based on the time offset adjustment value, performing time offset alignment processing on the historical PDP based on the integer part and the fractional part to obtain a time offset aligned PDP, and determining the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; when the time offset adjustment value is zero, determining the historical PDP as a time offset aligned PDP, and determining the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; and performing filtering processing on the current PDP based on the time offset aligned PDP and the power delay distribution to obtain a filtered PDP.
[0014] A computer-readable storage medium storing one or more programs, which, when executed by an electronic device including multiple application programs, cause the electronic device to perform the following operations: determining a time offset adjustment value based on an acquired historical power delay spectrum (PDP) and a current PDP; when the time offset adjustment value is not zero, determining the integer part and the fractional part of the sampling point position deviation based on the time offset adjustment value, performing time offset alignment processing on the historical PDP based on the integer part and the fractional part to obtain a time offset aligned PDP, and determining the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; when the time offset adjustment value is zero, determining the historical PDP as a time offset aligned PDP, and determining the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; and filtering the current PDP based on the time offset aligned PDP and the power delay distribution to obtain a filtered PDP.
[0015] A computer program product includes a computer program that, when executed by a processor, performs the following: determining a time offset adjustment value based on an acquired historical power delay spectrum (PDP) and a current PDP; when the time offset adjustment value is not zero, determining the integer part and the fractional part of the sampling point position deviation based on the time offset adjustment value; performing time offset alignment processing on the historical PDP based on the integer part and the fractional part to obtain a time offset aligned PDP; and determining the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; when the time offset adjustment value is zero, determining the historical PDP as a time offset aligned PDP; and determining the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; and performing filtering processing on the current PDP based on the time offset aligned PDP and the power delay distribution to obtain a filtered PDP.
[0016] The above-described technical solutions adopted in the embodiments of this application can achieve the following beneficial effects: Using the filtering method provided in this application, firstly, a time offset adjustment value is determined based on the acquired historical power delay spectrum (PDP) and the current PDP. When the time offset adjustment value is not zero, the integer part and the fractional part of the sampling point position deviation are determined based on the time offset adjustment value. The historical PDP is then time-off aligned based on the integer part and the fractional part to obtain a time-off aligned PDP. The power delay distribution corresponding to the current PDP at the current observation time is then determined based on the current PDP. When the time offset adjustment value is zero, the historical PDP is determined as a time-off aligned PDP, and the power delay distribution corresponding to the current PDP at the current observation time is determined based on the current PDP. Finally, the current PDP is filtered based on the time-off aligned PDP and the power delay distribution to obtain a filtered PDP. The filtering method provided in this application precisely aligns historical PDPs to match the time offset of the current PDP. This time offset alignment method can handle any time offset, including offsets of several times the number of PDP samples, thus adapting to more realistic wireless channel environments. It reliably performs PDP filtering under various time offset variations, greatly expanding the method's applicability and robustness. Furthermore, because the filtering method provided in this application effectively utilizes historical PDP information for filtering even with time offset variations, it achieves smoother PDP estimation results with better noise suppression. Attached Figure Description
[0017] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a schematic diagram illustrating a specific process of a filtering method provided in an embodiment of this application; Figure 2 This is the PDP time-off alignment result with a delay of 1 sample obtained based on a filtering method provided in an embodiment of this application; Figure 3 The result is a PDP time-off alignment with a delay of 5 samples obtained based on a filtering method provided in an embodiment of this application. Figure 4 The PDP time-off alignment result with 2.5 samples ahead is obtained based on a filtering method provided in an embodiment of this application. Figure 5 This is a time-bias estimation performance diagram obtained based on a filtering method provided in an embodiment of this application; Figure 6 This is a performance graph of delay spread estimation obtained based on a filtering method provided in an embodiment of this application; Figure 7 This is a schematic diagram of the specific structure of a filtering device provided in an embodiment of this application; Figure 8 This is a schematic diagram of the specific structure of a filtering device provided in an embodiment of this application. Detailed Implementation
[0018] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0019] This application provides a filtering method to address the problem that existing PDP filtering methods struggle to achieve effective alignment and filtering when the time offset is a fraction of the sample points, leading to a decrease in PDP estimation accuracy and consequently affecting the overall performance of the receiver in variable channel environments.
[0020] The executing entity of the filtering method provided in this application embodiment can be, but is not limited to, any device, module, or software entity in a wireless communication system that requires channel estimation, power delay spectrum calculation, and filtering. For example, a user terminal on the UE side (such as a mobile phone, tablet computer, etc.), or a base station or network device on the network side. In addition, the executing entity of the filtering method can also be a chip, such as a baseband processor, a system-on-a-chip, a dedicated signal processing chip (such as a DSP), an integrated RF and baseband module, etc.
[0021] For ease of description, the following description uses the filtering system on the user terminal device as an example to illustrate the implementation of this method. It should be understood that using the filtering system as the executing entity is merely an illustrative example and should not be construed as a limitation of the method.
[0022] The schematic diagram of the specific implementation process of the filtering method provided in this application is shown below. Figure 1 As shown, the main steps include the following: Step 11: Determine the time offset adjustment value based on the obtained historical power delay spectrum (PDP) and the current PDP; In wireless communication systems, the receiver needs to continuously perform channel estimation. At each observation moment or processing cycle, a current PDP is calculated based on the received signal. Simultaneously, the system stores the filtered PDP from the previous one or several cycles as historical PDPs. Due to potential relative motion or clock drift between the transmitter and receiver, the PDPs calculated at different times may have an overall offset in the time domain, known as the offset adjustment value Δt.
[0023] In this embodiment of the application, the filtering system can determine the time offset adjustment value by the following method: 1. The time offset estimation module outputs the value directly. Specifically, the time offset estimation module can obtain the time offset adjustment value Δt based on the cross-correlation operation of the synchronization signal or the reference signal.
[0024] 2. Determine the time offset adjustment value Δt by comparing the offset of the main diameter position or overall profile of the historical PDP with that of the current PDP.
[0025] It should be noted that the specific method for determining the time offset adjustment value Δt is not limited in the embodiments of this application.
[0026] Additionally, it should be noted that the time-bias adjustment value Δt can be positive, zero, or negative. A positive value indicates that the historical PDP is delayed relative to the current PDP; a negative value indicates that the historical PDP is ahead of the current PDP; and zero indicates that the historical PDP is consistent with the current PDP.
[0027] Step 12: Determine whether the time offset adjustment value Δt obtained by executing step 11 is 0; If the offset adjustment value Δt is not 0, then execute steps 13-14; if the offset adjustment value Δt is 0, then execute step 15.
[0028] Step 13: When the time offset adjustment value is not zero, determine the integer part of the sampling point position deviation and the fractional part of the sampling point position deviation according to the time offset adjustment value. Based on the integer part and the fractional part, perform time offset alignment processing on the historical PDP to obtain the time offset aligned PDP. In this embodiment of the application, the filtering system can perform time-off alignment processing on historical PDPs according to the following sub-steps: Sub-step 1301: Determine the integer part and the fractional part of the sampling point position deviation based on the time offset adjustment value.
[0029] Specifically, in this embodiment, the integer part xint is determined as follows: like If t≥0, then the integer part xint is determined according to the following formula [1]: [1] The ceil function represents rounding up, which means returning the smallest integer greater than or equal to the specified expression. In other words, it determines the integer part by rounding up Δt.
[0030] like If t < 0, then the integer part xint is determined according to the following formula [2]: [2] The floor function is a mathematical library function that rounds down to the nearest integer value, returning the largest integer value not greater than a given value. Specifically, it determines the integer part by rounding down the absolute value of Δt and then taking the negative value.
[0031] The decimal part xfrac can be determined according to the following formula [3]: xfrac = Δt – xint [3] In the embodiments of this application, according to the above method of choosing xint, when Δt≥0, xfrac is negative or zero; when Δt<0, xfrac is positive or zero.
[0032] In another implementation, the sample deviation x can be calculated using the following formula [4], where x itself contains decimal information: [4] Where, N pdp The mod operation is a modulo operation that includes the remainder of the decimal point.
[0033] Sub-step 1302: Based on the target alignment position, determine the adjacent sampling points for interpolation from the historical PDP, based on the time offset adjustment value and the integer part.
[0034] Specifically, in the embodiments of this application, adjacent sampling points for interpolation can be determined according to the following process, including: Process a: Determine the initial sampling point based on the target alignment position, the time offset adjustment value, and the integer part.
[0035] For the target alignment position i, the initial sampling point x0' is first calculated according to the following formula [5]: [5] Where M is the interpolation order, i.e., the number of adjacent sample points selected, which is a predetermined integer greater than 1. The larger the value of M, the higher the interpolation accuracy. In one implementation, M = 4 can be set. M / 2 means that based on the integer offset xint, M / 2 points are taken before and after it to ensure that the target alignment position i is located in the central region of these M points, thereby obtaining a better interpolation effect.
[0036] Process b: Based on the initial sample point, select a predetermined number of consecutive sampling points in sequence to obtain a candidate sample point set.
[0037] Specifically, starting from x0', M consecutive sample point indices can be selected sequentially to form a candidate sample point set {x}. j '}, where j∈[0, M-1], and satisfies x j ' = x0' + j.
[0038] Process c: Map each candidate sample point in the candidate sample point set obtained by executing process b above to the effective index range of the historical PDP, and determine the adjacent sampling points used for interpolation.
[0039] Since the PDP has a period of N pdp The sequence, x j 'May be outside the valid index range [0, N] pdp -1]. Therefore, in this embodiment of the application, it can be mapped back to the effective index range according to the modulo operation of the following formula [6] to obtain the index xj actually used to index the historical PDP array: [6] By executing the above process, a set of actual historical PDP sample values can be obtained for interpolation calculation of the target alignment position i: PDP(x0), PDP(x1), ..., PDP(x... M-1 ), where PDP(m) is the number of historical PDPs. +1 element.
[0040] Sub-step 1303: Perform interpolation calculations based on adjacent sample points and the decimal part to obtain the time-offset alignment PDP at the target alignment position.
[0041] Specifically, in this embodiment, the precise interpolation position x can first be calculated according to the above formula [4]; then, based on the M sampling points obtained by executing sub-step 1302, M-1 order Lagrange interpolation is performed, and the function value PDP''(i) at the interpolation position x is calculated according to the following formula [7]: [7] Among them, L j (x) is the Lagrange polynomial shown in the following formula [8]: [8] Expanding formula [7], we get the following formula [9]: [9] It should also be noted that, in order to ensure that the PDP power value is non-negative, in this embodiment of the application, the interpolation result can be corrected according to the following formula
[10] : PDP'(i) = max(PDP''(i),0)
[10] Wherein, PDP'(i) is the time-offset alignment PDP value at the target alignment position i.
[0042] For the target alignment position i, from 0 to N pdp-1 By iterating through sub-steps 1302 to 1303, the complete time-biased PDP sequence can be obtained.
[0043] Step 14: Determine the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP; In this embodiment of the application, the power delay part (i.e., the initial PDP) at the current observation time can be calculated based on the known Channel Impulse Response (CIR).
[0044] Specifically, assuming cir i Indicates a length of N pdp The (i+1)th element in the channel time-domain response sequence can be used to determine the initial PDP at the current observation time according to the following formula
[11] :
[11] Where i ∈ [0, N] pdp-1 ], where δ(n - i) is the impulse function. For a specific observation time i, the above calculation simplifies to: directly calculating cir i The square of the modulus is used as the value of PDPinit(i). That is, the modulus square of each element of the channel time-domain response sequence is calculated to obtain the corresponding power value, thus forming the initial PDP sequence.
[0045] Step 15: When the time offset adjustment value is zero, the historical PDP is determined as the time offset aligned PDP; When the time offset adjustment value Δt = 0, it indicates that the historical PDP and the current PDP are completely aligned in time offset, and no interpolation operation is required. The stored historical PDP can be directly used as the time offset aligned PDP'(i), that is, PDP'(i) = historical PDP(i), and the current initial PDP can be determined by the method in step 14 above.
[0046] Step 16: Filter the current PDP based on the time-offset aligned PDP and the power delay distribution to obtain the filtered PDP.
[0047] Specifically, in this embodiment, a first-order recursive filter can be used for filtering. Specifically, the filtering formula is shown in the following formula
[12] :
[12] Here, α is the filtering factor, and the value of α ranges from [0, 1]. The closer the value of α is to 1, the more trust is placed in the current observation value; the closer it is to 0, the more reliance is placed on historical information. α can be adaptively adjusted according to the channel environment.
[0048] Step 17: Perform noise cancellation processing on the filtered PDP.
[0049] It should be noted that, to further improve the quality of the PDP, post-processing can be performed on the filtered PDP to eliminate the noise floor. In one implementation, noise cancellation can be performed according to the following sub-steps: Sub-step 1701, noise power estimation: The average noise power is estimated from the filtered power distribution point (PDP). For example, it can be assumed that the signal power is concentrated on certain paths, while the power in other areas is mainly noise. The average power, Pnoise, can be calculated by selecting a certain proportion of samples with the lowest power values or samples with delays exceeding a certain threshold.
[0050] Sub-step 1702, noise cancellation: Based on the estimated noise power, noise components in the PDP are eliminated. For example, samples in the filtered PDP below a certain threshold can be set to zero, as they are considered not to contain a valid signal path.
[0051] Through the above steps, the filtering method provided in this application embodiment can effectively cope with time-biased variations of integer and fractional multiples of sample points, fully utilize historical information, and significantly improve the accuracy and robustness of PDP estimation. Figures 2 to 4 As shown, this method can successfully align time offsets of different sizes, including fractional time offsets with 2.5 samples.
[0052] like Figure 5 As shown, when there is a time offset of a fractional multiple of the sample points, the time offset estimation performance obtained by the existing filtering scheme is as follows: Figure 5 As shown in the "closest prior art" curve, the time-biased estimation performance obtained by using the filtering scheme provided in the embodiments of this application is as follows: Figure 5 As shown in the "new solution" curve, in comparison Figure 5 As can be seen from the "closest prior" and "new solution" curves, the time bias estimation error is significantly reduced after adopting the filtering scheme provided in the embodiments of this application.
[0053] And such Figure 6 As shown, when there is a time offset of a fractional multiple of the sample points, the time delay spread estimation performance of the existing filtering scheme is as follows: Figure 6 As shown in the "closest prior art" curve, the delay spread estimation performance obtained by using the filtering scheme provided in the embodiments of this application is as follows: Figure 6 As shown in the "new solution" curve, the optimal delay spread estimation performance under ideal conditions is as follows: Figure 6 As shown in the "ideal" curve, it can be seen that after adopting the filtering scheme provided in the embodiments of this application, the estimated time delay spread approaches the optimal value under ideal conditions.
[0054] The performance of both time bias estimation and time delay spread estimation is significantly improved by adopting this method.
[0055] Using the filtering method provided in this application, firstly, a time offset adjustment value is determined based on the acquired historical power delay spectrum (PDP) and the current PDP. When the time offset adjustment value is not zero, the integer part and the fractional part of the sampling point position deviation are determined based on the time offset adjustment value. The historical PDP is then time-off aligned based on the integer part and the fractional part to obtain a time-off aligned PDP. The power delay distribution corresponding to the current PDP at the current observation time is then determined based on the current PDP. When the time offset adjustment value is zero, the historical PDP is determined as a time-off aligned PDP, and the power delay distribution corresponding to the current PDP at the current observation time is determined based on the current PDP. Finally, the current PDP is filtered based on the time-off aligned PDP and the power delay distribution to obtain a filtered PDP. The filtering method provided in this application precisely aligns historical PDPs to match the time offset of the current PDP. This time offset alignment method can handle any time offset, including offsets of several times the number of PDP samples, thus adapting to more realistic wireless channel environments. It reliably performs PDP filtering under various time offset variations, greatly expanding the method's applicability and robustness. Furthermore, because the filtering method provided in this application effectively utilizes historical PDP information for filtering even with time offset variations, it achieves smoother PDP estimation results with better noise suppression.
[0056] In one embodiment, this application also provides a filtering device to address the problem that existing PDP filtering methods struggle to achieve effective alignment and filtering when the time offset is a fraction of the sample points, leading to a decrease in PDP estimation accuracy and consequently affecting the overall performance of the receiver in variable channel environments. A schematic diagram of the specific structure of this filtering device is shown below. Figure 7 As shown, it includes: a time offset adjustment value determination unit 71, a time offset alignment unit 72, a delay distribution determination unit 73, and a filtering unit 74.
[0057] The time offset adjustment value determination unit 71 is used to determine the time offset adjustment value based on the acquired historical power delay spectrum PDP and the current PDP. The time offset alignment unit 72, when the time offset adjustment value is not zero, determines the integer part of the sampling point position deviation and the fractional part of the sampling point position deviation according to the time offset adjustment value, performs time offset alignment processing on the historical PDP according to the integer part and the fractional part to obtain the time offset aligned PDP, and determines the power delay distribution corresponding to the current PDP at the current observation time according to the current PDP. The delay distribution determination unit 73 is used to determine the historical PDP as a time-off aligned PDP when the time offset adjustment value is zero, and to determine the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP. The filtering unit 74 is used to filter the current PDP according to the time-off alignment PDP and the power delay distribution to obtain a filtered PDP.
[0058] In one embodiment, the time offset alignment unit 72 is specifically used to: determine adjacent sampling points for interpolation from the historical PDP based on the time offset adjustment value and the integer part according to the target alignment position; and perform interpolation calculation based on the adjacent sampling points and the fractional part to obtain the time offset aligned PDP at the target alignment position.
[0059] In one embodiment, the time offset alignment unit 72 is specifically used to: when the time offset adjustment value is greater than or equal to zero, round the time offset adjustment value up to obtain the integer part; if the time offset adjustment value is less than zero, round the absolute value of the time offset adjustment value down and take the negative value to obtain the integer part.
[0060] In one embodiment, the time offset alignment unit 72 is specifically used to: determine an initial sampling point based on the target alignment position, the time offset adjustment value, and the integer part; select a predetermined number of consecutive sampling points in sequence based on the starting sampling point to obtain a candidate sampling point set; map each candidate sampling point in the candidate sampling point set to the effective index range of the historical PDP to determine adjacent sampling points for interpolation.
[0061] In one embodiment, the time-off alignment unit 72 is specifically used to: perform Lagrange interpolation calculation based on the adjacent sample points and the fractional part to obtain the time-off alignment PDP at the target alignment position.
[0062] In one embodiment, a noise cancellation unit is further included, specifically for performing noise cancellation processing on the filtered PDP.
[0063] Using the filtering device provided in this application embodiment, firstly, a time offset adjustment value is determined based on the acquired historical power delay spectrum (PDP) and the current PDP. When the time offset adjustment value is not zero, the integer part and the fractional part of the sampling point position deviation are determined based on the time offset adjustment value. The historical PDP is then time-off aligned based on the integer part and the fractional part to obtain a time-off aligned PDP. The power delay distribution corresponding to the current PDP at the current observation time is then determined based on the current PDP. When the time offset adjustment value is zero, the historical PDP is determined as a time-off aligned PDP, and the power delay distribution corresponding to the current PDP at the current observation time is determined based on the current PDP. Finally, the current PDP is filtered based on the time-off aligned PDP and the power delay distribution to obtain a filtered PDP. The filtering device provided in this application precisely aligns historical PDPs to match the time offset of the current PDP. Furthermore, the time offset alignment method of this scheme can handle time offsets of any value, including time offsets of fractions of the PDP sample points, thus adapting to more realistic wireless channel environments. It can reliably perform PDP filtering under various time offset variation scenarios, greatly expanding the applicability and robustness of the method. Simultaneously, because the filtering method provided in this application can effectively utilize historical PDP information for filtering even with time offset variations, it can obtain smoother PDP estimation results with better noise suppression.
[0064] Figure 8 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application. Please refer to it. Figure 8 At the hardware level, the electronic device includes a processor, and optionally also includes an internal bus, a network interface, and memory. The memory may include main memory, such as high-speed random-access memory (RAM), or non-volatile memory, such as at least one disk drive. Of course, the electronic device may also include other hardware required for other business operations.
[0065] The processor, network interface, and memory can be interconnected via an internal bus, which can be an ISA (Industry Standard Architecture) bus, a PCI (Peripheral Component Interconnect) bus, or an EISA (Extended Industry Standard Architecture) bus, etc. This bus can be divided into address bus, data bus, control bus, etc. For ease of representation, Figure 8The symbol is represented by a single double-headed arrow, but this does not mean that there is only one bus or one type of bus.
[0066] Memory is used to store programs. Specifically, programs may include program code, which includes computer operation instructions. Memory may include main memory and non-volatile memory, and provides instructions and data to the processor.
[0067] The processor reads the corresponding computer program from non-volatile memory into main memory and then runs it, forming a filtering device at the logical level. The processor executes the program stored in memory and specifically performs the following operations: Based on the acquired historical power delay spectrum (PDP) and the current PDP, a time offset adjustment value is determined. When the time offset adjustment value is not zero, the historical PDP is time-off aligned according to the time offset adjustment value to obtain a time-off aligned PDP. Based on the current PDP, the power delay distribution corresponding to the current PDP at the current observation time is determined. When the time offset adjustment value is zero, the historical PDP is determined as a time-off aligned PDP. Based on the current PDP, the power delay distribution corresponding to the current PDP at the current observation time is determined. The current PDP is then filtered based on the time-off aligned PDP and the power delay distribution to obtain a filtered PDP.
[0068] The above is as stated in this application. Figure 8The method executed by the filtering electronic device disclosed in the illustrated embodiments can be applied to a processor or implemented by a processor. The processor may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method can be completed by integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc.; it can also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software module can reside in a mature storage medium in the field, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. This storage medium is located in memory, and the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.
[0069] Of course, in addition to software implementation, the electronic device of this application does not exclude other implementation methods, such as logic devices or a combination of hardware and software, etc. In other words, the execution subject of the following processing flow is not limited to each logic unit, but can also be hardware or logic devices.
[0070] This application also proposes a computer-readable storage medium that stores one or more programs, the programs including instructions that, when executed by a portable electronic device including multiple applications, enable the portable electronic device to perform... Figure 1 The filtering method shown in the embodiment is specifically used to perform the following operations: Based on the acquired historical power delay spectrum (PDP) and the current PDP, a time offset adjustment value is determined. When the time offset adjustment value is not zero, the historical PDP is time-off aligned according to the time offset adjustment value to obtain a time-off aligned PDP. Based on the current PDP, the power delay distribution corresponding to the current PDP at the current observation time is determined. When the time offset adjustment value is zero, the historical PDP is determined as a time-off aligned PDP. Based on the current PDP, the power delay distribution corresponding to the current PDP at the current observation time is determined. The current PDP is then filtered based on the time-off aligned PDP and the power delay distribution to obtain a filtered PDP.
[0071] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0072] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0073] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0074] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0075] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.
[0076] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.
[0077] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information by any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic tape storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.
[0078] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.
[0079] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0080] The above description is merely an embodiment of this application and is not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.
Claims
1. A filtering method, characterized in that, include: The time offset adjustment value is determined based on the obtained historical power delay spectrum (PDP) and the current PDP. When the time offset adjustment value is not zero, the integer part of the sampling point position deviation and the fractional part of the sampling point position deviation are determined according to the time offset adjustment value. The historical PDP is time offset aligned according to the integer part and the fractional part to obtain the time offset aligned PDP. The power delay distribution corresponding to the current PDP at the current observation time is determined according to the current PDP. When the time offset adjustment value is zero, the historical PDP is determined as the time offset aligned PDP, and the power delay distribution corresponding to the current PDP at the current observation time is determined based on the current PDP. The current PDP is filtered based on the time-off alignment PDP and the power delay distribution to obtain a filtered PDP.
2. The method according to claim 1, characterized in that, The step of performing time-biased alignment processing on the historical PDP based on the integer part and the fractional part to obtain a time-biased PDP specifically includes: Based on the target alignment position, adjacent sampling points for interpolation are determined from the historical PDP based on the time offset adjustment value and the integer part; Interpolation calculations are performed based on the adjacent sampling points and the fractional part to obtain the time-offset aligned PDP at the target alignment position.
3. The method according to claim 2, characterized in that, The step of determining the integer part of the sampling point position deviation based on the time offset adjustment value specifically includes: When the time offset adjustment value is greater than or equal to zero, the time offset adjustment value is rounded up to obtain the integer part; If the time offset adjustment value is less than zero, then the absolute value of the time offset adjustment value is rounded down and then negative to obtain the integer part.
4. The method according to claim 2, characterized in that, The step of determining adjacent sampling points for interpolation from the historical PDP based on the target alignment position, the time offset adjustment value, and the integer part specifically includes: The initial sampling point is determined based on the target alignment position, the time offset adjustment value, and the integer part. Based on the initial sampling point, a predetermined number of consecutive sampling points are selected sequentially to obtain a candidate sampling point set; Each candidate sample point in the candidate sample point set is mapped to the effective index range of the historical PDP to determine the adjacent sampling points used for interpolation.
5. The method according to claim 2, characterized in that, The step of interpolating based on the adjacent sample points and the fractional part to obtain the time-off alignment PDP at the target alignment position specifically includes: Lagrange interpolation is performed based on the adjacent sample points and the fractional part to obtain the time-offset alignment PDP at the target alignment position.
6. The method according to claim 1, characterized in that, Also includes: The filtered PDP is subjected to noise cancellation processing.
7. A filtering device, characterized in that, include: The time offset adjustment value determination unit is used to determine the time offset adjustment value based on the acquired historical power delay spectrum (PDP) and the current PDP. The time offset alignment unit, when the time offset adjustment value is not zero, determines the integer part of the sampling point position deviation and the fractional part of the sampling point position deviation according to the time offset adjustment value, performs time offset alignment processing on the historical PDP according to the integer part and the fractional part to obtain the time offset aligned PDP, and determines the power delay distribution corresponding to the current PDP at the current observation time according to the current PDP. The delay distribution determination unit is used to determine the historical PDP as a time-off aligned PDP when the time offset adjustment value is zero, and to determine the power delay distribution corresponding to the current PDP at the current observation time based on the current PDP. A filtering unit is used to filter the current PDP based on the time-off alignment PDP and the power delay distribution to obtain a filtered PDP.
8. A filtering device, comprising: processor; as well as A memory configured to store computer-executable instructions, which, when executed, cause the processor to perform the following operations: The time offset adjustment value is determined based on the obtained historical power delay spectrum (PDP) and the current PDP. When the time offset adjustment value is not zero, the integer part of the sampling point position deviation and the fractional part of the sampling point position deviation are determined according to the time offset adjustment value. The historical PDP is time offset aligned according to the integer part and the fractional part to obtain the time offset aligned PDP. The power delay distribution corresponding to the current PDP at the current observation time is determined according to the current PDP. When the time offset adjustment value is zero, the historical PDP is determined as the time offset aligned PDP, and the power delay distribution corresponding to the current PDP at the current observation time is determined based on the current PDP. The current PDP is filtered based on the time-off alignment PDP and the power delay distribution to obtain a filtered PDP.
9. A computer-readable storage medium storing one or more programs, which, when executed by an electronic device including a plurality of applications, cause the electronic device to perform the filtering method as described in any one of claims 1-6.
10. A computer program product, characterized in that, Includes a computer program that, when executed by a processor, implements the filtering method as described in any one of claims 1-6.