Wet etching control method and semiconductor process control system
By obtaining the relationship between the cumulative etching amount and etching rate of the wet etching solution, the expected etching rate and time are calculated, which solves the problem of unstable etching amount in the wet etching process, achieves more precise etching control, and improves product consistency and yield.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SIEN (QINGDAO) INTEGRATED CIRCUITS CO LTD
- Filing Date
- 2026-02-13
- Publication Date
- 2026-05-19
AI Technical Summary
Existing technologies fail to effectively consider the impact of throughput on etching solution concentration during wet etching, resulting in unstable etching volume and affecting product consistency and yield.
By obtaining the correspondence between the cumulative etching amount and etching rate of the target wet etching solution, the expected etching rate is calculated and the etching time data of a single wafer is output, so as to accurately control the etching time to stabilize the etching amount.
This improved the stability of etching amount, ensuring product consistency and yield, and reducing the instability caused by the decrease in etching material concentration.
Smart Images
Figure CN122069952A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor technology, and in particular to a wet etching control method and a semiconductor process control system. Background Technology
[0002] Wet etching is a common process in semiconductor manufacturing. It removes material from designated areas by reacting a chemical solution with the material. For example, to remove the natural oxide layer on a wafer surface and oxides not completely removed by dry etching, wet etching can be performed using DHF (diluted hydrofluoric acid) or BOE (buffered oxide etchant) solutions to ensure no oxide residue. In some cases, wet etching is required not to remove all material, but to complete the etching within a set time, leaving a certain thickness of material remaining. The stability of the etching amount is related to the remaining material thickness and the consistency and yield of the final product. If the etching amount is unstable, the remaining material thickness may exceed specifications after wet etching under the same etching recipe, causing electrical failures and low yield. Therefore, precise control of wet etching, especially setting an appropriate etching time (i.e., etching duration), is crucial to ensuring the stability of the etching amount.
[0003] To set the etching time for wet etching, existing techniques acquire data on the etching time and actual etching amount used in multiple etching processes for the same wet etching solution, fit the data, and obtain the correspondence between etching time and etching amount. When using this wet etching solution for etching, the planned etching amount data is substituted into this correspondence to obtain the corresponding etching time data. This etching time data is then input into the etching program for the wet etching process.
[0004] However, in practice, as the amount of material processed increases, the concentration of the etching material in the same wet etching solution decreases, leading to a decrease in the etching rate. Consequently, the etching depth decreases even when the etching time remains constant. The existing technology described above does not consider the impact of the amount of material processed during the etching time data acquisition process, resulting in unstable etching depth. Summary of the Invention
[0005] To more precisely control the wet etching process and improve the stability of the etching amount, this invention provides a wet etching control method and a semiconductor process control system.
[0006] On one hand, the present invention provides a wet etching control method, the wet etching control method comprising:
[0007] Before performing the target wet etching step using the target wet etching solution, based on the correspondence between the cumulative etching amount and etching rate of the target wet etching solution, an expected cumulative etching amount to be formed during the execution of the target wet etching step is substituted into the correspondence to obtain the expected etching rate of the target wet etching step; and
[0008] The calculation results are calculated by dividing the planned etching amount for a single wafer by the expected etching rate for the target wet etching step, and the calculation results are the single wafer etching time data when the target wet etching step is performed.
[0009] Optionally, the expected cumulative etching amount satisfies T a1 =T a0 +T b / 2, where T a1 T represents the expected cumulative etching amount. a0 T represents the cumulative etching amount before the target wet etching step is performed. b This indicates the total amount of etching planned to be completed in the target wet etching step.
[0010] Optionally, the target wet etching step is configured to etch multiple wafers from the same batch one by one according to the same etching program, T b It equals the total planned etching amount of the multiple wafers.
[0011] Optionally, the target wet etching step is configured to etch a single wafer according to the same etching program, T b It is equal to the planned etching amount of the wafer.
[0012] Optionally, the wet etching control method further includes obtaining the correspondence using the following process:
[0013] Obtain a wet etching solution for testing, wherein the wet etching solution for testing has the same chemical composition as the target wet etching solution;
[0014] The wet etching solution is used to sequentially perform wet etching on multiple wafers at a set etching time, wherein the thickness of the film layer etched on each wafer before etching is greater than the thickness that is etched away.
[0015] The actual etching amount of each etched wafer is detected, and the quotient of the actual etching amount and the set etching time is calculated to obtain the actual etching rate corresponding to each wafer. The cumulative etching amount of the wet etching solution after etching each wafer is also calculated.
[0016] The corresponding relationship is obtained by fitting the actual etching rate and the corresponding cumulative etching amount for each wafer.
[0017] Optionally, the target wet etching solution is a DHF etching solution or a BOE etching solution.
[0018] On the other hand, the present invention provides a semiconductor process control system, the semiconductor process control system comprising:
[0019] The storage unit stores the correspondence between the cumulative etching amount and etching rate of the target wet etching solution;
[0020] An etching program unit is configured to acquire multiple parameters of a target wet etching step to be performed by the target wet etching solution, the multiple parameters including the planned etching amount and etching time for the target wet etching step on a single wafer; and
[0021] The etching time output unit is configured to, before performing the target wet etching step using the target wet etching solution, substitute an expected cumulative etching amount expected to be generated during the execution of the target wet etching step into the corresponding relationship to obtain the expected etching rate of the target wet etching step, and calculate the quotient of the planned etching amount for a single wafer and the expected etching rate and output the calculation result, wherein the calculation result is the single wafer etching time data when performing the target wet etching step.
[0022] Optionally, the expected cumulative etching amount satisfies T a1 =T a0 +T b / 2, where T a1 T represents the expected cumulative etching amount. a0 T represents the cumulative etching amount before the target wet etching step is performed. b This indicates the total amount of etching planned to be completed in the target wet etching step.
[0023] Optionally, the target wet etching step is configured to etch multiple wafers from the same batch one by one according to the same etching program, T b Equal to the total planned etching amount of the multiple wafers; or, the target wet etching step is configured to etch a single wafer according to the same etching program, T b It is equal to the planned etching amount of the wafer.
[0024] Optionally, the semiconductor process control system further includes:
[0025] The feedback unit is configured to, after obtaining the single-wafer etching time data, make the etching time in the etching program unit the single-wafer etching time data.
[0026] Using the wet etching control method and semiconductor process control system provided by this invention, before performing the target wet etching step using the target wet etching solution, the expected etching rate of the target wet etching step is obtained by utilizing the correspondence between the cumulative etching amount and etching rate of the target wet etching solution. Then, the single-wafer etching time data is calculated. The expected etching rate and the single-wafer etching time data are related to the cumulative etching amount of the target wet etching solution. Compared with etching using a fixed etching time without considering the cumulative etching amount, the etching amount has better stability when the concentration of the etching material decreases due to the throughput, and the target wet etching step can be controlled more accurately. Attached Figure Description
[0027] Figure 1 This is a schematic diagram of the steps of a wet etching control method in one embodiment of the present invention.
[0028] Figure 2 This is a schematic diagram illustrating the steps of obtaining the relationship between the cumulative etching amount and etching rate of the target wet etching solution in one embodiment of the present invention.
[0029] Figure 3 This is a schematic diagram showing the relationship between the cumulative etching amount and etching rate of the target wet etching solution in one embodiment of the present invention.
[0030] Figure 4 This is a schematic diagram of the structure of a semiconductor process control system according to an embodiment of the present invention. Detailed Implementation
[0031] The wet etching control method and semiconductor process control system of the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that the terms "first," "second," etc., used in the specification are used to distinguish between similar elements and are not necessarily used to describe a specific order or chronological sequence. It should be understood that these terms, as used, can be replaced where appropriate. It should be understood that the accompanying drawings are in a very simplified form and use non-precise scales, and are only used to facilitate clarity in illustrating the embodiments of the present invention. Furthermore, spatial relative terms are intended to include different orientations in use or operation besides the orientation of the device as depicted in the figures. For example, if the structure in the figures is inverted or positioned in other different ways (e.g., rotated), the exemplary term "on" may also include "below" and other orientational relationships.
[0032] Some embodiments of the present invention relate to a wet etching control method. This wet etching control method can obtain the wafer etching time before performing the target wet etching step using the target wet etching solution, and perform the target wet etching step using the wafer etching time. This can reduce the impact of throughput on the etching rate and achieve better stability in etching amount.
[0033] Reference Figure 1 According to some embodiments of the present invention, the wet etching control method includes step S11: before performing a target wet etching step using a target wet etching solution, based on the correspondence between the cumulative etching amount and etching rate of the target wet etching solution, substituting a predicted cumulative etching amount expected to be reached during the execution of the target wet etching step into the correspondence to obtain the predicted etching rate of the target wet etching step.
[0034] The target wet etching step is a wet etching process controlled by the wet etching control method. Through this target wet etching step, a wet etching operation can be performed on a wafer or a batch of multiple wafers using an etching recipe. The etching recipe includes parameters used for performing the wet etching operation.
[0035] The target wet etching solution is a wet etching solution used to perform the target wet etching step. For example, the target wet etching solution is placed in a corresponding process tank to perform the target wet etching step. As an example, the target wet etching solution is a DHF etching solution or a BOE etching solution, and the target wet etching step is used to wet etch oxides (such as silicon oxide) formed on a semiconductor substrate. The invention is not limited thereto; for example, in some other embodiments, the target wet etching solution is a phosphoric acid etching solution, and the target wet etching step is used to wet etch nitrides (such as silicon nitride) formed on a semiconductor substrate.
[0036] The relationship between the cumulative etching amount and etching rate of the target wet etching solution can be obtained by fitting experimental data. The cumulative etching amount is the sum of the etching thicknesses corresponding to the completed etching amount when performing wet etching with the target wet etching solution. In the relationship, the larger the cumulative etching amount, the smaller the corresponding etching rate, and vice versa.
[0037] Reference Figure 2 As an example, obtaining the above correspondence may include the following process:
[0038] First, as shown in step S21, a wet etching solution for testing is obtained. The wet etching solution for testing has the same chemical composition as the target wet etching solution in step S11, and the service life of the wet etching solution for testing is within the effective range.
[0039] Then, as shown in step S22, the wet etching solution is used to perform wet etching on multiple wafers sequentially at a set etching time, wherein the thickness of the film layer etched on each wafer before etching is greater than the thickness etched away.
[0040] Next, as shown in step S23, the actual etching amount of each etched wafer is detected, the ratio of the actual etching amount to the set etching time is calculated to obtain the actual etching rate corresponding to each wafer, and the cumulative etching amount of the wet etching solution after etching each wafer is calculated.
[0041] Then, as shown in step S24, the actual etching rate and the corresponding cumulative etching amount of each wafer are fitted to obtain the above correspondence.
[0042] Figure 3 The above correspondence is shown as an example. Figure 3 As shown, the relationship between the cumulative etching amount and etching rate of the target wet etching solution satisfies, for example, ER=ab*T a Where ER represents the etching rate, and T a This represents the cumulative etching amount, where a and b are non-zero constants.
[0043] In this embodiment of the invention, step S11 substitutes the expected cumulative etching amount expected to be generated during the execution of the target wet etching step into the above correspondence to obtain the etching rate that satisfies the correspondence, and the etching rate is taken as the expected etching rate of the target wet etching step.
[0044] With T a0 T represents the cumulative etching amount of the target wet etching solution before performing the target wet etching step. a0 It can be obtained by calculating the sum of the etching thicknesses already achieved by the target wet etching solution. Let T be the value. a1 T represents the estimated cumulative etching amount mentioned above. a1 equal to T a0 The sum of the etching amounts during the execution of the target wet etching step and the total planned etching amount of the target wet etching step.
[0045] Considering that during the etching process, the etching rate decreases as the etching amount increases, and the average etching rate during the etching process is close to the etching rate when half of the total planned etching amount is completed, therefore, in the example scheme, the expected cumulative etching amount T a1 T is obtained by calculation using the following equation: a1 =T a0 +T b / 2, where T b This indicates the total amount of etching to be completed in the target wet etching step.
[0046] By predicting the cumulative etching amount T a1 Substituting the above correspondences, the expected etching rate for the target wet etching step can be obtained. Then, as... Figure 1 As shown, step S12 is performed: the planned etching amount for a single wafer in the target wet etching step is calculated as the ratio of the expected etching rate and the calculated result is output. The calculated result is the single wafer etching time data when the target wet etching step is performed.
[0047] In some embodiments, the target wet etching step is configured to etch multiple wafers from the same batch one by one according to the same etching program, T b It equals the sum of the planned etching amounts of each wafer, where the planned etching amount for a single wafer is T. b The quotient of the number of wafers in that batch. In other embodiments, the target wet etching step is configured to etch a single wafer according to the same etching procedure, T b This is equal to the planned etching amount of the wafer. According to some embodiments, after the target wet etching step is completed, the cumulative etching amount of the target wet etching solution changes, i.e., T. a0 and T a0 When the target wet etching solution is changed and wet etching is performed again, the expected etching rate and the corresponding single wafer etching time data need to be recalculated.
[0048] After obtaining the single-wafer etching time data for the target wet etching step using step S12, it can be manually or automatically filled into the etching program (recipe) as the parameter data for etching time, so that the target wet etching step is performed according to the single-wafer etching time data.
[0049] The wet etching control method described in the above embodiments can be converted into computer-executable instructions and stored in a memory (such as a hard disk, random access memory (RAM), external storage medium, storage device with communication lines, registers, etc.). When the executable instructions are executed by a processor (such as a central processing unit (CPU)), the wet etching control method can be executed.
[0050] In the wet etching control method described in the above embodiments, the expected etching rate and single-wafer etching time data of the target wet etching step are related to the expected cumulative etching amount (or throughput) generated by the target wet etching solution during the execution of the target wet etching step. The expected etching rate and the corresponding single-wafer etching time data vary with the cumulative etching amount. Compared with etching with a fixed etching time without considering the cumulative etching amount, the etching amount has better stability when the throughput causes a decrease in the concentration of the etching material, and the target wet etching step can be controlled more accurately.
[0051] Some embodiments of the present invention relate to a semiconductor process control system. The semiconductor process control system can be used to execute the wet etching control method described in the above embodiments.
[0052] Reference Figure 4 According to some embodiments of the present invention, the semiconductor process control system 100 includes a storage unit 110, an etching program unit 120, and an etching time output unit 130, and may also include a feedback unit 140.
[0053] The storage unit 110 stores the correspondence between the cumulative etching amount and the etching rate of the target wet etching solution. The correspondence can be obtained by the method described in the above embodiments.
[0054] The etching program unit 120 is configured to acquire multiple parameters of the target wet etching step to be performed by the target wet etching solution, the multiple parameters including the planned etching amount and etching time of the target wet etching step for a single wafer.
[0055] The etching time output unit 130 is configured to, before performing the target wet etching step using the target wet etching solution, substitute an expected cumulative etching amount expected to be generated during the execution of the target wet etching step into the corresponding relationship to obtain the expected etching rate of the target wet etching step, and calculate the quotient of the planned etching amount for a single wafer and the expected etching rate and output the calculation result, wherein the calculation result is the single wafer etching time data when performing the target wet etching step.
[0056] With T a0 The cumulative etching amount of the target wet etching solution before performing the target wet etching step is expressed in T. a1 T represents the estimated cumulative etching amount mentioned above. a1 equal to T a0 The sum of the etching amounts during the execution of the target wet etching step and the total planned etching amount of the target wet etching step, which is less than or equal to the total planned etching amount of the target wet etching step. As an example, the expected cumulative etching amount T... a1 T is obtained by calculation using the following equation: a1 =T a0 +T b / 2, where T b This represents the total planned etching amount for the target wet etching step. In some embodiments, the target wet etching step is configured to etch multiple wafers in the same batch one by one according to the same etching program. b It equals the sum of the planned etching amounts of each wafer, where the planned etching amount for a single wafer is T. b The quotient of the number of wafers in that batch. In other embodiments, the target wet etching step is configured to etch a single wafer according to the same etching procedure, Tb This equals the planned etching amount for the wafer.
[0057] After obtaining the single-wafer etching time data output by the etching time output unit 130, the single-wafer etching time data can be manually or automatically filled into the etching recipe of the target wet etching step, so that the subsequent target wet etching steps control the etching time according to the single-wafer etching time data. For example, in some embodiments, the feedback unit 140 is configured to set the etching time in the etching program unit 120 to the single-wafer etching time data after obtaining the single-wafer etching time data output by the etching time output unit 130.
[0058] At least one of the units in the semiconductor process control system 100 described in the above embodiments is generally implemented in conjunction with hardware using software programs. However, all or part of them may also be implemented using electronic hardware or software programs. In some embodiments, the units may be combined into one unit, or any one of the units may be split into multiple units. Alternatively, at least some of the functions of one or more of these units may be combined with at least some of the functions of other units and implemented in one unit.
[0059] Using the semiconductor process control system 100 described in the above embodiments, single-wafer etching time data can be obtained when performing the target wet etching step. This single-wafer etching time data is related to the cumulative etching amount, i.e., the throughput, that is expected to be generated by the target wet etching solution during the execution of the target wet etching step. Compared with etching with a fixed etching time without considering the cumulative etching amount, the etching amount has better stability when the throughput causes a decrease in the concentration of the etching material, and the target wet etching step can be controlled more accurately.
[0060] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other.
[0061] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present invention by utilizing the methods and techniques disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solutions of the present invention shall fall within the protection scope of the technical solutions of the present invention.
Claims
1. A method for controlling wet etching, characterized in that, include: Before performing the target wet etching step using the target wet etching solution, based on the correspondence between the cumulative etching amount and etching rate of the target wet etching solution, the expected cumulative etching amount to be formed during the execution of the target wet etching step is substituted into the correspondence to obtain the expected etching rate of the target wet etching step. as well as The calculation results are calculated by dividing the planned etching amount for a single wafer by the expected etching rate for the target wet etching step, and the calculation results are the single wafer etching time data when the target wet etching step is performed.
2. The wet etching control method as described in claim 1, characterized in that, The expected cumulative etching amount satisfies T a1 =T a0 +T b / 2, where T a1 T represents the expected cumulative etching amount. a0 T represents the cumulative etching amount before the target wet etching step is performed. b This indicates the total amount of etching planned to be completed in the target wet etching step.
3. The wet etching control method as described in claim 2, characterized in that, The target wet etching step is configured to etch multiple wafers from the same batch one by one according to the same etching program. b It equals the total planned etching amount of the multiple wafers.
4. The wet etching control method as described in claim 2, characterized in that, The target wet etching step is configured to etch a single wafer using the same etching procedure, T b It is equal to the planned etching amount of the wafer.
5. The wet etching control method as described in claim 1, characterized in that, The correspondence is also obtained by the following process: Obtain a wet etching solution for testing, wherein the wet etching solution for testing has the same chemical composition as the target wet etching solution; The wet etching solution is used to sequentially perform wet etching on multiple wafers at a set etching time, wherein the thickness of the film layer etched on each wafer before etching is greater than the thickness that is etched away. The actual etching amount of each etched wafer is detected, and the quotient of the actual etching amount and the set etching time is calculated to obtain the actual etching rate corresponding to each wafer. The cumulative etching amount of the wet etching solution after etching each wafer is also calculated. The corresponding relationship is obtained by fitting the actual etching rate and the corresponding cumulative etching amount for each wafer.
6. The wet etching control method according to any one of claims 1 to 5, characterized in that, The target wet etching solution is either DHF etching solution or BOE etching solution.
7. A semiconductor process control system, characterized in that, include: The storage unit stores the correspondence between the cumulative etching amount and etching rate of the target wet etching solution; The etching program unit is configured to acquire multiple parameters of the target wet etching step to be performed by the target wet etching solution, the multiple parameters including the planned etching amount and etching time of the target wet etching step for a single wafer; as well as The etching time output unit is configured to, before performing the target wet etching step using the target wet etching solution, substitute an expected cumulative etching amount expected to be generated during the execution of the target wet etching step into the corresponding relationship to obtain the expected etching rate of the target wet etching step, and calculate the quotient of the planned etching amount for a single wafer and the expected etching rate and output the calculation result, wherein the calculation result is the single wafer etching time data when performing the target wet etching step.
8. The semiconductor process control system as described in claim 7, characterized in that, The expected cumulative etching amount satisfies T a1 =T a0 +T b / 2, where T a1 T represents the expected cumulative etching amount. a0 T represents the cumulative etching amount before the target wet etching step is performed. b This indicates the total amount of etching planned to be completed in the target wet etching step.
9. The semiconductor process control system as described in claim 8, characterized in that, The target wet etching step is configured to etch multiple wafers from the same batch one by one according to the same etching program. b The target wet etching step is configured to etch a single wafer according to the same etching procedure, where Tb equals the planned etching amount of the wafer.
10. The semiconductor process control system as described in claim 7, characterized in that, Also includes: The feedback unit is configured to, after obtaining the single-wafer etching time data, set the etching time in the etching program unit to the single-wafer etching time data.