Control circuit, drive circuit of electric motor, electric motor assembly and lidar

By using pulse width modulation signals to control the on/off state of the power supply and ground wire in the motor control circuit, the circuit structure is simplified, the cost and space occupied are reduced, the control accuracy is improved, and the problems of complexity and high cost of existing motor control circuits are solved.

CN122073450APending Publication Date: 2026-05-22HESAI TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
HESAI TECH CO LTD
Filing Date
2024-11-22
Publication Date
2026-05-22

AI Technical Summary

Technical Problem

Existing motor control circuits have a large number of electronic components, complex structures, high costs, and large space requirements, making it difficult to meet the high-precision control requirements of lidar.

Method used

The first branch, which is coupled to the signal input terminal and the power input terminal, is coupled to the second branch, which is coupled to the ground wire. The power input terminal and the output branch are controlled to be turned on or off by the pulse width modulation signal. By combining the fact that the first and second branches are not turned on at the same time, voltage output is achieved.

Benefits of technology

It simplifies the control circuit structure, reduces the number and cost of electronic components, improves control accuracy, reduces power loss, and is conducive to the miniaturization of electric equipment.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present disclosure provides a control circuit, a driving circuit of an electric motor, an electric motor assembly and a laser radar. The control circuit comprises a signal input end, a power input end, a voltage output end, a first branch, a second branch and an output branch. The signal input end is configured to receive a pulse width modulation signal. The power input end is configured to receive a power voltage. The voltage output end is configured to output a first voltage. The first branch is coupled with the signal input end and the power input end. The second branch is coupled with the signal input end and a ground. The output branch is coupled with the first branch, the second branch and the voltage output end, and is configured to generate the first voltage according to the pulse width modulation signal and the power voltage. The first branch turns on or off the connection of the power input end and the output branch based on the pulse width modulation signal and the power voltage, the second branch turns on or off the connection of the ground and the output branch based on the pulse width modulation signal, and the first branch and the second branch are not turned on at the same time.
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Description

Technical Field

[0001] This disclosure relates to the field of electric motor control technology, and in particular to a control circuit, a drive circuit for an electric motor, an electric motor assembly, and a lidar. Background Technology

[0002] Electric motors are widely used power sources. In lidar systems, electric motors often drive the scanner to rotate or oscillate, ensuring that the laser emitted by the lidar covers its field of view. To control the starting and braking of the electric motor, a control circuit is typically required. To meet requirements for versatility and stability, some electric motor control circuits contain a large number of electronic components, resulting in complex structures, high costs, and significant space requirements, hindering the miniaturization of electric devices. Furthermore, existing electric motor control circuits often have low control precision, making it difficult to meet the high precision control requirements of lidar systems. Summary of the Invention

[0003] To address one or more problems in the prior art, this disclosure provides a control circuit, comprising:

[0004] The signal input terminal is configured to receive pulse width modulation signals;

[0005] The power input terminal is configured to receive power supply voltage.

[0006] The voltage output terminal is configured to output the first voltage.

[0007] The first branch is coupled to the signal input terminal and the power input terminal;

[0008] The second branch is coupled to the signal input terminal and the ground wire;

[0009] An output branch, coupled to the first branch, the second branch and the voltage output terminal, is configured to generate the first voltage according to the pulse width modulation signal and the power supply voltage;

[0010] The first branch is configured to turn on or off the connection between the power input terminal and the output branch based on the pulse width modulation signal and the power supply voltage, and the second branch is configured to turn on or off the connection between the ground wire and the output branch based on the pulse width modulation signal. The first branch and the second branch are not turned on at the same time.

[0011] Optionally, the first branch includes:

[0012] A first switch, wherein a first end of the first switch is coupled to the power input terminal, a control terminal of the first switch is coupled to the signal input terminal, and a second end of the first switch is coupled to the output branch;

[0013] The first capacitor is coupled between the control terminal of the first switch and the signal input terminal;

[0014] A first resistor, one end of which is coupled to the control terminal of the first switch, and the other end of which is coupled to the power input terminal.

[0015] Optionally, the first branch further includes a clamping circuit coupled between the control terminal of the first switch and the power input terminal.

[0016] Optionally, the first branch further includes a first voltage regulator circuit, which is connected in parallel with the first resistor.

[0017] Optionally, the first voltage regulator circuit includes a first voltage regulator capacitor, the capacitance of which is on the same order of magnitude as the parasitic capacitance between the second terminal and the control terminal of the first switch.

[0018] Optionally, the first switch includes a first field-effect transistor (FET), the source of which is coupled to the power input terminal, the gate of which is coupled to the signal input terminal through the first capacitor, and the drain of which is coupled to the output branch.

[0019] Optionally, the RC time constant of the first resistor and the first capacitor is greater than or equal to the period of the pulse width modulation signal.

[0020] Optionally, the second branch includes a second switch, a first terminal of the second switch being coupled to the ground wire, a control terminal of the second switch being coupled to the signal input terminal, and a second terminal of the second switch being coupled to the output branch.

[0021] Optionally, the second branch further includes a second resistor, which is coupled between the control terminal of the second switch and the first terminal of the second switch.

[0022] Optionally, the second branch further includes a second voltage regulator circuit, which is connected in parallel with the second resistor.

[0023] Optionally, the second voltage regulator circuit includes a second voltage regulator capacitor, the capacitance of which is on the same order of magnitude as the parasitic capacitance between the second terminal and the control terminal of the second switch.

[0024] Optionally, the second switch includes a second field-effect transistor, the source of which is coupled to the ground, the gate of which is coupled to the signal input terminal, and the drain of which is coupled to the output branch.

[0025] Optionally, the signal input terminal includes a first port and a second port; the first branch is coupled to the first port, and the second branch is coupled to the second port; the first port is configured to receive a first pulse width modulation signal, and the second port is configured to receive a second pulse width modulation signal.

[0026] Optionally, the first pulse width modulation signal has a first duty cycle, the second pulse width modulation signal has a second duty cycle, and the difference between the first duty cycle and the second duty cycle is less than a threshold.

[0027] Optionally, the first duty cycle is greater than the second duty cycle.

[0028] Optionally, the first pulse width modulation signal and the second pulse width modulation signal are the same.

[0029] Optionally, the output branch includes an inductor, a filter capacitor, and a third resistor connected in series. The first end of the inductor is coupled to the first branch and the second branch, and the other end of the inductor is coupled to the filter capacitor and the voltage output terminal.

[0030] This disclosure also relates to a drive circuit for an electric motor, the electric motor including three windings, the drive circuit comprising:

[0031] Three control circuits as described above, wherein the voltage output terminals of the three control circuits are respectively coupled to different windings of the three windings.

[0032] This disclosure also relates to an electric motor assembly, the electric motor assembly comprising:

[0033] An electric motor, the electric motor including at least one winding;

[0034] Power terminals;

[0035] At least one control circuit as described above, wherein the power input terminal of the control circuit is coupled to the power terminal;

[0036] A controller, which communicates with at least one of the control circuits and is configured to input the pulse width modulation signal to a signal input terminal in the control circuit;

[0037] The control circuit is connected to each of the windings in a one-to-one correspondence, and the control circuit is configured to output a periodically varying voltage to the windings according to the pulse width modulation signal.

[0038] Optionally, the motor includes three windings, and the motor assembly includes three control circuits, which are connected to the three windings in a one-to-one correspondence.

[0039] This disclosure also includes a lidar, the lidar comprising:

[0040] The transmitter is configured to emit a probe beam;

[0041] A receiver is configured to receive the echo of the probe beam reflected by the object and generate an electrical signal;

[0042] A scanner, wherein the scanner is disposed in the optical path of at least one of the probe beam or the echo;

[0043] The electric motor assembly as described above is configured to drive at least one of the transmitter, the receiver, or the scanner to move.

[0044] Embodiments of this disclosure provide a control circuit in which a first branch is coupled to a signal input terminal and a power input terminal, controlling the conduction or disconnection of the power input terminal and the output branch based on a pulse width modulation signal and a power supply voltage. A second branch is coupled to a signal input terminal and a ground wire, controlling the conduction or disconnection of the ground wire and the output branch based on a pulse width modulation signal. The first and second branches cooperate to output a first voltage through the output branch at the voltage output terminal. In embodiments of this disclosure, the control circuit controls the output based on a pulse width modulation signal, resulting in fewer electronic components, a simpler structure, and advantages in reducing production costs and minimizing the size of the control circuit. Attached Figure Description

[0045] The accompanying drawings are provided to further illustrate the present disclosure and form part of the specification. They are used together with the embodiments of the present disclosure to explain the disclosure and do not constitute a limitation thereof. In the drawings:

[0046] Figure 1A A block diagram of an exemplary control circuit consistent with some embodiments of this disclosure is shown;

[0047] Figure 1B An exemplary block diagram of the control circuit when the pulse width modulation signal is at a second level, consistent with some embodiments of this disclosure, is shown.

[0048] Figure 1C An exemplary block diagram of the control circuit when the pulse width modulation signal is at the third level, consistent with some embodiments of this disclosure, is shown.

[0049] Figure 2 A circuit diagram of an exemplary control circuit consistent with some embodiments of this disclosure is shown;

[0050] Figure 3 A block diagram of an exemplary electric motor drive circuit consistent with some embodiments of this disclosure is shown;

[0051] Figure 4A block diagram of an exemplary electric motor assembly consistent with some embodiments of this disclosure is shown;

[0052] Figure 5 A block diagram of an exemplary lidar consistent with some embodiments of this disclosure is shown. Detailed Implementation

[0053] In the following description, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments can be modified in various ways without departing from the spirit or scope of this disclosure. Therefore, the drawings and description are to be considered exemplary in nature and not restrictive.

[0054] In the description of this disclosure, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, are used only for the convenience of describing this disclosure and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this disclosure. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of this disclosure, "a plurality of" means two or more, unless otherwise explicitly and specifically defined.

[0055] In the description of this disclosure, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "joint" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections, electrical connections, or connections that allow for communication; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this disclosure according to the specific circumstances.

[0056] In this disclosure, unless otherwise expressly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0057] The following disclosure provides numerous different embodiments or examples for implementing various structures of this disclosure. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of this disclosure. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, various specific examples of processes and materials are provided in this disclosure, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0058] The embodiments of this disclosure are described below with reference to the accompanying drawings. It should be understood that the embodiments described herein are for illustration and explanation only and are not intended to limit this disclosure.

[0059] This disclosure provides a control circuit including: a signal input terminal, a power input terminal, a voltage output terminal, a first branch, a second branch, and an output branch. The signal input terminal is configured to receive a pulse-width modulation (PWM) signal. The power input terminal is configured to receive a power supply voltage. The voltage output terminal is configured to output a first voltage. The first branch is coupled to the signal input terminal and the power input terminal. The second branch is coupled to the signal input terminal and a ground line. The output branch is coupled to the first branch, the second branch, and the voltage output terminal, and is configured to generate the first voltage based on the PWM signal and the power supply voltage. The first branch is configured to turn the connection between the power input terminal and the output branch on or off based on the PWM signal and the power supply voltage. The second branch is configured to turn the connection between the ground line and the output branch on or off based on the PWM signal. Furthermore, the first branch and the second branch do not conduct simultaneously.

[0060] The control circuit in this embodiment can control the voltage output from the voltage output terminal based on the received pulse width modulation (PWM) signal. It offers high control accuracy, a simple circuit structure, low cost, and small footprint. Furthermore, by adjusting the frequency or duty cycle of the PWM signal, the magnitude of the initial voltage output from the voltage output terminal can be flexibly adjusted, making the control circuit in this embodiment adaptable to various types of motors with diverse control requirements.

[0061] Figure 1A An exemplary control circuit consistent with some embodiments of this disclosure is shown. Reference Figure 1A The control circuit 100 includes a signal input terminal 102, a power input terminal 104, a voltage output terminal 106, a first branch 108, a second branch 110, and an output branch 112.

[0062] The signal input terminal 102 receives a PWM signal. For example, the signal input terminal 102 is coupled to an external signal source, which can output a PWM signal. In some embodiments, the signal source can be integrated into a processor or integrated circuit.

[0063] A PWM signal is an electrical signal. The pulse width of a PWM signal represents the duration of high voltage within one cycle. The duty cycle of a PWM signal represents the percentage of high voltage within one cycle; the longer the high voltage duration within one cycle, the larger the duty cycle.

[0064] Figure 1B An exemplary block diagram of the control circuit is shown, consistent with some embodiments of this disclosure, when the pulse width modulation signal is at a second level. Figure 1B The second level of the medium pulse width modulation signal is labeled PWML. Figure 1C An exemplary block diagram of the control circuit is shown, consistent with some embodiments of this disclosure, when the pulse width modulation signal is at the third level. Figure 1C The third level of the medium pulse width modulation signal is denoted as PWMH. In some embodiments, the PWM signal includes a second level and a third level, such as... Figure 1B As shown, when the PWM signal is at the second level (e.g., low or high), the first branch 108 is turned on, and the second branch 110 is turned off; as Figure 1C As shown, when the PWM signal is at the third level (e.g., high or low), the first branch 108 is off and the second branch 110 is on. By adjusting the duty cycle of the PWM signal, the percentage of time that the output branch 112 is on with the power input terminal 104 within one cycle can be adjusted, thereby adjusting the magnitude of the first voltage output by the output branch 112.

[0065] Continue to refer to Figure 1AThe power input terminal 104 receives a power supply voltage PV. For example, the power input terminal 104 is coupled to an external power supply. In some embodiments, the power supply can supply power to a signal source, such as a signal source integrated in a processor. The power supply provides the power supply voltage PV to the power input terminal 104 while also supplying power to the processor.

[0066] Voltage output terminal 106 outputs a first voltage. In some embodiments, control circuit 100 is used to drive a motor. For example, voltage output terminal 106 can be coupled to a winding in the motor, and the magnitude of the first voltage output by output branch 112 can be adjusted by adjusting the duty cycle of the PWM signal, thereby controlling the starting or braking of the motor.

[0067] Continue to refer to Figure 1A The first branch 108 is coupled to the signal input terminal 102 and the power input terminal 104. The second branch 110 is coupled to the signal input terminal 102 and the ground wire. The ground wire is not limited to being connected to the actual earth, but can also represent a reference zero potential defined in the control circuit 100. For example, the ground wire may include a metal plate extending outside the control circuit 100 and connected to the housing of the electric device.

[0068] Output branch 112 is coupled to first branch 108, second branch 110 and voltage output terminal 106. Output branch 112 generates a first voltage according to pulse width modulation signal PWM and power supply voltage PV, and outputs the first voltage through voltage output terminal 106.

[0069] The first branch 108, based on the pulse width modulation (PWM) signal and the power supply voltage PV, enables the power input terminal 104 and the output branch 112 to be turned on or off. The second branch 110, based on the PWM signal, enables the voltage output terminal 106 to be turned on or off from the ground wire. The first branch 108 and the second branch 110 are not turned on simultaneously.

[0070] In some embodiments of this disclosure, the control circuit 100 can control the output circuit 112 to output a first voltage at the voltage output terminal 106 based on the pulse width modulation signal and the power supply voltage PV. By changing the duty cycle of the PWM signal, the magnitude of the output first voltage can be flexibly adjusted, which can meet the driving requirements of various types of motors. Moreover, the control logic of the control circuit is simple, requiring no high-side gate driver or a boost circuit to match the high-side gate driver. This reduces the demand for electronic components, thereby lowering material costs and occupying less space, which is beneficial for the miniaturization of electric equipment.

[0071] On the other hand, the control circuit 100 outputs a voltage based on a pulse-width modulation (PWM) signal. PWM signals can more precisely control the dead time of the motor, resulting in higher control accuracy and reduced power loss. Conventional motor drive circuits are limited by compatibility and require a relatively long dead time. The control circuit 100 in this disclosure simplifies the control logic and reduces the number of electronic components, which helps improve the response speed of the control circuit, shorten the dead time, improve control accuracy, and reduce power loss.

[0072] Figure 2 A circuit diagram of an exemplary control circuit consistent with some embodiments of this disclosure is shown. Please refer to... Figure 2 The control circuit 200 includes a signal input terminal 202, a power input terminal 204, a voltage output terminal 206, a first branch 208, a second branch 210, and an output branch 212. The control circuit 200 can be... Figure 1A The control circuit 100 shown. Signal input terminal 202 can be... Figure 1A The signal input terminal 102 is shown. The power input terminal 204 can be... Figure 1A The power input terminal 104 is shown. The voltage output terminal 206 can be... Figure 1A The voltage output terminal 106 is shown. The first branch 208 can be... Figure 1A The first branch 108 is shown. The second branch 210 can be... Figure 1A The second branch 110 is shown. Output branch 212 can be... Figure 1A The output branch 112 is shown in the figure.

[0073] Please refer to Figure 2 The first branch 208 includes a first switch 222, a first capacitor 224, and a first resistor 226.

[0074] The first switch 222 includes a first terminal, a second terminal, and a control terminal. The control terminal of the first switch 222 can control the connection or disconnection between the first terminal and the second terminal. For example... Figure 2As shown, the first terminal of the first switch 222 is coupled to the power input terminal 204, the second terminal of the first switch 222 is coupled to the output branch 212, and the control terminal of the first switch 222 is coupled to the signal input terminal 202. The first switch 222 controls the first and second terminals to be turned on or off according to the pulse width modulation signal received at the signal input terminal 202. For example, when the pulse width modulation signal received at the signal input terminal 202 is at a third level (e.g., high level), the first and second terminals of the first switch 222 are off, and the output branch 212 is disconnected from the power input terminal 204. When the pulse width modulation signal received at the signal input terminal 202 is at a second level (e.g., low level), the first and second terminals of the first switch 222 are on, and the output branch 212 is on the power input terminal 204.

[0075] In some embodiments, the first switch 222 includes a first field-effect transistor, such as a P-channel metal-oxide-semiconductor (PMOS) or an N-channel metal-oxide-semiconductor (NMOS). Figure 2 As shown, the first switch 222 includes a PMOS transistor. The first terminal of the first switch 222 is the source of the PMOS transistor and is coupled to the power input terminal 204. The control terminal of the first switch 222 is the gate of the PMOS transistor and is coupled to the signal input terminal 202. The second terminal of the first switch 222 is the drain of the PMOS transistor and is coupled to the output branch 212.

[0076] Please continue to refer to this. Figure 2 The first capacitor 224 is coupled between the control terminal of the first switch 222 and the signal input terminal 202. One end of the first resistor 226 is coupled to the control terminal of the first switch 222, and the other end of the first resistor 226 is coupled to the power input terminal 204.

[0077] When the control circuit 200 is powered on, before the signal input terminal 202 receives the pulse width modulation signal, the gate and source voltages of the PMOS are made equal through the first resistor 226, keeping the PMOS in the off state. After the signal input terminal 202 receives the pulse width modulation signal, the first capacitor 224 allows the voltage at the control terminal of the first switch 222 to change with the voltage of the pulse width modulation signal, thereby controlling the PMOS to turn on or off. For example, when the pulse width modulation signal is low, the gate voltage of the PMOS decreases, and the PMOS turns on; when the pulse width modulation signal is high, the gate voltage of the PMOS increases, and the PMOS turns off. Through the first capacitor 224, even a pulse width modulation signal with a small voltage magnitude can still control the first switch 222 to turn on or off. In addition, the first resistor 226 can also accelerate the rising or falling edge of the first switch 222, that is, accelerate the process of voltage change at the control terminal of the first switch 222, which can shorten the time for the first switch 222 to switch from the on state to the off state, or from the off state to the on state.

[0078] In some embodiments, the RC time constants of the first capacitor 224 and the first resistor 226 are greater than or equal to the period of the pulse width modulation signal. For example, the RC time constants of the first capacitor 224 and the first resistor 226 are greater than or equal to the duration of the high level within one period of the pulse width modulation signal. As another example, the RC time constants of the first capacitor 224 and the first resistor 226 are greater than or equal to the duration of the low level within one period of the pulse width modulation signal. Here, the RC time constants of the first capacitor 224 and the first resistor 226 represent the time required for the output to reach 63.2% of its final steady-state value upon receiving the pulse width modulation signal.

[0079] The fact that the RC time constants of the first capacitor 224 and the first resistor 226 are greater than or equal to the period of the pulse width modulation signal can reduce the risk of the first switch 222 being mistakenly turned on or off. For example Figure 2 As shown, when the pulse width modulation signal is low, the voltage at the end where the first capacitor 224 is connected to the second switch decreases, causing the voltage at the control terminal of the first switch 222 to decrease, and the first switch 222 to turn on. The power input terminal 204 charges the first capacitor 224 through the first resistor 226. The RC time constant of the first capacitor 224 and the first resistor 226 is greater than or equal to the period of the pulse width modulation signal. This can prevent the voltage at the control terminal of the first switch 222 from rising above the turn-on voltage of the first switch 222 before the pulse width modulation signal becomes high due to the charging time of the first capacitor 224 being too fast, thus preventing the first switch 222 from turning off before the pulse width modulation signal becomes high. Therefore, in this embodiment, limiting the RC time constant of the first capacitor 224 and the first resistor 226 to be greater than or equal to the period of the pulse width modulation signal can reduce the risk of the first switch 222 being mistakenly turned on or off.

[0080] In some embodiments, the RC time constant of the first capacitor 224 and the first resistor 226 can be increased by increasing the resistance value of the first resistor 226.

[0081] Please refer to Figure 2 In some embodiments, the first branch 208 further includes a clamping circuit 228 coupled between the control terminal of the first switch 222 and the power input terminal 204. The clamping circuit 228 is used to limit the maximum voltage at the control terminal of the first switch 222 to reduce the risk that the first switch 222 may fail to conduct.

[0082] For example, the first switch 222 is turned on or off based on the pulse width modulation signal received at the signal input terminal 202. When the voltage of the pulse width modulation signal output from the signal input terminal 202 is high, the voltage at the connection point between the first capacitor 224 and the PMOS gate is V1, and the voltage difference between the PMOS source and gate is less than the PMOS turn-on threshold voltage Vth, so the PMOS is off. When the voltage of the pulse width modulation signal output from the signal input terminal 202 is low, the voltage at the connection point between the first capacitor 224 and the PMOS gate decreases to V2, and the voltage difference between the PMOS source and gate is greater than the PMOS turn-on threshold voltage Vth, so the PMOS is on. When the PMOS is on, the power input terminal 204 charges the first capacitor 224 through the first resistor 226, thereby increasing the voltage at the connection point between the first capacitor 224 and the PMOS gate. Thus, after the PMOS undergoes multiple switching cycles, the voltage at the connection point between the first capacitor 224 and the PMOS gate gradually increases. This prevents the voltage difference between the PMOS source and gate from exceeding the PMOS turn-on threshold voltage Vth when the pulse width modulation signal is low, thereby preventing the PMOS from conducting. By setting the clamping circuit 228, the maximum voltage at the PMOS gate can be limited, allowing the PMOS to continue conducting or turning off normally after multiple switching cycles.

[0083] In some embodiments, the clamping circuit 228 includes a diode. For example, if the clamping voltage drop of the clamping circuit 228 is V3 and the power supply voltage is VDD, then the maximum voltage Vmax = V3 + VDD at the control terminal of the second switch 222 can be limited.

[0084] Please refer to Figure 2 In some embodiments, the first branch 208 further includes a first voltage regulator circuit 230. The first voltage regulator circuit 230 is connected in parallel with the first resistor 226 and is coupled between the control terminal and the first terminal of the first switch 222. The first voltage regulator circuit 230 can suppress feedthrough, reducing the risk that voltage changes at the second terminal of the first switch 222 will couple to the control terminal of the first switch 222 through the parasitic capacitance between the control terminal and the second terminal of the first switch 222, thereby ensuring the stability of the control of the first switch 222.

[0085] In some embodiments, output branch 212 is coupled to first branch 208 and second branch 210. When first branch 208 conducts output branch 212 to power input terminal 204 based on pulse width modulation signal, the voltage at the coupling point of output branch 212 and first branch 208 is high. When second branch 210 conducts output branch 212 to ground based on pulse width modulation signal, the voltage at the coupling point of output branch 212 and second branch 210 is low. Under the control of pulse width modulation signal, the voltage at the connection point of output branch 212 with first branch 208 and second branch 210 (i.e., the second terminal of first switch 222) may change abruptly when the states of first switch 222 and second switch 242 switch change. This may cause the voltage change at the second terminal of first switch 222 to couple to the control terminal through the parasitic capacitance between the control terminal and the second terminal of first switch 222, resulting in mis-conduction of first switch 222 or breakdown of the control terminal of first switch 222.

[0086] The first voltage regulator circuit 230 is coupled between the control terminal and the first terminal of the first switch 222. When a voltage change occurs at the location where the output branch 212 and the first branch 208 are coupled, that is, when the voltage at the second terminal of the first switch 222 changes suddenly, for example, from high voltage to low voltage, the first voltage regulator circuit 230 can stabilize the voltage at the control terminal of the second switch 222, suppress feedthrough, and protect the first switch 222.

[0087] Please continue to refer to this. Figure 2 In some embodiments, the first voltage regulator circuit 230 includes a first voltage regulator capacitor, the capacitance of which is on the same order of magnitude as the parasitic capacitance between the second terminal and the control terminal of the first switch 222. The first voltage regulator capacitor alters the equivalent capacitance of the first branch 208, affecting the response speed of the first switch 222 based on the pulse width modulation signal. The fact that the capacitance of the first voltage regulator capacitor is on the same order of magnitude as the parasitic capacitance between the second terminal and the control terminal of the first switch 222 can reduce or avoid the problem of a large RC time constant in the first branch 208 causing a slow response of the first switch 222.

[0088] For example, the capacitance value of the first voltage regulator capacitor can be slightly smaller than the capacitance value of the parasitic capacitance between the second terminal and the control terminal of the first switch 222. This reduces the influence of the first voltage regulator capacitor on the first switch 222's conduction or disconnection based on the pulse width modulation signal while protecting the first switch 222.

[0089] Please continue to refer to this. Figure 2In some embodiments, the second branch 210 includes a second switch 242. A first terminal of the second switch 242 is coupled to ground, a second terminal of the second switch 242 is coupled to the output branch 212, and a control terminal of the second switch 242 is coupled to the signal input terminal 202. The second switch 242 is turned on or off based on a pulse width modulation signal. When the second switch 242 is on, the output branch 212 and ground are connected.

[0090] In some embodiments, the second switch 242 includes a second field-effect transistor (FET). A first terminal of the second switch 242 is the source of the second FET, and the source of the second FET is coupled to ground. A second terminal of the second switch 242 is the drain of the second FET, and the drain of the second FET is coupled to the output branch 212. The control terminal of the second switch 242 is the gate of the second FET, and the gate of the second FET is coupled to the signal input terminal 202.

[0091] In some embodiments, the second field-effect transistor is an N-type metal-oxide-semiconductor (NMOS) field-effect transistor. The gate of the second field-effect transistor is coupled to the signal input terminal 202, the source of the second field-effect transistor is coupled to the ground line, and the drain of the second field-effect transistor is coupled to the output branch 212.

[0092] Please continue to refer to this. Figure 2 In some embodiments, the second branch 210 further includes a second resistor 244. The second resistor 244 is coupled between the control terminal of the second switch 242 and the first terminal of the second switch 242. The second resistor 244 can accelerate the rising or falling edge of the second switch 242, that is, accelerate the voltage change process at the control terminal of the second switch 242, shortening the time required for the second switch 242 to switch from an on state to an off state, or from an off state to an on state, which is beneficial to improving the response speed of the control circuit 200.

[0093] In some embodiments, the second branch 210 further includes a second voltage regulator circuit. Figure 2 (Not shown in the diagram), the second voltage regulator circuit and the second resistor 244 are connected in parallel. That is, one end of the second voltage regulator circuit is coupled to the first terminal of the second switch 242, and the other end is coupled to the control terminal of the second switch 242. The second voltage regulator circuit can suppress feedthrough, reducing the risk that voltage changes at the second terminal of the second switch 242 will be coupled to the control terminal of the second switch 242 through the parasitic capacitance between the second terminal and the control terminal, thereby ensuring the stability of the control of the second switch 242.

[0094] When a voltage surge occurs at the coupling points of output branch 212 and first branch 208, and at the coupling points of output branch 212 and second branch 210, the voltage surge at the second terminal of the second switch 242 may couple to the control terminal through the parasitic capacitance between the control terminal and the second terminal of the second switch 242, causing the second switch 242 to mis-turn on. The second voltage regulator circuit is coupled between the control terminal and the first terminal of the second switch 242. When a voltage surge occurs at the coupling points of output branch 212 and second branch 210, i.e., when a voltage surge occurs at the second terminal of the second switch 242, the second voltage regulator circuit can stabilize the voltage, suppress feedthrough, and protect the second switch 242.

[0095] In some embodiments, the second voltage regulator circuit includes a second voltage regulator capacitor. The capacitance of the second voltage regulator capacitor is on the same order of magnitude as the parasitic capacitance between the second terminal and the control terminal of the second switch 242. For example, the capacitance of the second voltage regulator capacitor can be slightly smaller than the parasitic capacitance between the second terminal and the control terminal of the second switch 242, thereby protecting the second switch 242.

[0096] In some embodiments, the capacitance of the second voltage-regulating capacitor may affect the RC time constant of the second branch 210 (compared to the RC time constant of the resistor upstream of the signal input terminal 202), causing a decrease in the speed at which the second switch 242 turns on or off based on the pulse width modulation signal. The capacitance of the second voltage-regulating capacitor is on the same order of magnitude as the parasitic capacitance between the second terminal and the control terminal of the second switch 242, which can reduce or avoid the problem of an excessively large RC time constant in the second branch 210 causing a slow response of the second switch 242.

[0097] Please continue to refer to this. Figure 2 In some embodiments, the signal input terminal 202 includes a first port 252 and a second port 254. A first branch 208 is coupled to the first port 252. A second branch 210 is coupled to the second port 254. The first port 252 receives a first pulse width modulation signal, and the second port 254 receives a second pulse width modulation signal.

[0098] The first pulse width modulation signal has a first duty cycle, and the second pulse width modulation signal has a second duty cycle. Furthermore, the difference between the first duty cycle and the second duty cycle is less than a threshold value. This ensures that the first branch 208 and the second branch 210 do not conduct simultaneously, preventing the power supply voltage from being directly connected to ground.

[0099] In some embodiments, the first pulse width modulation signal and the second pulse width modulation signal have the same duty cycle. For example, the first pulse width modulation signal and the second pulse width modulation signal are the same, emitted from the same signal source. Having the first pulse width modulation signal and the second pulse width modulation signal are the same simplifies the structure of the signal source and the signal input terminal 202, reducing the cost of the control circuit 200. Alternatively, the first pulse width modulation signal and the second pulse width modulation signal are different signals, modulated to have the same duty cycle. In some embodiments, the periods of the first pulse width modulation signal and the second pulse width modulation signal correspond, so that the first branch 208 and the second branch 210 are not simultaneously turned on.

[0100] In some embodiments, the duty cycles of the first pulse width modulation signal and the second pulse width modulation signal are different. For example, the first duty cycle is greater than the second duty cycle. Figure 2 As shown, the first switch 222 is turned on when the first duty cycle is low, and the second switch 242 is turned on when the second duty cycle is high. The first duty cycle is greater than the second duty cycle, meaning that the duration for which the first port 252 maintains a high output voltage is greater than the duration for which the second port 254 maintains a high output voltage. When the voltage output from the second port 254 switches from high to low, the first port 252 still maintains a high output voltage for a certain period of time. In other words, during the process of switching from coupling the output branch 212 to ground to coupling the output branch 212 to the power input terminal 204, the first branch 208 and the second branch 210 are simultaneously in an open state.

[0101] The first branch 208 and the second branch 210 are simultaneously in the off state, which can prevent direct current from flowing through. This avoids the first branch 208 and the second branch 210 from being simultaneously turned on due to insufficient sensitivity of the first switch 222 and the second switch 242 or errors in the period correspondence of the first pulse width modulation signal and the second pulse width modulation signal. This helps to reduce the control difficulty of the pulse width modulation signal, reduces the sensitivity requirements of the first switch 222 and the second switch 242, and helps to reduce costs.

[0102] Please continue to refer to this. Figure 2 In some embodiments, the output branch 212 includes an inductor 262, a filter capacitor 264, and a third resistor 266 connected in series. The first end of the inductor 262 is coupled to the first branch 208 and the second branch 210, and the other end of the inductor 262 is coupled to the filter capacitor 264 and the voltage output terminal 206. The third resistor 266 is coupled to ground. The inductor 262, filter capacitor 264, and third resistor 266 can form a low-pass filter, which can mitigate the signal edge of the first voltage generated by the output branch 212, mitigate the voltage change edge of the voltage output terminal 206, and improve the electromagnetic compatibility of the control circuit 200 and the motor connected to the control circuit 200.

[0103] like Figure 2As shown, the first switch 222 is turned on when the first pulse width modulation signal is low, and the second switch 242 is turned on when the second pulse width modulation signal is high. Therefore, by adjusting the duty cycle (i.e., the first duty cycle and the second duty cycle) of the pulse width modulation signals (i.e., the first pulse width modulation signal and the second pulse width modulation signal), the magnitude of the first voltage output by the output branch 212 can be adjusted. For example, as... Figure 2 As shown, reducing the first duty cycle and the second duty cycle can increase the on-time of the first switch 222 within one cycle, that is, increase the on-time of the output branch 212 with the power supply voltage within one cycle, thereby increasing the magnitude of the first voltage. Conversely, increasing the first duty cycle and the second duty cycle can decrease the on-time of the first switch 222 within one cycle, that is, decrease the on-time of the output branch 212 with the power supply voltage within one cycle, thereby decreasing the magnitude of the first voltage.

[0104] Figure 3 A block diagram of an exemplary electric motor drive circuit consistent with some embodiments of this disclosure is shown. Please refer to... Figure 3 The motor 370 includes three windings 372, and the drive circuit 374 includes three control circuits 300, wherein the control circuits 300 can be... Figure 1A The control circuit 100 shown, or Figure 2 The control circuit 200 is shown. The three control circuits 300 are respectively coupled to different windings 372 of the three windings 372 of the motor 370.

[0105] In this embodiment, each winding 372 of the motor 370 is controlled by a control circuit 300. The control circuit 300 outputs a first voltage based on a pulse width modulation signal to energize the corresponding winding 372. The magnitude of the first voltage can be adjusted by adjusting the duty cycle of the pulse width modulation signal. The three windings 372 cooperate with each other to enable the motor 370 to output torque. In some embodiments, the three control circuits 300 can be independent of each other or controlled uniformly, and the phase of the first voltage output by the three control circuits 300 matches the electrical cycle of the motor 370.

[0106] Figure 4 A block diagram of an exemplary electric motor assembly consistent with some embodiments of this disclosure is shown. Please refer to... Figure 4 The motor assembly 480 includes a motor 470, power supply terminals 482, at least one control circuit 400, and a controller 484.

[0107] Among them, motor 470 can be Figure 3 The electric motor 370 is shown. The electric motor 470 includes at least one winding 472, which may be... Figure 3The winding 372 shown is illustrated. In some embodiments, the motor 470 may include one or more windings 472, for example, the motor 470 may include three windings 472.

[0108] Control circuit 400 can be Figure 1A The control circuit 100 shown, or Figure 2 The control circuit 200 shown, or Figure 3 The control circuit 300 shown is illustrated. The power input terminal of the control circuit 400 is coupled to the power terminal 482. The motor assembly 480 can be connected to an external power source via the power terminal 482, which is, for example, an interface for connecting to an external power source. The control circuit 400 can receive the power voltage from the external power source through its power input terminal. In some embodiments, a transformer, current stabilizer, etc., may also be provided between the power terminal 482 and the power input terminal of the control circuit 400.

[0109] The controller 484 communicates with at least one control circuit 400, and the controller 484 can input pulse width modulation (PWM) signals to the signal input terminals of the control circuit 400. For example, the controller 484 includes a signal source that can input PWM signals to the signal input terminals of the control circuit 400 based on a preset period and duty cycle. Please refer to [reference needed]. Figure 4 The control circuit 400 and the winding 472 are connected one-to-one. The control circuit 400 can receive the power supply voltage from the external power supply based on the pulse width modulation signal and output the periodically changing voltage to the winding 472 to drive the motor 470 to output torque.

[0110] In some embodiments, the motor 470 includes three windings 472, and the motor assembly 480 includes three control circuits 400. In the embodiments, the three control circuits 400 and the three windings 472 are connected in a one-to-one correspondence, and control the voltage of the three windings 472 respectively.

[0111] In some embodiments, during one rotation cycle of the motor 470, the three control circuits 400 each output low voltage to their respective windings for one-third of the time. For example, the first voltage output by the control circuit 400 to the corresponding winding 472 may be either high voltage or low voltage. The fact that the first voltage output by the control circuits connected to the three windings 472 is low for one-third of the time during one rotation cycle of the motor 470 is beneficial for improving the stability of the output shaft of the motor 470.

[0112] Figure 5 A block diagram of an exemplary lidar consistent with some embodiments of this disclosure is shown. Please refer to... Figure 5 The lidar 590 includes a transmitter 592, a receiver 594, a scanner 596, and a motor assembly 580. The motor assembly 580 can be... Figure 4 The electric motor assembly shown is 480.

[0113] Emitter 592 can emit a probe beam. In some embodiments, emitter 592 includes, for example, a laser or a laser array. The laser may include a semiconductor laser, a solid-state laser, or other types of lasers. The semiconductor laser may include one or more of the following: a vertical-cavity surface-emitting laser (VCSEL), an edge-emitting laser (EEL), and a distributed-feed-back laser (DFB).

[0114] Receiver 594 can receive the echo of the probe beam reflected by an object and generate an electrical signal. In some embodiments, receiver 594 includes, for example, a photodetector or a photodetector array. The photodetector may include one or more of the following: a single-photon avalanche diode (SPAD), a silicon photomultiplier (SiPM), and an avalanche photodiode (APD).

[0115] The detection light emitted by transmitter 592 is reflected by an obstacle outside lidar 590, generating an echo. This echo illuminates receiver 594, which converts it into an electrical signal. Lidar 590 can then obtain information about the object based on this electrical signal. For example, it can determine the time of flight to ascertain the distance of the object relative to lidar 590, or determine the intensity of the echo to determine the reflectivity of the object's reflective surface.

[0116] The scanner 596 is disposed in at least one of the optical paths of the probe beam or the echo. For example, the scanner 596 may reflect, transmit, or refract the probe beam to scan the probe beam toward the outside of the lidar 590. Alternatively, the scanner 596 may reflect, transmit, or refract the echo to scan the echo toward the receiver 594. In some embodiments, the scanner 596 may include optical elements such as mirrors, lenses, and filters.

[0117] The motor assembly 580 drives at least one of the transmitter 592, receiver 594, or scanner 596 to move. The motor assembly 580 can output torque and drive at least one of the transmitter 592, receiver 594, or scanner 596 to move, for example, driving the transmitter 592, receiver 594, and scanner 596 to rotate, thereby expanding the detection range of the lidar 590. Alternatively, the motor assembly 580 drives the scanner 596 to rotate, causing the detection beam to be emitted in different directions to the outside of the lidar 590, thereby expanding the detection range of the lidar 590. Alternatively, the motor assembly 580 drives the transmitter 592 and receiver 594 to move in a straight line, thereby expanding the detection range of the lidar 590.

[0118] Finally, it should be noted that the above descriptions are merely embodiments of this disclosure and are not intended to limit this disclosure. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art can still modify the technical solutions described in the foregoing embodiments or make equivalent substitutions for some of the technical features. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A control circuit, comprising: The signal input terminal is configured to receive pulse width modulation signals; The power input terminal is configured to receive power supply voltage. The voltage output terminal is configured to output the first voltage. The first branch is coupled to the signal input terminal and the power input terminal; The second branch is coupled to the signal input terminal and the ground wire; An output branch, coupled to the first branch, the second branch and the voltage output terminal, is configured to generate the first voltage according to the pulse width modulation signal and the power supply voltage; The first branch is configured to turn on or off the connection between the power input terminal and the output branch based on the pulse width modulation signal and the power supply voltage, and the second branch is configured to turn on or off the connection between the ground wire and the output branch based on the pulse width modulation signal. The first branch and the second branch are not turned on at the same time.

2. The control circuit according to claim 1, wherein the first branch comprises: A first switch, wherein a first end of the first switch is coupled to the power input terminal, a control terminal of the first switch is coupled to the signal input terminal, and a second end of the first switch is coupled to the output branch; The first capacitor is coupled between the control terminal of the first switch and the signal input terminal; A first resistor, one end of which is coupled to the control terminal of the first switch, and the other end of which is coupled to the power input terminal.

3. The control circuit according to claim 2, wherein the first branch further includes a clamping circuit, the clamping circuit being coupled between the control terminal of the first switch and the power input terminal.

4. The control circuit according to claim 2, wherein the first branch further includes a first voltage regulator circuit, the first voltage regulator circuit being connected in parallel with the first resistor.

5. The control circuit according to claim 4, wherein the first voltage regulator circuit includes a first voltage regulator capacitor, the capacitance value of the first voltage regulator capacitor having the same order of magnitude as the parasitic capacitance between the second terminal and the control terminal of the first switch.

6. The control circuit according to claim 2, wherein the first switch includes a first field-effect transistor, the source of the first field-effect transistor is coupled to the power input terminal, the gate of the first field-effect transistor is coupled to the signal input terminal through the first capacitor, and the drain of the first field-effect transistor is coupled to the output branch.

7. The control circuit according to claim 2, wherein the RC time constant of the first resistor and the first capacitor is greater than or equal to the period of the pulse width modulation signal.

8. The control circuit according to claim 1, wherein the second branch includes a second switch, a first terminal of the second switch is coupled to the ground wire, a control terminal of the second switch is coupled to the signal input terminal, and a second terminal of the second switch is coupled to the output branch.

9. The control circuit according to claim 8, wherein the second branch further includes a second resistor, the second resistor being coupled between the control terminal of the second switch and the first terminal of the second switch.

10. The control circuit according to claim 9, wherein the second branch further includes a second voltage regulator circuit, the second voltage regulator circuit being connected in parallel with the second resistor.

11. The control circuit according to claim 10, wherein the second voltage regulator circuit includes a second voltage regulator capacitor, the capacitance value of the second voltage regulator capacitor being on the same order of magnitude as the capacitance value of the parasitic capacitance between the second terminal and the control terminal of the second switch.

12. The control circuit according to claim 8, wherein the second switch includes a second field-effect transistor, the source of the second field-effect transistor is coupled to the ground line, the gate of the second field-effect transistor is coupled to the signal input terminal, and the drain of the second field-effect transistor is coupled to the output branch.

13. The control circuit according to any one of claims 1-12, wherein the signal input terminal includes a first port and a second port; the first branch is coupled to the first port, and the second branch is coupled to the second port; the first port is configured to receive a first pulse width modulation signal, and the second port is configured to receive a second pulse width modulation signal.

14. The control circuit according to claim 13, wherein the first pulse width modulation signal has a first duty cycle, the second pulse width modulation signal has a second duty cycle, and the difference between the first duty cycle and the second duty cycle is less than a threshold.

15. The control circuit according to claim 14, wherein the first duty cycle is greater than the second duty cycle.

16. The control circuit according to claim 14, wherein the first pulse width modulation signal and the second pulse width modulation signal are the same.

17. The control circuit according to any one of claims 1-16, wherein the output branch comprises an inductor, a filter capacitor, and a third resistor connected in series, a first end of the inductor being coupled to the first branch and the second branch, and the other end of the inductor being coupled to the filter capacitor and the voltage output terminal.

18. A drive circuit for an electric motor, the electric motor comprising three windings, the drive circuit comprising: Three control circuits as described in any one of claims 1-17, wherein the voltage output terminals of the three control circuits are respectively coupled to different windings of the three windings.

19. An electric motor assembly, comprising: An electric motor, the electric motor including at least one winding; Power terminals; At least one control circuit as described in any one of claims 1-17, wherein the power input terminal of the control circuit is coupled to the power terminal; and A controller, which communicates with at least one of the control circuits and is configured to input the pulse width modulation signal to a signal input terminal in the control circuit; The control circuit is connected to each of the windings in a one-to-one correspondence, and the control circuit is configured to output a periodically varying voltage to the windings according to the pulse width modulation signal.

20. The electric motor assembly according to claim 19, wherein the electric motor comprises three windings, and the electric motor assembly comprises three control circuits, wherein the three control circuits are connected to the three windings in a one-to-one correspondence.

21. A lidar, comprising: The transmitter is configured to emit a probe beam; A receiver is configured to receive the echo of the probe beam reflected by the object and generate an electrical signal; A scanner, wherein the scanner is disposed in the optical path of at least one of the probe beam or the echo; The motor assembly of claim 19 or 20 is configured to move at least one of the transmitter, the receiver, or the scanner.