A high-sensitivity MEMS flow sensor and a manufacturing method thereof

Abstract

The application relates to a high-sensitivity MEMS flow sensor and a manufacturing method thereof, which comprises a sensor chip, a metal base and a measuring flow channel, wherein the sensor chip comprises: a substrate, a porous silicon region is formed in the substrate; a first dielectric layer is formed on the upper surface of the substrate and the porous silicon region; a heating resistor array is formed on the upper surface of the first dielectric layer and directly above the porous silicon region; a thermocouple array is formed on the upper surface of the first dielectric layer and directly above the porous silicon region, and the thermocouple array and the heating resistor array are alternately arranged along the gas flow channel direction; an electrically isolated layer covers the heating resistor array and the thermocouple array; a metal interconnection structure is formed on the upper surface of the electrically isolated layer and connected with the thermocouple array; an electrode is connected with the metal interconnection structure; and a second dielectric layer covers the electrically isolated layer and the metal interconnection structure. The application adopts a plurality of pairs of symmetric distribution structures of alternately arranged thermocouples and heaters, and the measurement sensitivity of the flow meter is significantly improved.

Description

Technical Field

[0001] This invention relates to a high-sensitivity MEMS flow sensor and its fabrication method, belonging to the field of microelectromechanical systems (MEMS) technology. Background Technology

[0002] Thermal MEMS gas flow meters are widely used in medical respiratory monitoring, industrial process control, and environmental monitoring due to their advantages such as small size, fast response speed, and low power consumption. The core structure of existing thermal MEMS flow sensors typically includes a heater and a pair of symmetrically arranged thermocouples. The working principle is as follows: the heater heats the surrounding gas to form a stable temperature field; when the gas flows through, it carries away the heat around the heater, resulting in a temperature difference between the upstream and downstream thermocouples. This temperature difference corresponds to the gas flow rate, and the flow rate can be measured by detecting the thermoelectric potential signal of the thermocouples.

[0003] However, existing thermal flow meters with a single heater-single thermopile structure face inherent limitations in micro-flow measurement scenarios. This is mainly due to their thermal field construction and signal acquisition methods: First, as a centralized heat source, the temperature field generated by a single heater is spatially unevenly distributed, with a limited thermal gradient, and is easily affected by process fluctuations, resulting in low heat exchange efficiency. Second, relying solely on a pair of thermopiles for temperature difference measurement is equivalent to a highly simplified "single-point differential" sampling of the complex flow field temperature distribution, which is insufficient in information capture and makes it difficult to sensitively respond to the slight temperature difference caused by minute flow rate changes. Although there are some improved designs that increase the number of thermopiles to improve symmetry, the heating source remains singular, failing to fundamentally achieve synergistic optimization of the spatial distribution of the thermal excitation unit and the signal detection unit, thus having limited effect on improving overall sensitivity.

[0004] To address the aforementioned issues, it is imperative to optimize and improve the structure of existing thermal MEMS flow sensors. By employing a rational structural design, the controllability of the temperature field and the ability to acquire temperature difference signals can be enhanced, thereby improving the sensor's sensitivity and measurement reliability. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a high-sensitivity MEMS flow sensor and its fabrication method. It employs a multi-pair symmetrical distribution structure with alternating thermopile and heater to enhance the heat exchange efficiency with the fluid, improve the temperature signal acquisition accuracy and anti-interference capability, thereby significantly improving the flow meter's measurement sensitivity.

[0006] The technical solution of the present invention is as follows:

[0007] A high-sensitivity MEMS flow sensor includes a sensor chip, a metal base, and a measurement flow channel, wherein the sensor chip includes:

[0008] A substrate in which a porous silicon region is formed, the porous silicon region extending from the upper surface of the substrate into the interior of the substrate;

[0009] A first dielectric layer is formed on the upper surface of the substrate and the porous silicon region;

[0010] A heating resistor array is formed on the upper surface of the first dielectric layer and located directly above the porous silicon region;

[0011] A thermopile array is formed on the upper surface of the first dielectric layer and located directly above the porous silicon region. The thermopile array and the heating resistor array are arranged alternately along the gas flow channel direction.

[0012] An electrical isolation layer covers the heating resistor array and the thermopile array, and has contact holes on it;

[0013] A metal interconnect structure, formed on the upper surface of the electrical isolation layer, is connected to the thermopile array through contact holes. Its core function is to connect the hot ends of all thermopiles upstream of the plane parallel to the airflow direction and passing through the center of the sensing array in series to a first signal terminal, connect the hot ends of all thermopiles downstream of the plane in series to a second signal terminal, and connect the cold ends of all thermopiles to a common reference terminal. The first signal terminal connects to the common output node of the hot ends of all thermopiles upstream of the flow channel, and the second signal terminal connects to the common output node of the hot ends of all thermopiles downstream of the flow channel. The common reference terminal connects to the common node of the cold ends of all thermopiles, and is usually grounded.

[0014] Electrodes, connected to a metal interconnect structure;

[0015] The second dielectric layer covers the electrical isolation layer and the metal interconnect structure, and the exposed electrodes are exposed through local etching;

[0016] The sensor chip is housed within a metal base, which is in turn housed within the test flow channel via a sealing ring, together forming a fluid channel that encloses the sensor array.

[0017] According to a preferred embodiment of the present invention, the substrate material is single-crystal silicon, SOI, or a compound semiconductor.

[0018] According to a preferred embodiment of the present invention, the first dielectric layer material is one or a combination of silicon oxide and silicon nitride;

[0019] The material of the second dielectric layer is one or a combination of silicon oxide and silicon nitride.

[0020] According to a preferred embodiment of the present invention, the heating resistor array is composed of M heating resistors, where M is an odd number greater than or equal to 3, and the material of the heating resistors is P-type polycrystalline silicon, N-type polycrystalline silicon, or metal;

[0021] The thermopile array consists of N thermopiles, where N is an integer greater than or equal to 4 and satisfies N=M+1. The thermopile array and the heating resistor array are arranged alternately along the gas flow channel direction, and each heating resistor is located between two thermopiles in the flow channel direction.

[0022] According to a further preferred embodiment of the present invention, the thermopile is composed of P-type polycrystalline silicon strips and N-type polycrystalline silicon strips connected in series, with the hot ends of the thermopile densely arranged on both sides of the corresponding heating resistor, and the cold ends extending to the area above the substrate outside the porous silicon region.

[0023] According to a preferred embodiment of the present invention, the electrical isolation layer material is silicon dioxide or silicon nitride, which can be formed by chemical vapor deposition or atomic layer deposition.

[0024] According to a preferred embodiment of the present invention, the material of the metal interconnect structure is aluminum, copper, gold, or a titanium / platinum composite layer.

[0025] According to a preferred embodiment of the present invention, the electrode is made of gold or aluminum and is formed at the end of the metal interconnect structure by electroplating or stripping processes for wire bonding.

[0026] According to a preferred embodiment of the present invention, the metal base is provided with an external electrical interface, and the sensor chip is fixed in the groove of the metal base by an adhesive.

[0027] According to a preferred embodiment of the present invention, the sealing ring is made of an elastic polymer and is ring-shaped, used to achieve a seal between the metal base and the measuring channel.

[0028] According to a preferred embodiment of the present invention, the measuring channel is an independent component with a precision internal channel, the material of which is glass, silicon or polymer, formed by machining or etching process, and sealed to the metal base by the sealing ring to form a closed fluid channel.

[0029] The fabrication method of the aforementioned high-sensitivity MEMS flow sensor includes the following steps:

[0030] S1. Provide a substrate, form and pattern a sacrificial layer on the surface of the substrate to expose a predetermined area;

[0031] S2. Using a patterned sacrificial layer as a barrier, a porous silicon region is formed by electrochemical anodic etching, and then the sacrificial layer is removed.

[0032] S3. Deposit a first dielectric layer on the substrate and the surface of the porous silicon region;

[0033] S4. An alternating array of heating resistors and a thermopile array are formed on the first dielectric layer;

[0034] S5. Deposit an electrical isolation layer and prepare contact holes;

[0035] S6. Forming a metal interconnect structure and electrodes;

[0036] S7. Deposit the second dielectric layer and expose the electrodes by etching to complete the sensor chip fabrication;

[0037] S8 provides a metal base for embedding the sensor chip into the measurement channel.

[0038] The beneficial effects of this invention are as follows:

[0039] 1. The present invention integrates a porous silicon region within the substrate, which effectively blocks the longitudinal heat conduction path from the heating element to the bulk silicon substrate by utilizing its extremely low thermal conductivity. This significantly reduces the parasitic heat loss generated by the heating element, forcing the heat generated by the heater to be used more concentrated and more efficiently to heat the gas in the upper flow channel, thereby establishing a temperature field with higher intensity and more significant gradient in the flow channel.

[0040] 2. This invention adopts an array structure with multiple heaters and multiple thermopiles arranged alternately and symmetrically, which innovates the traditional single-point differential detection mode into a distributed parallel detection and signal spatial integration mode. When gas flows through, multiple "heating-sensing" units can simultaneously sense local thermal disturbances at different axial positions in the flow field. The weak temperature difference potential output by each thermopile is coherently superimposed through series connection, thereby amplifying the effective electrical signal related to flow rate at the device physical level. At the same time, due to the non-correlation of the noise of each unit circuit, the overall signal-to-noise ratio of the system is significantly improved.

[0041] 3. The alternating symmetrical array configuration of this invention has excellent anti-interference ability, which can effectively counteract symmetrical interference such as changes in ambient temperature, and improve the long-term measurement stability and reliability of the sensor in complex environments.

[0042] 4. The key process steps involved in this invention, such as porous silicon etching, polycrystalline silicon deposition and doping, dielectric layer growth, metal interconnection and bonding packaging, are all fully compatible with mature MEMS surface micromachining technologies in the industry. The process routes are clear, highly controllable, and have good process repeatability and scalability, making them suitable for large-scale mass production. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of the planar structure of an embodiment of the present invention;

[0044] Figure 2 This is a schematic diagram of the manufacturing method according to an embodiment of the present invention;

[0045] Figure 3 This is a cross-sectional schematic diagram of the structure obtained in step S1 of the manufacturing method of this embodiment of the invention;

[0046] Figure 4This is a cross-sectional schematic diagram of the structure obtained in step S2 of the manufacturing method of this embodiment of the invention;

[0047] Figure 5 This is a cross-sectional schematic diagram of the structure obtained in step S3 of the manufacturing method of this embodiment of the invention;

[0048] Figure 6 This is a cross-sectional schematic diagram of the structure obtained in step S4 of the manufacturing method of this embodiment of the invention;

[0049] Figure 7 This is a cross-sectional schematic diagram of the structure obtained in step S5 of the manufacturing method of this embodiment of the invention;

[0050] Figure 8 This is a cross-sectional schematic diagram of the structure obtained in step S6 of the manufacturing method of this embodiment of the invention;

[0051] Figure 9 This is a cross-sectional schematic diagram of the structure obtained in step S7 of the manufacturing method of this embodiment of the invention;

[0052] Figure 10 This is a cross-sectional schematic diagram of the structure obtained in step S8 of the manufacturing method of this embodiment of the invention.

[0053] In the figure, 101 is the substrate; 102 is the sacrificial layer; 103 is the porous silicon region; 104 is the first dielectric layer; 105 is the heating resistor; 106 is the thermopile; 107 is the electrical isolation layer; 108 is the contact hole; 109 is the metal interconnect structure; 110 is the electrode; 111 is the second dielectric layer; 112 is the metal base; 113 is the sealing ring; and 114 is the measurement channel.

[0054] 110-1, First signal electrode; 110-2, Second signal electrode; 110-3, Common reference electrode. Detailed Implementation

[0055] The present invention will be further described below with reference to the embodiments and accompanying drawings, but is not limited thereto.

[0056] Example 1:

[0057] This embodiment provides a high-sensitivity MEMS flow sensor, including a sensor chip, a metal base, and a measurement flow channel. The sensor chip includes:

[0058] A substrate 101, wherein a porous silicon region 103 is formed therein, the porous silicon region 103 being formed extending inward from the upper surface of the substrate 101;

[0059] A first dielectric layer 104 is formed on the upper surface of the substrate 101 and the porous silicon region 103;

[0060] Heating resistor 105 is formed on the upper surface of the first dielectric layer 104 and is located directly above the porous silicon region 103;

[0061] The thermopile 106 is formed on the upper surface of the first dielectric layer 104, symmetrically distributed on both sides of the heating resistor 105 along the gas flow direction, and located directly above the porous silicon region 103.

[0062] An electrical isolation layer 107 covers the heating resistor 105 and the thermopile 106, and a contact hole 108 is provided on the electrical isolation layer 107;

[0063] A metal interconnect structure 109 is formed on the upper surface of the electrical isolation layer 107 and is electrically connected to the thermopile 106 through the contact hole 108;

[0064] Electrode 110 is connected to the metal interconnect structure 109;

[0065] The second dielectric layer 111 covers the electrical isolation layer 107 and the metal interconnect structure 109, and exposes the electrode 110 through local etching;

[0066] The sensor chip is fixed on a metal base 112, and the electrode 110 is electrically connected to an external pin on the metal base 112.

[0067] The sealing ring 113 is made of an elastic polymer and is ring-shaped.

[0068] The measuring channel 114 is sealed to the metal base 112 by the sealing ring 113, together forming a fluid channel that encloses the sensing array.

[0069] The substrate 101 is a single-crystal silicon, SOI, or compound semiconductor substrate.

[0070] The porous silicon region 103 is formed by an electrochemical anodic etching process. During the fabrication process, a sacrificial layer 102 is first formed and patterned on the surface of the substrate 101 to expose a predetermined area. Then, with the patterned sacrificial layer 102 as a barrier, an anodic bias is applied to the substrate in an electrolyte containing hydrofluoric acid (the electrolyte is a hydrofluoric acid electrolyte, in which the volume ratio of hydrofluoric acid is controlled at 20%~50%, the current density is controlled at 10~50 mA / cm², and the etching time is adjusted according to the required porous silicon depth). This causes the silicon to undergo electrochemical dissolution under the action of the current, forming a porous silicon region 103 with a nanoporous structure extending inward from the upper surface of the sacrificial layer 102. After that, the sacrificial layer 102 is removed. The thermal conductivity of the porous silicon can be reduced to 1~2 W / (m·K), which is much lower than the thermal conductivity of bulk silicon. This extremely low thermal conductivity allows the porous silicon region 103 to effectively block the longitudinal conduction of heat generated by the heating resistor 105 to the substrate 101, forcing the heat to be transferred mainly to the gas in the upper measurement channel 114, thereby significantly improving the heat-flow exchange efficiency and enhancing the temperature gradient in the channel.

[0071] The heating resistor 105 is made of doped polycrystalline silicon or metal and is formed on the upper surface of the first dielectric layer 104 and located directly above the porous silicon region 103. During operation, a constant power is applied to the heating resistor 105 to make it heat up. Due to the extremely low thermal conductivity of the porous silicon region 103 below, the heat is effectively confined within the measurement channel, reducing longitudinal loss through the substrate 101.

[0072] The thermopile 106 is composed of multiple pairs of thermocouples connected in series and is formed on the upper surface of the first dielectric layer 104. To achieve a symmetrical layout, the number M of heating resistors 105 is odd, and the number N of thermopile 106 is even, satisfying the relationship N = M + 1. Figure 1 Taking M=3 as an example, this results in multiple thermopile 106 and multiple heating resistors 105 being arranged alternately along the gas flow path, specifically in the configuration of: thermopile-heating resistor-thermopile-heating resistor-thermopile-…-thermopile. Each heating resistor 105 is located between two thermopile 106 in the flow path axis, and the two thermopile 106 are mirror-symmetrical about the heating resistor 105. The hot end of the thermopile 106 is arranged closely around the corresponding heating resistor 105 to sensitively detect temperature changes in its vicinity; the cold end extends to the substrate region outside the porous silicon region 103 to maintain a stable reference temperature.

[0073] Contact holes 108 are formed in the electrical isolation layer 107, exposing the connection area of ​​the thermopile 106.

[0074] The metal interconnect structure 109 is made of aluminum, copper, gold, or a titanium / platinum composite layer, formed by sputtering and stripping processes, and electrically connected to the thermopile 106 through contact holes 108. Its core function and connection method is to connect the hot ends of all thermopile 106 located upstream of the plane parallel to the airflow direction and passing through the center of the array in series, and connect the hot ends of all thermopile 106 located downstream of the plane in series, so that the thermoelectric potentials generated upstream and downstream of the thermopile 106 can be superimposed respectively.

[0075] The electrode 110 is made of gold or aluminum and is formed at the end of the metal interconnect structure 109 for external wire bonding.

[0076] It should be noted that the connection method of the thermopile 106 has a specific electrical topology: the thermopile array is divided into a symmetrical upstream region and a downstream region, with the airflow direction parallel to the central axis of the thermopile array as the boundary.

[0077] In the upstream region, each thermopile 106 is electrically connected in series through the upstream metal interconnection structure 109, thereby forming a first signal path. Since each thermopile 106 includes a hot end located in the temperature measurement zone and a cold end located in the heat sink zone, this first signal path can linearly superimpose the thermoelectric potentials generated by all thermopile units on the upstream side to form the total upstream potential V. up And it is led out via the first signal electrode 110-1. Similarly, in the downstream region, the thermopile 106 is electrically connected in series through the downstream metal interconnect structure 109, thereby forming a second signal path. This second signal path linearly superimposes the thermoelectric potential generated by all thermopile units on the downstream side to form the downstream total potential V. down The signal is then led out via the second signal electrode 110-2. The starting ends of both the first and second signal paths are connected to the common reference electrode 110-3 via a metal interconnect structure or a semiconductor doped layer. The final output signal V of the sensor... out Defined as the potential difference between the first signal path and the second signal path, i.e., satisfying the formula: V out =V up -V down ;

[0078] The metal base 112 is made of glass or silicon and is sealed to the substrate 101 by an anodic bonding process.

[0079] In actual operation, a constant voltage or current is applied to the heating resistor 105 to generate Joule heating and reach thermal equilibrium, thereby establishing a stable initial temperature distribution within the measuring channel 114. The heating resistors 105 and the thermopile 106 are arranged alternately and symmetrically along a preset airflow direction. When there is no gas flow within the measuring channel 114, the entire sensing array is in a thermally symmetrical state. In this state, the heat generated by each heating resistor 105 is uniformly conducted to both sides, causing the hot ends of the upstream and downstream thermopile 106 to be at the same temperature. Since the thermoelectric potential of the thermopile 106 is proportional to the temperature difference between its hot and cold ends, the total thermoelectric potential V of the upstream series path is at this time. up The total thermoelectric potential V of the downstream series path down Since they are of equal magnitude, the differential voltage signal V output by the sensor is... out It is either zero or a stable reference potential, which constitutes the absolute zero reference for flow measurement.

[0080] When the gas being measured flows through the measuring channel 114 at a certain flow rate, forced convection heat transfer occurs between the flowing gas and the chip surface. This process disrupts the original thermal symmetry equilibrium. Specifically, the airflow carries the heat generated by each heating resistor 105 downstream, causing the temperature on the upstream side of the heating resistor 105 to rise relatively, while the temperature on the downstream side to fall relatively, creating a local temperature difference. The temperature difference ΔT between the two sides of each heating resistor 105 is significant. i It is precisely captured by two adjacent thermoelectric piles 106. Under gas flow conditions, since the upstream thermoelectric piles are generally in a relatively high-temperature region, their thermoelectric potentials are superimposed in the same direction, causing V to... up Increase; downstream thermopile generally operates in a relatively low-temperature region, and the superposition of their thermoelectric potentials increases V. down The decrease or increase is small. Therefore, the differential output V out The deviation from zero point exhibits a definite functional relationship between the magnitude and direction of the gas flow velocity and direction. This differential output, by calibrating this functional relationship, enables precise flow rate measurement. The alternating symmetrical structure of multiple heaters and multiple thermopiles fundamentally optimizes the signal-to-noise ratio and measurability of this functional relationship, thereby significantly improving sensitivity. Traditional single-heater, single-thermopile structures only acquire the temperature difference at a single axial position, and their output signal... ∝ (△T) single This represents the local temperature difference across a single heater caused by airflow, and the signal amplitude is small, easily drowned out by noise. In contrast, this embodiment synchronously acquires multiple local temperature difference signals distributed along the flow direction using a distributed array, and amplifies the output signal through a circuit design that uses upstream and downstream thermopile partitions connected in series and then differential. ∝ This process achieves spatial integral amplification of the effective flow signal at the physical level, enabling V to be amplified under the same flow velocity variation. out The magnitude of the change is significantly greater than Meanwhile, the statistical averaging effect of multiple sensing units and the suppression of common-mode interference by the differential structure jointly reduce the output signal V. out The random noise level is reduced, making the functional relationship between flow rate and velocity clearer and more stable. Therefore, with small changes in flow rate, the sensor in this embodiment can generate a more significant and reliable electrical signal response, thereby achieving more accurate calibration of the flow-voltage functional relationship and higher sensitivity detection.

[0081] This embodiment also provides a method for fabricating the aforementioned high-sensitivity MEMS flow sensor, such as... Figure 2 As shown, it includes the following steps:

[0082] S1. A substrate 101 is provided, and a sacrificial layer 102 is formed and patterned on the surface of the substrate 101, such as... Figure 3 As shown;

[0083] Specifically, the sacrificial layer 102 is made of silicon dioxide, silicon nitride, or polycrystalline silicon, and can be formed by thermal oxidation, chemical vapor deposition, or physical vapor deposition. The patterning process includes photolithography and etching steps, wherein photolithography can employ ultraviolet lithography, electron beam lithography, or laser direct writing technology, and etching can employ wet etching or dry etching processes. The photolithography process defines a pattern of porous silicon regions on the sacrificial layer 102, and the sacrificial layer material in the patterned regions is removed by wet etching or dry etching processes, thereby exposing the predetermined areas of the substrate 101.

[0084] S2. Using the patterned sacrificial layer 102 as a barrier, electrochemically etch the substrate 101 to form a porous silicon region 103, then remove the sacrificial layer 102, as follows: Figure 4 As shown;

[0085] Specifically, a substrate 101 with a patterned sacrificial layer 102 is placed in an electrochemical etching apparatus, and anodizing is performed on the exposed substrate area using a hydrofluoric acid solution as the electrolyte to form a porous silicon region 103. The porosity and depth of the porous silicon can be adjusted by controlling the current density, etching time, and electrolyte concentration. The sacrificial layer 102 can be removed using wet etching or dry etching processes; when the sacrificial layer 102 is silicon dioxide, it can be removed using a hydrofluoric acid-based solution or a buffered oxide etching solution; when the sacrificial layer 102 is silicon nitride, it can be removed using a hot phosphoric acid solution or a reactive ion etching process.

[0086] S3. A first dielectric layer 104 is deposited on the surface of the substrate 101 and the porous silicon region 103, such as... Figure 5 As shown;

[0087] Specifically, the material of the first dielectric layer is one or a combination of silicon dioxide and silicon nitride, wherein silicon dioxide can be formed by thermal oxidation, low-pressure chemical vapor deposition or plasma-enhanced chemical vapor deposition, and silicon nitride can be formed by low-pressure chemical vapor deposition or plasma-enhanced chemical vapor deposition.

[0088] S4. A heating resistor 105 and a thermopile 106 are formed on the first dielectric layer 104, such as Figure 6 As shown;

[0089] Specifically, a polycrystalline silicon thin film is deposited on the first dielectric layer 104, and P-type regions, N-type regions, and heating resistors 105 for the thermopile 106 are formed by selective doping. The polycrystalline silicon thin film can be formed by low-pressure chemical vapor deposition. The heating resistor is made of doped polycrystalline silicon or metal, and can be formed by chemical vapor deposition combined with in-situ doping, ion implantation doping, or diffusion processes. The thermopile 106 is composed of P-type thermocouple arms and N-type thermocouple arms connected in series. The thermocouple arms can be made of doped polycrystalline silicon, silicon-germanium alloy, or metal / semiconductor composite material. Subsequently, by patterning the polycrystalline silicon layer, heating resistors 105 and thermopile 106 are simultaneously formed, alternating along a preset flow channel direction and distributed in a mirror symmetrical manner. The number M of heating resistors 105 is odd, and the number N of thermopile 106 is even and satisfies N=M+1. The patterning process includes photolithography and etching steps, wherein the etching can be reactive ion etching or wet etching.

[0090] S5, deposit an electrical isolation layer 107 and prepare contact holes 108, such as Figure 7 As shown;

[0091] Specifically, the material of the electrical isolation layer 107 is silicon dioxide or silicon nitride, which can be formed by chemical vapor deposition or atomic layer deposition. Subsequently, contact holes 108 are prepared on the electrical isolation layer 107 by photolithography and etching processes to expose specific connection areas of the thermopile 106 below, reserving channels for metal interconnection. The preparation of the contact holes 108 can be carried out by photolithography combined with dry etching processes. The etching methods include reactive ion etching, ion beam etching or laser etching.

[0092] S6, forming a metal interconnect structure 109 and an electrode 110, such as Figure 8 As shown;

[0093] Specifically, a metal interconnect structure 109 is formed by depositing a metal layer through a stripping process. The metal interconnect structure 109 is formed by physical vapor deposition, chemical vapor deposition, or electroplating. The electrode 110 is formed by a stripping process, electroplating process, or post-deposition etching process. The metal interconnect structure 109 and the thermopile 106 can achieve ohmic contact or Schottky contact through contact holes 108.

[0094] S7, Deposition of the second dielectric layer 111, as shown Figure 9 As shown;

[0095] Specifically, the material of the second dielectric layer 111 is one of silicon dioxide, silicon nitride, polyimide, or a silicon nitride / silicon dioxide composite layer, and can be formed by chemical vapor deposition, spin coating, or atomic layer deposition. The second dielectric layer 111 covers the electrical isolation layer 107, the metal interconnect structure 109, and the electrode 110, serving as a passivation protection layer. After the second dielectric layer 111 is deposited, the electrode window pattern is defined by photolithography, and the dielectric layer material above the electrode 110 is removed by dry etching or wet etching, thereby exposing the metal surface of the electrode 110 and providing a reliable contact interface for subsequent wire bonding and electrical interconnection.

[0096] S8. A metal base 112 is provided to embed the sensor assembly into the measurement channel 114, such as... Figure 10 As shown;

[0097] Specifically, a metal base 112 is provided, which has a preset groove matching the size of the sensor chip and an external electrical interface. The micro-machined sensor chip is fixed to the groove of the metal base 112 with an adhesive. Subsequently, the electrodes on the chip are electrically interconnected with the external pins integrated on the metal base 112 by wire bonding, thereby forming a sensor assembly. A measurement channel 114 is then provided, having a positioning groove for accommodating the sensor assembly. A sealing ring 113 is provided, and the sensor assembly with the fixed chip and wire bonded is installed in the positioning groove of the measurement channel 114. The sealing ring 113 is deformed by clamping or fixing, achieving a sealed connection between the measurement channel 114 and the sensor assembly, thereby forming a complete, hermetic measurement channel integrating the sensor array.

[0098] As described above, the high-sensitivity MEMS gas flow sensor provided in this embodiment, through an alternating symmetrical distribution of multiple pairs of heating resistors 105 and multiple pairs of thermopile 106, offers several advantages in sensitivity enhancement compared to the traditional single heater-single thermopile structure: First, the spatially distributed multiple sensing units enable parallel sampling of the flow thermal disturbance field. By connecting them in series, multiple local weak temperature difference signals are coherently accumulated, resulting in a linear amplification of the total output signal amplitude proportional to the number of units. Second, the symmetrical array layout and differential output architecture provide excellent suppression of common-mode interference such as ambient temperature fluctuations and power supply noise. Third, the porous silicon region 103 located below the sensing area acts as a highly efficient thermal barrier, significantly reducing heat loss to the substrate and concentrating heating energy more effectively on the gas in the flow channel, thus enhancing the initial intensity of the measurable temperature difference. These characteristics work synergistically to achieve high sensitivity and high signal-to-noise ratio detection capabilities for minute flow rate changes.

[0099] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A high-sensitivity MEMS flow sensor, characterized in that, It includes a sensor chip, a metal base, and a measurement flow channel, wherein the sensor chip includes: A substrate in which a porous silicon region is formed, the porous silicon region extending from the upper surface of the substrate into the interior of the substrate; A first dielectric layer is formed on the upper surface of the substrate and the porous silicon region; A heating resistor array is formed on the upper surface of the first dielectric layer and located directly above the porous silicon region; A thermopile array is formed on the upper surface of the first dielectric layer and located directly above the porous silicon region. The thermopile array and the heating resistor array are arranged alternately along the gas flow channel direction. The hot end of the thermopile is arranged on both sides of the corresponding heating resistor, and the cold end extends to the area above the substrate outside the porous silicon region. An electrical isolation layer covers the heating resistor array and the thermopile array, and has contact holes on it; A metal interconnect structure is formed on the upper surface of the electrical isolation layer and is connected to the thermopile array through contact holes. Parallel to the airflow direction and with the central axis of the thermopile array as the boundary, the thermopile array is divided into a symmetrical upstream region and a downstream region. In the upstream region, the thermopiles in the thermopile array are electrically connected in series through the metal interconnect structure to form a first signal path. The first signal path linearly superimposes the thermoelectric potential generated by all the thermopiles in the upstream region to form the upstream total potential. In the downstream region, the thermopiles in the thermopile array are electrically connected in series through the metal interconnect structure to form a second signal path. The second signal path linearly superimposes the thermoelectric potential generated by all the thermopiles in the downstream region to form the downstream total potential. The difference between the upstream total potential and the downstream total potential is the output signal of the sensor chip. Electrodes, connected to a metal interconnect structure; The second dielectric layer covers the electrical isolation layer and the metal interconnect structure, and exposes the electrodes; The sensor chip is housed within a metal base, which in turn is housed within the test flow channel.

2. The high-sensitivity MEMS flow sensor as described in claim 1, characterized in that, The substrate material is single-crystal silicon, SOI, or compound semiconductor.

3. The high-sensitivity MEMS flow sensor as described in claim 1, characterized in that, The first dielectric layer material is one or a combination of silicon oxide and silicon nitride. The material of the second dielectric layer is one or a combination of silicon oxide and silicon nitride.

4. The high-sensitivity MEMS flow sensor as described in claim 1, characterized in that, The heating resistor array consists of M heating resistors, where M is an odd number greater than or equal to 3, and the heating resistors are made of P-type polycrystalline silicon, N-type polycrystalline silicon, or metal. The thermopile array consists of N thermopiles, where N is an integer greater than or equal to 4 and satisfies N=M+1. The thermopile array and the heating resistor array are arranged alternately along the gas flow channel direction, and each heating resistor is located between two thermopiles in the flow channel direction.

5. The high-sensitivity MEMS flow sensor as described in claim 4, characterized in that, The thermopile is composed of P-type polycrystalline silicon strips connected in series with N-type polycrystalline silicon strips.

6. The high-sensitivity MEMS flow sensor as described in claim 1, characterized in that, The electrical isolation layer material is silicon dioxide or silicon nitride.

7. The high-sensitivity MEMS flow sensor as described in claim 1, characterized in that, The materials for the metal interconnect structure are aluminum, copper, gold, or titanium / platinum composite layers.

8. The high-sensitivity MEMS flow sensor as described in claim 1, characterized in that, The electrodes are made of gold or aluminum and are formed at the ends of the metal interconnect structure for wire bonding.

9. The high-sensitivity MEMS flow sensor as described in claim 1, characterized in that, The metal base has an external electrical interface, and the sensor chip is fixed in the groove of the metal base with adhesive.

10. The method for fabricating a high-sensitivity MEMS flow sensor as described in any one of claims 1-9, characterized in that, The steps include the following: S1. Provide a substrate, form and pattern a sacrificial layer on the surface of the substrate to expose a predetermined area; S2. Using a patterned sacrificial layer as a barrier, a porous silicon region is formed by electrochemical anodic etching, and then the sacrificial layer is removed. S3. Deposit a first dielectric layer on the substrate and the surface of the porous silicon region; S4. An alternating array of heating resistors and a thermopile array are formed on the first dielectric layer; S5. Deposit an electrical isolation layer and prepare contact holes; S6. Forming a metal interconnect structure and electrodes; S7. Deposit the second dielectric layer and expose the electrodes by etching to complete the sensor chip fabrication; S8 provides a metal base for embedding the sensor chip into the measurement channel.

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