A chip communication signal fault diagnosis system and method based on artificial intelligence

Abstract

This invention discloses an artificial intelligence-based chip communication signal fault diagnosis system and method, relating to the field of chip communication fault diagnosis technology. It involves real-time acquisition of raw communication signals from high-speed chip communication ports, simultaneously acquiring chip operating condition parameters; setting a dynamic threshold adjustment mechanism to analyze whether the chip has weak faults based on dynamic thresholds; setting a process deviation verification mechanism to perform secondary verification on chips initially identified as having suspected process deviations; and setting a verification parameter threshold adjustment mechanism to adaptively adjust the offset amplification rate threshold and the cross-condition volatility threshold of chip performance. By setting the process deviation verification mechanism, chips initially identified as having process deviations through comparison with dynamic thresholds are subjected to secondary verification, further detecting chip performance, thus improving the accuracy of distinguishing between weak chip faults and process deviations, and avoiding the situation where chips with process deviations are mistakenly judged as defective products.

Description

Technical Field

[0001] This invention relates to the field of chip communication fault diagnosis technology, specifically to a chip communication signal fault diagnosis system and method based on artificial intelligence. Background Technology

[0002] With the development of semiconductor technology, chip integration is constantly increasing, and communication interface types are becoming increasingly complex. Communication signal faults are a high-frequency problem during chip R&D, production testing, and end-application stages, manifesting as signal distortion, packet loss, timing deviations, and abnormal levels. Meanwhile, high-speed chips are increasingly widely used in communications, radar, aerospace, and other fields, leading to ever-increasing requirements for communication speed, accuracy, and stability. Under high-frequency, high-bandwidth operating conditions, high-speed chips are susceptible to electromagnetic interference, temperature fluctuations, voltage drift, and other factors, resulting in various faults, including weak faults, complex faults, and concurrent faults. Among these, weak faults manifest as signal amplitude... Small value shifts and slight phase distortions are not significant features. Existing chip communication signal fault diagnosis technologies mainly include statistical characteristic-based methods, model-based methods, and traditional signal processing methods. Statistical characteristic-based methods determine faults by analyzing parameters such as signal mean and variance, but they are not sensitive enough to weak fault features and are prone to missed detections. In advanced process high-speed chips such as 2nm / 3nm, the blurred boundary between chip process deviations and weak faults is a challenge for weak fault diagnosis. This is due to the coupling of parameter shifts and the static nature of threshold determination. This results in low accuracy of weak fault diagnosis, making it difficult to meet the real-time and accurate fault diagnosis requirements of high-speed chips. Summary of the Invention

[0003] The purpose of this invention is to provide a chip communication signal fault diagnosis system and method based on artificial intelligence, so as to solve the problems raised in the prior art.

[0004] To achieve the above objectives, the present invention provides the following technical solution: a chip communication signal fault diagnosis method based on artificial intelligence, the method comprising the following steps: S1. Real-time acquisition of raw communication signals from the high-speed chip communication port, and simultaneous acquisition of chip operating parameters, using deep learning models to extract time-domain and frequency-domain features of the communication signals. S2. A dynamic threshold adjustment mechanism is set to dynamically adjust the dynamic threshold based on changes in the basic static threshold and operating conditions, and to analyze whether the chip has a weak fault based on the dynamic threshold. S3. Set up a process deviation verification mechanism to analyze whether the chip's offset amplification rate and the cross-condition fluctuation rate of chip performance exceed the threshold under different operating conditions, so as to perform secondary verification on chips that are initially judged to be suspected of process deviation. S4. Set a verification parameter threshold adjustment mechanism to adaptively adjust the offset amplification threshold and the cross-condition volatility threshold of chip performance.

[0005] Furthermore, in step S1: set the initial data acquisition window step size d0, and acquire the core characteristic parameters of the communication signal, including amplitude, jitter, eye diagram opening, EVM, and bit error rate, under standard operating conditions. The operating parameters designed for the standard operating conditions are: temperature T0, rated operating voltage V0, and load L0; for example, temperature T0 = 25℃, rated operating voltage V0 = 1V, and load L0 = 1%. Collect n core characteristic parameters of the communication signal continuously, use the min-max normalization algorithm to unify the data scale of each core characteristic parameter, and weight and fuse the core characteristic parameters to obtain n chip performance evaluation values. Take the average of the n chip performance evaluation values ​​as the chip performance evaluation benchmark value A0. Set the rated operating condition parameter range, for example, the temperature range is [T1, T2], and the voltage range is: The load range is [L1, L2]. A reinforcement learning-based automated testing framework for the manufacturing industry is used, such as an ATE (Automatic Test Equipment) device controlling an API system, to automatically traverse all operating conditions set within the rated operating range of the chip, and extract the maximum offset of the chip performance evaluation value under different operating conditions. For example, within the rated operating parameters, if temperature is set to level 2, voltage to level 2, and load to level 1, then the total number of operating conditions is k = 2 × 2 × 1 = 4. Using the ATE equipment control API, the chip automatically traverses all operating conditions and weights and fuses the collected core feature parameters to obtain four chip performance evaluation values ​​{0.71, 0.7, 0.72, 0.71}. These four chip performance evaluation values ​​are compared with the chip performance evaluation benchmark value A0 = 0.7 to obtain four offset values: 0.01, 0, 0.02, and 0.01. Comparing these four offset values, the maximum offset value is 0.02. In actual testing, for a large number of operating conditions, a reinforcement learning-based industrial automation testing framework can be used to control the chip to traverse all operating conditions and utilize an extreme value identification algorithm to obtain the maximum offset value. Based on the obtained performance evaluation benchmark value and maximum offset value, set the static base threshold for the chip performance evaluation value, and obtain the minimum value of the static base threshold: The maximum static basic threshold value is: .

[0006] Furthermore, in step S2: the threshold dynamic adjustment mechanism is used to obtain the static evaluation threshold of chip performance evaluation based on the obtained fusion parameter benchmark value and the maximum deviation value, and to set the operating condition influence coefficient to dynamically adjust the threshold, thereby obtaining the dynamic evaluation threshold of chip performance, and to compare and analyze the real-time obtained chip performance evaluation value with the dynamic evaluation threshold to make a preliminary judgment of weak faults.

[0007] Furthermore, the temperature deviation ∆T, operating voltage deviation ∆V, and load difference ∆L between the actual operating conditions and the standard operating conditions are collected; the operating condition influence coefficient is calculated according to the following formula: ; Where φ represents the influence coefficient based on the chip's operating conditions; This indicates the weight of the influence coefficient of the temperature deviation value on the operating condition. This indicates the weight of the influence coefficient of the operating voltage deviation on the operating condition. This indicates the weight of the load deviation value on the operating condition influence coefficient; This indicates the set unit temperature deviation value; This indicates the set unit temperature deviation value; This indicates the set unit temperature deviation value; Set the dynamic threshold range under the influence of operating conditions: Among them, C min This represents the minimum dynamic threshold value that is adjusted in real time based on the chip's operating conditions. C max This indicates the maximum dynamic threshold value that is adjusted in real time based on the chip's operating conditions. ; The chip's performance evaluation value A is monitored in real time. The actual performance evaluation value is compared and analyzed with the acquired real-time dynamic threshold to determine whether the chip has any minor faults. If A>C max Or A <C min If the actual performance evaluation value of the chip exceeds the dynamic threshold range, it is directly judged that the chip has a weak fault. like If the chip performance evaluation value is within the dynamic threshold range, then the deviation in the chip is initially judged as a suspected process deviation. By setting a dynamic threshold adjustment mechanism to dynamically adjust the chip performance evaluation threshold according to changes in operating conditions, the boundary between high-speed chip process deviations and weak faults can be accurately distinguished, achieving the effect of accurately identifying whether a chip has weak faults. However, in actual chip operation, the subtle abnormal characteristics of weak faults often exist in the form of deviations that do not exceed the threshold, but show abnormal dynamic trends with changes in operating conditions. Therefore, simply comparing and analyzing with the threshold cannot capture the dynamic characteristics of operating conditions that show weak faults even though the parameters do not exceed the threshold. This leads to the easy omission of weak faults by comparing and analyzing with the threshold alone. Therefore, the present invention will conduct a secondary verification of process deviations.

[0008] Furthermore, in step S3: the process deviation verification mechanism is used to verify the process deviation of chips that are initially identified as having suspected process deviations. It collects the chip performance evaluation values ​​under different operating conditions and the difference between the operating condition influence coefficients of different operating conditions, and analyzes the actual offset amplification rate and cross-operating condition parameter fluctuation rate under different operating conditions, thereby performing secondary verification on whether the chip has a weak fault.

[0009] Furthermore, m different operating conditions are set up to collect chip performance evaluation values, and the actual collected chip performance evaluation values ​​are denoted as {A1, A2, ..., A...}. m}, and denot the influence coefficients of the actual working conditions for the set m working conditions as Then analyze the offset amplification rate under different operating conditions: ; where α j This represents the offset amplification factor of number j, which is the chip performance evaluation value A between operating condition i+1 and operating condition i. i+1 With A i The offset amplification rate; j represents the offset amplification rate number, j=1,2,...,m-1; i represents the set operating condition number, i=1,2,...,m; By comparing and analyzing the actual collected chip performance evaluation values, the maximum value among the m chip performance evaluation values ​​is obtained. and minimum value The cross-condition volatility of chip performance is calculated using the following formula: Where β represents the cross-condition volatility of chip performance; the offset of weak faults amplifies with changes in operating conditions, while the offset of process deviations is a static inherent characteristic under all operating conditions, with no abnormal dynamic trend; and the offset of process deviations remains stable throughout the cross-condition switching, with extremely low volatility; while the offset of weak faults will fluctuate irregularly and significantly due to the switching of operating conditions. Therefore, by setting two verification cashiers in the secondary verification process, the core characteristics of weak faults and process deviations can be accurately distinguished, solving the difficulty of the fuzzy boundary when distinguishing between weak faults and process deviations. Set the offset magnification threshold Cross-condition volatility threshold of chip performance The real-time acquired offset amplification rate and cross-operating condition amplification rate were compared and analyzed with the set threshold. Chips initially identified as having suspected process deviations were then subjected to secondary verification. The verification results are as follows: like or If the offset amplification rate or the cross-condition volatility of chip performance exceeds the threshold, it indicates that the chip has a weak fault. like and If the offset amplification rate or the cross-condition fluctuation rate of chip performance are both within the threshold range, then it is finally determined that the chip has a process deviation. By analyzing the actual offset amplification rate and cross-condition parameter fluctuation rate under different operating conditions, the chips initially judged to be process deviations are subjected to secondary verification, and the chip performance is further tested. This improves the accuracy of distinguishing between weak faults and process deviations in chips, greatly reduces the false detection rate, and avoids the situation where process deviation chips are mistakenly judged as unqualified products.

[0010] Furthermore, in step S4: the verification parameter threshold adjustment mechanism is used to dynamically adjust the offset amplification rate threshold and the cross-condition volatility threshold of chip performance based on the actual data changes of the newly acquired chip performance evaluation values ​​during chip operation.

[0011] Furthermore, obtain the average value of the actual collected chip performance evaluation values. Average influence coefficient of actual working conditions The offset amplification rate is dynamically adjusted based on the difference between the mean and the benchmark value of the chip performance evaluation. ;in, This indicates the adjusted offset amplification rate; the cross-condition volatility threshold of chip performance is dynamically adjusted based on the difference between the mean and benchmark values ​​of chip performance evaluation. ;in, This represents the cross-condition volatility threshold for adjusted chip performance; e represents the natural constant.

[0012] An artificial intelligence-based chip communication signal fault diagnosis system includes a signal data acquisition module, a threshold dynamic adjustment module, a process deviation verification module, and a verification parameter threshold adaptive adjustment module. The signal data acquisition module is used to acquire the raw communication signals of the high-speed chip communication port in real time, and at the same time acquire the chip's operating condition parameters, and use a deep learning model to extract the time domain feature data and frequency domain feature data of the communication signal. The threshold dynamic adjustment module is used to set a threshold dynamic adjustment mechanism to dynamically adjust the dynamic threshold according to the changes in the basic static threshold and operating conditions, and to analyze whether the chip has a weak fault based on the dynamic threshold. The process deviation verification module is used to set up a process deviation verification mechanism to analyze whether the offset amplification rate and cross-condition fluctuation rate of chip performance exceed the threshold under different operating conditions, so as to perform secondary verification on chips that are initially judged to have suspected process deviations. The verification parameter threshold adaptive adjustment module is used to dynamically adjust the offset amplification rate threshold and the cross-condition volatility threshold of chip performance based on the actual data changes of the newly acquired chip performance evaluation values ​​during chip operation.

[0013] Compared with the prior art, the beneficial effects of the present invention are: This invention employs a dynamic threshold adjustment mechanism to adjust chip performance evaluation thresholds according to changing operating conditions. By comparing and analyzing actual chip performance evaluation values ​​with the thresholds, it distinguishes between process deviations and minor faults in high-speed chips, achieving accurate identification of whether a chip has a minor fault. However, simply comparing with the threshold cannot capture the dynamic characteristics of operating conditions where parameters do not exceed the threshold but already exhibit minor faults, thus easily leading to missed detections of minor faults. Therefore, this invention incorporates a process deviation verification mechanism. By analyzing the actual offset amplification rate and cross-condition parameter fluctuation rate under different operating conditions, it performs secondary verification on chips initially identified as having process deviations, determining the offset of minor faults. The deviation of process deviation is a static and inherent characteristic under all operating conditions, with no abnormal dynamic trend. Moreover, the deviation of process deviation remains stable throughout the switching between operating conditions, with extremely low volatility. However, the deviation of weak faults will fluctuate significantly and irregularly due to the switching of operating conditions. Therefore, the two verification parameters set in the secondary verification process can accurately distinguish the core characteristics of weak faults and process deviations, solving the difficulty of the blurred boundary when distinguishing between weak faults and process deviations. Further testing of chip performance improves the accuracy of distinguishing between weak faults and process deviations of the chip, greatly reduces the false detection rate, and avoids the situation where chips with process deviations are mistakenly judged as unqualified products. Attached Figure Description

[0014] Figure 1 This is a schematic diagram of the structure of a chip communication signal fault diagnosis method based on artificial intelligence according to the present invention. Detailed Implementation

[0015] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0016] like Figure 1 As shown, the present invention provides a technical solution, a chip communication signal fault diagnosis method based on artificial intelligence, the method comprising the following steps: S1. Real-time acquisition of raw communication signals from the high-speed chip communication port, and simultaneous acquisition of chip operating parameters, using deep learning models to extract time-domain and frequency-domain features of the communication signals. S2. A dynamic threshold adjustment mechanism is set to dynamically adjust the dynamic threshold based on changes in the basic static threshold and operating conditions, and to analyze whether the chip has a weak fault based on the dynamic threshold. S3. Set up a process deviation verification mechanism to analyze whether the chip's offset amplification rate and the cross-condition fluctuation rate of chip performance exceed the threshold under different operating conditions, so as to perform secondary verification on chips that are initially judged to be suspected of process deviation. S4. Set a verification parameter threshold adjustment mechanism to adaptively adjust the offset amplification threshold and the cross-condition volatility threshold of chip performance.

[0017] In step S1: Set the initial data acquisition window step size d0, and acquire the core feature parameters of the communication signal, including amplitude, jitter, eye diagram opening, EVM, and bit error rate, under standard operating conditions. The operating parameters designed for the standard operating conditions are: temperature T0, rated operating voltage V0, and load L0. Collect n core feature parameters of the communication signal continuously, unify the data scale of each core feature parameter using the min-max normalization algorithm, and obtain n chip performance evaluation values ​​by weighted fusion of the core feature parameters. Take the average of the n chip performance evaluation values ​​as the chip performance evaluation benchmark value A0. Set the rated operating condition parameter range: temperature range is [T1, T2], voltage range is: The load range is [L1, L2]. Using an industrial automation testing framework, the rated operating range of the chip is traversed to extract the maximum offset of the chip performance evaluation values ​​under different operating conditions. ; Based on the obtained performance evaluation benchmark value and maximum offset value, set the static base threshold for the chip performance evaluation value, and obtain the minimum value of the static base threshold: The maximum static basic threshold value is: .

[0018] In step S2: The threshold dynamic adjustment mechanism is used to obtain the static evaluation threshold of chip performance evaluation based on the obtained fusion parameter benchmark value and the maximum deviation value, and to set the operating condition influence coefficient to dynamically adjust the threshold, thereby obtaining the dynamic evaluation threshold of chip performance. The real-time obtained chip performance evaluation value is compared and analyzed with the dynamic evaluation threshold to make a preliminary judgment of weak faults.

[0019] Collect the temperature deviation ∆T, operating voltage deviation ∆V, and load difference ∆L between the actual operating conditions and the standard operating conditions; calculate the operating condition influence coefficient according to the following formula: ; Where φ represents the influence coefficient based on the chip's operating conditions; This indicates the weight of the influence coefficient of the temperature deviation value on the operating condition. This indicates the weight of the influence coefficient of the operating voltage deviation on the operating condition. This indicates the weight of the load deviation value on the operating condition influence coefficient; This indicates the set unit temperature deviation value; This indicates the set unit temperature deviation value; This indicates the set unit temperature deviation value; Set the dynamic threshold range under the influence of operating conditions: Among them, C min This represents the minimum dynamic threshold value that is adjusted in real time based on the chip's operating conditions. C max This indicates the maximum dynamic threshold value that is adjusted in real time based on the chip's operating conditions. ; The chip's performance evaluation value A is monitored in real time. The actual performance evaluation value is compared and analyzed with the acquired real-time dynamic threshold to determine whether the chip has any minor faults. If A>C max Or A <C min If the actual performance evaluation value of the chip exceeds the dynamic threshold range, it is directly judged that the chip has a weak fault. like If the chip performance evaluation value is within the dynamic threshold range, then the deviation in the chip is initially identified as a suspected process deviation.

[0020] In step S3: The process deviation verification mechanism is used to verify the process deviation of chips that are initially identified as suspected process deviations. The chip performance evaluation values ​​under different operating conditions and the difference between the operating condition influence coefficients of different operating conditions are collected again to analyze the actual offset amplification rate and cross-operating condition parameter fluctuation rate under different operating conditions, thereby performing secondary verification on whether the chip has a weak fault.

[0021] Set up m different operating conditions to collect chip performance evaluation values, and record the actual collected chip performance evaluation values ​​as {A1, A2, ..., A...} m}, and denot the influence coefficients of the actual working conditions for the set m working conditions as Then analyze the offset amplification rate under different operating conditions: ; where α j This indicates the offset magnification factor labeled j; j represents the offset magnification factor number, j=1, 2, ..., m-1; i represents the set operating condition number, i=1, 2, ..., m; By comparing and analyzing the actual collected chip performance evaluation values, the maximum value among the m chip performance evaluation values ​​is obtained. and minimum value The cross-condition volatility of chip performance is calculated using the following formula: Where β represents the cross-condition volatility of chip performance; Set the offset magnification threshold Cross-condition volatility threshold of chip performance The real-time acquired offset amplification rate and cross-operating condition amplification rate were compared and analyzed with the set threshold. Chips initially identified as having suspected process deviations were then subjected to secondary verification. The verification results are as follows: like or If the offset amplification rate or the cross-condition volatility of chip performance exceeds the threshold, it indicates that the chip has a weak fault. like and This indicates that the offset amplification rate or the cross-condition volatility of chip performance is within the threshold range, and the chip is ultimately determined to have a process deviation.

[0022] In step S4: Obtain the average value of the actual collected chip performance evaluation values. Average influence coefficient of actual working conditions The offset amplification rate is dynamically adjusted based on the difference between the mean and the benchmark value of the chip performance evaluation. ;in, This indicates the adjusted offset amplification rate; the cross-condition volatility threshold of chip performance is dynamically adjusted based on the difference between the mean and benchmark values ​​of chip performance evaluation. ;in, This represents the cross-condition volatility threshold for adjusted chip performance; e represents the natural constant.

[0023] An artificial intelligence-based chip communication signal fault diagnosis system includes a signal data acquisition module, a threshold dynamic adjustment module, a process deviation verification module, and a verification parameter threshold adaptive adjustment module. The signal data acquisition module is used to acquire the raw communication signals of the high-speed chip communication port in real time, and at the same time acquire the chip's operating condition parameters. It uses a deep learning model to extract the time-domain feature data and frequency-domain features of the communication signals. The threshold dynamic adjustment module is used to set the threshold dynamic adjustment mechanism to dynamically adjust the dynamic threshold according to the changes in the basic static threshold and operating conditions, and to analyze whether the chip has a weak fault based on the dynamic threshold. The process deviation verification module is used to set up a process deviation verification mechanism to analyze whether the chip's offset amplification rate and cross-condition fluctuation rate of chip performance exceed the threshold under different operating conditions, thereby performing secondary verification on chips that are initially judged to have suspected process deviations. The verification parameter threshold adaptive adjustment module is used to dynamically adjust the offset amplification threshold and the cross-condition volatility threshold of chip performance based on the actual data changes of the newly acquired chip performance evaluation values ​​during chip operation.

[0024] Example 1: In step S1: Set the initial data acquisition window step size d0, and acquire the core feature parameters of the communication signal, including amplitude, jitter, eye diagram opening, EVM, and bit error rate, under standard operating conditions. The operating parameters designed for the standard operating conditions are: temperature T0, rated operating voltage V0, and load L0. Collect n core feature parameters of the communication signal continuously, use the min-max normalization algorithm to unify the data scale of each core feature parameter, and weight and fuse the core feature parameters to obtain n chip performance evaluation values. Take the average of the n chip performance evaluation values ​​as the chip performance evaluation benchmark value A0. Set the rated operating condition parameter range: temperature range is [T1, T2], voltage range is: The load range is [L1, L2]. Using an industrial automation testing framework such as the ATE control API, the rated operating range of the chip is traversed to extract the maximum offset of the chip performance evaluation value under different operating conditions. ; Based on the obtained performance evaluation benchmark value and maximum offset value, set the static base threshold for the chip performance evaluation value, and obtain the minimum value of the static base threshold: The maximum static basic threshold value is: ; Temperature T0 = 25℃; Rated operating voltage V0 = 1V and load L0 = 1%; A0 = 0.7; ∆A max =0.1; B min =0.6; B max =0.7; In step S2: Collect the temperature deviation ∆T, operating voltage deviation ∆V, and load difference ∆L between the actual operating conditions and the standard operating conditions; calculate the operating condition influence coefficient according to the following formula: ; Where φ represents the influence coefficient based on the chip's operating conditions; This indicates the weight of the influence coefficient of the temperature deviation value on the operating condition. This indicates the weight of the influence coefficient of the operating voltage deviation on the operating condition. This indicates the weight of the load deviation value on the operating condition influence coefficient; This indicates the set unit temperature deviation value; This indicates the set unit temperature deviation value; This indicates the set unit temperature deviation value; Set the dynamic threshold range under the influence of operating conditions: Among them, C min This represents the minimum dynamic threshold value that is adjusted in real time based on the chip's operating conditions. C max This indicates the maximum dynamic threshold value that is adjusted in real time based on the chip's operating conditions. ; The chip's performance evaluation value A is monitored in real time. The actual performance evaluation value is compared and analyzed with the acquired real-time dynamic threshold to determine whether the chip has any minor faults. If A>C max Or A <C min If the actual performance evaluation value of the chip exceeds the dynamic threshold range, it is directly judged that the chip has a weak fault. like If the chip performance evaluation value is within the dynamic threshold range, then the deviation in the chip is initially judged as a suspected process deviation. The following values ​​were collected: A=0.7; temperature deviation ∆T=1℃; operating voltage deviation ∆V=0.001V; and load difference ∆L=1%; ∆T0=10℃; ∆V0=0.01V; ∆L0=10%; γ T =0.3; γ V =0.3; γ L =0.4; φ=1.1; C min =0.66; C max =0.77; then C min ≤A≤C max If the chip performance evaluation value is within the dynamic threshold range, then the deviation in the chip is initially identified as a suspected process deviation.

[0025] In step S3: Set m different operating conditions to collect chip performance evaluation values, and record the actual collected chip performance evaluation values ​​as {A1, A2, ..., A...} m}, and denot the influence coefficients of the actual working conditions for the set m working conditions as Then analyze the offset amplification rate under different operating conditions: ; where α j This indicates the offset magnification factor labeled j; j represents the offset magnification factor number, j=1, 2, ..., m-1; i represents the set operating condition number, i=1, 2, ..., m; Get the maximum value among m chip performance evaluation values and minimum value The cross-condition volatility of chip performance is calculated using the following formula: Where β represents the cross-condition volatility of chip performance; Set the offset magnification threshold Cross-condition volatility threshold of chip performance The real-time acquired offset amplification rate and cross-operating condition amplification rate were compared and analyzed with the set threshold. Chips initially identified as having suspected process deviations were then subjected to secondary verification. The verification results are as follows: like or If the offset amplification rate or the cross-condition volatility of chip performance exceeds the threshold, it indicates that the chip has a weak fault. like and If the offset amplification rate or the cross-condition fluctuation rate of chip performance is within the threshold range, then it is finally determined that the chip has a process deviation.

[0026] In step S4: Obtain the average value of the actual collected chip performance evaluation values. Average influence coefficient of actual working conditions The offset amplification rate is dynamically adjusted based on the difference between the mean and the benchmark value of the chip performance evaluation. ;in, This indicates the adjusted offset amplification rate; the cross-condition volatility threshold of chip performance is dynamically adjusted based on the difference between the mean and benchmark values ​​of chip performance evaluation. ;in, This represents the cross-condition volatility threshold for adjusted chip performance; e represents the natural constant.

[0027] Three different operating conditions were set to collect chip performance evaluation values. The actual collected chip performance evaluation values ​​were denoted as {0.7, 0.71, 0.7}, and the influence coefficients of the actual operating conditions were denoted as {1.1, 1.2, 1.3}; α1=0.01; α2=-0.01; β=0.014; the offset amplification threshold α0=0.3 was set; the cross-operating condition volatility threshold for chip performance β0=0.2; α 01 =0.317; β 01=0.3; then α1≤α0, α2≤α0, and β≤β0, which means that the offset amplification rate or the cross-condition fluctuation rate of chip performance are both within the threshold range, and the chip is finally determined to have a process deviation.

[0028] It will be apparent to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of the invention is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within the present invention. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A chip communication signal fault diagnosis method based on artificial intelligence, characterized in that: The method includes the following steps: S1. Real-time acquisition of raw communication signals from the high-speed chip communication port, and simultaneous acquisition of chip operating parameters, using deep learning models to extract time-domain and frequency-domain features of the communication signals. S2. A dynamic threshold adjustment mechanism is set to dynamically adjust the dynamic threshold based on changes in the basic static threshold and operating conditions, and to analyze whether the chip has a weak fault based on the dynamic threshold. S3. Set up a process deviation verification mechanism to analyze whether the chip's offset amplification rate and the cross-condition fluctuation rate of chip performance exceed the threshold under different operating conditions, so as to perform secondary verification on chips that are initially judged to be suspected of process deviation. S4. Set a verification parameter threshold adjustment mechanism to adaptively adjust the offset amplification threshold and the cross-condition volatility threshold of chip performance.

2. The chip communication signal fault diagnosis method based on artificial intelligence according to claim 1, characterized in that: In step S1: Under standard operating conditions, core characteristic parameters of the communication signal, including amplitude, jitter, eye diagram opening, EVM, and bit error rate, are collected. The operating parameters under standard operating conditions are: temperature T0, rated operating voltage V0, and load L0. n core characteristic parameters of the communication signal are collected continuously. The data scale of each core characteristic parameter is unified by the min-max normalization algorithm. The core characteristic parameters are weighted and fused to obtain n chip performance evaluation values. The average of the n chip performance evaluation values ​​is taken as the chip performance evaluation benchmark value A0. Set rated operating conditions and use an industrial automation testing framework to traverse the rated operating condition range of the chip, extracting the maximum offset of the chip performance evaluation value under different operating conditions. Based on the obtained performance evaluation benchmark value and maximum offset value, set the static base threshold for the chip performance evaluation value, and obtain the minimum static base threshold value as follows: The maximum static basic threshold value is: .

3. The chip communication signal fault diagnosis method based on artificial intelligence according to claim 1, characterized in that: In step S2: the threshold dynamic adjustment mechanism is used to obtain the static evaluation threshold of chip performance evaluation based on the obtained fusion parameter benchmark value and the maximum deviation value, and to set the operating condition influence coefficient to dynamically adjust the threshold, thereby obtaining the dynamic evaluation threshold of chip performance, and to compare and analyze the real-time obtained chip performance evaluation value with the dynamic evaluation threshold to make a preliminary judgment of weak faults.

4. The chip communication signal fault diagnosis method based on artificial intelligence according to claim 3, characterized in that: Collect the temperature deviation ∆T, operating voltage deviation ∆V, and load difference ∆L between the actual operating conditions and the standard operating conditions; set the unit temperature deviation value. Unit voltage deviation value and unit load deviation value And set corresponding influence weights for different operating condition parameters; and obtain the chip's operating condition influence coefficient φ by weighted fusion of the influence of operating condition parameters; Set the dynamic threshold range under the influence of operating conditions: Among them, C min This represents the minimum dynamic threshold value that is adjusted in real time based on the chip's operating conditions. C max This indicates the maximum dynamic threshold value that is adjusted in real time based on the chip's operating conditions. ; The chip's performance evaluation value A is monitored in real time. The actual performance evaluation value is compared and analyzed with the acquired real-time dynamic threshold to determine whether the chip has any minor faults. If A>C max Or A <C min If the actual performance evaluation value of the chip exceeds the dynamic threshold range, it is directly judged that the chip has a weak fault. like If the chip performance evaluation value is within the dynamic threshold range, then the deviation in the chip is initially identified as a suspected process deviation.

5. The chip communication signal fault diagnosis method based on artificial intelligence according to claim 1, characterized in that: In step S3: The process deviation verification mechanism is used to verify the process deviation of chips that are initially identified as suspected process deviations. The chip performance evaluation values ​​under different operating conditions and the difference between the operating condition influence coefficients of different operating conditions are collected again to analyze the actual offset amplification rate and cross-operating condition parameter fluctuation rate under different operating conditions, thereby performing secondary verification on whether the chip has a weak fault.

6. The chip communication signal fault diagnosis method based on artificial intelligence according to claim 5, characterized in that: Set up m different operating conditions to collect chip performance evaluation values, and record the actual collected chip performance evaluation values ​​as {A1, A2, ..., A...} m }, and denot the influence coefficients of the actual working conditions for the set m working conditions as Then analyze the offset amplification rate under different operating conditions: ; where α j This indicates the offset magnification factor labeled j; j represents the offset magnification factor number, j=1, 2, ..., m-1; i represents the set operating condition number, i=1, 2, ..., m; By comparing and analyzing the actual collected chip performance evaluation values, the maximum value among the m chip performance evaluation values ​​is obtained. and minimum value Divide the difference between the maximum and minimum values ​​by the chip performance benchmark under standard operating conditions to obtain the cross-condition volatility β of the chip performance; Set the offset magnification threshold Cross-condition volatility threshold of chip performance The real-time acquired offset amplification rate and cross-operating condition amplification rate were compared and analyzed with the set threshold. Chips initially identified as having suspected process deviations were then subjected to secondary verification. The verification results are as follows: like or If the offset amplification rate or the cross-condition volatility of chip performance exceeds the threshold, it indicates that the chip has a weak fault. like and If the offset amplification rate or the cross-condition fluctuation rate of chip performance is within the threshold range, then it is finally determined that the chip has a process deviation.

7. The chip communication signal fault diagnosis method based on artificial intelligence according to claim 1, characterized in that: In step S4: the verification parameter threshold adjustment mechanism is used to dynamically adjust the offset amplification rate threshold and the cross-condition volatility threshold of chip performance based on the actual data changes of the newly acquired chip performance evaluation values ​​during chip operation.

8. The chip communication signal fault diagnosis method based on artificial intelligence according to claim 7, characterized in that: Obtain the average of the actual collected chip performance evaluation values. Average influence coefficient of actual working conditions The offset amplification rate is dynamically adjusted based on the difference between the mean and the benchmark value of the chip performance evaluation. ;in, This indicates the adjusted offset amplification rate; the cross-condition volatility threshold of chip performance is dynamically adjusted based on the difference between the mean and benchmark values ​​of chip performance evaluation. ;in, This represents the cross-condition volatility threshold for adjusted chip performance; e represents the natural constant.

9. A chip communication signal fault diagnosis system based on artificial intelligence, applied to the chip communication signal fault diagnosis method based on artificial intelligence as described in any one of claims 1-8, characterized in that: The system includes a signal data acquisition module, a threshold dynamic adjustment module, a process deviation verification module, and a verification parameter threshold adaptive adjustment module; The signal data acquisition module is used to acquire the raw communication signals of the high-speed chip communication port in real time, and at the same time acquire the chip's operating condition parameters, and use a deep learning model to extract the time domain feature data and frequency domain feature data of the communication signal. The threshold dynamic adjustment module is used to set a threshold dynamic adjustment mechanism to dynamically adjust the dynamic threshold according to the changes in the basic static threshold and operating conditions, and to analyze whether the chip has a weak fault based on the dynamic threshold. The process deviation verification module is used to set up a process deviation verification mechanism to analyze whether the offset amplification rate and cross-condition fluctuation rate of chip performance exceed the threshold under different operating conditions, so as to perform secondary verification on chips that are initially judged to have suspected process deviations. The verification parameter threshold adaptive adjustment module is used to dynamically adjust the offset amplification rate threshold and the cross-condition volatility threshold of chip performance based on the actual data changes of the newly acquired chip performance evaluation values ​​during chip operation.

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