An excitation device, system, and application for controllable excitation waveforms in earthquake physics simulation.
By designing an excitation device that includes a communication module, a data storage chip, an FPGA chip, a digital-to-analog converter chip, and an ultrasonic transducer, the problems of uncontrollable excitation source wavelet morphology and long vibration duration in existing earthquake physics simulation experiments are solved, and the controllable change of excitation voltage and consistency analysis of experimental results are realized.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CHINA NAT PETROLEUM CORP
- Filing Date
- 2024-11-26
- Publication Date
- 2026-05-26
AI Technical Summary
In existing earthquake physics simulation experimental devices, the shape of the excitation source wavelet cannot be changed in a controllable manner, the ultrasonic vibration signal has a long vibration duration period, and the inherent vibration waveforms of different excitation probes vary greatly, resulting in inconsistent analysis of simulation experimental results.
An excitation device for controllable excitation waveforms in earthquake physics simulation is adopted, including a communication module, a data storage chip, an FPGA chip, a digital-to-analog converter chip, a voltage amplifier, a signal triggering module, and an ultrasonic transducer. The FPGA chip controls the digital-to-analog converter chip to output a specified voltage signal in real time, so as to realize the synchronous operation of the excitation device and the receiving device.
Controllable excitation of ultrasonic signals was achieved, with the excitation voltage range extended to ±200V and the signal synchronization error less than 0.1μs, ensuring the effective propagation of seismic wavelets in the model medium and the consistency of simulation experimental results.
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Figure CN122085346A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of artificial seismic exploration technology, specifically to the field of geophysical simulation research technology for seismic exploration forward modeling, and particularly to an excitation device, system, and application of a controllable excitation waveform for seismic physical simulation. Background Technology
[0002] In earthquake physics simulation experiments, ultrasonic simulation is generally used to simulate the excitation and reception of seismic waves in the field. To ensure that the simulation results match the actual field phenomena, the wavelength of the simulated earthquake in the field is reduced by several thousand to tens of thousands of times, based on the principles of geometric and physical similarity. Similarly, the frequency of the simulated seismic wave also needs to be increased by several thousand to tens of thousands of times according to the corresponding wavelength scaling ratio. Therefore, for the 5-100Hz seismic frequency band in the field, the 50kHz-1000kHz ultrasonic frequency band is generally used for ultrasonic simulation. For the simulated ultrasonic vibration signal, a square wave source excitation device is generally used. The square wave voltage signal is transmitted to the piezoelectric ceramic ultrasonic probe, and then the piezoelectric ceramic converts the square wave voltage signal into the corresponding seismic wavelet signal.
[0003] The excitation waveform of existing experimental setups is mainly determined by the physical properties of the ultrasonic excitation probe. When the piezoelectric ceramic inside the excitation probe has poor performance, the excited ultrasonic vibration signal will have a long vibration duration period, which cannot meet the simulation requirements of wavelet simulation experiments of pulse source in the field. At the same time, the inherent vibration waveforms of different excitation probes vary greatly, making it impossible to ensure that the results of different simulation experiments can be compared and analyzed in a unified manner.
[0004] To address the problems existing in current earthquake physics simulation experiments, researchers have attempted to change the excitation voltage pattern to alter the resulting ultrasonic vibration pattern. While existing signal generators can output different voltage waveforms, they require software to transmit the specified waveform to the generator in real-time. Earthquake physics simulation experiments, however, require the exciter to operate without external software control while simultaneously generating voltage signals according to a specified pattern. To address this, in 2010, Cao Xudong et al. proposed a "Controllable Earthquake Source for Geophysical Simulation Based on SOPC Technology" to meet the needs of earthquake physics simulation experiments. This design, based on a dedicated chip with an SOPC core, created a controllable earthquake physics simulation source that can convert input digital waveforms into real physical voltage signals for output. This experimental device offers significant technical advantages in controlling the excitation wavelet pattern. Summary of the Invention
[0005] To address the technical challenge of uncontrollably changing the waveform of the excitation source in existing earthquake physics simulation experimental devices, overcome the limitations of the excitation probe performance on existing ultrasonic source signals, and meet the experimental requirements of effectively simulating field pulse source wavelets due to the long vibration duration of the excitation wavelet signal, this invention also solves the problem of inconsistent analysis of simulation experimental results due to significant differences in the inherent vibration waveforms of different excitation probes, further enriching the technical approach and increasing the selection space. This invention provides an excitation device, system, and application for controllable excitation waveforms in earthquake physics simulation.
[0006] In a first aspect, embodiments of the present invention provide an excitation device for a controllable excitation waveform in earthquake physics simulation. The device may include: a communication module, a data storage chip, an FPGA chip, a digital-to-analog converter chip, a voltage amplifier, a signal triggering module, a signal output module, and an ultrasonic transducer.
[0007] The communication module is used to communicate with a computer device to sequentially store the discrete array data corresponding to the discrete waveform curve edited on the computer device into the data storage chip;
[0008] The FPGA chip is used to read and store the discrete array data from the data storage chip, and to send the discrete array data to the digital-to-analog converter chip in real time based on the trigger command issued by the signal triggering module;
[0009] The digital-to-analog converter chip converts the digital signals in the discrete array data into voltage signals in real time, and after being amplified by the voltage amplifier, the signals are output to the ultrasonic transducer.
[0010] The ultrasonic transducer generates a seismic wavelet signal in real time based on the amplified voltage signal.
[0011] In one embodiment, the signal triggering module may include: an external signal triggering module and / or an internal signal triggering module;
[0012] The external signal triggering module is used to receive external triggering instructions and send the discrete array data to the digital-to-analog converter chip in real time based on the external triggering instructions;
[0013] The internal signal triggering module is used to generate an internal triggering instruction based on the clock timer inside the excitation device. The FPGA chip sends the discrete array data to the digital-to-analog converter chip in real time based on the internal triggering instruction; and sends the internal triggering instruction to the earthquake physical simulation receiving device.
[0014] In one embodiment, the external trigger command and / or the internal trigger command is a spike pulse signal of 1V or higher.
[0015] In one embodiment, when the signal triggering module includes the external signal triggering module and the internal signal triggering module, the excitation device may further include: a first connector and a second connector;
[0016] The first connector is connected to the external signal triggering module, and the first connector is used to connect an external triggering device;
[0017] The second connector is connected to the internal signal triggering module and is used to connect an external earthquake physics simulation receiving device.
[0018] In one embodiment, the communication module may include: a USB communication interface and a host computer communication module;
[0019] The USB communication interface is used to connect to the computer device via a USB data cable to realize data transmission between the excitation device and the computer device;
[0020] The computer device is equipped with host computer communication software that communicates with the host computer communication module. The host computer communication software is used to send discrete array data corresponding to the discrete waveform curve edited on the computer device to the excitation device, and to receive data uploaded from the data storage chip.
[0021] In one embodiment, the excitation device may further include: a power supply module, wherein the power supply module and the voltage amplifier are used to connect to an external AC power source;
[0022] The power supply module is electrically connected to the FPGA chip and the digital-to-analog converter chip, and is also electrically connected to the communication module. The power supply module is used to convert AC power into DC power to power the FPGA chip and the digital-to-analog converter chip, or to power the communication module. When powered on, the FPGA chip reads and stores the discrete array data from the data storage chip.
[0023] In one embodiment, the response time of the FPGA chip reading the data storage chip is no higher than 0.1 μs; the response time of the FPGA chip sending the discrete array data to the digital-to-analog converter chip is 0.01 μs.
[0024] The digital-to-analog converter chip has a response frequency of not less than 10M / s, a voltage data conversion accuracy of not less than 14 bits, and can output a maximum voltage of ±5V.
[0025] The voltage gain of the voltage amplifier is 32dB.
[0026] In a second aspect, embodiments of the present invention provide a controllable excitation waveform system for earthquake physics simulation, comprising: an earthquake physics simulation receiving device and an excitation device for the controllable excitation waveform for earthquake physics simulation as described in the first aspect; wherein, the earthquake physics simulation receiving device is used to receive the seismic wavelet signal generated by the excitation device in real time.
[0027] In one embodiment, the system may further include: an external triggering device;
[0028] When the excitation device is in an external signal triggered state, the external triggering device is electrically connected to the external signal triggering module of the excitation device and communicatively connected to the seismic physical simulation receiving device; the external triggering device is used to send external triggering commands to the FPGA chip of the excitation device and the seismic physical simulation receiving device respectively;
[0029] When the excitation device is in the internal signal triggering state, the seismic physics simulation receiving device is electrically connected to the internal signal triggering module of the excitation device. The internal signal triggering module generates an internal triggering command based on the clock timer inside the excitation device and sends the internal triggering command to the seismic physics simulation receiving device. The FPGA chip of the excitation device sends discrete array data to the digital-to-analog converter chip of the excitation device in real time based on the internal triggering command.
[0030] Thirdly, embodiments of the present invention provide an application of the excitation device for controllable excitation waveforms in earthquake physical simulation as described in the first aspect.
[0031] The beneficial effects of the above-described technical solutions provided in the embodiments of the present invention include at least the following:
[0032] This invention provides an excitation device, system, and application for a controllable excitation waveform in earthquake physics simulation. This device solves the technical problem of the inability to controllably change the waveform of the excitation source in existing earthquake physics simulation experimental devices. It also overcomes the limitations imposed by the performance of the excitation probe on existing ultrasonic source signals, and addresses the experimental requirement of effectively simulating field pulse source wavelets due to the long vibration duration of the excitation wavelet signal. Furthermore, it solves the problem of inconsistent analysis of simulation results due to significant differences in the inherent vibration waveforms of different excitation probes. Specifically, firstly, the ultrasonic signal excitation source can controllably generate a voltage signal of any specified shape within a vibration frequency of 2MHz, achieving controllable change in the vibration waveform of the ultrasonic excitation wavelet; secondly, it can achieve synchronous operation between the simulation excitation source and the ultrasonic simulation signal acquisition device, with a synchronization error within 0.1μs; thirdly, the controllable ultrasonic physics simulation excitation source can generate a voltage signal of ±200V, ensuring the effective propagation of the seismic wavelet in the model medium.
[0033] Furthermore, the excitation device for the controllable excitation waveform of earthquake physical simulation provided in the embodiments of the present invention has been modified and re-laid out with respect to the equipment circuit and components. The excitation device can achieve a signal acquisition synchronization error of less than 0.1μs between the excitation source and the receiving device, the maximum excitation voltage of the excitation source can reach ±200V, and ensure that discrete digital signals with frequencies from DC to 2MHz can achieve high-fidelity analog output.
[0034] Other features and advantages of the invention will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the invention. The objects and other advantages of the invention may be realized and obtained by means of the structures particularly pointed out in the written description and the accompanying drawings.
[0035] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. Attached Figure Description
[0036] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:
[0037] Figure 1 This is a schematic diagram of the excitation device structure for the controllable excitation waveform in earthquake physical simulation provided in an embodiment of the present invention;
[0038] Figure 2 This is a schematic diagram illustrating data transmission between the excitation device and the computer equipment provided in an embodiment of the present invention;
[0039] Figure 3 This is a schematic diagram of the excitation device provided in an embodiment of the present invention generating a seismic wavelet signal;
[0040] Figure 4 This is an example of the application of arbitrary waveform discrete curves provided in the embodiments of the present invention;
[0041] Figure 5 This is a schematic diagram of an arbitrary waveform discrete curve generated by a computer device provided in an embodiment of the present invention;
[0042] Figure 6 This is a schematic diagram of the controllable excitation waveform system for earthquake physical simulation provided in an embodiment of the present invention;
[0043] Among them, 1-excitation device for controllable excitation waveform of earthquake physical simulation; 2-computer equipment; 3-earthquake physical simulation receiving device; 4-external triggering device;
[0044] 11-Communication module; 12-Data storage chip; 13-FPGA chip; 14-Digital-to-analog converter chip; 15-Voltage amplifier; 16-Signal trigger module; 17-Signal output module; 18-Ultrasonic transducer; 19-First connector; 20-Second connector; 21-Power supply module;
[0045] 111 - USB communication interface; 112 - Host computer communication module;
[0046] 161 - External signal triggering module; 162 - Internal signal triggering module. Detailed Implementation
[0047] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
[0048] The inventors discovered, after practically using the earthquake physics simulation controllable source device designed under the "Development of a Geophysical Simulation Controllable Source Based on SOPC Technology" project, that, on the one hand, the voltage signal generated by the excitation source was out of sync with the receiving experimental device during actual earthquake physics simulation acquisition experiments, making effective analysis and processing of the acquired signal impossible; on the other hand, the maximum output voltage of this device was ±5V, while in earthquake physics simulation acquisition experiments, due to the large size of the laboratory three-dimensional geological model and the absorption and attenuation within the model, the excitation voltage of the excitation source needed to be above 100V, and the ±5V instrument excitation voltage could not meet the signal propagation requirements. In view of the above problems, this invention was proposed to provide an excitation device, system, and application for a controllable excitation waveform for earthquake physics simulation that overcomes or at least partially solves the above problems.
[0049] This invention provides an excitation device for controllable excitation waveforms in earthquake physics simulation, referring to... Figures 1-3As shown, the excitation device 1 may include: a communication module 11, a data storage chip 12, an FPGA chip 13, a digital-to-analog converter chip, a voltage amplifier 15, a signal triggering module 16, a signal output module 17, and an ultrasonic transducer 18. The communication module 11 is used to communicate with the computer device 2 to sequentially store the discrete array data corresponding to the discrete waveform curve edited on the computer device 2 into the data storage chip 12. The FPGA chip 13 is used to read and store the discrete array data from the data storage chip 12, and send the discrete array data to the digital-to-analog converter chip 14 in real time based on the triggering command issued by the signal triggering module 16. The digital-to-analog converter chip 14 converts the digital signal in the discrete array data into a voltage signal in real time, and outputs it to the ultrasonic transducer 18 after amplification by the voltage amplifier 15. The ultrasonic transducer 18 generates a seismic wavelet signal in real time based on the amplified voltage signal.
[0050] In this embodiment of the invention, the response time of the FPGA chip 13 to read data from the data storage chip 12 is no higher than 0.1 μs; the response time of the FPGA chip 13 to send discrete array data to the digital-to-analog converter chip 14 is 0.01 μs; the response frequency of the digital-to-analog converter chip 14 is no lower than 10 M / s, the voltage data conversion accuracy of the digital-to-analog converter chip 14 is no lower than 14 bits, the maximum output voltage of the digital-to-analog converter chip 14 is ±5V; and the voltage gain of the voltage amplifier 15 is 32dB (40 times amplification).
[0051] In this embodiment of the invention, the data storage chip 12 stores the waveform input from the computer device 2 into the signal excitation device. The internal storage data can be modified via host computer communication software. Once written, the stored data will not disappear when the excitation device 1 is powered off. The FPGA chip 13 in this embodiment is a digital integrated circuit with an internally editable structure. After being powered on, it can edit and store floating-point data of 14 bits or more, and the number of editable data points is no less than 10,000. When powered off, its internal storage data is cleared. Therefore, when the signal excitation device is powered on, the FPGA chip first reads the waveform data from the data storage chip, and then the FPGA chip continues to operate according to the read waveform. To ensure that the physical simulation excitation signal can output any waveform within 2MHz, the time response interval of the data stored internally by the FPGA chip is at least 0.1μs (corresponding to a signal sampling rate of 10M / S), and the corresponding signal recording duration of the FPGA chip 13 can reach more than 1000μs. Meanwhile, to ensure the real-time synchronous operation of the excitation signal, the internal clock response time of the FPGA chip 13 is required to be 0.01μs, ensuring that the FPGA chip 13 can send voltage signals to the digital-to-analog converter chip (D / A chip) in real time, with the signal delay error within 0.1μs.
[0052] The digital-to-analog converter chip 14 (D / A chip) in this embodiment of the invention is a high-precision, high-frequency digital-to-analog signal converter chip with a response frequency of over 10 M / s, a voltage data conversion accuracy of over 14 bits, and a maximum output voltage of ±5V. It can convert digital information sent by the FPGA chip into corresponding physical voltage signals in real time with high precision. When the FPGA chip is working, the D / A chip is controlled by the system's internal clock to synchronously generate voltage signals of corresponding values. When the FPGA chip has finished sending its internal data, the D / A chip stops generating voltage signals.
[0053] In this embodiment of the invention, voltage amplifier 15 is used to synchronously amplify the voltage signal within ±5V generated by the D / A chip. Because the conversion efficiency of the ultrasonic transducer 18 (excitation probe) voltage signal to ultrasonic vibration is low in earthquake physics simulation experiments, ultrasonic vibrations excited by low voltage signals cannot effectively penetrate a laboratory three-dimensional geological model thicker than 50cm. To ensure effective reception of ultrasonic signals in the simulation experiment, the excitation voltage signal of the excitation source needs to reach 100V-200V. To meet the experimental requirements of high excitation voltage, high-frequency excitation, and high signal fidelity for the physical model, a high-voltage amplifier chip is used. Voltage amplifier 15 amplifies the input signal by a fixed 40 times voltage, with a maximum output voltage of ±200V and a maximum output frequency bandwidth of 2MHz.
[0054] It should be noted that the computer device can edit any desired output waveform curve. For example, a discrete waveform curve with a time length of 1000μs can be discretely sampled at 0.1μs intervals to obtain a discrete array data of 10000 rows * 1 column. This discrete array data is stored internally in the computer in the form of a txt text file. It should also be noted that the signal output module 17 and the ultrasonic transducer 18 in this embodiment are connected via a connector (e.g., a BNC-Q9 connector). After the voltage amplifier 15 amplifies the weak voltage signal generated by the D / A chip in real time, the signal output module 17 can output the generated voltage signal to the ultrasonic transducer 18 in real time via the BNC-Q9 connector. In this embodiment, the excitation device 1 can generate a seismic wavelet signal through the above method. By editing the signal to change the excitation voltage mode, the corresponding source excitation wavelet mode can be changed accordingly.
[0055] The excitation device for controllable excitation waveforms in earthquake physics simulation provided in this embodiment of the invention solves the technical problem that the waveform of the excitation source in existing earthquake physics simulation experimental devices cannot be controllably changed, overcomes the limitation of existing ultrasonic source signals by the performance of the excitation probe, and addresses the experimental requirement that the long vibration duration of the excitation wavelet signal cannot effectively simulate the wavelet of a field pulse source. It also solves the problem of inconsistent analysis of different simulation experimental results due to significant differences in the inherent vibration waveforms of different excitation probes. Specifically, firstly, the ultrasonic signal excitation source can controllably generate a voltage signal of any specified shape within a vibration frequency of 2MHz, achieving controllable change of the vibration waveform of the ultrasonic excitation wavelet; secondly, it can achieve synchronous operation of the simulation excitation source and the ultrasonic simulation signal acquisition device, with a synchronization error within 0.1μs; thirdly, the controllable ultrasonic physics simulation excitation source can generate a voltage signal of ±200V, ensuring the effective propagation of the seismic wavelet in the model medium.
[0056] Furthermore, the excitation device for the controllable excitation waveform of earthquake physical simulation provided in the embodiments of the present invention has been modified and re-laid out with respect to the equipment circuit and components. The excitation device can achieve a signal acquisition synchronization error of less than 0.1μs between the excitation source and the receiving device, the maximum excitation voltage of the excitation source can reach ±200V, and ensure that discrete digital signals with frequencies from DC to 2MHz can achieve high-fidelity analog output.
[0057] In an optional embodiment, the seismic physics simulation experiment in this invention simulates a field seismic acquisition method. This requires moving the simulated excitation source and the seismic physics simulation receiving device to a designated location on a laboratory three-dimensional stratigraphic model before the simulation acquisition experiment can be conducted. Therefore, it is necessary to ensure that the excitation device and its matching seismic physics simulation receiving device in this embodiment meet the following two requirements: first, the operating status of the excitation device is externally controllable; second, the excitation device and the seismic physics simulation receiving device can operate synchronously. (Refer to...) Figure 1 and Figure 3 As shown, the signal triggering module 16 may include: an external signal triggering module 161 and / or an internal signal triggering module 162; the external signal triggering module 161 is used to receive an external triggering command and send discrete array data to the digital-to-analog converter chip 14 in real time based on the external triggering command; the internal signal triggering module 162 is used to generate an internal triggering command based on the clock timer inside the excitation device 1, and the FPGA chip 13 sends discrete array data to the digital-to-analog converter chip 14 in real time based on the internal triggering command; and sends the internal triggering command to the earthquake physical simulation receiving device 3.
[0058] For specific details, please refer to Figure 1As shown, with the signal triggering module 16 including an external signal triggering module 161 and an internal signal triggering module 162, the excitation device 1 may further include: a first connector 19 and a second connector 20; the first connector 19 is connected to the external signal triggering module 161 and is used to connect an external triggering device 4; the second connector 20 is connected to the internal signal triggering module 162 and is used to connect an external earthquake physical simulation receiving device 3. In this embodiment of the invention, the external triggering command and / or the internal triggering command is a spike pulse signal of 1V or higher.
[0059] In this embodiment of the invention, when selecting the function of the external signal trigger module 161, the excitation device 1 needs to be manually adjusted to the external signal trigger state. The external signal trigger module 161 is externally connected to a first connector (e.g., a BNC-Q9 connector), which is used to receive the trigger voltage signal from the external trigger device. The external signal trigger module 161 is connected to the FPGA chip 13. When it receives a spike signal above 1V, it can trigger the FPGA chip 13 to operate, using a rising edge signal for triggering. After the FPGA chip 13 finishes executing the stored data sequence, it stops working and waits for the next trigger from the external trigger source.
[0060] In this embodiment of the invention, when selecting the function of the internal signal triggering module 162, the excitation device 1 needs to be manually adjusted to the internal signal triggering state. The internal signal triggering module 162 generates an internal trigger command through the internal clock timer of the excitation device, and transmits a spike voltage signal of more than 1V to the FPGA chip at equal time intervals. After receiving the pulse trigger signal, the FPGA chip 13 begins to execute the internally stored data sequence. When all data execution is complete, the FPGA chip 13 stops working and waits for the next internal signal trigger. Similarly, the internal signal triggering module 162 is externally connected to a second connector (e.g., a BNC-Q9 connector), which simultaneously transmits a spike voltage signal of more than 1V to the seismic physics simulation receiving device when triggering the FPGA chip 13, for controlling the external seismic physics simulation receiving device to operate synchronously with the excitation device 1 in this embodiment of the invention.
[0061] In another alternative embodiment, refer to Figure 1 and Figure 2As shown, the communication module 11 may include: a USB communication interface 111 and a host computer communication module 112; the USB communication interface 111 is used to connect with the computer device 2 via a USB data cable to realize data transmission between the excitation device 1 and the computer device 2; the computer device 2 is equipped with host computer communication software that communicates with the host computer communication module 112, and the host computer communication software is used to send the discrete array data corresponding to the discrete waveform curve edited on the computer device 2 to the excitation device 1, and to receive data uploaded from the data storage chip 12.
[0062] In this embodiment of the invention, the USB communication interface 111 connects the excitation device 1 to the computer device 2 via a USB data cable, enabling data transmission between the computer device 2 and the excitation device 1. The computer device 2 is equipped with host computer communication software that communicates with the host computer communication module 112 on the excitation device 1. The excitation device 1 and the computer device 2 communicate through the host computer communication module 112 and the host computer communication software. This host computer communication software enables data communication and transmission between the computer device 2 and the excitation device 1. It can send discrete array data corresponding to the discrete waveform data edited on the computer device 2 to the data storage chip 12 inside the excitation device 1, and simultaneously upload data from the data storage chip 12 in the excitation device 1 to the computer device 2 for storage.
[0063] In another alternative embodiment, refer to Figure 1 and Figure 3 As shown, the excitation device 1 may further include: a power supply module 21, which and a voltage amplifier 15 are used to connect to an external AC power source; the power supply module 21 is electrically connected to the FPGA chip 13 and the digital-to-analog converter chip 14, and is also electrically connected to the communication module 11. The power supply module 21 is used to convert AC power to DC power to supply power to the FPGA chip 13 and the digital-to-analog converter chip 14, or to supply power to the communication module 11; the FPGA chip 13 reads and stores discrete array data from the data storage chip 12 when powered on.
[0064] In this embodiment of the invention, the voltage amplifier 15 is powered by 220V AC. When the excitation device 1 is powered on, the voltage amplifier 15 enters the working state. When the D / A chip has a voltage input, it can synchronously amplify the input voltage signal in real time. It should be noted that the power supply module 21 in this embodiment can be divided into two working modes. The first working mode is to convert AC to ±5V DC to power the communication module 11. In this way, the communication module 11 stores the discrete array data corresponding to the discrete waveform curve edited on the computer device into the data storage chip 12 in sequence. The second working mode is to power the FPGA chip 13 and the digital-to-analog converter chip 14 with ±5V DC. That is, after the power supply module 21 converts the external 220V AC to ±5V DC, it powers the FPGA chip 13 and the digital-to-analog converter chip 14, so that the FPGA chip 13 reads and stores the discrete array data from the data storage chip 12, and the digital-to-analog converter chip 14 performs real-time signal conversion. The purpose of dividing the power supply module 21 into two working modes in this embodiment is to prevent the communication module 11 from being unable to write data from the computer device to the data storage chip 12 when the FPGA chip 13 is powered on.
[0065] In a detailed embodiment, refer to Figure 2 and Figure 3As shown, the arbitrary waveform curve edited on the computer device is discretized and then input to the data storage chip inside the excitation device via a USB communication interface. The desired output arbitrary waveform curve has a duration of 1000μs. Discrete sampling at 0.1μs yields 10000 rows * 1 column of discrete data. With the computer device and communication module powered, the communication module stores this discrete data sequentially into the data storage chip (in this state, the excitation device's power supply module does not supply power to the FPGA chip). When the excitation device's power supply module is not supplying power to the communication module but is supplying power to the FPGA chip, the FPGA chip first reads the 10000 rows * 1 column discrete array data stored in the data storage chip, and then enters the working state. The excitation device selects either an external trigger mode or an internal trigger mode according to its operational needs. In the external trigger mode, the FPGA chip receives external trigger commands sent by an external triggering device; in the internal trigger mode, the excitation device receives internal trigger commands from the FPGA chip at fixed time intervals according to the set operating frequency. When the FPGA chip receives an external or internal trigger command, it sends 10,000 rows * 1 column of discrete array data to the D / A chip at 0.1μs intervals. After sending 10,000 data points, the FPGA chip enters a standby state, waiting for the next trigger. The D / A chip converts the received discrete array data into a voltage signal for output. The voltage amplifier converts the weak voltage signal (within ±5V) into a strong voltage signal (±200V) and outputs it to the signal output module. From there, the signal output module sends the signal to the ultrasonic transducer, where the strong voltage signal excites the ultrasonic probe to generate corresponding ultrasonic physical vibrations.
[0066] The excitation device for controllable excitation waveforms in earthquake physics simulation provided in this embodiment of the invention can solve the limitations of existing ultrasonic source signals due to the performance of the excitation probe, address the experimental requirements of effectively simulating field pulse source wavelets due to the long vibration duration period of the excitation wavelet signal, and simultaneously solve the problem of inconsistent analysis of different simulation experimental results due to significant differences in the inherent vibration waveforms of different excitation probes. It can achieve the following effects:
[0067] (1) For any waveform signal with a frequency within 2MHz and a duration of 1000μs, the device can convert the waveform into the corresponding voltage information for high-fidelity output. The output waveform has an error of less than 1% compared with the design waveform. It can simulate controllable vibration sources with a field vibration frequency of less than 200Hz and a vibration time of less than 10s at a ratio of 1:10000.
[0068] (2) The excitation device can output a controllable voltage signal in the range of -200V to +200V, which is 40 times higher than the previous signal range of -5V to +5V;
[0069] (3) When the excitation device is working, its output voltage is entirely controlled by hardware, and no external software is required to send waveform information in real time.
[0070] (4) The excitation device can achieve real-time synchronous operation with the earthquake physical simulation receiving device, and its signal synchronization error is ≤0.1μs.
[0071] In a specific example, refer to Figure 4 and Figure 5 As shown, Figure 4 This example demonstrates the application of a discrete curve of an arbitrary input waveform. The total length of the waveform is 1000 μs, but only the 0-200 μs portion is shown here. The input waveform must have an oscillation frequency within 2 MHz and a duration of 1000 μs. The waveform is discretized into a one-dimensional array file of 10,000 rows * 1 column at 0.1 μs time intervals. This data can then be stored in the data storage chip of the excitation device (the storage chip will convert the input discrete values into 14-bit wide data for storage).
[0072] Figure 5 It shows according to Figure 4 The input is an arbitrary discrete waveform curve, which represents the actual voltage waveform output by the excitation device under operating conditions. After editing a discrete waveform curve in the computer, the signal excitation device can achieve a high-fidelity simulation output of that waveform, with a maximum output voltage ranging from -200V to +200V and a signal duration of 1000μs.
[0073] Reference Figure 4 As shown, the waveform in this example is a minimum-phase seismic wavelet with a dominant frequency of approximately 60 kHz and a main signal duration of 30 μs. The wavelet amplitude varies within the range of -5V to +5V. This vibration curve is discretized into a 10,000-row * 1-column one-dimensional array file at 0.1 μs time intervals. This data is stored in a text file (txt) on the computer. When the excitation device is connected to the computer via a USB communication interface, the edited text file can be sent to the data storage chip inside the excitation device via the host computer communication software. The data storage chip stores 10,000 discrete data files sequentially, and this discrete data is converted to 14-bit width data for storage.
[0074] When the excitation device is powered on, the FPGA chip first reads 10,000 14-bit discrete data points stored in the data storage chip. After reading, the FPGA chip's internal memory area contains this discrete array information, and then the FPGA chip enters a standby state. The signal excitation device selects an external signal trigger mode according to operational needs. In this mode, when an external trigger signal arrives, it sends a square wave pulse trigger signal with a duration of 1μs and a vibration voltage of +5V to the FPGA chip in real time. When the FPGA chip receives the rising edge of the trigger signal, it begins sending 10,000 lines of discrete data to the D / A chip at 0.1µs intervals. After sending 10,000 data points, the FPGA chip enters a standby state, waiting for the next trigger. The D / A chip converts the data sent by the D / A chip into a voltage signal for output in real time. After passing through a voltage amplification module, the weak voltage signal is converted into a strong voltage signal of ±200V for output. (Appendix) Figure 5 The following is in accordance with the appendix Figure 4 The input is an arbitrary waveform discrete curve, and the output is the actual voltage waveform information of the signal excitation device under working conditions.
[0075] Based on the same inventive concept, this invention also provides a controllable excitation waveform system for earthquake physical simulation, referring to... Figure 6 As shown, the system may include: an earthquake physics simulation receiving device 3 and an excitation device 1 for the controllable excitation waveform of the earthquake physics simulation described above; wherein, the earthquake physics simulation receiving device 3 is used to receive the earthquake wavelet signal generated by the excitation device 1 in real time.
[0076] In another alternative embodiment, reference is also made to Figure 6 As shown, the system may further include: an external triggering device 4; when the excitation device 1 is in the external signal triggering state, the external triggering device 4 is electrically connected to the external signal triggering module 161 of the excitation device 1 and is communicatively connected to the seismic physics simulation receiving device 3; the external triggering device 4 is used to send external triggering commands to the FPGA chip 13 of the excitation device 1 and the seismic physics simulation receiving device 3 respectively; when the excitation device 1 is in the internal signal triggering state, the seismic physics simulation receiving device 3 is electrically connected to the internal signal triggering module 162 of the excitation device 1, the internal signal triggering module 162 generates an internal triggering command based on the clock timer inside the excitation device 1, and sends the internal triggering command to the seismic physics simulation receiving device 3; the FPGA chip 13 of the excitation device 1 sends discrete array data to the digital-to-analog converter chip 14 of the excitation device 1 in real time based on the internal triggering command.
[0077] Based on the same inventive concept, this embodiment of the invention also provides an application of the above-mentioned excitation device for controllable excitation waveforms in earthquake physical simulation.
[0078] The principle by which the above-described system and excitation device in the embodiments of the present invention solve the problem is similar to that of the aforementioned excitation device. Therefore, its implementation can refer to the implementation of the aforementioned excitation device, and repeated details will not be repeated.
[0079] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage and optical storage) containing computer-usable program code.
[0080] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0081] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0082] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0083] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.
Claims
1. An excitation device for controllable excitation waveforms in earthquake physical simulation, characterized in that, include: Communication module, data storage chip, FPGA chip, digital-to-analog converter chip, voltage amplifier, signal triggering module, signal output module, and ultrasonic transducer; The communication module is used to communicate with a computer device to sequentially store the discrete array data corresponding to the discrete waveform curve edited on the computer device into the data storage chip; The FPGA chip is used to read and store the discrete array data from the data storage chip, and to send the discrete array data to the digital-to-analog converter chip in real time based on the trigger command issued by the signal triggering module; The digital-to-analog converter chip converts the digital signals in the discrete array data into voltage signals in real time, and after being amplified by the voltage amplifier, the signals are output to the ultrasonic transducer. The ultrasonic transducer generates a seismic wavelet signal in real time based on the amplified voltage signal.
2. The excitation device according to claim 1, characterized in that, The signal triggering module includes: an external signal triggering module and / or an internal signal triggering module; The external signal triggering module is used to receive external triggering instructions and send the discrete array data to the digital-to-analog converter chip in real time based on the external triggering instructions; The internal signal triggering module is used to generate an internal triggering instruction based on the clock timer inside the excitation device. The FPGA chip sends the discrete array data to the digital-to-analog converter chip in real time based on the internal triggering instruction; and sends the internal triggering instruction to the earthquake physical simulation receiving device.
3. The excitation device according to claim 2, characterized in that, The external trigger command and / or the internal trigger command are sharp pulse signals of 1V or higher.
4. The excitation device according to claim 2, characterized in that, In the state where the signal triggering module includes the external signal triggering module and the internal signal triggering module, the excitation device further includes: a first connector and a second connector; The first connector is connected to the external signal triggering module, and the first connector is used to connect an external triggering device; The second connector is connected to the internal signal triggering module and is used to connect an external earthquake physics simulation receiving device.
5. The excitation device according to claim 1, characterized in that, The communication module includes: a USB communication interface and a host computer communication module; The USB communication interface is used to connect to the computer device via a USB data cable to realize data transmission between the excitation device and the computer device; The computer device is equipped with host computer communication software that communicates with the host computer communication module. The host computer communication software is used to send discrete array data corresponding to the discrete waveform curve edited on the computer device to the excitation device, and to receive data uploaded from the data storage chip.
6. The excitation device according to any one of claims 1 to 5, characterized in that, Also includes: A power supply module, wherein the power supply module and the voltage amplifier are used to connect to an external AC power source; The power supply module is electrically connected to the FPGA chip and the digital-to-analog converter chip, and is also electrically connected to the communication module. The power supply module is used to convert AC power into DC power to power the FPGA chip and the digital-to-analog converter chip, or to power the communication module. When powered on, the FPGA chip reads and stores the discrete array data from the data storage chip.
7. The excitation device according to any one of claims 1 to 5, characterized in that, The response time of the FPGA chip to read the data storage chip is no higher than 0.1 μs; the response time of the FPGA chip to send the discrete array data to the digital-to-analog converter chip is 0.01 μs. The digital-to-analog converter chip has a response frequency of not less than 10M / s, a voltage data conversion accuracy of not less than 14 bits, and can output a maximum voltage of ±5V. The voltage gain of the voltage amplifier is 32dB.
8. A controllable excitation waveform system for earthquake physical simulation, characterized in that, include: An earthquake physics simulation receiving device and an excitation device for a controllable excitation waveform of earthquake physics simulation according to any one of claims 1 to 7; wherein the earthquake physics simulation receiving device is used to receive the seismic wavelet signal generated by the excitation device in real time.
9. The system according to claim 8, characterized in that, The system also includes: an external triggering device; When the excitation device is in an external signal triggered state, the external triggering device is electrically connected to the external signal triggering module of the excitation device and communicatively connected to the seismic physical simulation receiving device; the external triggering device is used to send external triggering commands to the FPGA chip of the excitation device and the seismic physical simulation receiving device respectively; When the excitation device is in the internal signal triggering state, the seismic physics simulation receiving device is electrically connected to the internal signal triggering module of the excitation device. The internal signal triggering module generates an internal triggering command based on the clock timer inside the excitation device and sends the internal triggering command to the seismic physics simulation receiving device. The FPGA chip of the excitation device sends discrete array data to the digital-to-analog converter chip of the excitation device in real time based on the internal triggering command.
10. Application of an excitation device for a controllable excitation waveform for earthquake physical simulation as described in any one of claims 1 to 7.