A method for start-up self-checking of a three-phase voltage source converter

Abstract

The application relates to the technical field of power equipment self-checking, and discloses a start-up self-checking method of a three-phase voltage source converter, which comprises the following steps: step 1, disconnecting a direct-current switch and a three-phase alternating-current switch, closing a direct-current pre-charging switch, starting timing and periodically measuring a direct-current bus voltage, if the direct-current bus voltage reaches a set first threshold voltage within a set first threshold time, then entering step 2, otherwise jumping to step 5. The application adopts an optimized design of a power device self-checking process, sets the direct-current bus voltage to be lower than the voltage value during normal operation of the equipment, closes the direct-current switch and the three-phase alternating-current switch during the self-checking process, can effectively prevent the abnormal situation of power device short circuit caused by excessively high voltage during the self-checking process, protects the equipment from damage, compared with the self-checking scheme without setting the voltage limit in the prior art, effectively avoids the equipment damage problem caused by the self-checking, and improves the safety and reliability of the equipment.

Description

Technical Field

[0001] This invention relates to the field of power equipment self-testing technology, specifically a power-on self-testing method for a three-phase voltage source converter. Background Technology

[0002] DC-DC voltage source converters, as core equipment for power conversion, are widely used in new energy power generation, motor drives, uninterruptible power supplies, and other fields. The performance status of the core power devices directly determines the safety and reliability of the DC-DC voltage source converter. If the power devices have latent damage before the DC-DC voltage source converter is put into operation (such as minor short circuits or increased leakage current caused by transportation, static electricity, or aging), directly applying the normal operating voltage for startup can easily lead to catastrophic failures such as complete short circuits, overcurrent, or even tube explosions, causing equipment damage, safety hazards, and economic losses. Therefore, it is of great significance to conduct effective startup self-tests before the DC-DC voltage source converter is put into operation to detect potential power device faults in a timely manner.

[0003] In existing technologies, there has been some research and practice on the power-on self-test of DC voltage source converters. Some solutions focus on controlling the switching sequence of specific switching transistors and using existing voltage and current sensors in the inverter to detect the signal change patterns or response characteristics, thereby determining whether there are faults such as open circuits or short circuits in the power devices.

[0004] Most existing power-on self-test (POST) schemes share significant limitations and potential risks: When implementing the POST logic, they typically fail to actively limit the DC bus voltage to below normal operating voltage and do not shut down the DC switch and three-phase AC switch. This design presents a serious hidden danger: if the power device under test already has a hidden defect such as a short circuit or severe leakage, applying a high voltage during the POST process will instantly cause an extremely large current to flow through that defect point, making effective detection impossible. Furthermore, it can directly induce a complete breakdown and short circuit in the power device, uncontrolled discharge of the bus capacitor, and even a chain reaction that damages other critical components such as the drive circuit and sampling circuit.

[0005] Therefore, there is an urgent need for an optimized inverter self-test method that can actively set and maintain the DC bus voltage at a safe threshold significantly lower than the normal operating voltage of the equipment when executing the self-test logic, thereby shutting down the DC switch and the three-phase AC switch. This would prevent short-circuit faults in power devices caused by excessive voltage from being triggered or amplified at the source, ensuring the safety and reliability of the self-test process itself, and truly achieving the goal of protecting the equipment and improving reliability through self-test during startup. Summary of the Invention

[0006] This invention provides a power-on self-test method for a three-phase voltage source converter to solve the problems mentioned in the background art.

[0007] To achieve the above objectives, the present invention provides a power-on self-test method for a three-phase voltage source converter through the following technical solution, comprising:

[0008] Step 1: Disconnect the DC switch and the three-phase AC switch, close the DC pre-charge switch, start timing and periodically measure the DC bus voltage. If the DC bus voltage reaches the set first threshold voltage within the set first threshold time, proceed to Step 2; otherwise, jump to Step 5.

[0009] Step 2: Disconnect the DC pre-charge switch, measure the voltage at both ports of DC capacitor 1 and DC capacitor 2, and calculate the capacitor voltage deviation value. If the deviation value is less than the first deviation rate threshold, proceed to step 3; otherwise, jump to step 5.

[0010] Step 3: Apply pulse width modulation control signal to the power devices in the three-phase power conversion unit to output a sinusoidal voltage with equal amplitude and a phase difference of 120 degrees. Collect the AC voltage of each phase and compare the measured value with the expected output voltage calculated based on the DC bus voltage, the set modulation ratio and frequency. If the voltage deviation of each phase is less than the set second voltage threshold, proceed to step 4; otherwise, jump to step 5.

[0011] Step 4: Determine that all modules have passed the self-test, and allow the three-phase voltage source converter to enter normal operation.

[0012] Step 5: If any of the preceding steps determines an abnormality, terminate the self-test process, record the abnormal status, and prevent the converter from entering the running state.

[0013] Preferably, step 1 further includes:

[0014] Sub-step 1.1, Initialization before startup:

[0015] With the three-phase voltage source converter in a de-energized state, the controller performs the following operations in sequence:

[0016] a. Disconnect the DC switch and the three-phase AC switch to prevent power-on from impacting the load and the power grid;

[0017] b. Clear historical fault flags and reset the timer and voltage measurement registers;

[0018] Sub-step 1.2: Start the timing and perform periodic voltage measurements:

[0019] After the DC precharge switch is closed, the controller begins a self-test timing at fixed time intervals. Perform voltage sampling operation to measure DC bus voltage. Continue to make the following judgments:

[0020] Set measurement cycle A typical value is 10 milliseconds;

[0021] initial time Defined by the moment the pre-charge switch is closed;

[0022] Current time Real-time timestamp;

[0023] Sampling sequence formation: , … ,

[0024] After sampling, the voltage value is judged. If the following formula is satisfied, proceed to sub-step 2; otherwise, continue sampling until the set time threshold is exceeded:

[0025] ≥ ≤ ,

[0026] like If the pre-charging fails, the process will jump directly to step 5 and the fault flag will be recorded.

[0027] Preferably, step 2 further includes:

[0028] Sub-step 2.1: Disconnect the pre-charge path and establish static measurement conditions:

[0029] Confirm the DC bus voltage in step 1 Reaching the first threshold voltage And the time did not exceed the threshold. Then, the controller performs the following operations:

[0030] a. Disconnect the DC pre-charge switch to cut off the capacitor charging path;

[0031] b. Keep the DC switch and the three-phase AC switch in the open position;

[0032] c. Delay Take measurements only after the capacitor voltage has stabilized over time.

[0033] Sub-step 2.2: Collect capacitor voltage and calculate average value:

[0034] use The module samples the voltage across capacitors 1 and 2, obtaining the following measurement data:

[0035] The voltage across capacitor 1 is denoted as The voltage across capacitor 2 is denoted as... ;

[0036] Calculate the average voltage The following formula is used: ,

[0037] in, Average voltage;

[0038] Sub-step 2.3: Calculate the relative deviation and determine whether to proceed to the next step:

[0039] By calculating the relative deviation between capacitor voltages and comparing it with a set first deviation rate threshold... Compare the capacitors to determine if they are charging evenly:

[0040] The formula for calculating the deviation value is as follows: ,

[0041] in, This represents the voltage deviation ratio between DC capacitors. , The following are the terminal voltages of capacitor 1, in order. Average voltage This is the deviation threshold;

[0042] The judgment logic is as follows:

[0043] If satisfied If the capacitance consistency is good, the system proceeds to step 3 to continue self-testing.

[0044] like If the capacitance deviation exceeds the limit, the process jumps to step 5 to record the self-test abnormality flag.

[0045] Preferably, step 3 further includes:

[0046] Sub-step 3.1, Start The controller outputs a three-phase sine wave signal:

[0047] In step 2, it was confirmed that the capacitors were consistent and the voltage deviation was within acceptable limits. Afterwards, the system initializes the pulse width modulation control module and performs the following operations:

[0048] For power devices or Apply Drive signal;

[0049] Output three-phase sinusoidal modulation signal , , The phases differ by 120 degrees sequentially, and the amplitude is determined by the modulation ratio. With DC bus voltage Joint decision;

[0050] Modulation ratio Set to 1, frequency Set to 50 ;

[0051] The output duration is at least 3 sets of power frequency cycles, that is... ≥60ms;

[0052] Three-phase The expression for the modulated voltage waveform is:

[0053] ,

[0054] in, This is the DC bus voltage. The modulation ratio, For modulating signal frequency, For real-time variables;

[0055] Sub-step 3.2: Sample the three-phase output voltage and calculate the theoretical reference value:

[0056] The system outputs During the waveform process, the three-phase AC voltage signals were acquired in real time and recorded as follows: , , And based on the current DC bus voltage Modulation ratio and frequency Calculate the expected output voltage at the corresponding time. :

[0057] Reference voltage calculation formula: ,

[0058] in, This is the theoretical voltage reference value at the current moment, used to compare with the measured value to evaluate the output voltage quality;

[0059] Sub-step 3.3: Calculate the three-phase voltage deviation and perform a consistency judgment:

[0060] During the output duration, the system periodically checks the deviation of each phase and calculates the phase voltage deviation value. , , The calculation formula is:

[0061] ,

[0062] in, For measurement Phase output voltage, for Phase voltage measured for Phase voltage measured is the theoretical voltage reference value at the current moment,

[0063] Delay time corresponds to the phase differences of 120 degrees and 240 degrees;

[0064] The determination logic is as follows:

[0065] If all three phases satisfy: ,

[0066] then it is determined that the output is normal, and the system enters Step 4;

[0067] If any one phase does not meet the above conditions, it is judged that the output is abnormal, and the process jumps to Step 5 to record the fault flag bit.

[0068] Preferably, in the above-mentioned Step 4, it further includes:

[0069] [[ID=?]]

[0070] Sub-step 4.1, judging the self-check result: After confirming that the three-phase voltage consistency is good in Step 3, and the voltage deviations of all phases , and are all less than the set second voltage threshold

[0071] the system will perform a comprehensive judgment on the self-check result, and the judgment process is as follows: If it satisfies and and

[0072] , it is considered that the self-check result is qualified, and the system is allowed to enter the normal operation state; If the voltage deviation of any one phase , and is greater than

[0073] , it is considered that the self-check fails, and it jumps to Step 5 to record the fault status;

[0074] Sub-step 4.2, starting the converter and entering the normal operation state:

[0075] If all modules pass the self-check, after passing the judgment in Step 4.1, the system allows the three-phase voltage source converter to enter the normal operation state, including:

[0076] Starting the control system of the converter and switching to the conventional operation mode;

[0077] Monitoring the operation state and entering the normal working mode;

[0078] Sub-step 4.3, recording the self-check passed status:

[0079] It should be noted that there seems to be an unclear tag "?" in the original text which is maintained as is in the translation. If this is an error, it may need to be corrected in the original text for a more accurate translation.After confirming that all self-test modules have passed and entered normal operating status, the system records the self-test pass information, including:

[0079] Self-test passed mark Setting it to 1 indicates that all modules have passed the self-test;

[0080] Record all test parameters and test results and store them in the controller's memory or external storage device for easy retrieval and fault diagnosis.

[0081] Preferably, step 5 further includes:

[0082] Sub-step 5.1: Determine the source of the exception and generate an error code:

[0083] If, during any stage from step 1 to step 4, the detected value exceeds the threshold or fails to meet the logical judgment condition, the system immediately records the source of the current anomaly and generates the corresponding anomaly code. The categories are as follows:

[0084] If in step 1 Not at the set time The first threshold is reached. Then set:

[0085] ,

[0086] If the capacitance deviation rate in step 2 Greater than the threshold Then set:

[0087] ,

[0088] If the voltage deviation of any phase in step 3 , or Exceeding the threshold Then set: ,

[0089] If the self-test and comprehensive judgment in step 4 fails, then set: ;

[0090] Sub-step 5.2: Set the fault status flag and terminate the self-test process:

[0091] The system generates the error code based on sub-step 5.1. Perform the following operations:

[0092] Set fault flag bit 1 indicates that the current system is in an abnormal state;

[0093] The following state must be maintained:

[0094] DC switch open, three-phase AC switch open. Control signals are turned off, and the system enters locked mode to prevent subsequent startup.

[0095] Call the self-test termination function to exit all test loops and task queues;

[0096] Sub-step 5.3: Record detailed logs and prepare to debug the interface:

[0097] After the self-test process is terminated, the system enters the fault log recording and debugging preparation phase, which includes the following operations:

[0098] Time of abnormal triggering Record to a log file;

[0099] The trigger module code, threshold judgment result, measured value and set value are all written to the storage device to form a fault snapshot.

[0100] Preferably, the three-phase power conversion unit is a three-phase two-level topology or a three-phase... type Topology.

[0101] Preferably, the first threshold time is calculated based on the capacitance, tolerance, and initial voltage of DC capacitor 1 and DC capacitor 2 to determine the maximum time required for the DC bus voltage to reach the first threshold voltage.

[0102] The relative deviation of the capacitor voltage is the ratio of the absolute value of the voltage difference between DC capacitor 1 and DC capacitor 2 to their average value. The first deviation rate threshold takes into account the maximum voltage difference caused by the tolerance and adds a margin, with a typical value of 20%.

[0103] Preferably, the DC precharge switch, DC switch, and three-phase AC switch are all contactors, circuit breakers, or solid-state switches implemented using thyristors, insulated-gate bipolar transistors, or metal-oxide-semiconductor field-effect transistors.

[0104] Preferably, when the three-phase voltage source converter completes all self-test steps and all test results meet the set standards, the main control system is allowed to start the normal operation process; otherwise, it enters the fault handling logic.

[0105] This invention provides a power-on self-test method for a three-phase voltage source converter. It has the following beneficial effects:

[0106] 1. This invention adopts an optimized design for the power device self-test process. By setting the DC bus voltage lower than the voltage value when the equipment is operating normally, it can effectively prevent abnormal situations such as short circuits of power devices caused by excessive voltage during the self-test process, thereby protecting the equipment from damage. Compared with the existing self-test schemes that do not set voltage limits, this invention effectively avoids equipment damage caused by self-test, and improves the safety and reliability of the equipment.

[0107] 2. This invention avoids damage to power devices and switching equipment due to overcurrent by shutting off AC and DC disconnect switches during the power device self-test process and maintaining the DC bus voltage within the allowable range using a DC support capacitor. Compared with existing self-test methods that cannot effectively control current fluctuations, this invention can protect equipment from the risk of short circuits and ensure the safety and reliability of the self-test process.

[0108] 3. The design of this invention can detect short circuits and open circuits in all components, ensuring that all components can be effectively monitored during the self-test process and potential faults can be identified in advance. Compared with the self-test methods in the prior art that can detect some types of faults, this invention significantly improves the system's diagnostic capabilities and fault early warning level through a comprehensive fault detection mechanism, thereby reducing equipment maintenance costs.

[0109] 4. This invention enables power devices to perform self-testing without the need for external devices, avoiding the addition of extra devices and related complex operations. Compared with existing technologies that typically require external devices or additional testing equipment, the technical solution of this invention simplifies the system structure, reduces equipment maintenance costs and troubleshooting time, and improves the overall ease of operation and efficiency of the system. Attached Figure Description

[0110] Figure 1 This is a flowchart of the present invention;

[0111] Figure 2 This is a schematic diagram of the three-phase voltage source converter of the present invention;

[0112] Figure 3 This is a schematic diagram illustrating the components of the present invention;

[0113] Figure 4 This is a schematic diagram of the AC filter of the present invention;

[0114] Figure 5 This is a schematic diagram of the three-phase two-level topology circuit of the present invention;

[0115] Figure 6 This is a schematic diagram of the Type I NPC topology circuit of the present invention;

[0116] Figure 7 This is a flowchart of the present invention. Detailed Implementation

[0117] To enable those skilled in the art to understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are some, but not all, of the embodiments of the present invention. Other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort should fall within the scope of protection of the present invention.

[0118] The present invention will now be described in detail with reference to the accompanying drawings:

[0119] Example:

[0120] Please see the appendix Figure 1 - Appendix Figure 7 This invention provides a power-on self-test method for a three-phase voltage source converter, comprising:

[0121] Step 1: Disconnect the DC switch and the three-phase AC switch, close the DC pre-charge switch, start timing and periodically measure the DC bus voltage. If the DC bus voltage reaches the set first threshold voltage within the set first threshold time, proceed to Step 2; otherwise, jump to Step 5.

[0122] Step 2: Disconnect the DC pre-charge switch, measure the voltage at both ports of DC capacitor 1 and DC capacitor 2, and calculate the capacitor voltage deviation value. If the deviation value is less than the first deviation rate threshold, proceed to step 3; otherwise, jump to step 5.

[0123] Step 3: Apply pulse width modulation control signal to the power devices in the three-phase power conversion unit to output a sinusoidal voltage with equal amplitude and a phase difference of 120 degrees. Collect the AC voltage of each phase and compare the measured value with the expected output voltage calculated based on the DC bus voltage, the set modulation ratio and frequency. If the voltage deviation of each phase is less than the set second voltage threshold, proceed to step 4; otherwise, jump to step 5.

[0124] Step 4: Determine that all modules have passed the self-test, and allow the three-phase voltage source converter to enter normal operation.

[0125] Step 5: If any of the preceding steps determines an abnormality, terminate the self-test process, record the abnormal status, and prevent the converter from entering the running state.

[0126] Step 1 further includes:

[0127] Sub-step 1.1, Initialization before startup:

[0128] With the three-phase voltage source converter in a de-energized state, the controller performs the following operations in sequence:

[0129] a. Disconnect the DC switch and the three-phase AC switch to prevent power-on from impacting the load and the power grid;

[0130] b. Clear historical fault flags and reset the timer and voltage measurement registers;

[0131] Sub-step 1.2: Start the timing and perform periodic voltage measurements:

[0132] After the DC precharge switch is closed, the controller begins a self-test timing at fixed time intervals. Perform voltage sampling operation to measure DC bus voltage. Continue to make the following judgments:

[0133] Set measurement cycle A typical value is 10 milliseconds;

[0134] initial time Defined by the moment the pre-charge switch is closed;

[0135] Current time Real-time timestamp;

[0136] Sampling sequence formation: , … ,

[0137] After sampling, the voltage value is judged. If the following formula is satisfied, proceed to sub-step 2; otherwise, continue sampling until the set time threshold is exceeded:

[0138] ≥ ≤ ,

[0139] like If the pre-charging fails, the process will jump directly to step 5 and the fault flag will be recorded.

[0140] Step 2 further includes:

[0141] Sub-step 2.1: Disconnect the pre-charge path and establish static measurement conditions:

[0142] Confirm the DC bus voltage in step 1 Reaching the first threshold voltage And the time did not exceed the threshold. Then, the controller performs the following operations:

[0143] a. Disconnect the DC pre-charge switch to cut off the capacitor charging path;

[0144] b. Keep the DC switch and the three-phase AC switch in the open position;

[0145] c. Delay Take the measurement only after the capacitor voltage has stabilized over time.

[0146] Sub-step 2.2: Collect capacitor voltage and calculate average value:

[0147] use The module samples the voltage across capacitors 1 and 2, obtaining the following measurement data:

[0148] The voltage across capacitor 1 is denoted as The voltage across capacitor 2 is denoted as... ;

[0149] Calculate the average voltage The following formula is used: ,

[0150] in, Average voltage;

[0151] Sub-step 2.3: Calculate the relative deviation and determine whether to proceed to the next step:

[0152] By calculating the relative deviation between capacitor voltages and comparing it with a set first deviation rate threshold... Compare the capacitors to determine if they are charging evenly:

[0153] The formula for calculating the deviation value is as follows: ,

[0154] in, This represents the voltage deviation ratio between DC capacitors. , The following are the terminal voltages of capacitor 1, in order. Average voltage This is the deviation threshold;

[0155] The judgment logic is as follows:

[0156] If satisfied If the capacitance consistency is good, the system proceeds to step 3 to continue self-testing.

[0157] like If the capacitance deviation exceeds the limit, the process jumps to step 5 to record the self-test abnormality flag.

[0158] Step 3 further includes:

[0159] Sub-step 3.1, Start The controller outputs a three-phase sine wave signal:

[0160] In step 2, it was confirmed that the capacitors were consistent and the voltage deviation was within acceptable limits. Afterwards, the system initializes the pulse width modulation control module and performs the following operations:

[0161] For power devices or Apply Drive signal;

[0162] Output three-phase sinusoidal modulation signal , , The phases differ by 120 degrees sequentially, and the amplitude is determined by the modulation ratio. With DC bus voltage Joint decision;

[0163] Modulation ratio Set to 1, frequency Set to 50 ;

[0164] The output duration is at least 3 sets of power frequency cycles, that is... ≥60ms;

[0165] Three-phase The expression for the modulated voltage waveform is:

[0166] ,

[0167] in, This is the DC bus voltage. The modulation ratio, For modulating signal frequency, For real-time variables;

[0168] Sub-step 3.2: Sample the three-phase output voltage and calculate the theoretical reference value:

[0169] The system outputs During the waveform process, the three-phase AC voltage signals were acquired in real time and recorded as follows: , , And based on the current DC bus voltage Modulation ratio and frequency Calculate the expected output voltage at the corresponding time. :

[0170] Reference voltage calculation formula: ,

[0171] in, This is the theoretical voltage reference value at the current moment, used to compare with the measured value to evaluate the output voltage quality;

[0172] Sub-step 3.3: Calculate the three-phase voltage deviation and perform a consistency judgment:

[0173] During the output duration, the system periodically checks the deviation of each phase and calculates the phase voltage deviation value. , , The calculation formula is:

[0174] ,

[0175] in, For measurement Phase output voltage, for Phase voltage measured for Phase voltage measured This is the theoretical voltage reference value at the current moment.

[0176] Delay time and This corresponds to a phase difference of 120 degrees and 240 degrees;

[0177] The decision logic is as follows:

[0178] If all three phases satisfy: ,

[0179] Then determine The output is normal; the system proceeds to step 4.

[0180] If any phase does not meet the above conditions, it is judged as an output abnormality, and the process jumps to step 5 to record the fault flag bit.

[0181] Step 4 further includes:

[0182] Sub-step 4.1, determine the self-test result:

[0183] In step 3, it was confirmed that the three-phase voltage consistency was good and the voltage deviation of all phases was minimized. , and All are less than the set second voltage threshold. Afterwards, the system will make a comprehensive judgment on the self-check results. The judgment process is as follows:

[0184] If satisfied and and If the self-test result is satisfactory, the system is allowed to enter normal operation.

[0185] If any phase voltage deviation , and Greater than If the self-test fails, proceed to step 5 and record the fault status.

[0186] Sub-step 4.2, start the converter and enter the normal operation state:

[0187] If all modules pass the self-check and are judged qualified in step 4.1, the system allows the three-phase voltage source converter to enter the normal operation state, including:

[0188] Start the control system of the converter and switch to the normal operation mode;

[0189] Monitor the operation state and enter the normal working mode;

[0190] Sub-step 4.3, record the state of passing the self-check:

[0191] After confirming that all self-check modules are qualified and enter the normal operation state, the system records the information of passing the self-check, and the recorded content includes:

[0192] Self-check pass flag Set to 1, indicating that all modules have passed the self-check;

[0193] Record various test parameters and test results, and store them in the controller memory or external storage device for subsequent query and fault diagnosis.

[0194] In step 5, it further includes:

[0195] Sub-step 5.1, determine the source of abnormal trigger and generate an error code:

[0196] In any stage from step 1 to step 4, if the detected value exceeds the threshold or does not meet the logical judgment condition, the system immediately records the current abnormal source and generates the corresponding abnormal code , classified as follows:

[0197] If in step 1 does not reach the first threshold within the set time , then set: ,

[0198] ,

[0199] If the capacitance deviation rate in step 2 is greater than the threshold , then set:

[0200] ,

[0201] If the voltage deviation of any phase in step 3 , or exceeds the threshold , then set: ,

[0202] If the self-test and comprehensive judgment in step 4 fails, then set: ;

[0203] Sub-step 5.2: Set the fault status flag and terminate the self-test process:

[0204] The system generates the error code based on sub-step 5.1. Perform the following operations:

[0205] Set fault flag bit 1 indicates that the current system is in an abnormal state;

[0206] The following state must be maintained:

[0207] DC switch open, three-phase AC switch open. Control signals are turned off, and the system enters locked mode to prevent subsequent startup.

[0208] Call the self-test termination function to exit all test loops and task queues;

[0209] Sub-step 5.3: Record detailed logs and prepare to debug the interface:

[0210] After the self-test process is terminated, the system enters the fault log recording and debugging preparation phase, which includes the following operations:

[0211] Time of abnormal triggering Record to a log file;

[0212] The trigger module code, threshold judgment result, measured value and set value are all written to the storage device to form a fault snapshot.

[0213] Step 1 effectively limits inrush current during capacitor charging by implementing an orderly power-on initialization process, preventing thermal breakdown of devices and damage to the power circuit due to high voltage surges. By employing a pre-charge path for initial conduction and strictly controlling the voltage rise process, the system avoids the accumulation of instability factors in the initial stage. Simultaneously, periodic voltage sampling and time constraint mechanisms ensure the controllability of the DC bus voltage, laying a stable electrical foundation for subsequent capacitor testing and power output verification.

[0214] Step 2 focuses on capacitor voltage consistency detection. By measuring the terminal voltage of the energy storage element and calculating its deviation, abnormal phenomena such as large capacitor deviations can be identified early before system operation, preventing voltage fluctuations and resonance faults caused by capacitor imbalance during operation. This step plays a core role in maintaining system energy symmetry, current sharing capability, and reducing electromagnetic interference, and is an important foundation for ensuring the quality of subsequent power output waveforms. Its application can effectively improve system stability and lifespan, and help detect potential problems such as component aging and poor contact in advance, possessing extremely high early warning value.

[0215] Step 3 involves actively exciting the three-phase power devices to output a standard modulated waveform and sampling feedback for deviation verification. This verifies the controllability of the overall power conversion path and whether the voltage waveform quality meets design requirements. This step assesses the integrity of the hardware link and simultaneously performs coordinated testing on the response capabilities of the control algorithm, drive circuit, and sampling system, effectively verifying the system's operational coordination under dynamic conditions. By comparing real-time data over continuous power frequency cycles, it ensures that the system can maintain a stable and consistent three-phase output over multiple cycles, providing electrical assurance and technical support for the system's long-term stable operation.

[0216] Step 4 integrates all the test data from the first three steps, establishes a unified judgment logic for system qualification assessment, and ensures the structural health and functional integrity of the three-phase voltage source converter from an overall perspective. Only after ensuring the stable operation of each module and that parameters are within controllable ranges can the system officially enter the operational state, minimizing the risk of operating the system with defects. This step enhances automated judgment capabilities, reduces manual intervention and misjudgments, improves the intelligence of the power-on process, and lays a reliable technical foundation for subsequent operation phases, enhancing the equipment's safety and robustness.

[0217] Step 5, as a protection mechanism in the self-test process, has the greatest advantage in that it can quickly cut off critical switch paths and prevent subsequent excitation signals from being issued once any detection anomaly occurs in the system, thus limiting the abnormal state to a minimum and avoiding large-scale hardware damage. By classifying and recording fault codes and saving detailed logs, it is easy for engineers to quickly locate the source of the problem, analyze the cause of the anomaly, and carry out repairs and maintenance. The existence of this step significantly improves the system's fault tolerance and maintainability.

[0218] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A power-on self-test method for a three-phase voltage source converter, characterized in that, It includes: Step 1: Disconnect the DC switch and the three-phase AC switch, close the DC pre-charge switch, start timing and periodically measure the DC bus voltage. If the DC bus voltage reaches the set first threshold voltage within the set first threshold time, go to Step 2; otherwise, jump to Step 5. Step 2: Disconnect the DC pre-charge switch, measure the voltages at the two ports of DC capacitor 1 and DC capacitor 2, calculate the capacitor voltage deviation value. If the deviation value is less than the first deviation rate threshold, go to Step 3; otherwise, jump to Step 5. Step 3: Apply a pulse-width modulation control signal to the power devices in the three-phase power conversion unit, output three-phase sinusoidal voltages with equal amplitudes and a phase difference of 120 degrees in sequence, collect the AC voltages of each phase and compare the measured values with the expected output voltages calculated according to the DC bus voltage, the set modulation ratio and frequency. If the voltage deviations of each phase are all less than the set second voltage threshold, go to Step 4; otherwise, jump to Step 5. Step 4: Determine that all modules pass the self-check, and allow the three-phase voltage source converter to enter the normal operation state. Step 5: When any of the previous steps is determined to be abnormal, terminate the self-check process, record the abnormal state and prevent the converter from entering the operation state.

2. The power-on self-test method for a three-phase voltage source converter according to claim 1, characterized in that, In Step 1, it further includes: Sub-step 1.1: Initialize the operation before startup: Put the three-phase voltage source converter in the power-off state, and the controller sequentially performs the following operations: a. Disconnect the DC switch and the three-phase AC switch to prevent power-on from impacting the load side and the power grid. b. Clear the historical fault flag bit, reset the timer and the voltage measurement register. Sub-step 1.2: Start timing and perform periodic voltage measurement: After the DC precharge switch is closed, the controller begins a self-test timing at fixed time intervals. Perform voltage sampling operation to measure DC bus voltage. Continue to make the following judgments: Set measurement cycle A typical value is 10 milliseconds; initial time Defined by the moment the pre-charge switch is closed; Current time Real-time timestamp; Sampling sequence formation: , … , Judge the voltage value after sampling. If the following formula is satisfied, go to Sub-step 2; otherwise, continue sampling until the set time threshold is exceeded. ≥ ≤ ， like If the pre-charging fails, the process will jump directly to step 5 and the fault flag will be recorded.

3. The power-on self-test method for a three-phase voltage source converter according to claim 1, characterized in that, In Step 2, it further includes: Sub-step 2.1: Disconnect the pre-charge path and establish static measurement conditions: Confirm the DC bus voltage in step 1 Reaching the first threshold voltage And the time did not exceed the threshold. Then, the controller performs the following operations: a. Disconnect the DC pre-charge switch to cut off the capacitor charging path. b. Keep the DC switch and the three-phase AC switch in the disconnected state. c. Delay Take measurements only after the capacitor voltage has stabilized over time. Sub-step 2.2: Collect the capacitor voltages and calculate the average value. use The module samples the voltage across capacitors 1 and 2, obtaining the following measurement data: The voltage across capacitor 1 is denoted as The voltage across capacitor 2 is denoted as... ; Calculate the average voltage The following formula is used: , in, Average voltage; Sub-step 2.3: Calculate the relative deviation and judge whether to enter the next step. By calculating the relative deviation between capacitor voltages and comparing it with a set first deviation rate threshold... Compare the capacitors to determine if they are charging evenly: The formula for calculating the deviation value is as follows: , in, This represents the voltage deviation ratio between DC capacitors. , The following are the terminal voltages of capacitor 1, in order. Average voltage This is the deviation threshold; The judgment logic is as follows: If satisfied If the capacitance consistency is good, the system proceeds to step 3 to continue self-testing. like If the capacitance deviation exceeds the limit, the process jumps to step 5 to record the self-test abnormality flag.

4. The power-on self-test method for a three-phase voltage source converter according to claim 1, characterized in that, In Step 3, it further includes: Sub-step 3.1, Start The controller outputs a three-phase sine wave signal: In step 2, it was confirmed that the capacitors were consistent and the voltage deviation was within acceptable limits. Afterwards, the system initializes the pulse width modulation control module and performs the following operations: For power devices or Apply Drive signal; Output three-phase sinusoidal modulation signal , , The phases differ by 120 degrees sequentially, and the amplitude is determined by the modulation ratio. With DC bus voltage Joint decision; Modulation ratio Set to 1, frequency Set to 50 ; The output duration is at least 3 sets of power frequency cycles, that is... ≥60ms; Three-phase The expression for the modulated voltage waveform is: ， in, This is the DC bus voltage. The modulation ratio, For modulating signal frequency, For real-time variables; Sub-step 3.2: Sample the three-phase output voltages and calculate the theoretical reference values. The system outputs During the waveform process, the three-phase AC voltage signals were acquired in real time and recorded as follows: , , And based on the current DC bus voltage Modulation ratio and frequency Calculate the expected output voltage at the corresponding time. : Reference voltage calculation formula: , in, This is the theoretical voltage reference value at the current moment, used to compare with the measured value to evaluate the output voltage quality; Sub-step 3.3: Calculate the three-phase voltage deviations and perform consistency judgment. During the output duration, the system periodically checks the deviation of each phase and calculates the phase voltage deviation value. , , The calculation formula is: ， in, For measurement Phase output voltage, for Phase voltage measured for Phase voltage measured This is the theoretical voltage reference value at the current moment. Delay time and This corresponds to a phase difference of 120 degrees and 240 degrees; The judgment logic is as follows: If all three phases satisfy: , Then determine The output is normal; the system proceeds to step 4. If any phase does not meet the above conditions, it is judged that the output is abnormal, the process jumps to Step 5, and the fault flag bit is recorded.

5. The power-on self-test method for a three-phase voltage source converter according to claim 1, characterized in that, In Step 4, it further includes: Sub-step 4.1: Judge the self-check result. In step 3, it was confirmed that the three-phase voltage consistency was good and the voltage deviation of all phases was minimized. , and All are less than the set second voltage threshold. Afterwards, the system will make a comprehensive judgment on the self-check results. The judgment process is as follows: If satisfied and and If the self-test result is satisfactory, the system is allowed to enter normal operation. If any phase voltage deviation , and Greater than If the self-test fails, proceed to step 5 and record the fault status. Sub-step 4.2: Start the converter and enter the normal operation state: If all modules pass the self-check, after the judgment in Sub-step ​ ​ ​ ​ Self-test passed mark Setting it to 1 indicates that all modules have passed the self-test; Record all test parameters and test results and store them in the controller's memory or external storage device for easy retrieval and fault diagnosis.

6. The power-on self-test method for a three-phase voltage source converter according to claim 1, characterized in that, Step 5 further includes: Sub-step 5.1: Determine the source of the exception and generate an error code: If, during any stage from step 1 to step 4, the detected value exceeds the threshold or fails to meet the logical judgment condition, the system immediately records the source of the current anomaly and generates the corresponding anomaly code. The categories are as follows: If in step 1 Not at the set time The first threshold is reached. Then set: ， If the capacitance deviation rate in step 2 Greater than the threshold Then set: ， If the voltage deviation of any phase in step 3 , or Exceeding the threshold Then set: , If the self-test and comprehensive judgment in step 4 fails, then set: ; Sub-step 5.2: Set the fault status flag and terminate the self-test process: The system generates the error code based on sub-step 5.

1. Perform the following operations: Set fault flag bit 1 indicates that the current system is in an abnormal state; The following state must be maintained: DC switch open, three-phase AC switch open. Control signals are turned off, and the system enters locked mode to prevent subsequent startup. Call the self-test termination function to exit all test loops and task queues; Sub-step 5.3: Record detailed logs and prepare to debug the interface: After the self-test process is terminated, the system enters the fault log recording and debugging preparation phase, which includes the following operations: Time of abnormal triggering Record to a log file; The trigger module code, threshold judgment result, measured value and set value are all written to the storage device to form a fault snapshot.

7. The power-on self-test method for a three-phase voltage source converter according to claim 1, characterized in that, The three-phase power conversion unit is a three-phase two-level topology or a three-phase... type Topology.

8. The power-on self-test method for a three-phase voltage source converter according to claim 1, characterized in that, The first threshold time is calculated based on the capacitance, tolerance, and initial voltage of DC capacitor 1 and DC capacitor 2 to determine the maximum time required for the DC bus voltage to reach the first threshold voltage. The relative deviation of the capacitor voltage is the ratio of the absolute value of the voltage difference between DC capacitor 1 and DC capacitor 2 to their average value. The first deviation rate threshold takes into account the maximum voltage difference caused by the tolerance and adds a margin, with a typical value of 20%.

9. The power-on self-test method for a three-phase voltage source converter according to claim 1, characterized in that, The DC precharge switch, DC switch, and three-phase AC switch are all contactors, circuit breakers, or solid-state switches implemented using thyristors, insulated-gate bipolar transistors, or metal-oxide-semiconductor field-effect transistors.

10. The power-on self-test method for a three-phase voltage source converter according to claim 1, characterized in that, When the three-phase voltage source converter completes all self-test steps and all test results meet the set standards, the main control system is allowed to start the normal operation process; otherwise, it enters the fault handling logic.

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