Method and apparatus for integrated design of artificial intelligence chips

Abstract

The present application relates to a method and apparatus for integrated design of artificial intelligence chips. The present application can move the verification of integrated design to before RTL code generation of a subnetwork, instead of the requirement collection phase and the subnetwork verification phase in the related art which completely rely on manual work, so that the probability of repeatedly going through the subnetwork verification phase and the subnetwork planning phase due to errors found in the subnetwork verification phase after RTL code generation can be reduced. Further, the present application helps to improve the efficiency of integrated design.

Description

Technical Field

[0001] This application relates to the field of AI (Artificial Intelligence), and in particular to a method for integrated design of artificial intelligence chips and an apparatus for integrated design of artificial intelligence chips. Background Technology

[0002] The integrated design cycle of an AI chip can include the requirements gathering phase, requirements verification phase, subnet planning phase, and subnet verification phase. If an error is found during the subnet verification phase, it needs to be corrected manually during the requirements verification phase, and then RTL (Register Transfer Level) code needs to be generated again through the subnet planning phase. This iterative process leads to low efficiency in the integrated design.

[0003] Therefore, how to improve the efficiency of integrated design for artificial intelligence chips has become a technical problem to be solved in related technologies. Summary of the Invention

[0004] This application provides a method for integrated design of artificial intelligence chips and an apparatus for integrated design of artificial intelligence chips, which helps to improve the efficiency of integrated design of artificial intelligence chips.

[0005] In one embodiment of this application, a method for integrated design of an artificial intelligence chip is provided, comprising:

[0006] Detect selection operations of a pre-created module template library in the graphical user interface;

[0007] In response to the successful detection of the selection operation, the multiple template IP modules selected by the selection operation in the module template library are visualized in the graphical user interface as icons.

[0008] Detect the configuration operations of the plurality of template IP modules in the graphical user interface;

[0009] Based on the successfully detected configuration operation of each of the plurality of template IP modules, the module interface configuration information set for the template IP module is determined; wherein, the module interface configuration information of each of the plurality of template IP modules includes an interface protocol for defining the communication standard on which the template IP module performs data communication and an interface attribute for defining the working parameters of the template IP module when using the determined interface protocol.

[0010] The configuration validity of the module interface configuration information of the multiple template IP modules is verified to determine whether there are any conflicts in the interface attributes of each template IP module among the multiple template IP modules;

[0011] After the configuration validity verification of the module interface configuration information of the multiple template IP modules is successful, the topological connection relationship created between the multiple template IP modules through the graphical user interface is detected.

[0012] The interconnection legality of the topological connection relationship between the plurality of template IP modules is verified to determine whether the module interface configuration information of each pair of interconnected template IP modules in the plurality of template IP modules matches;

[0013] After the interconnection validity verification of the topology connection relationship between the plurality of template IP modules is successful, a subnet parameterization requirement file based on the topology connection relationship between the plurality of template IP modules is generated; wherein, the subnet parameterization requirement file is used to generate the RTL code of the subnet in the integration design.

[0014] In some examples, the interface protocol may optionally include the AMBA (Advanced Microcontroller Bus Architecture) protocol, which includes at least one of the following: AXI (Advanced eXtensible Interface) protocol, AHB (Advanced High-performance Bus) protocol, and APB (Advanced Peripheral Bus) protocol.

[0015] In some examples, the operating parameters may optionally include at least one of numerical parameters and Boolean parameters.

[0016] In some examples, the configuration validity check may optionally use at least one of the following validation rules: whether the numeric parameters in the interface attributes are within a preset range of valid values; and whether there are logical contradictions among the boolean parameters in the interface attributes.

[0017] In some examples, the numerical parameters may optionally include at least one of the following: data bit width, address bit width, identifier ID bit width, burst length, and burst size.

[0018] In some examples, the Boolean parameter may optionally include at least one of the following: whether out-of-order transmission is supported, whether narrow transmission is supported, and whether unaligned transmission is supported.

[0019] In some examples, the interconnection validity verification may optionally use at least one of the following matching rules: protocol matching rule, used to verify whether the interface protocols of each pair of template IP modules that have a topological connection relationship in the plurality of template IP modules match; attribute matching rule, used to verify whether the interface attributes of each pair of template IP modules that have a topological connection relationship in the plurality of template IP modules match.

[0020] In some examples, optionally, the protocol matching rule is specifically used to verify whether the interface protocol of each pair of template IP modules that have a topological connection relationship among the plurality of template IP modules satisfies: the interface protocol of the pair of template IP modules is the same as each other, or the interface protocol of the pair of template IP modules includes a combination of preset compatible interface protocols.

[0021] In some examples, optionally, the attribute matching rules include at least one of the following matching rules: a data bit width matching rule, used to verify whether each pair of template IP modules with a topological connection relationship among the plurality of template IP modules satisfies: the data bit width of one of the template IP modules configured as the master device in the pair of template IP modules is an integer multiple of the data bit width of the other template IP module configured as the slave device; and an address mapping rule, used to verify whether each pair of template IP modules with a topological connection relationship among the plurality of template IP modules satisfies: there is a preset overlap relationship or a containment relationship between the address space range of one of the template IP modules configured as the master device and the address space range of the other template IP module configured as the slave device in the pair of template IP modules.

[0022] In some examples, optionally, the graphical user interface includes a first graphical user interface; wherein the first graphical user interface includes an interface panel of the module template library and a first visualization window; detecting a selection operation of the pre-created module template library in the graphical user interface includes: detecting the selection operation in the interface panel of the module template library; visually presenting multiple template IP modules selected by the selection operation in the module template library as icons in the graphical user interface includes: visually presenting the multiple template IP modules selected by the selection operation in the module template library as icons in the first visualization window; detecting the configuration information of the multiple template IP modules in the graphical user interface includes: detecting the configuration operation of any one of the multiple template IP modules in the first visualization window.

[0023] In some examples, optionally, the configuration operation includes a first configuration operation and a second configuration operation; determining the module interface configuration information set for the template IP module based on the successfully detected configuration operation for each of the plurality of template IP modules includes: determining the interface protocol in the module interface configuration information of the template IP module based on the first configuration operation successfully detected in the first visualization window for each of the plurality of template IP modules; wherein, the interface protocol in the module interface configuration information of each of the plurality of template IP modules is determined based on the successful determination of the first configuration operation to trigger the configuration panel corresponding to the template IP module to be associated and presented with the template IP module in the first visualization window; and determining the interface attribute in the module interface configuration information of the template IP module based on the second configuration operation successfully detected in the first visualization window for the configuration panel corresponding to each of the plurality of template IP modules.

[0024] In some examples, the graphical user interface may optionally include a second graphical user interface; wherein the second graphical user interface includes an operation panel for drawing tools and a second visualization window; the detection of the topological connection relationship created between the plurality of template IP modules through the graphical user interface includes: determining the topological connection relationship created between the plurality of template IP modules by detecting the interconnection operation using the drawing tools in the second visualization window.

[0025] In some examples, optionally, the interface switching from the first graphical user interface to the second graphical user interface is enabled by the successful verification of the configuration validity of the plurality of template IP modules.

[0026] Optionally, in some examples, the method further includes: in response to the failure of the configuration validity check of the module interface configuration information of any one of the plurality of template IP modules, presenting a first modification prompt message corresponding to the template IP module through the graphical user interface.

[0027] Optionally, in some examples, the method further includes: in response to a failure of the interconnection validity check of the topological connection relationship between any pair of interconnected template IP modules in the plurality of template IP modules, presenting a second modification prompt message for the corresponding pair of interconnected template IP modules through the graphical user interface.

[0028] In some examples, the subnet parameterization requirement file may optionally be an XML format file.

[0029] In some examples, the subnet may optionally include an AMBA protocol subnet.

[0030] In another embodiment of this application, an apparatus for integrated design of an artificial intelligence chip is provided, comprising:

[0031] The module adding unit is used to: detect a selection operation on a pre-created module template library in the graphical user interface; and, in response to the successful detection of the selection operation, visualize multiple template IP modules selected by the selection operation in the module template library in the graphical user interface in the form of icons.

[0032] The module configuration unit is configured to: detect configuration operations on the plurality of template IP modules in the graphical user interface; and, based on the successfully detected configuration operations on each of the plurality of template IP modules, determine the module interface configuration information set for that template IP module; wherein the module interface configuration information of each of the plurality of template IP modules includes an interface protocol for defining the communication standard on which the template IP module performs data communication and an interface attribute for defining the working parameters of the template IP module when using the determined interface protocol;

[0033] The configuration checking unit is used to: perform configuration legality verification on the module interface configuration information of the plurality of template IP modules to determine whether there is a conflict in the interface attributes of each template IP module among the plurality of template IP modules;

[0034] The topology editing unit is used to: detect the topology connection relationship created between the multiple template IP modules through the graphical user interface after the configuration legality verification of the module interface configuration information of the multiple template IP modules is successful;

[0035] The topology checking unit is used to: verify the interconnection legality of the topology connection relationship between the plurality of template IP modules, so as to determine whether the module interface configuration information of each pair of interconnected template IP modules in the plurality of template IP modules matches;

[0036] The requirement generation unit is configured to: after the interconnection validity verification of the topology connection relationship between the plurality of template IP modules is successful, generate a subnet parameterized requirement file based on the topology connection relationship between the plurality of template IP modules; wherein, the subnet parameterized requirement file is used to generate the RTL code of the subnet in the integration design.

[0037] In some examples, the interface protocol may optionally include the AMBA protocol, which includes at least one of the following: AXI protocol, AHB protocol, and APB protocol.

[0038] In some examples, the operating parameters may optionally include at least one of numerical parameters and Boolean parameters.

[0039] In some examples, the configuration validity check may optionally use at least one of the following validation rules: whether the numeric parameters in the interface attributes are within a preset range of valid values; and whether there are logical contradictions among the boolean parameters in the interface attributes.

[0040] In some examples, the numerical parameters may optionally include at least one of the following: data bit width, address bit width, identifier ID bit width, burst length, and burst size.

[0041] In some examples, the Boolean parameter may optionally include at least one of the following: whether out-of-order transmission is supported, whether narrow transmission is supported, and whether unaligned transmission is supported.

[0042] In some examples, the interconnection validity verification may optionally use at least one of the following matching rules: protocol matching rule, used to verify whether the interface protocols of each pair of template IP modules that have a topological connection relationship in the plurality of template IP modules match; attribute matching rule, used to verify whether the interface attributes of each pair of template IP modules that have a topological connection relationship in the plurality of template IP modules match.

[0043] In some examples, optionally, the protocol matching rule is specifically used to verify whether the interface protocol of each pair of template IP modules that have a topological connection relationship among the plurality of template IP modules satisfies: the interface protocol of the pair of template IP modules is the same as each other, or the interface protocol of the pair of template IP modules includes a combination of preset compatible interface protocols.

[0044] In some examples, optionally, the attribute matching rules include at least one of the following matching rules: a data bit width matching rule, used to verify whether each pair of template IP modules with a topological connection relationship among the plurality of template IP modules satisfies: the data bit width of one of the template IP modules configured as the master device in the pair of template IP modules is an integer multiple of the data bit width of the other template IP module configured as the slave device; and an address mapping rule, used to verify whether each pair of template IP modules with a topological connection relationship among the plurality of template IP modules satisfies: there is a preset overlap relationship or a containment relationship between the address space range of one of the template IP modules configured as the master device and the address space range of the other template IP module configured as the slave device in the pair of template IP modules.

[0045] In some examples, optionally, the graphical user interface includes a first graphical user interface; wherein the first graphical user interface includes an interface panel of the module template library and a first visualization window; the module adding unit is specifically configured to: detect the selection operation in the interface panel of the module template library, and visually present the plurality of template IP modules selected by the selection operation in the module template library in the first visualization window in the form of icons; the module configuration unit is specifically configured to: detect the configuration operation on any one of the plurality of template IP modules in the first visualization window.

[0046] In some examples, optionally, the configuration operation includes a first configuration operation and a second configuration operation; the module configuration unit is specifically configured to: determine the interface protocol in the module interface configuration information of the template IP module based on the first configuration operation successfully detected in the first visualization window for any one of the plurality of template IP modules; wherein, the interface protocol in the module interface configuration information of any one of the plurality of template IP modules is determined based on the successful determination of the first configuration operation, which is used to trigger the configuration panel corresponding to the template IP module to be associated with the template IP module in the first visualization window; and determine the interface attribute in the module interface configuration information of the template IP module based on the second configuration operation successfully detected in the first visualization window for the configuration panel corresponding to any one of the plurality of template IP modules.

[0047] In some examples, the graphical user interface may optionally include a second graphical user interface; wherein the second graphical user interface includes an operation panel for drawing tools and a second visualization window; the topology editing unit is specifically configured to determine the topology connection relationship created among the plurality of template IP modules by detecting interconnection operations using the drawing tools in the second visualization window.

[0048] In some examples, optionally, the interface switching from the first graphical user interface to the second graphical user interface is enabled by the successful verification of the configuration validity of the plurality of template IP modules.

[0049] Optionally, in some examples, the configuration checking unit is further configured to: the method further includes: in response to the failure of configuration validity verification of the module interface configuration information of any one of the plurality of template IP modules, presenting a first modification prompt message corresponding to the template IP module through the graphical user interface.

[0050] In some examples, optionally, the topology checking unit is further configured to: in response to the failure of the interconnection validity check of the topology connection relationship between any pair of interconnected template IP modules in the plurality of template IP modules, present a second modification prompt message for the corresponding pair of interconnected template IP modules through the graphical user interface.

[0051] In some examples, the subnet parameterization requirement file may optionally be an XML format file.

[0052] In some examples, the subnet may optionally include an AMBA protocol subnet.

[0053] In another embodiment of this application, an electronic device is provided, including a processor for performing the integrated design method for an artificial intelligence chip as described in the foregoing embodiments.

[0054] In another embodiment of this application, a non-transitory computer-readable storage medium is provided, the non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to perform the method for integrated design of an artificial intelligence chip as described in the foregoing embodiments.

[0055] In another embodiment of this application, a computer program product is provided, including computer-executable instructions that, when executed by a processor, implement the method for integrated design of an artificial intelligence chip as described in the foregoing embodiments.

[0056] As can be seen from the above, the embodiments of this application can move the verification of the integrated design to before the generation of the RTL code for the subnet, replacing the requirement gathering stage and subnet verification stage that rely entirely on manual methods in related technologies. This reduces the probability of repeatedly going through the subnet verification and subnet planning stages after RTL code generation due to errors discovered during the subnet verification stage. Therefore, the embodiments of this application help improve the efficiency of integrated design for artificial intelligence chips. Attached Figure Description

[0057] The following figures are for illustrative purposes only and do not limit the scope of this application:

[0058] Figure 1 This is an exemplary flowchart illustrating a method for integrated design of an artificial intelligence chip in an embodiment of this application.

[0059] Figure 2 This is an exemplary structural diagram of an apparatus for the integrated design of an artificial intelligence chip in an embodiment of this application. Detailed Implementation

[0060] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided with reference to the accompanying drawings and embodiments.

[0061] In embodiments of this application, the integrated design of an artificial intelligence chip can include the design of various internal integrated circuits of an artificial intelligence chip, such as a NOC (Network On Chip). For example, an artificial intelligence chip can include multiple subnets, and the integrated design can be used to create any subnet within the artificial intelligence chip.

[0062] In embodiments of this application, the integrated design of an artificial intelligence chip (e.g., NOC design) can utilize various pre-created IP (Intellectual Property) modules. In this case, if the integrated design is implemented in accordance with related technologies, then:

[0063] The requirements gathering phase can be used to manually input (e.g., by the subnet architecture manager) the module configurations and topology connections of the IP modules required to build the subnet into an editable document such as an EXCEL (spreadsheet) file to characterize the subnet parameterization requirements;

[0064] The requirements verification phase is used for manual verification (e.g., input by integration design engineers) of subnet parameterization requirements, and to correct requirement errors in editable documents that may exist due to human input mistakes.

[0065] The subnet planning phase involves manually loading (e.g., by an integration design engineer) the subnet parameterization requirements from the validated and corrected editable document into the software tool to generate the subnet's RTL code, which can be delivered as a result.

[0066] The subnet verification phase is used to verify the RTL instance after the RTL code of the subnet is instantiated using the established verification platform (for example, the verification is the responsibility of the subnet verification engineer).

[0067] As can be seen above, if IP modules are used to implement the integration design according to relevant technologies, the role of the subnet verification stage in the integration design cycle is to automatically detect input errors from manual entry during the requirements gathering stage and omissions from manual verification during the requirements verification stage. This allows for a return to the requirements verification stage for manual error checking and correction after these errors are detected, and the regeneration of RTL code through the subnet planning stage. Although the subnet verification stage can correct errors in the integration design, and related technologies strive to optimize the verification methods in this stage to improve the accuracy of error correction, it still requires returning to the subnet verification stage for manual error checking to correct the subnet parameterization requirements, and then regenerating RTL code through the subnet planning stage based on the corrected subnet parameterization requirements. Therefore, as described in the background section, the iterative process of "after errors are found in the subnet verification stage, it is necessary to return to the requirements verification stage for manual error correction and regenerate RTL code through the subnet planning stage" repeatedly goes through the subnet verification and subnet planning stages, resulting in low efficiency in the integration design.

[0068] The embodiments of this application address the technical problems related to integrated design (e.g., NOC design) in the aforementioned related technologies by providing an independently running development program and a dynamically maintainable module template library.

[0069] For example, in the embodiments of this application, the independent operation of the development program means at least that the development program is independent of the software tools used by related technologies in the subnet planning phase to generate RTL, and that the development program is also independent of the verification platform built by related technologies in the subnet verification phase. Therefore, the development program provided in the embodiments of this application can run between the subnet planning phase and the subnet verification phase, and the method for integrated design of artificial intelligence chips in the embodiments of this application can be implemented through the independent operation of the development program.

[0070] For example, in embodiments of this application, the module template library may include multiple template IP modules with various functions. That is, each template IP module can be used to implement a corresponding function in the integrated circuit that is the design object. For example, in the case where the integrated design includes NOC design, the module function of each template IP module may correspond to functions such as bus bridge, USB (Universal Serial Bus) controller, Ethernet, and DMA (Direct Memory Access) module in the NOC that is the design object.

[0071] For example, in an embodiment of this application, the module functions of multiple template IP modules in the module template library can be determined based on the requirements of the artificial intelligence chip involved in the method for integrated design of artificial intelligence chips.

[0072] For example, in the embodiments of this application, the artificial intelligence chip involved in the method for integrated design of artificial intelligence chip may include any one of the following integrated circuit chips suitable for artificial intelligence: GPU (Graphics Processing Unit), TPU (Tensor Processing Unit), NPU (Neural Network Processing Unit), DPU (Deep Learning Processing Unit), APU (Accelerated Processing Unit), and GPGPU (General-Purpose computing on Graphics Processing Units).

[0073] For example, in an embodiment of this application, a stand-alone development program can determine the interface protocol and interface attributes of any template IP module in the template library by configuring the module. Thus, any template IP module with a defined interface protocol and interface attributes can be used to characterize the requirements of an IP module in a subnet of an artificial intelligence chip.

[0074] For example, in an embodiment of this application, the subnet of the artificial intelligence chip may include an AMBA protocol subnet, and the AMBA protocol may include at least one of the following: AXI protocol, AHB protocol, and APB protocol.

[0075] For example, in an embodiment of this application, if the artificial intelligence chip involved in the method for integrated design of an artificial intelligence chip has a SoC (System on Chip), then the subnet of the artificial intelligence chip (e.g., the AMBA protocol subnet) can be used as a subsystem of the SoC.

[0076] Figure 1 This is an exemplary flowchart illustrating a method for integrated design of an artificial intelligence chip according to an embodiment of this application. Please refer to... Figure 1 In the embodiments of this application, the method for integrated design of artificial intelligence chips may include a module addition step S110, a module configuration step S130, a configuration check step S135, a topology editing step S150, a topology check step S155, and a requirement generation step S170.

[0077] For example, in an embodiment of this application, the module adding step S110 may include: detecting a selection operation of a pre-created module template library in the graphical user interface; wherein the selection operation belongs to human-computer interaction operation (e.g., at least one of scrolling operation, point selection operation and drag operation).

[0078] For example, in an embodiment of this application, the module adding step S110 may further include: in response to the successful detection of the selection operation, visually presenting the plurality of template IP modules selected by the selection operation in the module template library as icons in a graphical user interface. The graphical user interface may be loaded and enabled by running a development program, and the plurality of template IP modules selected by the selection operation are visually presented as icons in the work area of ​​the graphical user interface.

[0079] For example, in an embodiment of this application, the graphical user interface may include a first graphical user interface, which may include an interface panel of a module template library and a first visualization window that provides or includes a work area. The interface panel of the module template library can visualize all available template IP modules in the module template library as icons, and the work area of ​​the first visualization window refers to the human-computer interaction area for implementing integrated design using selected template IP modules. In this case, the module adding step S110 may specifically include: detecting a selection operation on any one of the multiple template IP modules in the interface panel of the module template library; and the module adding step S110 may also specifically include: visually displaying the multiple template IP modules selected by the selection operation in the pre-created module template library as icons in the first visualization window (e.g., the work area of ​​the first visualization window).

[0080] For example, in an embodiment of this application, the selection operation of the interface panel of the module template library detected in the module adding step S110 may include: scrolling and clicking operations of the interface panel of the module template library, and dragging operations between the interface panel of the module template library and the first visualization window.

[0081] For example, in an embodiment of this application, the module configuration step S130 may include: detecting configuration operations on a selected plurality of template IP modules in a graphical user interface; wherein, the configuration operation is a human-computer interaction operation.

[0082] For example, in an embodiment of this application, the module configuration step S130 may further include: determining the module interface configuration information set for the template IP module based on the successfully detected configuration operation of each of the selected plurality of template IP modules; wherein, the module interface configuration information of each of the plurality of template IP modules includes the interface protocol and interface attributes of the template IP module.

[0083] For example, in an embodiment of this application, the interface protocol in the module interface configuration information of any one of the selected template IP modules is used to define the communication standard on which the template IP module performs data communication. For instance, in an embodiment of this application, if the subnet of the artificial intelligence chip is an AMBA protocol subnet, then the interface protocol in the module interface configuration information of each template IP module may include at least one AMBA protocol such as AXI protocol, AHB protocol, or APB protocol.

[0084] For example, in an embodiment of this application, in the module interface configuration information of any one of the selected multiple template IP modules, the interface attribute is used to define the working parameters of the template IP module when using a specific interface protocol.

[0085] For example, in the embodiments of this application, in the module interface configuration information of any one of the selected plurality of template IP modules, the working parameters defined by the interface attributes may include at least one of numerical parameters and Boolean parameters.

[0086] For example, in the embodiments of this application, in the module interface configuration information of any one of the selected plurality of template IP modules, the numerical parameters in the working parameters defined by the interface attributes may include at least one of the following: data bit width, address bit width, identifier ID bit width, burst length, and burst size. The data bit width can be used to characterize the bit width of the effective data transmitted, the address bit width can be used to characterize the bus bit width, the burst length can be used to characterize the number of data transmissions (beats) included in a single burst transmission, and the burst size can be used to characterize the number of bytes transmitted in each burst transmission.

[0087] For example, in the embodiments of this application, in the module interface configuration information of any one of the selected plurality of template IP modules, the Boolean parameters in the working parameters defined by the interface attributes include at least one of the following: whether out-of-order transfer is supported, whether narrow transfer is supported, and whether unaligned transfer is supported. Out-of-order transfer refers to access that is not restricted by the order of initiation; narrow transfer refers to a transmission mode that transmits only valid data with a data bit width smaller than the bus bit width when the data bit width of a single transmission is smaller than the bus bit width; and unaligned transfer refers to access transmission where valid data does not need to be aligned with address boundaries.

[0088] For example, in an embodiment of this application, if the first graphical user interface may include an interface panel of a module template library and a first visualization window that provides or includes a work area, then the module configuration step S130 may specifically include: detecting configuration operations on any one of the multiple template IP modules in the first visualization window.

[0089] For example, in an embodiment of this application, the configuration operation of any one of the selected template IP modules may include a combination of multiple human-computer interaction operations (e.g., a first configuration operation and a second configuration operation occurring sequentially), and the configuration operation of any one of the template IP modules may be guided by the development program. In this case, the module configuration step S130 may specifically include:

[0090] In the first visualization window, a first configuration operation on any one of the selected multiple template IP modules is detected. Based on the successful detection of the first configuration operation on any one of the selected multiple template IP modules in the first visualization window (e.g., the working area of ​​the first visualization window), the interface protocol in the module interface configuration information of the template IP module is determined. The interface protocol in the module interface configuration information of any one of the multiple template IP modules, determined based on the successful first configuration operation, triggers the associated presentation of the configuration panel corresponding to the template IP module in the first visualization window. Furthermore, the configuration panel corresponding to any one of the selected multiple template IP modules may include the interface configuration panel corresponding to each module interface of the template IP module. In the first visualization window, a second configuration operation on the configuration panel corresponding to any one of the multiple template IP modules is detected. Based on the successful detection of the second configuration operation on the configuration panel corresponding to any one of the multiple template IP modules in the first visualization window (e.g., the working area of ​​the first visualization window), the interface attributes in the module interface configuration information of the template IP module are determined.

[0091] For example, in an embodiment of this application, any one of the selected plurality of template IP modules may have a drop-down menu at each module interface (e.g., at the location in the icon of the template IP module used to represent each module interface), and the first configuration operation of any one of the selected plurality of template IP modules in the first visualization window may include a click operation on the drop-down menu at each module interface of the template IP module to determine the interface protocol of the module interface of the template IP module.

[0092] For example, in an embodiment of this application, if the subnet of the artificial intelligence chip is an AMBA protocol subnet, and the interface protocol of any one of the selected multiple template IP modules includes at least one AMBA protocol such as AXI, AHB, or APB, then the drop-down menu at each module interface of the template IP module may include protocol options for at least one AMBA protocol such as AXI, AHB, or APB. Furthermore, in the drop-down menu at each module interface of the template IP module (e.g., at the location in the icon of the template IP module used to represent each module interface), any interface protocol may also include different versions, such as the third version of the AXI protocol (AXI3), the fourth version (AXI4), the fifth version (AXI5), and the simplified version (AXI-Lite).

[0093] For example, in the embodiments of this application, the configuration panel (e.g., interface configuration panel) corresponding to any one of the selected multiple template IP modules may have at least one parameter input window and / or at least one drop-down menu including multiple parameter options. Furthermore, the second configuration operation operation on the configuration panel corresponding to any one of the selected multiple template IP modules in the first visualization window may include: parameter input operation on the parameter input window and / or selection operation on the drop-down menu.

[0094] For example, if the interface protocol in the module interface configuration information of any one of the selected template IP modules is set to any AMBA protocol such as AXI, then the interface attributes involved in the parameter input window and / or drop-down menu of the configuration panel corresponding to the template IP module may include at least one numerical parameter such as data bit width, address bit width, ID bit width, burst length, burst size, and / or at least one Boolean parameter such as whether out-of-order transmission is supported, whether narrow bit width data transmission is supported, and whether unaligned transmission is supported.

[0095] For example, in an embodiment of this application, the module interface configuration information of at least one of the selected plurality of template IP modules may further include at least one of clock signals such as clock domain and operation signals such as reset signal.

[0096] For example, in the embodiments of this application, the module adding step S110 and the module configuration step S130 can be steps executed only once, or at least one of the module adding step S110 and the module configuration step S130 can be steps executed multiple times. For example, the module adding step S110 can be used to select and present multiple template IP modules in batches, and then the module interface configuration information of the selected multiple template IP modules can be configured in batches by executing the module configuration step S130. Alternatively, the module adding step S110 can be used to select and present a template IP module, and the module interface configuration information of the template IP module can be configured by executing the module configuration step S130. Then, the module adding step S110 can be returned to continue to select and present the next template IP module, and the module interface configuration information of the next template IP module can be configured again by executing the module configuration step S130. This process is repeated until the selection and presentation of multiple template IP modules and the configuration of the module interface configuration information of multiple template IP modules are completed.

[0097] For example, in an embodiment of this application, the configuration check step S135 may include: performing a configuration validity check on the module interface configuration information of a selected plurality of template IP modules. The configuration validity check is used to: determine whether there are conflicts in the interface attributes of each template IP module among the plurality of template IP modules. That is, the configuration validity check on the module interface configuration information of any one template IP module is used to: determine whether there are conflicts in the interface attributes of that template IP module.

[0098] For example, in an embodiment of this application, a conflict between interface attributes in the module interface configuration information of any one of the selected multiple template IP modules may include a conflict between at least one of numeric parameters and Boolean parameters. In this case, the configuration check step S135 may use at least one of the following verification rules to verify the configuration legality of the module interface configuration information of the selected multiple template IP modules: whether the numeric parameters in the interface attributes are within a preset legal value range, and whether there is a logical contradiction between the Boolean parameters in the interface attributes.

[0099] For example, in an embodiment of this application, when the interface protocol in the module interface configuration information of any one of the selected template IP modules is set to (e.g., set to) the AXI4 protocol, if the burst length of an interface of the template IP module, as represented by the interface attribute, is set to (e.g., set to) 256 in the module interface configuration information of the template IP module, then, since the maximum burst length specified by the AXI4 protocol is 16, the configuration validity check determines that the interface attribute (i.e., the numerical parameter) of the template IP module has a conflict. The conflict check for Boolean parameters in the configuration validity check is similar, and will not be illustrated here.

[0100] For example, in an embodiment of this application, the configuration validity check of the module interface configuration information of any one of the selected template IP modules in the configuration check step S135 can be triggered in response to the successful detection of the module interface configuration information of the template IP module in the module configuration step S130 (i.e., the setting or configuration of the module interface configuration information of the template IP module is completed). In this case, if the configuration validity check of the module interface configuration information of any one template IP module in the configuration check step S135 fails, that is, there is a conflict between the interface attributes of the template IP module, it indicates that the module interface configuration information of the template IP module needs to be modified, and the module configuration step S130 is returned to re-detect the modified module interface configuration information of the template IP module.

[0101] For example, in an embodiment of this application, the configuration check step S135 may further include: in response to the failure of configuration validity verification of the module interface configuration information of any one of the multiple template IP modules, presenting a first modification prompt message corresponding to the template IP module through a graphical user interface (e.g., presented in the first visualization window of the first graphical user interface). The first modification prompt message can be used to guide the modification direction of the module interface configuration information of the template IP module, and the first modification prompt message may include attribute conflict information between interface attributes that caused the configuration validity verification failure.

[0102] For example, in an embodiment of this application, the topology editing step S150 may include: after the configuration validity verification of the selected multiple template IP modules is successful, detecting the topology connection relationship created between the selected multiple template IP modules (e.g., multiple template IP modules visualized in the work area of ​​the graphical user interface) through the graphical user interface.

[0103] For example, in an embodiment of this application, the graphical user interface loaded and enabled by the development program may further include a second graphical user interface; wherein, the second graphical user interface may include an operation panel for drawing tools and a second visualization window that provides or includes a work area, and when the second graphical user interface is presented, each template IP module visualized in icon form in the first graphical user interface (e.g., the work area of ​​the first visualization window) can switch to the second graphical user interface (the work area of ​​the second visualization window) to continue to be visualized in icon form. In this case, the topology editing step S150 may specifically include: determining the topology connection relationship created between multiple template IP modules by detecting the interconnection operation using the drawing tools in the second visualization window (e.g., the work area of ​​the second visualization window).

[0104] For example, in an embodiment of this application, the interface switching from the first graphical user interface to the second graphical user interface can be enabled by the successful configuration validity verification of multiple template IP modules in configuration check step S135.

[0105] For example, in an embodiment of this application, the topology check step S155 may include: performing an interconnection legality verification on the topology connection relationship between selected multiple template IP modules. The interconnection legality verification is used to: determine whether the module interface configuration information of each pair of interconnected template IP modules matches. That is, the interconnection legality verification of the topology connection relationship between any pair of template IP modules is used to: determine whether the module interface configuration information of the pair of template IP modules that have a topology connection matches.

[0106] For example, in an embodiment of this application, the topology check step S155 may use at least one of the following matching rules to verify the interconnection legality of the topology connection relationship between the selected plurality of template IP modules:

[0107] Protocol matching rules are used to verify whether the interface protocols of each pair of selected template IP modules that have a topological connection relationship match.

[0108] The attribute matching rules are used to verify whether the interface attributes of each pair of selected template IP modules that have a topological connection relationship match.

[0109] For example, in the embodiments of this application, the above-mentioned protocol matching rules can be specifically used to: verify whether the interface protocols of each pair of template IP modules that have a topological connection relationship among the selected multiple template IP modules meet the following conditions: the interface protocols of the pair of template IP modules are the same as each other, or the interface protocols of the pair of template IP modules include a combination of preset compatible interface protocols.

[0110] For example, suppose a pair of template IP modules with a topological connection among multiple template IP modules includes a first template IP module and a second template IP module. The interface protocol in the module interface configuration information of the first template IP module is set to (for example, set to) the AXI4 protocol, and the interface protocol in the module interface configuration information of the second template IP module is set to (for example, set to) the APB protocol. Then, based on the above protocol matching rules, the topology check step S155 can determine that the interface protocols of the pair of template IP modules do not match through interconnection legality verification, unless the interconnection path between the template IP modules contains a protocol conversion bridge module.

[0111] For example, in embodiments of this application, the attribute matching rules described above may specifically include at least one of the following matching rules:

[0112] Data bit width matching rules are used to verify whether each pair of template IP modules with a topological connection relationship among the selected multiple template IP modules meets the following condition: the data bit width of one of the template IP modules configured as the master device is an integer multiple of the data bit width of the other template IP module configured as the slave device.

[0113] Address mapping rules are used to verify whether each pair of template IP modules with a topological connection among the selected template IP modules meets the following condition: there is a preset overlap or inclusion relationship between the address space range of one template IP module configured as the master device and the address space range of the other template IP module configured as the slave device.

[0114] For example, in an embodiment of this application, the topology check step S155, which verifies the interconnection legality of the topology connection relationship between selected multiple template IP modules, can be triggered in response to the successful detection of the local topology connection relationship between any pair of template IP modules in the topology editing step S150, or it can be triggered in response to the successful detection of the global topology connection relationship between multiple template IP modules in the topology editing step S150.

[0115] For example, in an embodiment of this application, if the interconnection validity check of the topology connection relationship between any pair of template IP modules fails in the topology check step S155, that is, the interface protocol and / or interface attributes in the module interface configuration information of the pair of template IP modules do not match, it indicates that the module interface configuration information of the template IP module needs to be modified. Then, the process returns to the module configuration step S130 to re-check the modified module interface configuration information of the template IP module, and then the configuration check step S135 is re-executed. In this case, the graphical user interface of the development program is triggered to switch back from the second graphical user interface to the first graphical user interface.

[0116] For example, in an embodiment of this application, the topology check step S155 may further include: in response to the failure of the interconnection validity check of any pair of interconnected template IP modules among a plurality of template IP modules, presenting a second modification prompt message for the corresponding interconnected pair of template IP modules through a graphical user interface (e.g., presented in a first visualization window of the first graphical user interface when the interface is switched back). The second modification prompt message can be used to guide the direction of modification of the module interface configuration information of the pair of template IP modules, and the second modification prompt message may include information on the failure to match between interface protocols and / or interface attributes that caused the interconnection validity check to fail.

[0117] For example, in an embodiment of this application, the requirement generation step S170 may include: after the interconnection validity verification of the topological connection relationship between multiple template IP modules is successful, generating a subnet parameterized requirement file based on the topological connection relationship between the multiple template IP modules. The subnet parameterized requirement file can be used for the integrated design of subnets in an artificial intelligence chip, and specifically, it can be used to generate the RTL code of the subnet in the integrated design.

[0118] For example, in embodiments of this application, the subnet parameterization requirement file can be visually presented when opened, allowing integration design engineers to manually load the subnet parameterization requirements into the software tool during the subnet planning phase; alternatively, the subnet parameterization requirement file can also have a file format compatible with the software tool, enabling integration design engineers to load the subnet parameterization requirement file into the software tool during the subnet planning phase, thus achieving automatic loading of the subnet parameterization requirements into the software tool. For instance, if the file format of the subnet parameterization requirement file compatible with the software tool is XML (Extensible Markup Language), that is, the subnet parameterization requirement file can be an XML format file.

[0119] As can be seen from the above, the method for integrated design of artificial intelligence chips in this application embodiment can move the verification of the integrated design to before the generation of RTL code for the subnet, replacing the requirement gathering stage and subnet verification stage that rely entirely on manual methods in related technologies. This reduces the probability of repeatedly going through the subnet verification and subnet planning stages after RTL code generation due to errors discovered during the subnet verification stage. Therefore, the method for integrated design of artificial intelligence chips in this application embodiment helps improve the efficiency of integrated design for artificial intelligence chips.

[0120] Furthermore, if the method for integrated design of artificial intelligence chips in this application embodiment also generates guiding modification prompts by automatically verifying the template IP module, then the error correction efficiency, which is moved forward to before the generation of RTL code in the subnet, can be higher.

[0121] In embodiments of this application, the independently runnable development program can also be viewed as a virtual device, and this virtual device can be referred to as a device for the integrated design of artificial intelligence chips.

[0122] Figure 2 This is an exemplary structural diagram of an apparatus for the integrated design of an artificial intelligence chip, as described in an embodiment of this application. Please refer to... Figure 2In embodiments of this application, the apparatus for integrated design of artificial intelligence chips may include a module adding unit 210, a module configuration unit 230, a configuration checking unit 235, a topology editing unit 250, a topology checking unit 255, and a requirement generation unit 270.

[0123] For example, in an embodiment of this application, the module adding unit 210 can be used to: detect a selection operation on a pre-created module template library in a graphical user interface; and, in response to the successful detection of the selection operation, visualize multiple template IP modules selected by the selection operation in the module template library as icons in the graphical user interface. The selection operation is a human-computer interaction operation (e.g., at least one of scrolling, clicking, and dragging), the graphical user interface can be loaded and enabled by running a development program, and the multiple template IP modules selected by the selection operation are visualized as icons in the working area of ​​the graphical user interface.

[0124] For example, in an embodiment of this application, the graphical user interface may include a first graphical user interface, which may include an interface panel of a module template library and a first visualization window that provides or includes a work area. In this case, the module adding unit 210 may be specifically configured to: detect a selection operation on any one of a plurality of template IP modules in the interface panel of the module template library, and visually present the plurality of template IP modules selected by the selection operation from the pre-created module template library in the form of icons in the first visualization window (e.g., the work area of ​​the first visualization window).

[0125] For example, in an embodiment of this application, the selection operation of the interface panel of the module template library detected by the module adding unit 210 may include: scrolling and clicking operations of the interface panel of the module template library, and dragging operations between the interface panel of the module template library and the first visualization window.

[0126] For example, in an embodiment of this application, the module configuration unit 230 can be used to: detect configuration operations on a selected plurality of template IP modules in a graphical user interface; and, based on the successfully detected configuration operation on any one of the selected plurality of template IP modules, determine the module interface configuration information set for the template IP module; wherein the configuration operation is a human-computer interaction operation, and the module interface configuration information of each template IP module in the plurality of template IP modules includes the interface protocol and interface attributes of the template IP module.

[0127] For example, in an embodiment of this application, as described above, the interface protocol in the module interface configuration information of any one of the selected template IP modules is used to define the communication standard on which the template IP module performs data communication.

[0128] For example, in the embodiments of this application, as described above, in the module interface configuration information of any one of the selected multiple template IP modules, the interface attribute is used to define the working parameters of the template IP module when using a certain interface protocol. For example, the working parameters defined by the interface attribute may include at least one of the numerical parameters and Boolean parameters described above.

[0129] For example, in an embodiment of this application, if the first graphical user interface may include an interface panel of a module template library and a first visualization window that provides or includes a work area, then the module configuration unit 230 may be specifically configured to: detect configuration operations on any one of the multiple template IP modules in the first visualization window.

[0130] For example, in an embodiment of this application, the configuration operation of any one of the selected template IP modules may include a combination of multiple human-computer interaction operations (e.g., a first configuration operation and a second configuration operation occurring sequentially), and the configuration operation of any one of the template IP modules may be guided by the development program. In this case, the module configuration unit 230 may be specifically configured as follows:

[0131] In the first visualization window, a first configuration operation on any one of the selected multiple template IP modules is detected. Based on the successful detection of the first configuration operation on any one of the selected multiple template IP modules in the first visualization window (e.g., the working area of ​​the first visualization window), the interface protocol in the module interface configuration information of the template IP module is determined. The interface protocol in the module interface configuration information of any one of the multiple template IP modules is used to trigger the associated presentation of the configuration panel corresponding to the template IP module in the first visualization window based on the successful determination of the first configuration operation. As illustrated in the example above, the configuration panel corresponding to any one of the selected multiple template IP modules may include the interface configuration panel corresponding to each module interface of the template IP module.

[0132] In the first visualization window, a second configuration operation is detected on the configuration panel corresponding to any one of the multiple template IP modules. Based on the second configuration operation successfully detected in the first visualization window (e.g., the working area of ​​the first visualization window) on the configuration panel corresponding to any one of the multiple template IP modules, the interface attributes in the module interface configuration information of the template IP module are determined.

[0133] For example, in the embodiments of this application, the module adding unit 210 and the module configuration unit 230 may be run sequentially in one go, or at least one of the module adding unit 210 and the module configuration unit 230 may be run alternately multiple times. For example, the module adding unit 210 can be used to select and present multiple template IP modules in batches, and then the module configuration unit 230 can be used to configure the module interface configuration information of the selected multiple template IP modules in batches. Alternatively, the module adding unit 210 can be used to select and present a template IP module, and the module configuration unit 230 can be used to configure the module interface configuration information of the template IP module. Then the module adding unit 210 can be used to select and present the next template IP module, and the module configuration unit 230 can be used to configure the module interface configuration information of the next template IP module. This cycle is repeated until the selection and presentation of multiple template IP modules and the configuration of the module interface configuration information of multiple template IP modules are completed.

[0134] For example, in an embodiment of this application, the configuration checking unit 235 can be used to: perform configuration validity verification on the module interface configuration information of a selected plurality of template IP modules. Specifically, the configuration validity verification is used to: determine whether there are conflicts in the interface attributes of each template IP module among the plurality of template IP modules. That is, the configuration validity verification of the module interface configuration information of any one template IP module is used to: determine whether there are conflicts in the interface attributes of that template IP module.

[0135] For example, in an embodiment of this application, a conflict between interface attributes in the module interface configuration information of any one of the selected template IP modules may include a conflict between at least one of numeric parameters and Boolean parameters. In this case, the configuration checking unit 235 may use at least one of the following verification rules to verify the configuration legality of the module interface configuration information of the selected template IP modules: whether the numeric parameters in the interface attributes are within a preset legal value range, and whether there is a logical contradiction between the Boolean parameters in the interface attributes.

[0136] For example, in an embodiment of this application, the configuration check unit 235 verifies the configuration validity of the module interface configuration information of any one of the selected template IP modules. This verification can be triggered by the module configuration unit 230's successful detection of the module interface configuration information of the template IP module (i.e., the setting or configuration of the module interface configuration information of the template IP module is complete). In this case, if the configuration check unit 235 fails to verify the configuration validity of the module interface configuration information of any one template IP module, that is, if there is a conflict between the interface attributes of the template IP module, it indicates that the module interface configuration information of the template IP module needs to be modified, and the modified module interface configuration information of the template IP module is re-detected by running the module configuration unit 230.

[0137] For example, in an embodiment of this application, the configuration checking unit 235 may be further configured to: in response to the failure of configuration validity verification of the module interface configuration information of any one of the multiple template IP modules, present a first modification prompt message corresponding to the template IP module through a graphical user interface (e.g., presented in a first visualization window of the first graphical user interface). The first modification prompt message may be used to guide the modification direction of the module interface configuration information of the template IP module, and may include attribute conflict information between interface attributes that caused the configuration validity verification failure.

[0138] For example, in an embodiment of this application, the topology editing unit 250 can be used to: after the configuration legality verification of the selected multiple template IP modules is successful, detect the topology connection relationship created between the multiple template IP modules (e.g., multiple template IP modules visualized in the form of a chart in the working area of ​​the graphical user interface).

[0139] For example, in an embodiment of this application, the graphical user interface enabled by the development program loading may further include a second graphical user interface; wherein, the second graphical user interface may include an operation panel for drawing tools and a second visualization window that provides or includes a work area, and when the second graphical user interface is presented, each template IP module visualized in icon form in the first graphical user interface (e.g., the work area of ​​the first visualization window) can switch to the second graphical user interface (the work area of ​​the second visualization window) to continue to be visualized in icon form. In this case, the topology editing unit 250 may be specifically configured to: determine the topology connection relationship created between multiple template IP modules by detecting interconnection operations using drawing tools in the second visualization window (e.g., the work area of ​​the second visualization window).

[0140] For example, in an embodiment of this application, the interface switching from the first graphical user interface to the second graphical user interface can be enabled by the configuration checking unit 235 successfully verifying the configuration validity of multiple template IP modules.

[0141] For example, in an embodiment of this application, the topology checking unit 255 can be used to: perform interconnection legality verification on the topology connection relationship between selected multiple template IP modules. The interconnection legality verification is used to: determine whether the module interface configuration information of each pair of interconnected template IP modules matches. That is, the interconnection legality verification of the topology connection relationship between any pair of template IP modules is used to: determine whether the module interface configuration information of the pair of template IP modules that have a topology connection matches.

[0142] For example, in an embodiment of this application, the topology checking unit 255 may use at least one of the following matching rules to verify the interconnection legality of the topology connection relationship between selected multiple template IP modules:

[0143] Protocol matching rules are used to verify whether the interface protocols of each pair of selected template IP modules that have a topological connection relationship match.

[0144] The attribute matching rules are used to verify whether the interface attributes of each pair of selected template IP modules that have a topological connection relationship match.

[0145] For example, in the embodiments of this application, the above-mentioned protocol matching rules can be specifically used to: verify whether the interface protocols of each pair of template IP modules that have a topological connection relationship among the selected multiple template IP modules meet the following conditions: the interface protocols of the pair of template IP modules are the same as each other, or the interface protocols of the pair of template IP modules include a combination of preset compatible interface protocols.

[0146] For example, suppose a pair of template IP modules with a topological connection among multiple template IP modules includes a first template IP module and a second template IP module. The interface protocol in the module interface configuration information of the first template IP module is set to (for example, set to) the AXI4 protocol, and the interface protocol in the module interface configuration information of the second template IP module is set to (for example, set to) the APB protocol. Then, based on the above protocol matching rules, the topology check step S155 can determine that the interface protocols of the pair of template IP modules do not match through interconnection legality verification, unless the interconnection path between the template IP modules contains a protocol conversion bridge module.

[0147] For example, in embodiments of this application, the attribute matching rules described above may specifically include at least one of the following matching rules:

[0148] Data bit width matching rules are used to verify whether each pair of template IP modules with a topological connection relationship among the selected multiple template IP modules meets the following condition: the data bit width of one of the template IP modules configured as the master device is an integer multiple of the data bit width of the other template IP module configured as the slave device.

[0149] Address mapping rules are used to verify whether each pair of template IP modules with a topological connection among the selected template IP modules meets the following condition: there is a preset overlap or inclusion relationship between the address space range of one template IP module configured as the master device and the address space range of the other template IP module configured as the slave device.

[0150] For example, in the embodiments of this application, the topology checking unit 255 verifies the interconnection legality of the topology connection relationship between selected multiple template IP modules. This can be triggered by the topology editing unit 250 successfully detecting the local topology connection relationship between any pair of template IP modules, or it can be triggered by the topology editing unit 250 successfully detecting the global topology connection relationship between multiple template IP modules.

[0151] For example, in an embodiment of this application, if the topology checking unit 255 fails to verify the interconnection legality of the topology connection relationship between any pair of template IP modules, that is, if the interface protocol and / or interface attributes in the module interface configuration information of the pair of template IP modules do not match, it indicates that the module interface configuration information of the template IP module needs to be modified. The modified module interface configuration information of the template IP module is then re-detected by the running module configuration unit 230, and then the configuration checking unit 235 is run again. In this case, the graphical user interface of the development program is triggered to switch back from the second graphical user interface to the first graphical user interface.

[0152] For example, in an embodiment of this application, the topology checking unit 255 may be further configured to: in response to the failure of the interconnection validity check of any pair of interconnected template IP modules among a plurality of template IP modules, present a second modification prompt message for the corresponding interconnected pair of template IP modules through a graphical user interface (e.g., presented in a first visualization window of the first graphical user interface when the interface is switched back). The second modification prompt message may be used to guide the direction of modification of the module interface configuration information of the pair of template IP modules, and the second modification prompt message may include information on the failure to match between interface protocols and / or interface attributes that caused the interconnection validity check to fail.

[0153] For example, in an embodiment of this application, the requirement generation unit 270 can be used to: after the interconnection legality verification of the topological connection relationship between multiple template IP modules is successful, generate a subnet parameterized requirement file based on the topological connection relationship between the multiple template IP modules. The subnet parameterized requirement file can be used for the integrated design of subnets in an artificial intelligence chip, and specifically, it can be used to generate the RTL code of the subnet in the integrated design. For example, the subnet parameterized requirement file can be an XML format file.

[0154] As can be seen from the above, the apparatus for integrated design of artificial intelligence chips in this application embodiment can move the verification of the integrated design forward to before the generation of RTL code for the subnet, replacing the requirement gathering stage and subnet verification stage that rely entirely on manual methods in related technologies. This reduces the probability of repeatedly going through the subnet verification and subnet planning stages after RTL code generation due to errors discovered during the subnet verification stage. Therefore, the apparatus for integrated design of artificial intelligence chips in this application embodiment helps improve the efficiency of integrated design for artificial intelligence chips.

[0155] Furthermore, if the apparatus for integrated design of artificial intelligence chips in this application embodiment also generates guiding modification prompts by automatically verifying the template IP module, then the error correction efficiency, which is moved forward to before the generation of RTL code in the subnet, can be higher.

[0156] In another embodiment of this application, an electronic device is provided, which includes a processor and can be used to perform the integrated design method for an artificial intelligence chip described in the foregoing embodiments.

[0157] In another embodiment of this application, a non-transitory computer-readable storage medium is provided that stores instructions which, when executed by a processor, cause the processor to perform the integrated design method for an artificial intelligence chip as described in the foregoing embodiments.

[0158] In another embodiment of this application, a computer program product is provided, which includes computer-executable instructions that, when executed by a processor, can implement the integrated design method for artificial intelligence chips described in the foregoing embodiments.

[0159] It is understood that, in the embodiments of this application, the various parts described by example may be related by an "and / or" relationship. In this document, "and / or" means that the contexts connected by it may be a common "and" relationship or an alternative "or" relationship. Therefore, the various parts having an "and / or" relationship can be understood to include different combinations of situations where the "and / or" between each pair of parts represents a common "and" relationship or an alternative "or" relationship, and such combinations of different situations can be considered substantially equivalent to the scope of "at least one of the parts".

[0160] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A method for integrated design of artificial intelligence chips, characterized in that, include: Detect selection operations of a pre-created module template library in the graphical user interface; In response to the successful detection of the selection operation, the multiple template IP modules selected by the selection operation in the module template library are visualized in the graphical user interface as icons. Detect the configuration operations of the plurality of template IP modules in the graphical user interface; Based on the successfully detected configuration operation of each of the plurality of template IP modules, the module interface configuration information set for the template IP module is determined; wherein, the module interface configuration information of each of the plurality of template IP modules includes an interface protocol for defining the communication standard on which the template IP module performs data communication and an interface attribute for defining the working parameters of the template IP module when using the determined interface protocol. The configuration validity of the module interface configuration information of the plurality of template IP modules is verified to determine whether there are any conflicts in the interface attributes of each template IP module among the plurality of template IP modules; After the configuration validity verification of the module interface configuration information of the plurality of template IP modules is successful, the topological connection relationship created between the plurality of template IP modules through the graphical user interface is detected. The interconnection legality of the topological connection relationship between the plurality of template IP modules is verified to determine whether the module interface configuration information of each pair of interconnected template IP modules in the plurality of template IP modules matches; After the interconnection validity verification of the topology connection relationship between the plurality of template IP modules is successful, a subnet parameterization requirement file based on the topology connection relationship between the plurality of template IP modules is generated; wherein, the subnet parameterization requirement file is used to generate the RTL code of the subnet in the integration design.

2. The method according to claim 1, characterized in that, The operating parameters include at least one of numerical parameters and Boolean parameters.

3. The method according to claim 2, characterized in that, The numerical parameters include at least one of the following: data bit width, address bit width, identifier ID bit width, burst length, and burst size.

4. The method according to claim 2, characterized in that, The Boolean parameter includes at least one of the following: whether out-of-order transmission is supported, whether narrow transmission is supported, and whether unaligned transmission is supported.

5. The method according to claim 2, characterized in that, The configuration validity verification uses at least one of the following verification rules: Whether the numerical parameters in the interface attributes are within the preset range of valid values; Are there any logical contradictions among the Boolean parameters in the interface attributes? 6. The method according to claim 1, characterized in that, The interconnection validity verification uses at least one of the following matching rules: Protocol matching rules are used to verify whether the interface protocols of each pair of template IP modules that have a topological connection relationship match. The attribute matching rules are used to verify whether the interface attributes of each pair of template IP modules that have a topological connection relationship match.

7. The method according to claim 6, characterized in that, The protocol matching rule is specifically used to verify whether the interface protocol of each pair of template IP modules that have a topological connection relationship among the multiple template IP modules satisfies: the interface protocol of the pair of template IP modules is the same as each other, or the interface protocol of the pair of template IP modules includes a combination of preset compatible interface protocols.

8. The method according to claim 6, characterized in that, The attribute matching rules include at least one of the following matching rules: Data bit width matching rules are used to verify whether each pair of template IP modules with a topological connection relationship among the multiple template IP modules satisfies the following condition: the data bit width of one of the template IP modules configured as the master device in the pair of template IP modules is an integer multiple of the data bit width of the other template IP module configured as the slave device. Address mapping rules are used to verify whether each pair of template IP modules with a topological connection among the multiple template IP modules satisfies the following: there is a preset overlap or inclusion relationship between the address space range of one template IP module configured as the master device and the address space range of the other template IP module configured as the slave device.

9. The method according to claim 1, characterized in that, The graphical user interface includes a first graphical user interface; wherein the first graphical user interface includes the interface panel of the module template library and a first visualization window; The detection of the selection operation of the pre-created module template library in the graphical user interface includes: detecting the selection operation in the interface panel of the module template library; The step of visually presenting multiple template IP modules selected by the selection operation in the module template library as icons in the graphical user interface includes: visually presenting the multiple template IP modules selected by the selection operation in the module template library as icons in the first visualization window. The step of detecting configuration operations on the plurality of template IP modules in the graphical user interface includes: detecting the configuration operation on each of the plurality of template IP modules in the first visualization window.

10. The method according to claim 9, characterized in that, The configuration operation includes a first configuration operation and a second configuration operation; The step of determining the module interface configuration information set for each of the plurality of template IP modules based on the successfully detected configuration operation for each template IP module includes: Based on the first configuration operation successfully detected in the first visualization window for each of the plurality of template IP modules, the interface protocol in the module interface configuration information of the template IP module is determined; wherein, the interface protocol in the module interface configuration information of each of the plurality of template IP modules is determined based on the successful determination of the first configuration operation, and is used to trigger the configuration panel corresponding to the template IP module to be associated and presented with the template IP module in the first visualization window. Based on the second configuration operation of the configuration panel corresponding to each of the plurality of template IP modules successfully detected in the first visualization window, the interface attribute in the module interface configuration information of the template IP module is determined.

11. The method according to claim 9, characterized in that, The graphical user interface further includes a second graphical user interface; wherein the second graphical user interface includes an operation panel for drawing tools and a second visualization window; The detection of the topological connection relationship created between the plurality of template IP modules through the graphical user interface includes: determining the topological connection relationship created between the plurality of template IP modules by detecting the interconnection operation using the drawing tool in the second visualization window.

12. The method according to claim 1, characterized in that, The interface protocol includes the AMBA protocol, which includes at least one of the following: AXI protocol, AHB protocol, and APB protocol; or, The method further includes: in response to the failure of configuration validity verification of the module interface configuration information of any one of the plurality of template IP modules, presenting a first modification prompt message corresponding to the template IP module through the graphical user interface; or, The method further includes: in response to the failure of the interconnection validity check of the topological connection relationship between any pair of interconnected template IP modules in the plurality of template IP modules, presenting a second modification prompt message for the corresponding pair of interconnected template IP modules through the graphical user interface; or, The subnet parameterization requirement file is in XML format. or, The subnet includes the AMBA protocol subnet.

13. An apparatus for the integrated design of artificial intelligence chips, characterized in that, include: The module addition unit is used to detect selection operations of a pre-created module template library in the graphical user interface. Furthermore, in response to the successful detection of the selection operation, the multiple template IP modules selected by the selection operation in the module template library are visualized in the graphical user interface as icons. The module configuration unit is configured to: detect configuration operations on the plurality of template IP modules in the graphical user interface; and, based on the successfully detected configuration operations on each of the plurality of template IP modules, determine the module interface configuration information set for that template IP module; wherein the module interface configuration information of each of the plurality of template IP modules includes an interface protocol for defining the communication standard on which the template IP module performs data communication and an interface attribute for defining the working parameters of the template IP module when using the determined interface protocol; The configuration checking unit is used to: perform configuration legality verification on the module interface configuration information of the plurality of template IP modules to determine whether there is a conflict in the interface attributes of each template IP module among the plurality of template IP modules; The topology editing unit is used to: detect the topology connection relationship created between the multiple template IP modules through the graphical user interface after the configuration legality verification of the module interface configuration information of the multiple template IP modules is successful; The topology checking unit is used to: verify the interconnection legality of the topology connection relationship between the plurality of template IP modules, so as to determine whether the module interface configuration information of each pair of interconnected template IP modules in the plurality of template IP modules matches; The requirement generation unit is configured to: after the interconnection validity verification of the topology connection relationship between the plurality of template IP modules is successful, generate a subnet parameterized requirement file based on the topology connection relationship between the plurality of template IP modules; wherein, the subnet parameterized requirement file is used to generate the RTL code of the subnet in the integration design.

14. An electronic device, characterized in that, Includes a processor for performing a method for integrated design of an artificial intelligence chip as described in any one of claims 1 to 12.

15. A non-transitory computer-readable storage medium, characterized in that, The non-transitory computer-readable storage medium stores instructions, which, when executed by a processor, cause the processor to perform a method for integrated design of an artificial intelligence chip as described in any one of claims 1 to 12.

16. A computer program product, characterized in that, It includes computer-executable instructions that, when executed by a processor, implement the method for integrated design of an artificial intelligence chip as described in any one of claims 1 to 12.

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