Display panel, preparation method thereof and display device

Abstract

The application provides a display panel and a preparation method thereof and a display device, and belongs to the technical field of display, and comprises a back plate, a plurality of light emitting units arranged on one side of the back plate, and the plurality of light emitting units are bonded to the back plate; wherein the plurality of light emitting units comprise a plurality of first light emitting units and a plurality of second light emitting units, a stress release area is formed in a light emitting layer of the second light emitting unit, and the orthographic projection of the light emitting layer of the second light emitting unit on the back plate does not overlap with the orthographic projection of the stress release area on the back plate. Through the display panel and the preparation method thereof and the display device provided by the application, the occurrence of cracks and other adverse conditions in the epitaxial layer can be reduced, and the yield of the display panel is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and more specifically, to a display panel, a method for manufacturing the same, and a display device. Background Technology

[0002] Micro-LEDs are light-emitting diodes with dimensions on the micrometer scale. Due to their small size, micro-LEDs can be used as pixels on display panels, and display panels made using micro-LEDs are called micro-LED display panels. Micro-LED technology involves miniaturizing existing LEDs to below 100µm, approximately 1% of the current LED size, and then using mass transfer technology to transfer these micrometer-sized micro / mini-LEDs onto a driving substrate, thereby forming micro-LED displays of various sizes.

[0003] When LED chips are manufactured to the Micro level, a chip structure can effectively reduce the price of a single chip, but the processing difficulty increases. In addition, the processing cost of wafer-level chips is much higher than that of glass-based FPD production lines. Therefore, developing LED processing on glass substrates has become a solution to reduce the cost of Micro-LED chips, which is to transfer the epitaxial layer to the glass substrate for processing.

[0004] However, the mismatch between the epitaxial layer and the substrate during growth generates significant internal stress. Since substrate removal is a prerequisite for epitaxial layer transfer, the released internal stress after substrate removal can lead to cracking in the transferred epitaxial layer. This is especially true for medium to large-sized epitaxial layers, where the internal stress is even greater due to their larger size. This prevents the fabrication of medium to large-sized glass-based Micro-LED display devices during patterning, limiting it to the fabrication of micro-sized devices, and further increasing the risk of epitaxial fracture. Summary of the Invention

[0005] This application aims to provide a display panel and its manufacturing method, as well as a display device, with the goal of reducing defects such as cracks in the epitaxial layer and improving the yield of the display panel.

[0006] The first aspect of this application provides a display panel, including: Back panel; Multiple light-emitting units are disposed on one side of the back plate, and the multiple light-emitting units are bonded to the back plate; The plurality of light-emitting units include a plurality of first light-emitting units and a plurality of second light-emitting units. A stress-relieving region is formed in the light-emitting layer of the second light-emitting unit. The orthographic projection of the light-emitting layer of the second light-emitting unit on the back plate does not overlap with the orthographic projection of the stress-relieving region on the back plate.

[0007] Optionally, the area of ​​the stress relief zone projected onto the back plate accounts for a proportion of the area of ​​the light-emitting layer of the second light-emitting unit projected onto the back plate that is greater than or equal to 0.01% and less than or equal to 1.00%.

[0008] Optionally, the stress relief area in the light-emitting layer of each second light-emitting unit is located at a different position in the corresponding second light-emitting unit.

[0009] Optionally, the stress relief area in the light-emitting layer of some of the second light-emitting units is located in the same position within the corresponding second light-emitting unit.

[0010] Optionally, the stress relief area in the light-emitting layer of each of the second light-emitting units has the same orthographic projection shape on the back plate.

[0011] Optionally, the stress relief area in the light-emitting layer of a portion of the plurality of second light-emitting units has the same orthographic projection shape on the back plate.

[0012] Optionally, the orthographic projection shape of the stress relief area in the light-emitting layer of each of the second light-emitting units on the back plate is different.

[0013] Optionally, the orthographic projection shape of the stress relief area on the back plate includes a strip, a circle, and a square.

[0014] Optionally, the stress relief zone is filled with a dielectric layer.

[0015] Optionally, the material of the dielectric layer includes silicone rubber and silica sol particles.

[0016] Optionally, the display panel further includes: A color filter layer is disposed on the side of the plurality of light-emitting units facing away from the back plate.

[0017] A second aspect of this application provides a display device, including a display panel as provided in the first aspect of this application.

[0018] A third aspect of this application provides a method for manufacturing a display panel, the method comprising: Provide wafer-level substrates with epitaxial layers; The epitaxial layer is subjected to a first patterning process to form multiple nanoscale stress relief zones; The epitaxial layer is bonded to the glass substrate, the wafer-level substrate is peeled off, and the epitaxial layer is subjected to a second patterning process to form multiple light-emitting units; A backplate is provided to bond the plurality of light-emitting units to the backplate; The plurality of light-emitting units include a plurality of first light-emitting units and a plurality of second light-emitting units. The light-emitting layer of the second light-emitting unit has the stress-relieving region. The orthographic projection of the light-emitting layer of the second light-emitting unit on the back plate does not overlap with the orthographic projection of the stress-relieving region on the back plate.

[0019] Optionally, the pattern of the first patterning process includes continuous dividing lines, discontinuous dividing lines, and arrayed block patterns.

[0020] Optionally, the etching depth of the first patterning process is less than the thickness of the epitaxial layer.

[0021] Beneficial effects: This application provides a display panel and its manufacturing method and display device. The display panel includes a back panel and a plurality of light-emitting units, wherein the plurality of light-emitting units include a first light-emitting unit and a second light-emitting unit. A stress-relieving region is formed in the light-emitting layer of the second light-emitting unit. The orthographic projection of the light-emitting layer of the second light-emitting unit on the back panel does not overlap with the orthographic projection of the stress-relieving region on the back panel. The stress-relieving region can at least partially release the internal stress in the epitaxial layer forming the light-emitting unit, thereby reducing defects such as cracks in the epitaxial layer and improving the yield of the display panel. Attached Figure Description

[0022] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 This is a schematic diagram of the planar structure of a display panel according to an embodiment of this application; Figure 2 yes Figure 1 Schematic diagram of the structure at section A-A'; Figure 3 This is a schematic diagram of the planar structure of a display panel with stress relief zones at different locations, according to an embodiment of this application. Figure 4 This is a schematic diagram of a planar structure of a display panel having stress relief areas of partially identical shape, according to an embodiment of this application. Figure 5 This is a schematic diagram of the planar structure of a display panel with stress relief zones of different shapes according to an embodiment of this application; Figure 6 This is a schematic diagram of the structure of a display panel based on a tri-color light-emitting unit according to an embodiment of this application; Figure 7 This is a schematic diagram of the structure of a display panel of a flip-chip light-emitting unit according to an embodiment of this application; Figure 8 This is a schematic diagram of a display panel with a backplate bonding pad size smaller than the bonding pad size on the light-emitting unit, according to an embodiment of this application. Figure 9 This is a schematic diagram of the structure of a display panel with light-emitting units connected in series according to an embodiment of this application; Figure 10 This is a schematic diagram of the structure of a display panel in which a dielectric layer is filled in the stress relief area according to an embodiment of this application; Figure 11 This is a flowchart illustrating the steps of a method for manufacturing a display panel according to an embodiment of this application; Figure 12 This is a schematic diagram of a wafer-level substrate with an epitaxial layer according to an embodiment of this application; Figure 13 This is a schematic diagram of the structure of an epitaxial layer after a first patterning process, wherein the pattern is a continuous dividing line, according to an embodiment of this application. Figure 14 This is a schematic diagram of the structure of an epitaxial layer after a first patterning process, wherein the pattern is a discontinuous dividing line, according to an embodiment of this application. Figure 15 This is a schematic diagram of the structure of an epitaxial layer after a first patterning process, wherein the pattern is a block pattern, according to an embodiment of this application. Figure 16 This is a schematic diagram of the structure in which the epitaxial layer is temporarily bonded to the glass substrate in a method for fabricating a display panel according to an embodiment of this application; Figure 17 This is a schematic diagram of the structure after the wafer-level substrate is peeled off in a method for fabricating a display panel according to an embodiment of this application; Figure 18 This is a schematic diagram of the structure after the epitaxial layer undergoes a second patterning process in a method for manufacturing a display panel according to an embodiment of this application; Figure 19 A schematic diagram of the structure in an embodiment of this application for a method of fabricating a display panel, wherein the passivation layer is fabricated and the dissociative adhesive layer is etched and the adhesive layer is etched. Figure 20 This is a schematic diagram of the structure of the bonding metal pad in a method for manufacturing a display panel according to an embodiment of this application.

[0024] Explanation of reference numerals in the attached figures: 10, backplate; 20, light-emitting unit; 201, first light-emitting unit; 202, second light-emitting unit; 30, stress relief region; 40, wafer-level substrate; 50, epitaxial layer; 501, first semiconductor layer; 502, active layer; 503, second semiconductor layer; 60, glass substrate; 70, color filter layer; 80, dielectric layer; 91, dissociative adhesive layer; 92, adhesive layer; 93, passivation layer; 94, bonding metal pad. Detailed Implementation

[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0026] Reference Figure 1 As shown, this application discloses a display panel, which includes a back panel 10 and a plurality of light-emitting units 20 disposed on the back panel 10.

[0027] Specifically, a driving circuit and a pixel circuit for driving the display panel are fabricated on the backplane 10. The driving circuit and pixel circuit on the backplane 10 can drive multiple light-emitting units 20 to emit light, thereby realizing the display of image content. The backplane 10 may include a glass-based backplane, a silicon-based backplane, or an LTPS (Low Temperature Poly-Silicon) backplane.

[0028] Reference Figure 1 and Figure 2 As shown, multiple light-emitting units 20 are disposed on one side of the back plate, and the multiple light-emitting units 20 are bonded to the back plate 10 through metal pads. In this embodiment, the display panel is a Micro-LED display panel, that is, the light-emitting units 20 are epitaxially grown on the wafer-level substrate 40 and formed by a patterning process. In the display panel of this embodiment, the epitaxial layer 50 on the wafer-level substrate 40 needs to be transferred to a large-size glass substrate 60 first, and then transferred to the back plate 10 by eutectic metal bonding after the formation of multiple light-emitting units 20.

[0029] In the first epitaxial bonding, a homogeneous metal was used for bonding. On the one hand, metal bonding has high bonding strength, which can well ensure the quality of the epitaxial layer 50 after it is removed from the wafer-level substrate 40. On the other hand, the homogeneous metal can be used as the bonding metal required for the backplate 10, so there is no need to re-fabricate it.

[0030] When transferring the epitaxial layer 50 onto the large-size glass substrate 60, the epitaxial layer 50 may crack due to its internal stress, affecting the patterning of the epitaxial layer 50. Therefore, in this embodiment, a patterning process is performed on the epitaxial layer 50 before transfer. This patterning process is nanoscale; for example, multiple nanoscale openings can be formed on the epitaxial layer 50, thus releasing some or all of the internal stress of the epitaxial layer 50 before transfer. Consequently, when a second patterning process is performed on the epitaxial layer 50 to form light-emitting units, stress-relieving regions 30 will exist in some of the light-emitting units; that is, stress-relieving regions 30 are formed in the first patterning process.

[0031] Specifically, refer to Figure 1 and Figure 2 As shown in the embodiments of this application, the plurality of light-emitting units 20 includes a plurality of first light-emitting units 201 and a plurality of second light-emitting units 202, which can be arranged in a cross pattern or spaced apart. The light-emitting layer of the second light-emitting unit 202 has a stress-relief region 30 formed therein, and the orthographic projection of the light-emitting layer of the second light-emitting unit 202 onto the back plate 10 does not overlap with the orthographic projection of the stress-relief region 30 onto the back plate 10; that is, no light-emitting layer is formed within the stress-relief region 30. However, as mentioned above, these stress-relief regions 30 are nanoscale, and compared to the micrometer-scale light-emitting units 20, the proportion of stress-relief regions 30 is very small. Therefore, these stress-relief regions 30 have little impact on the light-emitting performance of the second light-emitting unit 202.

[0032] In this embodiment, the positive projection area of ​​the stress relief area 30 on the back plate 10 occupies a proportion greater than or equal to 0.01% and less than or equal to 1.00% of the positive projection area of ​​the light-emitting layer of the second light-emitting unit 202 on the back plate 10. For example, the proportion of the positive projection area of ​​the stress relief area 30 on the back plate 10 to the positive projection area of ​​the light-emitting layer of the second light-emitting unit 202 on the back plate 10 can be 0.01%, 0.10%, 0.25%, 0.50%, 1.00%, etc., and can be set by those skilled in the art according to actual needs.

[0033] Reference Figure 2As shown in the embodiment of this application, the display panel may further include a color filter layer 70 located on the side of the plurality of light-emitting units 20 away from the back plate 10. The color filter layer 70 can be used to make each light-emitting unit 20 emit light of different colors, thereby realizing the color display of graphics.

[0034] The display panel provided in this application embodiment can release part or all of the internal stress of the epitaxial layer 50 by utilizing the stress relief region 30 formed by the patterning process of the epitaxial layer 50, thereby reducing defects such as cracks that occur when the epitaxial layer 50 is transferred to a large-size glass substrate 60, thus improving the yield of the display panel. Furthermore, this application can realize the process of large-area light-emitting units by using this method, which has the advantages of high quality of whole-area epitaxial transfer and high quality of light-emitting units after transfer.

[0035] Reference Figure 3 As shown, in an optional embodiment, this application also provides a display panel in which the stress relief area 30 in the light-emitting layer of each second light-emitting unit 202 is located at a different position in the corresponding second light-emitting unit 202.

[0036] Specifically, the position of the stress relief area 30 in the second light-emitting unit 202 refers to the position occupied by the orthographic projection of the stress relief area 30 on the back plate 10 and the orthographic projection of the second light-emitting unit 202 on the back plate 10. In this embodiment, the position of the stress relief area 30 in each second light-emitting unit 202 is different. For example, the orthographic projection of the second light-emitting unit 202 on the back plate is circular, and the position of the stress relief area 30 in each second light-emitting unit 202 within the circular second light-emitting unit is different. In this way, even if the stress relief area 30 affects the light-emitting effect of the second light-emitting unit 202, the degree of impact on each second light-emitting unit 202 is different, thereby ensuring the overall light-emitting effect of the display panel.

[0037] Reference Figure 1 As shown, in an optional embodiment, this application also provides a display panel in which the stress relief area 30 in the light-emitting layer of some of the second light-emitting units 202 is in the same position in the corresponding second light-emitting unit 202.

[0038] Specifically, the stress relief regions 30 of some of the second light-emitting units 202 may be in the same position. For example, in one embodiment, the multiple second light-emitting units 202 can be divided into three parts. The stress relief region 30 in the first part of the second light-emitting units 202 is located to the left in the projection of the second light-emitting unit 202; the stress relief region 30 in the second part of the second light-emitting units 202 is located in the middle in the projection of the second light-emitting unit 202; and the stress relief region 30 in the third part of the second light-emitting units 202 is located to the right in the projection of the second light-emitting unit 202. This distribution simplifies the patterning process during the formation of the light-emitting units 20 and improves the fabrication efficiency of the light-emitting units 20.

[0039] Reference Figure 1 As shown, in an optional embodiment, this application also provides a display panel in which the stress relief area 30 in the light-emitting layer of each second light-emitting unit 202 has the same orthographic projection shape on the back plate 10.

[0040] Specifically, the orthographic projection shape of the stress relief region 30 on the backplane 10 mainly depends on the pattern used in the first patterning process of the epitaxial layer 50. In the embodiments of this application, the orthographic projection shape of the stress relief region 30 on the backplane 10 may include a strip, a circle, and a square. In some embodiments, the orthographic projection shape of the stress relief region 30 on the backplane 10 may also be a polygon or an irregular shape, which is not specifically limited in the embodiments of this application.

[0041] In this embodiment, the stress relief area 30 of each second light-emitting unit 202 has the same orthographic projection shape on the back plate 10. For example, the stress relief area 30 of each second light-emitting unit 202 has an elongated orthographic projection shape on the back plate 10. This arrangement simplifies the patterning process during the formation of the light-emitting unit 20 and improves the fabrication efficiency of the light-emitting unit.

[0042] Reference Figure 4 As shown, in an optional embodiment, this application also provides a display panel in which the stress relief area 30 in the light-emitting layer of some of the plurality of second light-emitting units 202 has the same orthographic projection shape on the back plate 10.

[0043] Specifically, the stress relief regions of some of the second light-emitting units 202 may have the same shape. For example, in one embodiment, multiple second light-emitting units 202 can be divided into two parts, wherein the stress relief region 30 in the first part of the second light-emitting units 202 has an elongated shape projected onto the back plate 10, and the stress relief region 30 in the second part of the second light-emitting units 202 has a short shape projected onto the back plate 10. This arrangement simplifies the patterning process during the formation of the light-emitting units 20 and improves the fabrication efficiency of the light-emitting units 20.

[0044] Reference Figure 5 As shown, in an optional embodiment, this application also provides a display panel in which the orthographic projection shape of the stress relief area 30 in the light-emitting layer of each second light-emitting unit 202 on the back panel is different.

[0045] Specifically, in this embodiment, the orthographic projection shape of the stress relief area 30 in each second light-emitting unit 202 on the back plate 10 is different. Therefore, the proportion of the orthographic projection area of ​​the stress relief area 30 in each second light-emitting unit 202 on the back plate 10 to the orthographic projection area of ​​the second light-emitting unit 202 on the back plate 10 is also different. This makes each second light-emitting unit 202 different, thereby ensuring the overall luminous efficiency of the display panel.

[0046] Reference Figure 6 As shown, in one embodiment, the display panel can also be formed based on the three-color light-emitting unit, so that the color filter layer 70 does not need to be prepared in subsequent processes, thus saving the manufacturing cost of the display panel to a certain extent.

[0047] Reference Figure 7 As shown, in one embodiment, the light-emitting unit 50 in the display panel can also be a flip-chip structure, that is, the anode lead and cathode lead of the light-emitting unit 20 are disposed on the same side and bonded to the back plate 10 by bonding metal pads. The flip-chip structure of the light-emitting unit 20 can simplify the thickness process.

[0048] In one embodiment, while the light-emitting unit 20 of the display panel is configured as a flip-chip structure, the display panel is formed based on the three-color light-emitting unit, so that the color filter layer 70 does not need to be prepared in subsequent processes.

[0049] Reference Figure 8 As shown, in one embodiment, a plurality of metal bonding pads are provided on the back plate 10, and the projected area of ​​the metal bonding pads on the back plate 10 is smaller than the projected area of ​​the bonding pads on the light-emitting unit on the back plate 10. This makes the area ratio of the bonding pads on the back plate 10 smaller, thereby allowing more metal traces to be laid out, and realizing high-pixel display of the display panel.

[0050] Reference Figure 9 As shown, in one embodiment, multiple light-emitting units 20 can be connected in series, that is, the anode of the light-emitting unit 20 is connected in series with the cathode of the adjacent light-emitting unit 20, which can reduce the power consumption of the display panel.

[0051] Reference Figure 10 As shown, in an optional embodiment, this application also provides a display panel in which a dielectric layer 80 is filled in the stress relief area 30 of the second light-emitting unit 202.

[0052] Specifically, the dielectric layer 80 can be formed after the epitaxial layer 50 is patterned for the first time. That is, after the stress relief region 30 is formed on the epitaxial layer 50, the dielectric layer 80 is filled in the stress relief region 30. The dielectric layer 80 can passivate the sidewalls, protect the light-emitting layer of the light-emitting unit 20, and improve the light-emitting effect of the light-emitting unit 20.

[0053] The material of the dielectric layer 80 can be selected from organic silicone or silica sol-gel particles, etc., and those skilled in the art can set it according to actual needs.

[0054] Figure 11 A flowchart illustrating the steps of a method for fabricating a display panel is shown, with reference to... Figure 11 As shown in the embodiments, this application also discloses a method for manufacturing a display panel, the method comprising: Step 201: Provide a wafer-level substrate 40 having an epitaxial layer 50.

[0055] Specifically, the wafer-level substrate 40 can be made of silicon. The epitaxial layer 50 may include a first semiconductor layer 501, an active layer 502, and a second semiconductor layer 503 stacked sequentially, wherein the first semiconductor layer 501 is disposed close to the wafer-level substrate 40. The first semiconductor layer 501 can be made of n-type gallium nitride, and the second semiconductor layer 503 can be made of p-type gallium nitride, such as... Figure 12 As shown.

[0056] Step 202: Perform a first patterning process on the epitaxial layer 50 to form multiple nanoscale stress relief regions 30.

[0057] Specifically, the pattern of the first patterning process may include continuous dividing lines, discontinuous dividing lines, and arrayed block patterns.

[0058] Reference Figure 13As shown, for example, in one embodiment, the pattern of the first patterning process is a continuous dividing line distributed horizontally and vertically. The spacing between two adjacent rows or two adjacent columns of continuous dividing lines can be set according to the actual situation. The width of the continuous dividing line is greater than or equal to 0.1 μm and less than or equal to 3.0 μm. For example, the width of the continuous dividing line can be 0.1 μm, 0.5 μm, 1.0 μm, 2.0 μm, 3.0 μm, etc. These continuous dividing lines can form a continuous stress release zone 30, so that the internal stress of the epitaxial layer is partially or completely released, and the stress release degree is high.

[0059] Reference Figure 14 As shown, for example, in one embodiment, the pattern of the first patterning process is a discontinuous dividing line with an interval distribution. The length of these discontinuous dividing lines is greater than or equal to 0.1 μm and less than or equal to 3.0 μm, and the width is greater than or equal to 0.1 μm and less than or equal to 3.0 μm. Exemplarily, the length of these discontinuous dividing lines can be 0.1 μm, 0.5 μm, 1.0 μm, 2.0 μm, 3.0 μm, etc., and the width of these discontinuous dividing lines can be 0.1 μm, 0.5 μm, 1.0 μm, 2.0 μm, 3.0 μm, etc. These discontinuous dividing lines can form a discontinuous stress relief region 30, so that the internal stress of the epitaxial layer is partially or completely released, but the degree of stress relief is slightly lower than that of the stress relief region formed by continuous dividing lines.

[0060] Reference Figure 15 As shown, for example, in one embodiment, the pattern of the first patterning process is an array-distributed block pattern. In this embodiment, the shape of the block pattern is circular, and the diameter of the circular block pattern is greater than or equal to 0.1 μm and less than or equal to 3.0 μm. Exemplarily, the diameter of the circular block pattern can be 0.1 μm, 0.5 μm, 1.0 μm, 2.0 μm, 3.0 μm, etc. In other embodiments, the shape of the block pattern can also be square or polygonal, etc. The array-distributed block pattern can form multiple spaced stress relief regions 30, so that the internal stress of the epitaxial layer is partially or completely released. The degree of stress relief is slightly lower than that of the stress relief region formed by discontinuous dividing lines, but the impact on the subsequently formed light-emitting unit 20 is small.

[0061] At the same time, refer to Figure 16 As shown in the embodiment of this application, the etching depth of the first patterning process is less than the thickness of the epitaxial layer 50. That is, the epitaxial layer 50 will not be completely etched through during the first patterning process, which can reduce the impact on the light-emitting unit 20 and ensure the light-emitting efficiency of the light-emitting unit.

[0062] Step 203: Bond the epitaxial layer 50 to the glass substrate 60, peel off the wafer-level substrate 40, and perform a second patterning process on the epitaxial layer 50 to form multiple light-emitting units 20.

[0063] Specifically, the epitaxial layer 50 is temporarily bonded to the glass substrate 60 using an adhesive material. The adhesive material for this temporary bonding includes a release adhesive layer 91 and an adhesive layer 92. The release adhesive layer 91 is connected to the epitaxial layer 50, the adhesive layer 91 is connected to the release adhesive layer 92, and the adhesive layer 92 is connected to the glass substrate 60. Figure 16 As shown. The thickness of the dissociative adhesive layer 91 is greater than or equal to 0.1 μm and less than or equal to 3.0 μm. For example, the thickness of the dissociative adhesive layer 91 can be 0.1 μm, 0.5 μm, 1.0 μm, 2.0 μm, 3.0 μm, etc.; the thickness of the adhesive layer 92 is greater than or equal to 1 μm and less than or equal to 5 μm. For example, the thickness of the adhesive layer 92 can be 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, etc. Those skilled in the art can set it according to actual needs.

[0064] It is understandable that when bonding the epitaxial layer 50 to the glass substrate 60, one epitaxial layer 50 may be bonded to the glass substrate 60, or multiple epitaxial layers 50 may be bonded to the glass substrate 60.

[0065] Then the wafer-level substrate 40 is peeled off, as follows Figure 17 As shown. The wafer-level substrate 40 is generally removed using a wet process, where the etchant material used in the wet process can be HF, HNO3, etc. Furthermore, after removing the wafer-level substrate 40, since the internal stress of the epitaxial layer 50 has been partially or completely released through the stress relief region 60, defects such as cracks will not appear in the epitaxial layer 50.

[0066] Next, a second patterning process is performed on the epitaxial layer 50 to form multiple light-emitting units 20, such as... Figure 18 As shown. The plurality of light-emitting units 20 includes a plurality of first light-emitting units 201 and a plurality of second light-emitting units 202, which can be arranged in a cross pattern or spaced apart. A stress-relief region 30 is formed in the light-emitting layer of the second light-emitting unit 202, and the orthographic projection of the light-emitting layer of the second light-emitting unit 202 onto the back plate 10 does not overlap with the orthographic projection of the stress-relief region 30 onto the back plate 10; that is, no light-emitting layer is formed within the stress-relief region 30.

[0067] Specifically, the step of forming multiple light-emitting units 20 may include: Step 2031: Etch the epitaxial layer 50 to form a preliminary structure of multiple light-emitting units 20.

[0068] Step 2032: A passivation layer 93 is formed on the side of each light-emitting unit 20 facing away from the glass substrate 60, and the dissociation adhesive layer 91 and the adhesive layer 92 between the light-emitting units 20 are etched.

[0069] Specifically, the passivation layer 93 can be formed using ALD (Atomic Layer Deposition) or PECVD (Plasma Enhanced Chemical Vapor Deposition) processes, and the material of the passivation layer 93 can be silicon oxide. It should be noted that the passivation layer 93 only covers the sidewalls of the light-emitting unit 20, not the top of the light-emitting unit 20, as shown below. Figure 19 As shown.

[0070] Step 2033: Form an electrode and a bonding metal pad 94 on the side of each light-emitting unit 20 away from the glass substrate 60.

[0071] Specifically, the orthogonal projection of the bonding metal pad 94 onto the glass substrate 60 lies within the orthogonal projection range of the light-emitting unit 20 onto the glass substrate 60, such as... Figure 20 As shown. The material of the bonding metal pad 94 can be Au, Cu, etc., and the thickness of the bonding metal pad is greater than or equal to 0.3 μm and less than or equal to 3.0 μm. For example, the thickness of the bonding metal pad can be 0.3 μm, 0.5 μm, 1.0 μm, 2.0 μm, 3.0 μm, etc.

[0072] Step 204: Provide a backplate 10 and bond multiple light-emitting units 20 to the backplate 10.

[0073] Specifically, a driving circuit and a pixel circuit for driving the display panel are fabricated on the backplane 10. The driving circuit and pixel circuit on the backplane 10 can drive multiple light-emitting units 20 to emit light, thereby realizing the display of image content. The backplane 10 may include a glass-based backplane, a silicon-based backplane, or an LTPS backplane.

[0074] The display panel prepared by the preparation method provided in this application can release part or all of the internal stress of the epitaxial layer by utilizing the stress release area formed by the epitaxial layer patterning process, thereby reducing defects such as cracks when the epitaxial layer is transferred to a large-size glass substrate, thus improving the yield of the display panel. Furthermore, this application can realize the process of large-area light-emitting units by using this method, which has the advantages of high quality of whole-area epitaxial transfer and high quality of light-emitting units after transfer.

[0075] Based on the same inventive concept, embodiments of this application disclose a display device, including any of the display panels described above in the embodiments of this application.

[0076] Specifically, the display device may include computer monitors, televisions, billboards, laser printers with display functions, telephones, mobile phones, personal digital assistants (PDAs), laptops, digital cameras, portable camcorders, viewfinders, vehicles, large walls, theater screens, or stadium signs, etc.

[0077] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0078] It should also be noted that, in this document, the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations, nor should they be construed as indicating or implying relative importance. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements, but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. In the absence of further restrictions, an element defined by the phrase "includes a..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes the element.

[0079] The technical solutions provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand this application, and the content of this specification should not be construed as a limitation of this application. Furthermore, for those skilled in the art, there will be different forms of changes in the specific implementation methods and application scope based on this application. It is neither necessary nor possible to exhaustively list all implementation methods here, and obvious changes or modifications derived therefrom are still within the protection scope of this application.

Claims

1. A display panel, characterized in that, include: Back panel; Multiple light-emitting units are disposed on one side of the back plate, and the multiple light-emitting units are bonded to the back plate; The plurality of light-emitting units include a plurality of first light-emitting units and a plurality of second light-emitting units. A stress-relieving region is formed in the light-emitting layer of the second light-emitting unit. The orthographic projection of the light-emitting layer of the second light-emitting unit on the back plate does not overlap with the orthographic projection of the stress-relieving region on the back plate.

2. The display panel according to claim 1, characterized in that: The area of ​​the stress relief zone projected onto the back plate accounts for a proportion of the area of ​​the light-emitting layer of the second light-emitting unit projected onto the back plate that is greater than or equal to 0.01% and less than or equal to 1.00%.

3. The display panel according to claim 1, characterized in that: The stress relief area in the light-emitting layer of each second light-emitting unit is located at a different position in the corresponding second light-emitting unit.

4. The display panel according to claim 1, characterized in that: The stress relief area in the light-emitting layer of a portion of the second light-emitting units is located in the same position within the corresponding second light-emitting unit.

5. The display panel according to claim 1, characterized in that: The stress relief areas in the light-emitting layers of each of the second light-emitting units have the same orthographic projection shape on the back plate.

6. The display panel according to claim 1, characterized in that: The stress relief areas in the light-emitting layers of a portion of the second light-emitting units have the same orthographic projection shape on the back plate.

7. The display panel according to claim 1, characterized in that: The shape of the stress relief area in the light-emitting layer of each of the second light-emitting units is different when projected onto the back plate.

8. The display panel according to claim 1, characterized in that: The orthographic projection shape of the stress relief zone on the back plate includes strip, circle, and square.

9. The display panel according to claim 1, characterized in that: The stress relief zone is filled with a dielectric layer.

10. The display panel according to claim 9, characterized in that: The materials of the dielectric layer include silicone rubber and silica sol particles.

11. The display panel according to any one of claims 1-10, characterized in that, The display panel also includes: A color filter layer is disposed on the side of the plurality of light-emitting units facing away from the back plate.

12. A display device, characterized in that, Includes the display panel as described in any one of claims 1-11.

13. A method for manufacturing a display panel, characterized in that, The preparation method includes: Provide wafer-level substrates with epitaxial layers; The epitaxial layer is subjected to a first patterning process to form multiple nanoscale stress relief zones; The epitaxial layer is bonded to the glass substrate, the wafer-level substrate is peeled off, and the epitaxial layer is subjected to a second patterning process to form multiple light-emitting units; A backplate is provided to bond the plurality of light-emitting units to the backplate; The plurality of light-emitting units include a plurality of first light-emitting units and a plurality of second light-emitting units. The light-emitting layer of the second light-emitting unit has the stress-relieving region. The orthographic projection of the light-emitting layer of the second light-emitting unit on the back plate does not overlap with the orthographic projection of the stress-relieving region on the back plate.

14. The method for manufacturing a display panel according to claim 13, characterized in that: The patterns in the first patterning process include continuous dividing lines, discontinuous dividing lines, and arrayed block patterns.

15. The method for manufacturing a display panel according to claim 13, characterized in that: The etching depth of the first patterning process is less than the thickness of the epitaxial layer.

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