A method for manufacturing a tmv chip

Abstract

The present application belongs to the technical field of integrated circuit manufacturing, and particularly relates to a preparation method of a TMV chip. The method comprises the following steps: forming a sandwich structure adhesive layer on a re-wiring layer structure; the sandwich structure adhesive layer comprises a first photoresist layer, a DAF film layer and a second photoresist layer which are stacked in sequence; patterning the sandwich structure adhesive layer to form an electroplating mold cavity which penetrates through the first photoresist layer, the DAF film layer and the second photoresist layer, and exposes a pad area on the re-wiring layer structure; and electroplating to form a copper pillar with a large cross section and a high aspect ratio in the electroplating mold cavity. The present application can controllably form a copper pillar with a large cross section and a high aspect ratio in a mold sealing medium, realize low resistance, high current carrying capacity, good heat dissipation and mechanical support capacity, and also consider the morphology consistency, coplanarity and reliability under mass production conditions.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit manufacturing technology, and specifically relates to a method for preparing a TMV chip. Background Technology

[0002] Existing TMV (Through Mold Via) chips commonly suffer from defects in achieving vertical interconnects within / between packages. These defects include insufficient interconnect conductor cross-sectional area, limited pillar height, and difficulty in controlling forming consistency and coplanarity. These defects lead to high interconnect path resistance, insufficient current carrying capacity, increased risk of localized temperature rise and electromigration, and subsequent reliability issues such as warping, cracking, poor soldering, or poor contact during mounting / stacking. Particularly in advanced packaging scenarios requiring both high power consumption and high-density interconnects, traditional micro-bump / conventional copper pillar processes are limited by photoresist thickness windows, copper deposition rates and filling capabilities, and insufficient control over plating uniformity. This makes it difficult to consistently obtain large-size copper pillar structures that are both thick and tall, and yield and consistency are difficult to guarantee.

[0003] Therefore, there is an urgent need for this invention to propose a method for fabricating a TMV chip to solve the above-mentioned technical problems. Summary of the Invention

[0004] The purpose of this invention is to provide a method for fabricating TMV chips. This invention can controllably form copper pillars with large cross-sections and high aspect ratios in a molding medium, achieving low resistance, high current carrying capacity, good heat dissipation and mechanical support capabilities, while taking into account morphological consistency, coplanarity and reliability under mass production conditions.

[0005] To address the aforementioned technical problems, this invention provides a method for fabricating a TMV chip, comprising: A sandwich structure adhesive layer is formed on the redistribution layer structure; the sandwich structure adhesive layer includes a first photoresist layer, a DAF film layer and a second photoresist layer stacked sequentially. The sandwich structure adhesive layer is patterned to form an electroplating cavity that penetrates the first photoresist layer, the DAF film layer and the second photoresist layer, so that the electroplating cavity exposes the pad area on the redistribution layer structure. A copper pillar with a large cross-section and high aspect ratio is formed by electroplating in the electroplating mold cavity, and the first photoresist layer and the second photoresist layer are removed, while the DAF film layer is retained; The formed copper pillar, DAF film layer and redistribution layer structure are molded and cured to form a molding layer; The molded layer is ground to expose the top of the copper pillar.

[0006] Preferably, forming the redistribution layer structure includes: Provide temporary carrier board; A peeling layer is formed on the temporary carrier plate; A redistribution layer structure is formed on the stripping layer.

[0007] Preferably, the temporary carrier is a glass carrier, a silicon carrier, or a metal carrier; the release layer is a thermally release adhesive, a laser-sensitive release layer, or a chemically soluble release layer.

[0008] Preferably, the redistribution layer structure is a single-layer or multi-layer structure, and its formation process includes: A dielectric layer is formed on the peeling layer and patterned openings are formed thereon; Seed layer deposition; RDL lines and pads are formed by photolithography and electroplating, and the exposed seed layer is removed by etching.

[0009] Preferably, forming the electroplating cavity includes: The second photoresist layer is patterned to form a second electroplating window exposing the DAF film layer; Using the patterned second photoresist layer as an etching mask, anisotropic etching is performed on the DAF film layer to form a DAF opening aligned with the second electroplating window, and the DAF opening exposes the first photoresist layer below. The first photoresist layer is etched through the DAF opening to form a first electroplating window. The first electroplating window, the DAF opening, and the second electroplating window together constitute the electroplating cavity with flat and continuous sidewalls.

[0010] Preferably, the thickness of the sandwich structure adhesive layer is 100μm~400μm; the thickness of the DAF film layer is 10μm~50μm, and its elastic modulus is 1GPa~5GPa; and the elastic modulus of the DAF film layer is greater than the elastic modulus of the first photoresist layer and the second photoresist layer; the elastic modulus of the DAF film layer is less than the elastic modulus of the molding layer; the material of the molding layer is EMC epoxy molding compound; and the elastic modulus of the molding layer is 10GPa~25GPa.

[0011] Preferably, the copper column has a height of 100μm to 400μm, a diameter of 80μm to 200μm, and a height-to-diameter ratio of 1.25:1 to 5:1.

[0012] Preferably, the top of the copper pillar is further formed with a metal layer that has anti-oxidation, solderability, or barrier functions, and the material of the metal layer includes one or a combination of Ni, Pd, and Au.

[0013] Preferably, the copper pillars are arranged in a regular matrix on the redistribution layer structure, and the coplanarity deviation of the matrix arrangement of the copper pillars is less than 5 μm.

[0014] Preferably, the temporary carrier is debonded and removed through the stripping layer; after removing the temporary carrier, the method further includes: dicing to form a single chip as required.

[0015] Compared with the prior art, the present invention has the following beneficial effects: 1. This invention solves the problem of forming high aspect ratio copper pillars: a sandwich structure of first photoresist / DAF film / second photoresist is used as the electroplating mold. The DAF film plays a structural support role during the electroplating process, effectively preventing the collapse of the thick adhesive layer and ensuring the integrity of the electroplating window. Stable electroplating forming of large cross-section copper pillars with heights of 100~400μm and diameters of 80~200μm can be achieved, increasing the cross-sectional area, reducing interconnect resistance, and improving power supply / grounding and high-speed interconnection capabilities. The large-size copper pillars act as high thermal conductivity channels and structural support units, improving coplanarity. The coplanarity deviation of the copper pillar array is less than 5μm, improving assembly reliability.

[0016] 2. This invention optimizes interface reliability: After molding, the EMC molding layer and the redistribution layer structure are in direct contact, forming a mature and reliable interface in the packaging industry; the DAF film layer is completely embedded inside the molding layer, has good chemical compatibility with the molding layer, and forms a gradient interface with interpenetrating molecular chains, eliminating the risk of delamination.

[0017] 3. This invention improves thermomechanical reliability: The retained DAF film layer serves as a suspension buffer layer, surrounding the middle of the copper pillar. Its elastic modulus (1~5GPa) is between that of the copper pillar (110~130GPa) and the molding layer (10~25GPa), forming a local gradient modulus structure, which effectively absorbs the shear stress generated by thermal cycling and mechanical impact; at the same time, the toughness of the DAF film layer can prevent crack propagation and enhance structural reliability.

[0018] 4. This invention optimizes thermal conductivity: heat is mainly transferred directly from the lower part of the copper pillar to the redistribution layer structure through the EMC molding layer, resulting in a short thermal path and low thermal resistance; the thermal conductivity of the DAF film layer is slightly higher than that of EMC, which helps to dissipate heat in the middle, and the overall heat dissipation performance is better than that of traditional solutions.

[0019] 5. Improved manufacturing consistency and yield of the invention: The sandwich structure ensures consistent electroplating window size, adjustable electroplating process parameters, good consistency of copper pillar size, compatibility with existing packaging processes, reduced process fluctuations, and improved yield and manufacturing stability. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the temporary carrier plate provided in an embodiment of the present invention.

[0021] Figure 2 This is a schematic diagram of forming a peeling layer on the surface of a temporary carrier plate, provided in an embodiment of the present invention.

[0022] Figure 3 This is a schematic diagram of a redistribution layer structure formed on the surface of a temporary carrier board, provided in an embodiment of the present invention.

[0023] Figure 4 This is a schematic diagram of the formation of a sandwich-structured adhesive layer provided in an embodiment of the present invention.

[0024] Figure 5 This is a schematic diagram of forming an electroplating mold cavity provided in an embodiment of the present invention.

[0025] Figure 6 This is a schematic diagram of a copper column with a large cross-section and a height-to-width ratio provided in an embodiment of the present invention.

[0026] Figure 7 This is a schematic diagram of the formation of the molding layer provided in an embodiment of the present invention.

[0027] Figure 8 This is a schematic diagram of grinding and thinning the molding layer provided in an embodiment of the present invention.

[0028] Figure 9 This is a schematic diagram of debonding and removing the temporary carrier plate from the release layer, provided in an embodiment of the present invention.

[0029] Figure 10 This is a schematic diagram of dicing to form a single chip according to demand, provided in an embodiment of the present invention.

[0030] In the figure: 1-temporary carrier, 2-release layer, 3-rewiring layer structure, 4-first photoresist layer, 5-DAF film layer, 6-second photoresist layer, 7-electroplated mold cavity, 8-copper pillar, 9-molding layer. Detailed Implementation

[0031] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the present invention.

[0032] This invention specifically provides a method for fabricating a TMV chip, comprising the following steps: Step 1: As Figure 1 As shown, a temporary carrier plate 1 is provided; the temporary carrier plate 1 may be one of a glass carrier plate, a silicon carrier plate or a metal carrier plate; Step 2: As Figure 2 As shown, a release layer 2 is formed on the surface of the temporary carrier plate 1 for subsequent removal of the carrier plate and to improve the adhesion of the medium layer; the release layer 2 can be a thermal release adhesive, a laser-sensitive release layer or a chemically soluble release layer.

[0033] Step 3: As Figure 3 As shown, a redistribution layer structure 3 is formed on the surface of the temporary carrier board 1, that is, a dielectric layer is formed on the temporary carrier board 1 and patterned openings are formed. After the seed layer is deposited, the RDL lines and pads are formed by photolithography and metal deposition / electroplating. Then the resist is removed and the exposed seed layer is etched away, so that the RDL pattern is formed independently. The RDL can be a single-layer or multi-layer structure.

[0034] Step 4: As Figure 4 As shown, a sandwich-structured adhesive layer is formed on the designated pads / connection areas of the completed RDL. This sandwich-structured adhesive layer comprises a first photoresist layer 4, a DAF film layer 5, and a second photoresist layer 6, stacked sequentially. The DAF film layer 5 provides support, effectively preventing the thick adhesive structure from collapsing and forming a stable sandwich structure. This structure increases the overall adhesive layer thickness, enhances structural stability, ensures the integrity of the electroplating window, and enables stable electroplating of the high-height copper pillar 8.

[0035] Step 5: As Figure 5 As shown, the sandwich structure adhesive layer is graphically represented to form an electroplating cavity 7 (electroplation window) that penetrates the first photoresist layer 4, the DAF film layer 5, and the second photoresist layer 6, so that the electroplating cavity 7 exposes the pad area on the redistribution layer structure 3; the diameter and height of the electroplating cavity 7 correspond to the diameter and target height of the copper pillar 8, respectively.

[0036] After the second photoresist layer 6 forms the electroplating window, the second photoresist layer 6 is used as an etching mask. The DAF film layer 5 is anisotropically etched by plasma etching process, so that the DAF film layer 5 forms a DAF opening structure consistent with the photolithography pattern, thereby exposing the lower first photoresist layer 4. After the first photoresist layer 4 forms an electroplating window with a consistent pattern, the subsequent copper pillar 8 is electroplated.

[0037] Step 6: As Figure 6 As shown, copper pillars 8 with a large cross-section and high aspect ratio are formed by electroplating within the electroplating cavity 7. The first photoresist layer 4 and the second photoresist layer 6 are removed, while the DAF film layer 5 is retained. That is, copper electroplating is performed within the thick-film electroplating cavity 7 to form copper pillars 8 with a large cross-section and high aspect ratio. The diameter of the copper pillars 8 is 80~200 µm, and the height is 100~400 µm. To ensure uniform electroplating, the copper pillars 8 are arranged in a regular and standard matrix. An anti-oxidation / solderable / barrier metal layer (e.g., Ni / Pd / Au) can be further formed at the top of the copper pillars 8 to accommodate subsequent bonding or assembly.

[0038] Step 7: As Figure 7As shown, the formed copper pillar 8, DAF film layer 5, and redistribution layer structure 3 are molded and cured to form a molding layer 9; that is, the formed RDL and copper pillar are molded, and the molding material can be epoxy molding compound (EMC). After molding and curing, a molding layer 9 covering the structure is formed; the DAF film layer and the molding layer undergo molecular chain interpenetration to form a strong chemical bond. Finally, the molding layer 9 is in direct contact with the redistribution layer structure 3, while the DAF film layer 5 is embedded inside the molding layer 9 and does not contact the redistribution layer structure 3.

[0039] The thickness of the sandwich structure adhesive layer is 100μm~400μm; the thickness of the DAF film layer 5 is 10μm~50μm, and its elastic modulus is 1GPa~5GPa; and the elastic modulus of the DAF film layer 5 is greater than that of the first photoresist layer 4 and the second photoresist layer 6; the elastic modulus of the DAF film layer 5 is less than that of the molding layer 9; the material of the molding layer 9 is EMC epoxy molding compound; and the elastic modulus of the molding layer 9 is 10GPa~25GPa.

[0040] Step 8: As Figure 8 As shown, the molding layer 9 is ground to achieve the target thickness, exposing the top of the copper pillar 8.

[0041] Step 9: As Figure 9 As shown, the release layer 2 is debonded to remove the temporary carrier plate 1. The debonding method can be thermal debonding, laser debonding, chemical debonding, etc.

[0042] Step 10: As Figure 10 As shown, the chips are diced according to demand to form individual chips.

[0043] For further explanation, please refer to [link / reference]. Figure 10 As shown, the TMV chip prepared in this embodiment of the invention includes: Rewiring layer structure 3; Copper pillars 8 are formed on the pad area of ​​the redistribution layer structure 3; the height of the copper pillars 8 is 100μm~400μm, the diameter is 80μm~200μm, and the height-to-diameter ratio is 1.25:1~5:1. The molding layer 9 covers the redistribution layer structure 3 and wraps the copper pillar 8, and is in direct contact with the redistribution layer structure 3. DAF film 5 is fully embedded inside the molding layer 9, surrounding the central area of ​​the copper pillar 8, and is chemically bonded to the molding layer 9.

[0044] In summary, this invention employs a sandwich-structure adhesive layer and a permanently retained DAF film layer, resulting in significantly superior copper pillar dimensional consistency and coplanarity, and a substantial improvement in yield. This is because the DAF film layer provides stable support during electroplating, ensuring the integrity of the plating window; the permanently retained DAF film layer acts as a suspension buffer layer, effectively absorbing thermal stress, and exhibits good EMC chemical compatibility, eliminating the risk of interfacial delamination.

[0045] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A method for fabricating a TMV chip, characterized in that, include: A sandwich structure adhesive layer is formed on the redistribution layer structure; the sandwich structure adhesive layer includes a first photoresist layer, a DAF film layer and a second photoresist layer stacked sequentially. The sandwich structure adhesive layer is patterned to form an electroplating cavity that penetrates the first photoresist layer, the DAF film layer and the second photoresist layer, so that the electroplating cavity exposes the pad area on the redistribution layer structure. A copper pillar with a large cross-section and high aspect ratio is formed by electroplating in the electroplating mold cavity, and the first photoresist layer and the second photoresist layer are removed, while the DAF film layer is retained; The formed copper pillar, DAF film layer and redistribution layer structure are molded and cured to form a molding layer; The molded layer is ground to expose the top of the copper pillar.

2. The method for fabricating a TMV chip as described in claim 1, characterized in that, Forming the redistribution layer structure includes: Provide temporary carrier board; A peeling layer is formed on the temporary carrier plate; A redistribution layer structure is formed on the stripping layer.

3. The method for fabricating a TMV chip as described in claim 2, characterized in that, The temporary carrier is a glass carrier, a silicon carrier, or a metal carrier; the release layer is a thermally release adhesive, a laser-sensitive release layer, or a chemically soluble release layer.

4. The method for fabricating a TMV chip as described in claim 2, characterized in that, The redistribution layer structure is a single-layer or multi-layer structure, and its formation process includes: A dielectric layer is formed on the peeling layer and patterned openings are formed thereon; Seed layer deposition; RDL lines and pads are formed by photolithography and electroplating, and the exposed seed layer is removed by etching.

5. The method for fabricating a TMV chip as described in claim 1, characterized in that, The electroplating cavity includes: The second photoresist layer is patterned to form a second electroplating window exposing the DAF film layer; Using the patterned second photoresist layer as an etching mask, anisotropic etching is performed on the DAF film layer to form a DAF opening aligned with the second electroplating window, and the DAF opening exposes the first photoresist layer below. The first photoresist layer is etched through the DAF opening to form a first electroplating window. The first electroplating window, the DAF opening, and the second electroplating window together constitute the electroplating cavity with flat and continuous sidewalls.

6. The method for fabricating a TMV chip as described in claim 1, characterized in that, The thickness of the sandwich structure adhesive layer is 100μm~400μm; the thickness of the DAF film layer is 10μm~50μm, and its elastic modulus is 1GPa~5GPa; the elastic modulus of the DAF film layer is greater than the elastic modulus of the first photoresist layer and the second photoresist layer; the elastic modulus of the DAF film layer is less than the elastic modulus of the molding layer; the material of the molding layer is EMC epoxy molding compound; the elastic modulus of the molding layer is 10GPa~25GPa.

7. The method for fabricating a TMV chip as described in claim 1, characterized in that, The copper pillar has a height of 100μm to 400μm, a diameter of 80μm to 200μm, and a height-to-diameter ratio of 1.25:1 to 5:

1.

8. The method for fabricating a TMV chip as described in claim 1, characterized in that, The top of the copper pillar is also formed with a metal layer that has anti-oxidation, solderability, or barrier functions. The material of the metal layer includes one or a combination of Ni, Pd, and Au.

9. The method for fabricating a TMV chip as described in claim 1, characterized in that, The copper pillars are arranged in a regular matrix on the redistribution layer structure, and the coplanarity deviation of the matrix arrangement of the copper pillars is less than 5 μm.

10. The method for fabricating a TMV chip as described in claim 2, characterized in that, The temporary carrier is debonded and removed through the stripping layer; after removing the temporary carrier, the process further includes dicing to form a single chip as required.

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