Method for plating a pure platinum electrode on a surface of a tellurium cadmium compound crystal and semiconductor functional device
By using a chloroplatinic acid solution diluted with methanol and N,N-dimethylformamide and photoresist masking technology on the surface of cadmium telluride crystals, nanoscale uniform deposition of pure platinum electrodes was achieved, solving the problems of coating adhesion and uneven thickness, and meeting the fabrication requirements of high-precision devices.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SUZHOU GEDI PHOTON TECH CO LTD
- Filing Date
- 2026-02-10
- Publication Date
- 2026-06-02
AI Technical Summary
Existing platinum plating processes for cadmium telluride surfaces suffer from poor coating adhesion, uneven thickness, unstable composition, and high equipment costs, making it difficult to meet the fabrication requirements of high-precision devices.
A pure platinum electrode was formed on the surface of a cadmium telluride crystal by diluting a chloroplatinic acid solution with a mixed solvent of methanol and N,N-dimethylformamide, combined with chemical mechanical polishing, photoresist masking, and precise chemical platinum plating. By controlling the reaction conditions and mask stripping steps, a nanoscale uniform coating deposition was achieved.
The resulting pixelated electrodes have a regular structure and are arranged neatly. The coating has excellent bonding strength with the substrate, which prevents the coating from falling off. They also have good ohmic contact performance and are suitable for the fabrication of high-precision devices. The process is simple and low-cost.
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Figure CN122128697A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor material surface metallization technology, specifically relating to a method for depositing pure platinum electrodes on the surface of cadmium telluride crystals and semiconductor functional devices. Background Technology
[0002] Cadmium telluride (CdTe) and cadmium zinc telluride (CdZnTe) are important semiconductor materials with advantages such as suitable bandgap, high light absorption coefficient, and low manufacturing cost. They are widely used in semiconductor devices such as solar cells, infrared detectors, radiation detectors, and photon counting sensors. Surface metallization is one of the key steps in the fabrication of CdTe and CdZnTe devices. Platinum (Pt) is often used as an electrode or contact layer on the surface due to its excellent conductivity, chemical stability, and good contact performance with CdTe and CdZnTe.
[0003] Existing methods for platinum plating on cadmium telluride and cadmium zinc telluride wafers mainly include vacuum evaporation, sputtering, and electroless plating. While vacuum evaporation and sputtering can achieve high-quality coatings, they are expensive, require a vacuum environment, and suffer from insufficient mechanical stability of the electrodes. Electroless plating offers advantages such as simple equipment and low cost, but several shortcomings remain to be addressed in practical applications. Water-based electroless plating solutions exhibit insufficient adhesion between the plating layer and the wafer substrate, leading to peeling and flaking, which affects device performance stability. Although some research has attempted to improve the poor adhesion of single platinum coatings through water-based electroless plating processes using gold-platinum bimetallic co-deposition, these alloy electrodes, employing composite metal compositions, face potential risks such as selective dissolution and surface segregation under specific environments like those with halide ions, limiting their application in harsh conditions. In addition, compared with water-based electroless plating processes, although the use of alcohol-based (such as methanol, ethanol, etc.) electroless plating solutions can improve the adhesion between the plating layer and the substrate to a certain extent, it is easy to cause uneven electrode plating thickness, which is difficult to meet the requirements of high-precision device fabrication. Summary of the Invention
[0004] To address the shortcomings of existing technologies, this invention provides a method for depositing pure platinum electrodes on the surface of cadmium telluride crystals and a semiconductor functional device.
[0005] The purpose of this invention is to overcome the defects of existing platinum plating processes on cadmium telluride surfaces, such as poor coating adhesion, uneven thickness, unstable composition, or high equipment costs, and to obtain a pure platinum electrode with stable performance that meets the needs of high-precision device fabrication.
[0006] This invention provides a method for depositing a pure platinum electrode on the surface of a cadmium telluride crystal, comprising the following steps: (a) Crystal preparation: Provide cadmium telluride crystals and polish and clean the crystal surface; (b) Mask preparation: A patterned mask layer is formed on the cleaned crystal surface, exposing a preset area of the electrode to be plated; (c) Plating solution preparation: Dilute the chloroplatinic acid solution with a mixed solvent to prepare a chemical plating solution. The mixed solvent is a mixture of methanol and N,N-dimethylformamide. (d) Electroless plating of platinum: The crystals treated in step (b) are immersed in an electroless plating solution and reacted at 20~40°C to deposit a pure platinum coating in a preset area. (e) Mask stripping: Remove the mask layer on the crystal surface to obtain a cadmium telluride crystal with patterned pure platinum electrodes on the surface.
[0007] As a further optimization of the above method, in step (a), the cadmium telluride crystal is either cadmium telluride crystal or cadmium zinc telluride crystal.
[0008] As a further optimization of the above method, in step (a), polishing is one or more of chemical mechanical polishing, mechanical polishing, and chemical polishing, used to remove the damaged layer on the surface; cleaning includes cleaning with a solvent selected from acetone, isopropanol, and deionized water, used to remove organic contaminants and / or particulate matter from the wafer surface.
[0009] As a further optimization of the above method, in step (b), the method for preparing the mask layer includes: spin-coating negative photoresist on the crystal surface, and forming a patterned mask layer after baking, exposure and development.
[0010] As a further optimization of the above method, in step (c), the chloroplatinic acid solution is an aqueous solution of chloroplatinic acid, and the volume ratio of methanol to N,N-dimethylformamide in the mixed solvent is 1:9 to 9:1. More preferably, the volume ratio of methanol to N,N-dimethylformamide is 1:7 to 7:1, for example, 1:5, 1:3, 1:1, 2:1, 4:1, 6:1, and any range between the two mentioned above.
[0011] As a further optimization of the above method, in step (c), the mass concentration of chloroplatinic acid in the electroless plating solution is 1% to 6%. More preferably, the mass concentration of chloroplatinic acid in the electroless plating solution is 2% to 5%, for example, 2%, 3%, 4%, 5%, and any range between the two mentioned above.
[0012] As a further optimization of the above method, in step (d), the reaction time for electroless platinum plating is 5 to 30 minutes.
[0013] As a further optimization of the above method, in step (d), the thickness of the pure platinum coating is 10~50nm.
[0014] As a further optimization of the above method, in step (e), mask stripping includes: immersing the crystal sequentially in N-methylpyrrolidone solvent and isopropanol solvent for treatment, then rinsing with deionized water and drying.
[0015] The present invention further provides a semiconductor functional device, including a cadmium telluride crystal and a pure platinum electrode prepared on the surface of the cadmium telluride crystal by the above method. The semiconductor functional device can involve different devices in multiple fields, such as infrared detectors, room temperature radiation detectors, solar cells, semiconductor sensors, etc.
[0016] Beneficial effects The method provided by this invention enables the controllable deposition of a nanoscale uniform pure platinum coating on the surface of cadmium telluride (CdT) wafers, forming well-structured and neatly arranged pixelated electrodes. The coating exhibits excellent characteristics of continuous density and uniform thickness, demonstrating superior bonding strength with the wafer substrate, effectively preventing coating peeling or residue issues. Simultaneously, the coating and substrate form good ohmic contact, meeting the electrode contact performance requirements for device fabrication. This method can produce stable and reliable electrodes using pure platinum as the electrode material, fundamentally avoiding potential risks such as selective dissolution and surface segregation that may occur with alloy electrodes under specific operating conditions. It also has excellent compatibility with photoresist mask fine processing technology, and the process can be performed at room temperature without a vacuum environment. It features simple operation, short deposition cycle, low cost, and high reliability. This invention effectively solves the technical pain points of traditional chemical platinum plating processes, such as poor adhesion, insufficient pattern fidelity, and unstable coating composition, providing an efficient and feasible solution for the fabrication of metallized electrodes for CdT semiconductor devices, and has significant application prospects in fields such as solar cells, infrared detectors, and semiconductor devices. Attached Figure Description
[0017] Figure 1 This is a schematic flowchart illustrating the process of the present invention.
[0018] Figure 2 This is an optical micrograph of the surface of a platinum-plated wafer sample from Example 1.
[0019] Figure 3 This is a magnified SEM image of a single pixel surface in the platinum-plated wafer sample of Example 1.
[0020] Figure 4 This is a FIB micrograph of the cross-section of the platinum coating in the platinum-plated wafer sample of Example 1.
[0021] Figure 5 This is a STEM HAADF image of the platinum-plated wafer sample from Example 1, spanning the platinum plating layer.
[0022] Figure 6The image shows the results of the tape adhesion test on the platinum-plated wafer sample in Example 1, where (a) is an optical micrograph of the sample surface after the tape is peeled off, and (b) is a surface state diagram of the peeled tape.
[0023] Figure 7 The image shows the IV curve of the platinum-plated wafer sample prepared in Example 1.
[0024] Figure 8 The image shows the results of the tape adhesion test on the platinum-plated wafer sample in Comparative Example 1. (a) is an optical micrograph of the sample surface after the tape is peeled off, and (b) is a surface state diagram of the peeled tape.
[0025] Figure 9 The image shows the tape adhesion test results of the platinum-plated wafer sample in Comparative Example 2, where (a) is an optical micrograph of the sample surface after the tape is peeled off, and (b) is a surface state diagram of the peeled tape. Detailed Implementation
[0026] This invention provides a method for depositing a pure platinum electrode on the surface of a cadmium telluride wafer, comprising the following steps.
[0027] (a) Wafer polishing and cleaning: Select cadmium telluride and cadmium zinc telluride wafers cut along the {111} crystal plane, remove the damaged layer on the surface by chemical mechanical polishing (CMP), and then clean the wafer surface with acetone solvent to remove organic contaminants and particulate matter, so as to provide a good substrate for subsequent coating reaction deposition.
[0028] (b) Mask preparation: negative photoresist is spin-coated on the wafer surface, baked and exposed through a mask, and developed to form the exposed area of the pixel array and the mesh mask layer, so as to prevent the plating solution from seeping into the non-plating area.
[0029] (c) Plating solution preparation: Prepare an 8% aqueous solution of chloroplatinic acid, dilute it to 1% to 6% with a mixed solvent of methanol and N,N-dimethylformamide (ratio 1:9~9:1) to prepare a chemical plating solution.
[0030] (d) Chemical plating of platinum: The wafer after step (b) is completely immersed in the plating solution prepared in step (c), the reaction temperature is controlled at 20~40℃, and the reaction is continued for 5~30 minutes. After the set time is reached, the wafer is taken out and rinsed with pure water to obtain a bright pure platinum metal layer with a thickness of 10~50nm.
[0031] (e) Stripping the photoresist mask: Immerse the wafer processed in step (d) completely in N-methylpyrrolidone solvent, control the temperature at 75~80℃ for 10~30 min, then immerse the wafer completely in isopropanol solvent for 5~15 min, then take it out, rinse off the residual liquid with pure water and dry it with nitrogen.
[0032] The present invention is further illustrated below with specific embodiments. These embodiments are exemplary and intended to illustrate the problem and explain the present invention, and are not intended to be limiting.
[0033] Example 1 Step (a) Wafer polishing and cleaning: Select cadmium telluride wafers cut along the {111} crystal plane, remove the damaged layer on the surface by chemical mechanical polishing (CMP), and then clean the wafer surface with acetone solvent to remove organic contaminants and particulate matter, providing a substrate for subsequent coating.
[0034] Step (b) Mask preparation: Negative photoresist is spin-coated on the wafer surface, baked, and then exposed through a mask to form the exposed area of the pixel array and the mesh-like mask layer.
[0035] Step (c) Plating solution preparation: Prepare an 8% aqueous solution of chloroplatinic acid, dilute it to 4% with a mixed solvent of methanol and N,N-dimethylformamide (ratio 1:5), and prepare a chemical plating solution.
[0036] Step (d) Chemical plating of platinum: The wafer processed in step (b) is completely immersed in the plating solution prepared in step (c). The reaction temperature is controlled at 30°C using a constant temperature bath and the time is set for 20 minutes. After the set time is reached, the wafer is taken out and rinsed with pure water to obtain a bright platinum metal layer with a thickness of about 43nm.
[0037] Step (e) Stripping the photoresist mask: Immerse the wafer processed in step (d) completely in N-methylpyrrolidone solvent, control the temperature at 75°C using a constant temperature bath for 15 minutes, then remove the wafer and immerse it completely in isopropanol solvent for 5 minutes. After that, remove the wafer, rinse off the residual liquid with pure water, and dry it with nitrogen to obtain a cadmium telluride wafer with pixelated platinum plating on the surface.
[0038] Example 2 Step (a) Wafer polishing and cleaning: Select cadmium zinc telluride wafers cut along the {111} crystal plane, remove the damaged layer on the surface by chemical mechanical polishing (CMP), and then clean the wafer surface with acetone solvent to remove organic contaminants and particulate matter, providing a substrate for subsequent plating.
[0039] Step (b) Mask preparation: Negative photoresist is spin-coated on the wafer surface, baked, and then exposed through a mask to form the exposed area of the pixel array and the mesh-like mask layer.
[0040] Step (c) Plating solution preparation: Prepare an 8% aqueous solution of chloroplatinic acid, dilute it to 4% with a mixed solvent of methanol and N,N-dimethylformamide (ratio 1:2), and prepare a chemical plating solution.
[0041] Step (d) Chemical plating of platinum: Immerse the wafer treated in step (b) completely into the plating solution prepared in step (c) at room temperature for 10 minutes. After the set time is reached, remove the wafer and rinse it with pure water to obtain a bright platinum metal layer with a thickness of about 38 nm.
[0042] Step (e) Stripping the photoresist mask: Immerse the wafer processed in step (d) completely in N-methylpyrrolidone solvent, control the temperature at 75°C using a constant temperature bath for 15 minutes, then remove the wafer and immerse it completely in isopropanol solvent for 5 minutes. After that, remove the wafer, rinse off the residual liquid with pure water and dry it with nitrogen to obtain a pixelated platinum-plated cadmium zinc telluride wafer.
[0043] Example 3 Step (a) Wafer polishing and cleaning: Select cadmium telluride wafers cut along the {111} crystal plane, remove the damaged layer on the surface by chemical mechanical polishing (CMP), and then clean the wafer surface with acetone solvent to remove organic contaminants and particulate matter, providing a substrate for subsequent coating.
[0044] Step (b) Mask preparation: Negative photoresist is spin-coated on the wafer surface, baked, and then exposed through a mask to form the exposed area of the pixel array and the mesh-like mask layer.
[0045] Step (c) Plating solution preparation: Prepare an 8% aqueous solution of chloroplatinic acid, dilute it to 4% with a mixed solvent of methanol and N,N-dimethylformamide (ratio 6:1), and prepare a chemical plating solution.
[0046] Step (d) Chemical plating of platinum: The wafer treated in step (b) is completely immersed in the plating solution prepared in step (c) at room temperature for 30 minutes. After the set time is reached, the wafer is taken out and rinsed with pure water to obtain a bright platinum metal layer with a thickness of about 42nm.
[0047] Step (e) Stripping the photoresist mask: Immerse the wafer processed in step (d) completely in N-methylpyrrolidone solvent, control the temperature at 75°C using a constant temperature bath for 15 minutes, then remove the wafer and immerse it completely in isopropanol solvent for 5 minutes. After that, remove the wafer, rinse off the residual liquid with pure water, and dry it with nitrogen to obtain a cadmium telluride wafer with pixelated platinum plating on the surface.
[0048] Comparative Example 1 Step (a) Wafer polishing and cleaning: Select cadmium telluride wafers cut along the {111} crystal plane, remove the damaged layer on the surface by chemical mechanical polishing (CMP), and then clean the wafer surface with acetone solvent to remove organic contaminants and particulate matter, providing a substrate for subsequent coating.
[0049] Step (b) Plating solution preparation: Prepare an 8% chloroplatinic acid aqueous solution, dilute it to 4% with deionized water, and prepare a chemical plating solution as control group 1.
[0050] Step (c) Chemical plating of platinum: Immerse the wafer treated in step (a) completely into the plating solution prepared in step (b), set at room temperature for 10 minutes. After the set time is reached, remove the wafer, rinse off the residual liquid with pure water, and dry it with nitrogen gas to obtain a cadmium telluride wafer with platinum plating on the surface.
[0051] Comparative Example 2 Step (a) Wafer polishing and cleaning: Select cadmium telluride wafers cut along the {111} crystal plane, remove the damaged layer on the surface by chemical mechanical polishing (CMP), and then clean the wafer surface with acetone solvent to remove organic contaminants and particulate matter, providing a substrate for subsequent coating.
[0052] Step (b) Plating solution preparation: Prepare an 8% aqueous solution of chloroplatinic acid, dilute it to 4% with a mixed solvent of methanol and glycerol (ratio 1:2), and prepare a chemical plating solution as control group 2.
[0053] Step (c) Chemical plating of platinum: Immerse the wafer treated in step (a) completely into the plating solution prepared in step (b), set at room temperature for 10 minutes. After the set time is reached, remove the wafer, rinse off the residual liquid with pure water, and dry it with nitrogen gas to obtain a cadmium telluride wafer with platinum plating on the surface.
[0054] Test case The platinum-plated wafer samples prepared in each embodiment and comparative example were tested. For the tape adhesion test, a standard test tape with an adhesion force of 5.5 N / 25 mm was used. The tape was tightly adhered to the sample electrode surface with uniform pressure, and after standing for 1 hour to ensure sufficient adhesion, the tape was peeled off at a constant speed of 5 mm / s at a 180° angle. The test qualification was determined by observing the sample surface and the state of the tape after peeling. The surface microstructure was characterized using optical microscopy, scanning electron microscopy (SEM), focused ion beam microscopy (FIB), and scanning transmission electron microscopy (STEM) to observe the regularity of the electrode structure, the density of the coating, and the elemental distribution on the sample surface. The platinum electrode coating thickness was determined by measuring the coating cross-section using FIB micrographs. The electrode contact state was determined using a high-precision picoammeter scanning the test current under a bias voltage of -200 to 200 V. The contact type and contact state were determined based on the characteristics of the obtained IV curve. The test results are summarized in Table 1.
[0055] Table 1 Performance Test Results The microstructure of the platinum-plated sample was observed using an optical microscope. Figure 2The image shown is an optical micrograph of the platinum-plated wafer sample prepared in Example 1. The optical microscope reveals that the pixelated structure remains intact after electroless platinum plating, with each electrode unit exhibiting a regular shape and neat arrangement, and no adhesion between them. This result verifies the feasibility of preparing pixelated platinum plating on the wafer surface using the method of the present invention, and also indicates that the electroless platinum plating solution did not dissolve or damage the photoresist.
[0056] The microstructure and composition of the platinum-plated samples were analyzed using scanning electron microscopy (SEM) and scanning transmission electron microscopy (STEM). Figure 3 The image shown is a magnified SEM image of a single pixel surface in the platinum-plated wafer sample of Example 1. It can be seen that platinum metal clusters cover the pixel surface without any missing areas, indicating that the platinum plating method of the present invention has good fidelity for pixelated graphics. Figure 4 The image shown is a cross-sectional FIB microstructure of the platinum coating in the platinum wafer sample of Example 1. The results show that the platinum coating is continuous, dense, and uniform in thickness. The thickness is measured to be approximately 43 nm, indicating that this method can achieve controllable deposition of a uniform platinum coating at the nanoscale. Figure 5 The STEM HAADF (high-angle annular dark-field imaging) results across the platinum plating layer in the platinum-plated wafer sample show that the platinum element is concentrated in the platinum plating layer region, which is clearly distinguishable from the signal formation in the substrate region. This again demonstrates the effective formation of the plating layer and further verifies the effectiveness of the method of the present invention.
[0057] The tape adhesion test method is used to test the adhesion of platinum plating to the sample surface. Figure 6 The results of the tape adhesion test for the sample in Example 1 are shown. (a) is an optical micrograph of the sample surface after the tape was peeled off, showing that no metal film was detached from the grid area, the grid edges were intact, and there was no peeling at the intersections. (b) shows the surface state of the peeled tape, with no metal coating residue observed in the adhesive layer. This test demonstrates that the electroless platinum-plated electrode prepared by this method has excellent adhesion strength to the substrate, proving that the electroless platinum plating method meets the mechanical stability requirements for practical applications.
[0058] The platinum-plated device was tested using a high-precision picoammeter under a bias voltage of -200 to 200V. Figure 7 The IV curve of the sample in Example 1 is shown, which shows that the current and voltage have a good linear relationship, indicating that a good ohmic contact has been formed, which meets the requirements for the fabrication of semiconductor functional devices.
[0059] Figure 8 and Figure 9 The figures show the tape adhesion test results for the platinum-plated wafer samples of Comparative Example 1 and Comparative Example 2, respectively. Figure 8 (a) is an optical micrograph of the surface of the sample in Comparative Example 1 after the tape has been peeled off. Figure 8(b) shows the surface condition of the peeling tape. Both show that the platinum layer peels off in large areas after being peeled off by the tape, indicating that the adhesion of the platinum electrode is poor and the tape adhesion test is unqualified. Figure 9 (a) is an optical micrograph of the surface of the sample in Comparative Example 2 after the tape has been peeled off. Figure 9 (b) shows the surface condition of the peeling tape. Both show that the platinum electrode is unevenly covered and there is detachment after the tape is peeled off, indicating that the platinum electrode adhesion is insufficient and the tape adhesion test is unqualified.
[0060] in conclusion This invention provides a method for fabricating pixelated platinum-cadmium telluride wafers. This method utilizes a photoresist mask to define the pixel array region, a methanol and N,N-dimethylformamide composite solvent to control the plating solution characteristics, and precise chemical plating and mask stripping processes to successfully achieve controllable deposition of a nanoscale uniform platinum coating on the wafer surface. Characterization results show that the samples prepared in the examples exhibit a regularly shaped and neatly arranged pixelated electrode structure. The platinum coating is continuous, dense, and uniform in thickness, with the thickness consistently controlled within the 38-43 nm range as measured by FIB cross-section. Adhesive tape adhesion testing verifies the excellent bonding strength between the coating and the substrate, with no coating detachment or residue after peeling. IV curve testing indicates good ohmic contact between the coating and the wafer substrate. Furthermore, this method enables stable pure platinum electrode fabrication, avoiding the potential risks of selective dissolution or surface segregation of alloy electrodes under specific potentials or halide ion environments.
[0061] Comparative experiments further demonstrate that the solvent system controlled by this invention plays a crucial role in improving the performance of the platinum-plated layer on the cadmium telluride crystal surface, and that this plating solution system has excellent compatibility with the photoresist mask solution system and process. In contrast, the comparison examples, using only deionized water or a methanol-glycerol mixed solvent to prepare the plating solution, even with the masking step omitted and the entire platinum-plated electrode directly fabricated, still resulted in insufficient coating adhesion and poor structural regularity, failing to meet the requirements of device manufacturing.
[0062] In summary, the method developed in this invention effectively solves the problems of poor adhesion, low pattern fidelity, and unstable coating composition in traditional electroless platinum plating processes. It provides a low-cost, high-reliability solution for the fabrication of metallized electrodes for cadmium telluride semiconductor devices that can be carried out at room temperature and is compatible with mask fine processing technology. It has important application value in fields such as radiation detection.
[0063] The above embodiments are exemplary and are intended to illustrate the technical concept and features of the present invention, so that those skilled in the art can understand the content of the present invention and implement it accordingly. They should not be construed as limiting the scope of protection of the present invention. All equivalent changes or modifications made according to the spirit and essence of the present invention should be covered within the scope of protection of the present invention.
Claims
1. A method for depositing pure platinum electrodes on the surface of cadmium telluride crystals, characterized in that, Includes the following steps: (a) Crystal preparation: Provide cadmium telluride crystals and polish and clean the crystal surface; (b) Mask preparation: A patterned mask layer is formed on the cleaned crystal surface, the mask layer exposing a predetermined area of the electrode to be plated; (c) Plating solution preparation: The chloroplatinic acid solution is diluted with a mixed solvent to prepare a chemical plating solution, wherein the mixed solvent is a mixture of methanol and N,N-dimethylformamide; (d) Electroless plating of platinum: The crystals treated in step (b) are immersed in the electroless plating solution and reacted at 20~40°C to deposit a pure platinum coating in the preset area. (e) Mask stripping: Remove the mask layer from the surface of the crystal to obtain a cadmium telluride crystal with patterned pure platinum electrodes on the surface.
2. The method according to claim 1, characterized in that, In step (a), the cadmium telluride crystal is either cadmium telluride crystal or cadmium zinc telluride crystal.
3. The method according to claim 2, characterized in that, In step (a), the polishing is one or more of chemical mechanical polishing, mechanical polishing, and chemical polishing, used to remove the damaged layer on the surface; the cleaning includes cleaning with a solvent selected from acetone, isopropanol, and deionized water, used to remove organic contaminants and / or particulate matter from the wafer surface.
4. The method according to claim 1, characterized in that, In step (b), the method for preparing the mask layer includes: spin-coating a negative photoresist onto the crystal surface, and forming the patterned mask layer after baking, exposure and development.
5. The method according to any one of claims 1-4, characterized in that, In step (c), the chloroplatinic acid solution is an aqueous solution of chloroplatinic acid, and the volume ratio of methanol to N,N-dimethylformamide in the mixed solvent is 1:9 to 9:
1.
6. The method according to claim 5, characterized in that, In step (c), the mass concentration of chloroplatinic acid in the electroless plating solution is 1% to 6%.
7. The method according to claim 5, characterized in that, In step (d), the reaction time for the electroless platinum plating is 5 to 30 minutes.
8. The method according to claim 5, characterized in that, In step (d), the thickness of the pure platinum coating is 10~50nm.
9. The method according to claim 5, characterized in that, In step (e), the mask stripping includes: immersing the crystal sequentially in N-methylpyrrolidone solvent and isopropanol solvent for treatment, then rinsing with deionized water and drying.
10. A semiconductor functional device, characterized in that, It includes cadmium telluride crystals and pure platinum electrodes prepared on the surface of the cadmium telluride crystals by the method described in any one of claims 1 to 9.