An integrated information processing method, system, electronic device, and storage medium based on multi-valued states, non-uniform weight mapping, and closed topological constraints.

Abstract

This invention discloses an integrated information processing method, system, electronic device, and storage medium based on multi-valued states, non-uniform weight mapping, and closed topological constraints. The method maps input information into multi-valued discrete state nodes and constructs a closed topological network including independent closed loops, positional closed constraint spaces, mirror loops, and / or hierarchically nested loops. It generates a background reference state, intrinsic pointing flow, and non-uniform weights based on preset rules and / or residual feedback. Based on the background reference state, the closed topological network, and the dimensional hedging mechanism, it performs polarity cancellation, mirror hedging, cross-dimensional compensation, orthogonal projection residual calculation, sliding offset compensation, and structural fingerprint generation on the state nodes. It performs closure determination based on local residuals, global residuals, cross-loop consistency, cross-dimensional consistency, tolerance thresholds, and stability windows. When the closure condition is met, it triggers deterministic early termination, decision output, reconstruction output, or locked output based on consistency verification and / or closure determination; when the condition is not met, it triggers blocking, correction, path switching, connection rearrangement, parameter refeedback, weight redistribution, or topological reconstruction. This solution can uniformly realize encoding, compression, verification, inference, secure output and reconstruction recovery, and is applicable to processors, programmable logic devices, dedicated logic circuits and in-memory computing arrays.

Description

Technical Field

[0001] This invention relates to the fields of information processing, data encoding, data compression, storage and transmission, computer architecture, reconfigurable computing, dedicated logic circuits, in-memory computing, and AI-assisted computing. Specifically, it relates to an integrated information processing method, system, electronic device, and computer-readable storage medium centered on multi-valued state nodes, closed topology networks, background reference states, residual and hedging processing, and closure determination. This technology can be applied to scenarios such as high-reliability data representation, compression and reconstruction, consistency verification and anti-interference recovery in communication transmission, security and authentication, feature extraction, inference acceleration, and compressed domain computing. Background Technology

[0002] Traditional information processing systems are mostly built on the von Neumann architecture, which features linear instruction flow and unified clock control. When processing highly redundant, noisy, multi-source concurrent or multi-scale structural data, they often suffer from problems such as separation of logical judgment, compression, verification, encryption and reconstruction, disconnect between structural importance and resource allocation, difficulty in deterministic processing of asynchronous input, and difficulty in unifying compression, transmission, reconstruction and security mechanisms.

[0003] Existing systems typically distribute feature extraction, redundancy removal, consistency verification, and output encapsulation across different modules, leading to frequent data movement between modules and high storage access overhead and latency. For high-weight information and low-weight background information, existing technologies often employ uniform precision or uniform iteration strategies, making it difficult to dynamically allocate computing resources based on structural importance, and also difficult to perform redundancy skipping and deterministic filtering in situ during processing.

[0004] Furthermore, asynchronous signals arriving from interrupts, callbacks, peripheral drivers, or multi-source event streams, if directly applied to the processing backbone, can easily introduce problems such as increased contention windows, metastability propagation, and verification difficulties; while traditional synchronization methods may sacrifice throughput or flexibility. Existing compression methods mostly rely on statistical correlation, existing verification methods mostly rely on single digests or redundant check codes, and existing security schemes are often independent of the data structure itself, making it difficult to couple structured residuals, background reference states, positional constraints, and consistency verification into a unified mechanism.

[0005] Meanwhile, existing early termination strategies are mostly based on general error convergence, rather than deterministic stopping driven by closure criteria. Traditional early stopping often relies on changes in the loss function, threshold convergence, or the maximum number of iterations, without fully utilizing the structural consistency and stability window criteria among multi-loop backtracking results. Therefore, it is necessary to propose a new information processing paradigm that enables multi-valued state mapping, closed topological constraints, residual management, closure criteria, early termination, output encapsulation, and reconstruction verification to be integrated within the same technical framework.

[0006] Furthermore, existing technologies typically perform mapping, verification, compression, decision-making, or correction processes on a single representation domain, lacking a unified mechanism for cross-compensation, consistency comparison, and collaborative closure of the same input object across multiple representation dimensions. Therefore, when the input exhibits positional drift, phase shift, polarity reversal, topological perturbation, multi-source asynchronous interference, or weight imbalance, existing methods often require processing in multiple independent modules, making it difficult to achieve cross-dimensional constraint integration, unified residual management, and deterministic closure determination within the same processing chain. Purpose of the invention

[0007] The purpose of this invention is to overcome the shortcomings of existing technologies, such as low information processing efficiency, separation of structural judgment and resource allocation, difficulty in determinizing asynchronous input, separation of compression and verification, and difficulty in unifying security and reconstruction. It provides an integrated information processing method, system, electronic device and storage medium based on multi-valued states, non-equivalent weight mapping and closed topological constraints. Technical solution

[0008] To achieve the above objectives, the present invention adopts the following technical solution: mapping input information into a multi-valued state node sequence or state tensor; constructing a closed topology network including multiple closed constraint loops, positional closed constraint spaces, mirror paths, and / or hierarchical nested loops; generating background reference states, intrinsic pointing flows, reference vectors, or structural reference points; constructing corresponding state representations for the same input object in at least two dimensional representation domains and performing dimensional hedging; further performing polarity cancellation, mirror hedging, orthogonal projection residual calculation, sliding offset compensation, and structural fingerprint generation on the state nodes; performing closure determination based on local / global residuals, cross-loop consistency, cross-dimensional consistency, thresholds, and stability windows; triggering deterministic early termination, decision output, residual encoding output, reconstruction output, or locked output when the closure condition is met; triggering blocking, correction, path switching, connection rearrangement, parameter refeeding, weight redistribution, or topology reconstruction when the closure condition is not met.

[0009] The method can be implemented by a processor executing program instructions, or by a programmable logic device, a dedicated logic circuit, a memory computing array, or a combination thereof.

[0010] Compared with existing technologies, this invention has at least the following advantages: By using non-uniform weight mapping and topological affinity verification, valid information that conforms to prior constraints can be processed first, while redundant information that does not conform to prior constraints can be blocked or weakened in situ, thereby reducing the participation of invalid loops; the early termination of this invention is not a general error convergence stop, but a closure determination stop based on cross-loop consistency verification, threshold conditions, and stability window constraints, thus making it more suitable for high-determinism scenarios; by writing position index, polarity field, quantization residual, sliding offset, reference point, and structural fingerprint, the background reference state can be quickly reconstructed at the receiving end, and consistency verification and constraint domain correction can be performed, thus balancing compression, transmission, and recovery; this invention supports clock-driven operation. It supports synchronous updates as well as event-driven asynchronous updates, and also supports a hybrid processing mode of asynchronous arrival and synchronous effect. This invention is applicable not only to software implementation, but also to hardware implementation paths such as FPGA, ASIC, memristor cross array, in-memory computing array, and multi-value storage media. By reducing gating, pausing, and flipping and shrinking the search range driven by closure criteria, the flipping rate of irrelevant modules, processing latency, and memory access overhead can be reduced. Through the dimension hedging mechanism, the redundancy, complementarity, or opposite constraints of the same input object on different representation dimensions can be transformed into cross-compensation capabilities, thereby improving the closure stability, consistency judgment accuracy, reconstruction reliability, and deterministic output capability under scenarios of position drift, phase perturbation, noise interference, asynchronous input, and local mismatch. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the overall process of the integrated information processing method of the present invention.

[0012] Figure 2 This is a schematic diagram of the structure of the multi-valued discrete state nodes and closed topology network of the present invention.

[0013] Figure 3 This is a schematic diagram illustrating the background reference state and the intrinsic pointing flow generation process of this invention.

[0014] Figure 4 This is a schematic diagram of the residual and hedging process of the present invention.

[0015] Figure 5 This is a schematic diagram of the closure determination and action triggering process of the present invention.

[0016] Figure 6 This is a schematic diagram of the residual record structure of the present invention.

[0017] Figure 7 This is a schematic diagram of the consistency verification and constraint domain correction process of the receiving end, reconstruction end, or verification end of the present invention.

[0018] Figure 8 This is a schematic diagram of the software implementation architecture of the present invention.

[0019] Figure 9 This is a timing diagram illustrating synchronous updates, asynchronous updates, and hybrid updates according to the present invention.

[0020] Figure 10 This is a block diagram illustrating the implementation of the present invention under different hardware implementation methods. Terminology Definitions and Enhanced Explanations

[0021] Multi-valued discrete state nodes refer to discrete state units used to characterize input features, path bias, polarity relationships, priority, or neutral closure relationships during processing. A preferred embodiment is a balanced ternary set {-1, 0, +1}, where +1 represents positive excitation, -1 represents negative excitation, and 0 represents neutral closure or destructive reduction states. For continuous input signals, this invention allows them to be converted into corresponding multi-valued state representations through threshold mapping, interval mapping, sampling mapping, quantization mapping, or equivalent stateification processing before entering closure determination, path comparison, polarity offsetting, or state reduction.

[0022] Non-uniform weight mapping refers to the use of structurally non-uniformly distributed weights when mapping, propagating, determining, and triggering actions for different state nodes, different input features, different paths, or different loops. These weights can be given by preset rules during the initialization phase, or dynamically formed or updated during operation based on residual feedback, path competition status, convergence history, or closure obstacles.

[0023] A closed topology network refers to a constrained network composed of multiple state nodes and their logical or physical connections. It includes at least two or more independent closed constraint loops, positional closed constraint spaces, mirrored candidate paths, hierarchical nested loops, or self-guided structures. It should be understood that "closure" is not limited to geometric loops formed by physical wires, but also includes logical loops, positional index loops, mirrored path loops, hierarchical nested loops, and closure determination structures based on comparison results.

[0024] Background reference states refer to a set of repeatable baseline states derived from seeds, parameter sets, rule generators, reference vectors, or intrinsic operators. They can serve as mapping targets, comparison benchmarks, projection bases, residual extraction bases, and reconstruction recovery bases. Intrinsic pointing streams refer to reference sequences, pointing sequences, control sequences, or gradient sequences derived from background reference states, baseline vectors, or control word generation processes. They are used to provide path pointing, boundary update bases, sorting bases, or arbitration bases for state nodes.

[0025] Residual refers to the difference representation obtained after projection, differencing, mirror hedging, polarity hedging, position compensation, or quantization of input information under a background reference state, closed topological constraints, or a reference basis. Residuals can be divided into local residuals and global residuals. Structural fingerprint refers to the structural feature code derived from topological neighborhood, peak position, reference point, neighborhood signature hash, or a combination thereof, used for fast localization, fast reconstruction, consistency verification, anomaly detection, or constraint domain correction.

[0026] Dimensional hedging refers to a mechanism that, for the same input object, the same state node, the same data block, or the same event, constructs corresponding state representations in at least two different dimensional representation domains, and utilizes the redundancy, complementarity, or opposite constraints between these different dimensional representation domains to perform cross-compensation, cancellation, filtering, redistribution, or consistency determination on deviations, drifts, ambiguities, noise, or conflicts introduced by a single dimension. The dimensions are not limited to geometric space dimensions, but also include representation dimensions such as state value dimensions, position index dimensions, phase or ordinal dimensions, time window dimensions, topological hierarchy dimensions, mirror path dimensions, and weight gradient dimensions. Dimensional hedging can be performed in conjunction with polarity cancellation, mirror hedging, orthogonal projection residual calculation, sliding offset compensation, and structural fingerprint generation, and can be used to generate dimensional hedging residuals, cross-dimensional consistency scores, or cross-dimensional closure determination results.

[0027] Connection comparison refers to performing a consistency comparison on the connection relationships, adjacency relationships, mirror correspondence relationships, temporal relationships, event arrival relationships, or loop attribution relationships of two paths, two loops, two time windows, or two state segments to determine whether their connection patterns, mirror mappings, temporal organization, or return relationships are consistent.

[0028] Closure criterion refers to a judgment criterion that jointly judges local / global residuals, cross-loop differences, cross-dimensional consistency, threshold conditions, stability window conditions, local consistency scores, or global consistency scores. A stability window refers to a series of consecutive update cycles, event windows, or judgment windows used to avoid false closures caused by transient noise. Deterministic early termination refers to a stopping action triggered based on cross-loop consistency verification results and / or closure judgment results, rather than simply stopping based on the number of iterations, convergence of ordinary errors, or probability fitting. Parameter and Field Descriptions

[0029] In a preferred embodiment of the present invention, the following parameters and fields can be used. The state node can be denoted as Si, preferably using a balanced three-value set {-1, 0, +1}. The node or operator weight can be denoted as ωi, used to control the state excitation intensity, path selection, and priority; the phase or intrinsic offset parameter can be denoted as φi, used for phase offsetting, mirror alignment, or path calibration. The background reference state or theoretical reference vector can be denoted as T, and can be generated by LFSR, PRNG, lookup table, or control word generation function.

[0030] The global deviation or closure metric can be denoted as D, which can be obtained by summing XOR, differential, modulus reduction, projected residual, or current; the rate of change of deviation can be denoted as ΔD; the closure threshold can be denoted as θ; and the stability window length can be denoted as L. The global time boundary can be represented as tick = k·Tc, used for asynchronous arrival, synchronous activation, and contention window determinism. Asynchronous events can be first written to the injection queue and then released and activated at the unified boundary through an arbitration function.

[0031] In a preferred embodiment, the dimensional hedging residual can be denoted as R. (d) Or D (d) , used to represent the residual obtained after comparison, compensation, or cross-cancellation between different dimensional representation domains; the cross-dimensional consistency score can be denoted as C. dim The score is used to represent the degree of consistency among state representations across multiple dimensional representation domains. The score can serve as one of the bases for closure determination, path switching, threshold adjustment, weight redistribution, or reconstruction strategy selection.

[0032] The residual record structure may include a location index (Index), a polarity identifier (Polarity), a quantization residual (QResidual), a sliding offset compensation amount (Delta), a reference point identifier (RefTag), a structural fingerprint (Fingerprint), a mode identifier (Mode), a window number (WindowID), a frame-level structural fingerprint (FrameFingerprint), and a state summary (StateSummary). The field order, alignment, and grouping method can be adjusted according to end-to-end order, protocol implementation, or hardware pipeline requirements, but without changing their logical relationships. Example 1: A General Example of an Integrated Information Processing Method

[0033] like Figure 1 As shown, the integrated information processing method of the present invention generally includes state mapping, closed topology construction, reference state generation, residual and hedging processing, closure determination, action triggering, and output and verification steps. Figure 2 The structural relationship between multi-valued discrete-state nodes and closed topology networks is shown. Figure 3 The generation process of the background reference state and the intrinsic pointing flow is shown. Figure 4 The residual and hedging process is shown. Figure 5 The process of determining closure and triggering action is shown. Figure 6 The residual record structure is shown. Figure 7 The consistency verification and constraint domain correction process is shown at the receiving end, reconstruction end, or verification end.

[0034] This embodiment provides an integrated information processing method based on multi-valued states, non-uniform weight mapping, and closed topological constraints. First, the input information to be processed is segmented, block-based, windowed, or packaged into events to form a processable input object. The input object can be a binary bitstream, image block, video frame, sensor time window, network message frame, model parameter block, interrupt event, or callback event.

[0035] Subsequently, the input object is mapped to a sequence of multi-valued discrete state nodes, a state tensor, or a combination thereof, and each state node is associated with a target location in the logical space and / or physical space. Preferably, the multi-valued discrete state nodes adopt a balanced ternary state set {-1, 0, +1}. A non-uniformly distributed weight mapping rule is used during mapping to create differentiated responses in terms of state excitation intensity, polarity direction, priority, or path selection for different input features. The weight mapping rule can be determined by a preset rule during the initialization phase or dynamically formed during operation based on residual feedback, state evolution, path competition states, or convergence history.

[0036] In a preferred embodiment, the non-uniformly distributed weight mapping rule can be determined based on the background reference state gradient, position order, loop level, historical convergence rate, local residual, global residual, path competition state, or a combination thereof. Preferably, when the local residual is continuously higher than a preset threshold, the mapping weight of the corresponding state node, corresponding path, or corresponding loop is increased; when cross-loop consistency is continuously established and the deviation change rate is lower than a preset range, the update priority or propagation weight of the corresponding background node is reduced; thereby enabling the weight allocation to be dynamically adjusted according to residual feedback and convergence history.

[0037] After completing the state mapping, a constrained closed topology network is constructed. This closed topology network includes at least one of the following: at least two independent closed constraint loops, a positional closed constraint space, a mirrored closed path, and a hierarchically nested loop. Preferably, the system simultaneously establishes a main closed loop and a mirrored auxiliary closed loop to generate at least two independent return results for the same input object, which can be used for subsequent consistency verification. The closed topology network can operate in a clock-driven synchronous update mode, an event-driven asynchronous update mode, or a hybrid update mode where asynchronous arrival and synchronous activation occur.

[0038] like Figure 2 As shown, the closed topology network may include a main closed loop, a mirror auxiliary loop, a positional closure constraint space, and a hierarchical nested or self-guided structure. Preferably, different closed loops output return results respectively, and a joint judgment basis is formed by cross-loop consistency comparison, mirror offsetting, or return comparison.

[0039] After the closed topology network is established, a background reference state, intrinsic pointing flow, reference vector, and / or structural reference points are generated. The background reference state can be generated by a seed, parameter set, lookup table rules, linear feedback shift register, pseudo-random sequence generator, control word generation function, or reference vector generation function. The background reference state serves as a common reference for input mapping, projection residual extraction, mirror offsetting, verification judgment, and reconstruction recovery; the intrinsic pointing flow is used to provide path guidance, node ordering, conflict arbitration, and boundary updates.

[0040] like Figure 3 As shown, the background reference state and intrinsic pointing flow can be generated jointly by the seed, parameter set and generation rules, and can be further derived from the reference point position, path sorting information or control word for subsequent state mapping, path guidance, conflict arbitration, residual management and reconstruction recovery.

[0041] In a preferred embodiment, the system constructs corresponding state representations for the same input object in at least two dimensional representation domains. The dimensional representation domains may include at least two of the following: state value dimension, position index dimension, phase or ordinal dimension, time window dimension, topological hierarchy dimension, mirror path dimension, and weight gradient dimension. Subsequently, the system performs comparison, projection, compensation, cross-cancellation, or consistency checks on the state representations in each dimensional representation domain to generate dimensional hedging residuals, and uses these dimensional hedging residuals as one of the bases for subsequent closure determination, path switching, threshold adjustment, weight redistribution, topology reconstruction, or reconstruction correction.

[0042] Subsequently, based on the closed topology network and the background reference state, residual and offset processing is performed on the multi-valued state nodes. The processing includes at least: performing algebraic cancellation on state nodes with opposite polarities to normalize them to a neutral state; projecting, subtracting, and discretizing the input information relative to the background reference state to generate orthogonal projection residual representations; performing mirror offsetting, polarity reversal recalculation, or equivalent transformation comparisons on the deviations between the main path and mirror path, the main loop and auxiliary loop, and the forward path and reverse path; performing comparison, projection, compensation, cross-cancellation, or consistency verification on the state representations in at least two dimensional representation domains to generate dimensional offset residuals; performing segmented scanning on the continuous data stream, calculating the sequence position sliding offset, and writing the offset into the residual representation for compensation at the reconstruction end; and generating structural fingerprints, reference point identifiers, or integrity feature codes based on topological neighborhood constraints.

[0043] like Figure 4As shown, the residual and hedging processing may include polarity cancellation, mirror hedging, dimensional hedging, orthogonal projection residual extraction, sliding offset compensation, and structural fingerprint generation. Among them, dimensional hedging is used to perform cross-compensation, cross-cancellation, or consistency verification on the state representation of the same input object in different dimensional representation domains to generate dimensional hedging residuals, which serve as one of the bases for subsequent closure determination and path adjustment.

[0044] After residual and hedging processing is completed, a closure check is performed on the processing results. The closure check considers at least the following factors: whether the local residual is less than the local threshold, whether the global residual is less than the global threshold, whether cross-loop structural differences can be eliminated, whether the cross-dimensional consistency score meets the threshold requirement, whether the rate of change of deviation is within a stable range, and whether the above conditions are continuously met within a preset stability window length. If the local residual and / or global residual meet the threshold requirement, and the cross-loop consistency check is successful and the cross-dimensional mapping relationship remains consistent, then a closed state or a cross-dimensional closed state is determined to be formed. If there are irremovable differences, inconsistent cross-dimensional mapping relationships, or the residual does not meet the threshold requirement, then a closure obstacle is determined to exist.

[0045] like Figure 5 As shown, the closure determination can be based not only on local residuals, global residuals, thresholds, and stability windows, but also on cross-loop consistency and cross-dimensional consistency. When the above conditions are met, the system triggers deterministic early termination, locks the output, or controls the output; when the conditions are not met, the system triggers correction, switching, topology reconstruction, or continues iteration.

[0046] When a closed state is formed, the system triggers deterministic early termination based on the cross-loop consistency check result and / or the closure determination result, and further triggers at least one of the following: decision output, residual code output, reconstruction output, locking output, or control command output. When a closed state is not formed, the system triggers at least one of the following: blocking, anomaly identification, correction, continued iteration, path switching, connection rearrangement, parameter refeedback, threshold adjustment, weight reallocation, or topology reconstruction. Topology reconstruction includes dynamically adjusting the logical connectivity, path selection, loop membership relationships, or combinations thereof between operators based on residual feedback to establish, maintain, or restore local or global loops that satisfy the closure determination conditions.

[0047] Finally, the system outputs residual representation, steady-state core encoding, control results, authentication block, transport block or storage block, and performs consistency verification, anomaly detection, constraint domain correction and reconstruction recovery at the receiving end, reconstruction end or verification end using background reference state, structural fingerprint and topology constraints. Example 2: Residual Records and Reconstruction Recovery Example

[0048] like Figure 6As shown, the residual record can be encapsulated in the form of structured fields, including at least the location index, polarity field, quantization residual, and sliding offset compensation amount, and optionally includes reference point identifier, structural fingerprint, pattern identifier, window number, frame-level structural fingerprint or state summary.

[0049] In this embodiment, the system encapsulates the residuals and hedging results into a structured record. The record includes a location index, a polarity field, a quantization residual QResidual, a sliding offset compensation amount Delta, and optional reference point identifier RefTag, structural fingerprint Fingerprint, mode identifier Mode, and window number WindowID.

[0050] At the encoding end, if an input block exhibits high stationarity under the background reference state, only the position index or the position index and reference point identifier are recorded. If an input block is non-stationary, the position index, polarity field, quantization residual, and sliding offset compensation are recorded. To enhance fast reconstruction and consistency verification capabilities, structural fingerprints are further recorded. At the reconstruction end, candidate position points are quickly located using the index and RefTag. Then, the initial reference block is reconstructed based on the background reference state. Next, Delta is read to perform ordinal or phase compensation, residual details are recovered using QResidual, and neighborhood consistency verification is performed using Fingerprint. If the verification fails, corrections, mirror candidate switching, or anomaly marking are performed within the constraint domain.

[0051] like Figure 7 As shown, at the receiving end, reconstruction end, or verification end, the residual record can be read first, then the background reference state can be reconstructed, and then recovery can be performed based on the offset compensation amount and quantization residual, and consistency verification can be performed in combination with structural fingerprint and topological relationship; if the verification fails, constraint domain correction, mirror candidate switching, or anomaly marking can be performed. Example 3: Synchronous / Asynchronous Hybrid Update Example

[0052] like Figure 9 As shown, external events can arrive asynchronously and enter the injection queue first. After being aggregated at a unified tick=k·Tc boundary, they take effect synchronously, thereby realizing asynchronous arrival, synchronous effect and deterministic handling of competition windows.

[0053] In this embodiment, the system defines a unified global time boundary tick = k·Tc. External interrupts, sensor data, callback messages, or network events arrive asynchronously and do not directly affect the main processing link; instead, they are first written to an injection queue. Each asynchronous event is accompanied by a timestamp, priority, and event category identifier when written to the injection queue. When the current tick boundary is reached, the system extracts the events to be activated from the injection queue and inputs them, along with the reference control word generated by the intrinsic pointing stream, into the conflict arbitrator. The conflict arbitrator updates the action set uniformly based on priority, topology description table, current path state, and closure decision history. Subsequently, these actions take effect synchronously on the unified boundary. This mechanism enables asynchronous arrival, synchronous activation, and deterministic handling of contention windows.

[0054] In a preferred embodiment, when the current closed topology network continuously exhibits irremovable differences, fails to achieve cross-loop consistency for an extended period, or consistently scores below a threshold within a preset iteration window, the system can perform a switch between predefined topologies. The predefined topologies may include at least two of the following: a primary closed loop priority structure, a mirror auxiliary loop priority structure, a hierarchical nested loop priority structure, and a positional closed loop priority structure. The predefined topology switching can be performed in conjunction with path switching, connection rearrangement, parameter backfeeding, threshold adjustment, or weight redistribution. Example 4: Image Data Compression Example

[0055] In this embodiment, the input object is an image block or a video frame block. The system first generates a background reference state for each image block and maps the pixel values ​​within the block to multi-value discrete state nodes. A positional closure constraint space and a mirror candidate path are established for each block. For stationary blocks, only the position index and structural fingerprint are recorded; for non-stationary blocks, the position index, polarity field, quantization residual, and sliding offset are recorded. The decoding end reconstructs the initial block based on the background reference state, and then completes detail recovery and consistency correction based on the residual records. Example 5: Real-time Processing Example of Industrial Sensors

[0056] In this embodiment, the input is an industrial sensor stream such as temperature, vibration, current, and pressure. The system divides the input stream into windows of fixed length and calculates the sliding offset Delta and quantization residual within each window. The encoder outputs a frame structure consisting of Delta, ResidualRecords, and FrameFingerprint. The receiver performs real-time recovery by combining background reference state reconstruction and topology consistency verification. This method is suitable for real-time compression, transmission, and recovery in high-drift, high-noise environments. Example 6: Security and Encryption Example

[0057] In this embodiment, the generation parameters of the background reference state, the structure seed, the mirror configuration, the topology description table, and / or the reference control word generation rules can be used as a shared generation basis between the authorizing end and the verifying end. After mapping the plaintext input to multi-valued discrete state nodes, the sending end performs residual and hedging processing using the background reference state and the closed topology network to generate residual records, structure fingerprints, and authentication blocks. The authentication block can be composed of structure fingerprints, reference point identifiers, pattern identifiers, and local or global closed digests.

[0058] Provided the receiving end possesses the correct seed, parameter set, and / or control word generation basis, it reconstructs the corresponding background reference state and completes decoding and consistency verification based on residual records, structural fingerprints, and topological constraints. If the above generation basis is incorrect, the background reference state cannot be reconstructed correctly, nor can the combination relationship between the position index, polarity field, quantization residual, and sliding offset compensation amount be correctly interpreted, resulting in the closure criterion failing to hold, thereby triggering blocking, anomaly marking, or output rejection.

[0059] In a preferred embodiment, the system only allows the output of an authentication pass signal, reconstruction result, or control command when the cross-loop consistency check is successful and the closure determination passes. If a structural fingerprint mismatch, reference point deviation, topological inconsistency, or failure of the closure condition within the stability window is detected during the verification process, it is determined that tampering, forgery, or key error has occurred, and an abnormal status is output. Thus, the system can unify encryption, authentication, consistency check, and structured recovery within the same closure processing framework.

[0060] In one embodiment, locking the output means that when the closure determination is successful and the authentication conditions are met, the output block is encapsulated into a locked state representation, and / or a write protection flag, an authentication pass flag, a state persistence flag, or a combination thereof is triggered. The locked state representation can be used for secure output after successful authentication, authorization confirmation, event logging, or control state persistence. Example 7: Continuous Signal Stateification Example

[0061] In this embodiment, the input is a continuous analog voltage, continuous current signal, light intensity signal, phase signal, or other continuously changing signal. The system first samples, quantizes, divides, thresholds, maps, or performs equivalent state processing on the continuous input to convert it into a multi-valued discrete state node representation. Subsequently, it performs closed topology construction, reference state generation, residual and offset processing, and closure determination according to the method of this invention.

[0062] In a preferred embodiment, the continuous signal can be divided into a positive interval, a near-zero interval, and a negative interval, and mapped to +1, 0, and -1, respectively. Alternatively, a higher-order multi-valued state can be formed based on multi-level thresholds, and then reduced to a balanced ternary semantic layer before closure determination. Thus, this invention is applicable not only to native discrete inputs but also to continuous inputs after state-based processing. Example 8: Implementation Example with Multiple Hardware Support

[0063] like Figure 8 As shown, in the software system, this invention can be divided into modules such as input mapping, closed topology construction, reference state generation, residual and hedging, closure determination, action triggering, and output and verification; for example... Figure 10 As shown, the present invention can also be implemented by a processor, a programmable logic device, a dedicated logic circuit, and a memory computing array.

[0064] In this embodiment, the system can be implemented by at least one of a processor, a programmable logic device, a dedicated logic circuit, or a memory computing array. The system may include an intrinsically pointing stream generator, an asynchronous injection synchronization interface, a conflict arbitrator, a check structure, a state backtracking window, a connection rearrangement unit, and a path switching unit.

[0065] In in-memory computing implementations, the conductance distribution of the cross array can be used to carry out weight mapping and parallel deviation reduction; in programmable logic or dedicated logic implementations, pipelined structures, parallel comparison structures, and state register structures can be used to carry out asynchronous updates, closure determination, and action triggering. All of the above hardware paths can be mapped to the unified processing chain of this invention.

[0066] In some implementations, the system may further include a precision configuration register and a verification unit. The precision configuration register is used to record the precision level, tolerance configuration, or quantization strategy currently used for different state nodes, paths, loops, or windows; the verification unit is used to perform re-verification on the output results according to the same background reference state, topological constraints, and residual records. The above-mentioned auxiliary functional units may be implemented by processor programs, register logic, programmable logic resources, or dedicated control circuits. Example 9: Dimensional Hedging and Cross-Dimensional Closure Determination Example

[0067] This embodiment provides a method for determining dimensional hedging and cross-dimensional closure. For the same input object, the system constructs state representations in at least two dimensional representation domains. The dimensional representation domains may include at least two of the following: state value dimension, position index dimension, phase or ordinal dimension, time window dimension, topological hierarchy dimension, mirror path dimension, and weight gradient dimension.

[0068] In a preferred embodiment, the system constructs a state value dimension representation S, a position index dimension representation P, and an optional ordinal dimension representation Q for the same input data block. The state value dimension represents the excitation state of the input object in a set of multi-valued discrete states; the position index dimension represents the target position of the input object in logical space and / or physical space; and the ordinal dimension represents the relative order of the input object within a time window, scan order, event sequence, or phase sequence.

[0069] The system calculates the residuals in each dimension of the representation domain, such as the state value dimension residual, the position index dimension residual, and the ordinal dimension residual; and performs comparison, projection, compensation, cross-cancellation, or consistency checks on the residuals to generate dimension-hedged residuals. The dimension-hedged residuals can be constructed using weighted combination, difference mapping, cross-constraint scoring, or a combination thereof.

[0070] When the residuals in at least two dimension representation domains simultaneously meet the preset tolerance thresholds and the mapping relationships between the dimension representation domains remain consistent, the system determines that a cross-dimensional closed state has been formed; when the residuals in at least one dimension representation domain exceed the tolerance thresholds, or the cross-dimensional mapping relationships are inconsistent, the system triggers at least one of the following: path switching, weight adjustment, connection rearrangement, parameter backfeeding, topology reconstruction, anomaly identification, or continued iteration.

[0071] In a preferred embodiment, when the residuals on at least two dimension representation domains simultaneously satisfy the tolerance threshold and the cross-dimensional mapping relationship remains consistent, the system can determine that a cross-dimensional closed state has been formed; when the local residuals, global residuals and cross-dimensional consistency further simultaneously satisfy the final closure determination condition, the system can further determine that a stable closed state has been formed.

[0072] In a preferred embodiment, dimensional hedging can be performed in conjunction with polarity cancellation, mirror hedging, sliding offset compensation, and structural fingerprint generation. Thus, the system can improve the stability of closure determination, the consistency of reconstruction results, and the reliability of output results by utilizing redundancy, complementarity, or opposite constraints between multi-dimensional representations, even when single-dimensional information is insufficient, local disturbances are significant, path conflicts are frequent, or asynchronous interference exists. Description of Electronic Devices and Storage Media

[0073] The present invention also provides an electronic device, including a processor and a memory, wherein a computer program is stored in the memory, and the program, when executed, implements the above-described method. The present invention also provides a computer-readable storage medium storing a program thereon for performing the above-described method. The modular program interface may include a background reference state construction interface, a mapping and hedging interface, a residual encapsulation interface, and a decoding and correction interface. Equivalent substitution and non-limiting explanation

[0074] Those skilled in the art will understand that, without departing from the technical essence of the present invention, the module division method, field order, alignment method, quantization or rounding strategy, mapping rule, verification implementation, update mode, circuit carrying form, reference state generation method, path competition strategy, and mirror candidate or polarity reversal triggering rule can all be equivalently replaced or modified, and these equivalent replacements or modifications should all fall within the protection scope of the present invention.

Claims

1. An integrated information processing method based on multi-valued states, non-uniform weight mapping, and closed topological constraints, characterized in that, Includes the following steps: S1, State Mapping Step: Map the input information to be processed into a multi-valued discrete state node sequence, a state tensor, or a combination thereof, and associate the multi-valued discrete state nodes with target locations in the logical space and / or physical space. The mapping employs a non-uniformly distributed weight mapping rule to enable different input features to generate differentiated responses in terms of state excitation intensity, polarity direction, priority, path selection, or a combination thereof. The non-uniformly distributed weight mapping rule can be determined by a preset rule and / or dynamically formed during operation based on residual feedback, state evolution, path competition, convergence history, or a combination thereof. S2, Closed Topology Construction Steps: Construct a constrained closed topology network, wherein the closed topology network includes at least one of the following structures: not less than two mutually independent closed constraint loops, positional closed constraint space, mirror closed loop, or hierarchical nested closed loop; the closed topology network runs during event-driven asynchronous update, clock-driven synchronous update, or a combination of both update processes; S3, Reference state generation step: Construct a reproducible background reference state, intrinsic pointing flow, reference vector, structural reference point or combination thereof according to preset generation rules, which are used to constrain the traversal, hedging, reduction, verification or reconstruction process of the multi-value discrete state node; S4, Residual and Hedging Processing Steps: Based on the closed topology network and the background reference state, perform dimensional hedging, polarity cancellation, mirror hedging, orthogonal projection residual calculation, deviation reduction, sliding offset compensation, structural fingerprint generation, or a combination thereof on the multi-value discrete state nodes to generate local residuals, global residuals, dimensional hedging residuals, structural fingerprints, reference point identifiers, or a combination thereof, and reduce at least one of the following: state flipping times, repeated calculation times, storage access times, processing latency, or energy consumption; wherein, the dimensional hedging process includes: for the same input object, the same state node, the same data block, or the same event, constructing corresponding state representations in at least two dimensional representation domains, and using the redundancy, complementarity, or opposite constraints between the at least two dimensional representation domains to perform cross-compensation, cancellation, screening, redistribution, or consistency determination on deviations, drifts, ambiguities, noise, or conflicts; S5, Closure Determination Step: Based on local closure criteria, global closure criteria, structural difference criteria, tolerance threshold, stability window condition, cross-dimensional consistency criteria, or a combination thereof, the residuals and hedging results are determined to determine whether a closed state, a cross-dimensional closed state, or a stable closed state is formed. The determination can be performed in synchronous update, asynchronous update, or hybrid update modes. The cross-dimensional consistency criteria are used to determine at least whether the residuals in different dimensional representation domains simultaneously satisfy a preset tolerance threshold, and whether the mapping relationship between different dimensional representations remains consistent. S6, Action Triggering Steps: When the closure judgment condition is met, trigger at least one of the following actions: deterministic early termination based on cross-loop consistency verification results and / or closure judgment results, decision output, residual coding output, reconstruction output, locking output, control command output; when the closure judgment condition is not met, trigger at least one of the following actions: continue iteration, block, anomaly identification, correction, downgrade processing, path switching, connection rearrangement, parameter refeedback, threshold adjustment, weight redistribution, or topology reconstruction; S7, Output and Verification Steps: Output residual representation, steady-state core encoding, expansion result, control result, storage block, transmission block, authentication block or combination thereof, and perform consistency verification, anomaly detection, constraint domain correction or reconstruction recovery using the background reference state and topology constraints at the receiving end, reconstruction end or verification end.

2. The method according to claim 1, characterized in that: A preferred embodiment of the multi-valued discrete state node is a balanced ternary state set {-1, 0, +1}; where +1 represents forward excitation, forward evolution, positive polarity accumulation or a combination thereof, -1 represents reverse excitation, reverse evolution, reverse polarity perturbation or a combination thereof, and 0 represents a neutral closed state, a destructive reduction state or a combination thereof; furthermore, a binary state set can be used as a degenerate implementation of the balanced ternary state set, and a state set with more than three values ​​can be used as an extended encoding implementation of the balanced ternary state set, as long as its state reduction result can be mapped to at least one of a forward excitation state, a reverse excitation state, and a neutral closed state.

3. The method according to claim 1, characterized in that: The non-uniformly distributed weight mapping rule includes at least one of the following methods: determining the mapping weight of state nodes based on background reference state gradient, intrinsic pointing flow gradient, node importance, positional order, loop level, input feature saliency, historical convergence rate, residual feedback, path competition state, or a combination thereof; the mapping weight can be preset during the initialization phase and / or dynamically updated during operation based on local residual, global residual, connection state, path return results, closure barriers, or a combination thereof; the mapping weight is used to perform nonlinear discrimination, differential amplification, polarity induction, priority modulation, path guidance, or a combination thereof on the input information, so that the propagation mode, return residual, or convergence condition of different categories of input features in the closed topology network are different.

4. The method according to claim 1, characterized in that: The closed topology network includes at least two independent closed constraint loops; the at least two independent closed constraint loops output return results in synchronous update, asynchronous update, or hybrid update modes, and perform cross-loop consistency verification through synchronous phase comparison, event arrival relationship comparison, evolution feature comparison, state sequence comparison, connection relationship comparison, or a combination thereof; and / or, the position closure constraint space maintains the target position index within the predefined constraint domain through modular operation closure, boundary mirror closure, mirror index closure, ring index closure, or a combination thereof; and / or, the closed topology network includes mirror candidate paths, auxiliary closed loops, self-guided structures, or hierarchical nested loops for boundary region stabilization, local search size reduction, consistency enhancement, residual feedback-driven connection adjustment, or topology reconstruction.

5. The method according to claim 1, characterized in that: The residual and hedging process includes at least one of the following processes: (1) Perform algebraic cancellation on state nodes with opposite polarities to reduce them to neutral states; (2) Perform projection-residual-discretization processing on the input information relative to the background reference state to generate an orthogonal projection residual representation; (3) Perform mirror offsetting, polarity reversal recalculation or equivalent transformation comparison on the deviations between the main path and the mirror path, the main loop and the auxiliary loop, and the forward path and the reverse path; (4) Perform segmented scanning on the continuous data stream, calculate the sequence position sliding offset and encode it into the residual representation, restore the offset and perform compensation during reconstruction; (5) Generate structural fingerprints, reference point identifiers or integrity feature codes based on topological neighborhood constraints for forward guidance, backward consistency verification, reconstruction acceleration or anomaly correction; (6) For the same input object, the same state node, the same data block or the same event, construct state representations in at least two dimension representation domains respectively. The dimension representation domains include at least two of the following: state value dimension, position index dimension, phase or order dimension, time window dimension, topology level dimension, mirror path dimension, and weight gradient dimension. Perform comparison, projection, compensation, cross-cancellation or consistency check on each dimension representation to generate dimension hedging residuals. (7) Based on the hedging residual of the dimensions, adjust the path selection, node weight, connection relationship, threshold, reference point, loop member relationship, output mode or reconstruction strategy.

6. The method according to claim 1, characterized in that: The dimensional hedging process includes: constructing corresponding state representations for the same input object in at least two dimensional representation domains, wherein the dimensional representation domains include at least two of the following: state value dimension, position index dimension, phase or ordinal dimension, time window dimension, topological hierarchy dimension, mirror path dimension, and weight gradient dimension; performing mapping, comparison, projection, cross-compensation, cross-cancellation, or consistency verification on the state representations in the at least two dimensional representation domains to generate dimensional hedging residuals; and adjusting path selection, node weights, connectivity relationships, thresholds, reference points, or reconstruction strategies based on the dimensional hedging residuals.

7. The method according to claim 1, characterized in that: The closure determination step includes: calculating local residuals for local state nodes, local data fragments, local sub-paths, or local sub-loops, and calculating global residuals for the closed topology network; setting different tolerance thresholds, coherence tolerances, criterion strengths, or stability window lengths based on the importance of target information, data priority, node weights, loop lengths, noise estimation, historical convergence rates, or combinations thereof; when the local residuals and / or global residuals meet the preset tolerance thresholds, and cross-loop structural differences are removable or there are no irremovable differences, a closed state is determined, and deterministic early termination, decision output, or locked output is triggered based on the cross-loop consistency verification results and / or closure determination results; when the local residuals and / or global residuals do not meet the requirements, a closed state is determined, and a deterministic early termination, decision output, or locked output is triggered. When a preset tolerance threshold is set, or when there are irremovable differences, a closure barrier is determined to exist. Based on residual feedback, actions are triggered to include blocking, correction, continued iteration, anomaly identification, precision switching, predefined topology switching, connection rearrangement, path switching, parameter backfeeding, threshold adjustment, weight redistribution, or topology reconstruction. The topology reconstruction includes dynamically adjusting the logical connectivity, path selection, loop membership, or combinations thereof between operators based on residual feedback to establish, maintain, or restore local or global loops that meet the closure determination conditions. Furthermore, the closure determination also includes determining whether the system has formed a cross-dimensional closed state based on whether the residuals on at least two dimension representation domains simultaneously meet the tolerance threshold and whether the cross-dimensional mapping relationship remains consistent.

8. An integrated information processing system for implementing the method according to any one of claims 1 to 7, characterized in that, include: The input mapping module maps the input information to be processed into a multi-valued discrete state node sequence, state tensor, or a combination thereof, and forms differentiated state responses according to a non-uniformly distributed weight mapping rule. This weight mapping rule can be determined by a preset rule and / or dynamically formed during operation based on residual feedback, state evolution, path competition, convergence history, or a combination thereof. The closed topology construction module constructs at least two independent closed constraint loops, positional closed constraint spaces, mirror closed loops, hierarchical nested closed loops, or combinations thereof, and enables the closed topology network to operate in synchronous, asynchronous, or hybrid update modes. The reference state generation module constructs a background reference state, intrinsic pointing flow, reference vector, structural reference point, or a combination thereof. The residual and hedging module performs dimension hedging, polarity cancellation, mirror hedging, orthogonal projection residual calculation, deviation reduction, and sliding... The system includes: an offset compensation module, a structural fingerprint generation module, or a combination thereof; a closure determination module, used to perform closure determination based on local closure criteria, global closure criteria, structural difference criteria, tolerance threshold, stability window conditions, cross-dimensional consistency criteria, or a combination thereof, and to jointly determine the residuals and mapping relationships on different dimension representation domains based on cross-dimensional consistency criteria; an action triggering module, used to trigger deterministic early termination, decision output, lock output, and control command output based on cross-loop consistency verification results and / or closure determination results in the closed state, and to trigger blocking, correction, degradation processing, path switching, connection rearrangement, parameter backfeeding, threshold adjustment, weight redistribution, or topology reconstruction in the non-closed state; and an output and verification module, used to output residual representations, steady-state core encoding, expansion results, control results, storage blocks, transport blocks, authentication blocks, or a combination thereof, and to perform consistency verification, anomaly detection, constraint domain correction, or reconstruction recovery.

9. The system according to claim 8, characterized in that: The system is implemented in at least one of the following ways: (1) Implemented by the processor executing program instructions in memory; (2) Implemented by programmable logic devices, reconfigurable logic arrays, field-programmable gate arrays, special purpose logic circuits, special purpose integrated circuits, system-on-a-chip, or combinations thereof; (3) It is implemented by the processor and programmable logic devices, special logic circuits, array nodes, pipeline structures, parallel processing structures, bus interfaces, register caches or a combination thereof. (4) Implemented by in-memory computing arrays or combinations thereof; Furthermore, the system may include an intrinsic pointing stream generator, an asynchronous injection synchronization interface, a conflict arbitrator, a verification structure, a state backtracking window, a connection rearrangement unit, a path switching unit, or a combination thereof.

10. An electronic device or computer-readable storage medium, characterized in that: The electronic device includes a processor and a memory, the memory storing a computer program, which, when executed by the processor, causes the electronic device to perform the method according to any one of claims 1 to 7; And / or, the computer-readable storage medium stores a computer program that, when executed by a processor, causes the processor to perform the method according to any one of claims 1 to 7.

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