Parallel computing method and device, electronic equipment, storage medium and product
By employing parallel computing methods using local accelerators and adjacent processors, combined with MPI and input/output libraries, the problem of low processor computing efficiency was solved, enabling more efficient weather forecast calculations.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ZHONGKE TIANJI METEOROLOGICAL TECH CO LTD
- Filing Date
- 2024-11-25
- Publication Date
- 2026-06-02
AI Technical Summary
In existing technologies, the computational process of executing computational models through processors is inefficient and cannot meet the ever-increasing demand for weather forecast accuracy.
Parallel computing methods using local accelerators and proximity processors are employed, boundary data is exchanged through the message passing interface MPI, and computation results are efficiently written using input/output libraries. Pre-allocated memory is also used to improve computational efficiency.
By using more cores for parallel computing, computational efficiency is improved, the integrity and accuracy of calculations are ensured, the frequency of hard disk writes is reduced, and the efficiency of weather forecasting is enhanced.
Smart Images
Figure CN122132152A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of distributed technology, and in particular to a parallel computing method, apparatus, electronic device, storage medium, and product. Background Technology
[0002] In the computational scenario of weather forecasting, computational models can be used to calculate weather data and obtain weather predictions. These models can integrate multiple factors to analyze weather data, thereby accurately predicting the weather.
[0003] In related technologies, the calculation process of the computational model is executed by a processor (Central Processing Unit, or CPU) to automatically obtain the prediction results.
[0004] As people's demands for the accuracy of weather forecasts gradually increase, the computational load of calculation models is also gradually increasing in order to improve the accuracy of weather forecasts. However, performing these calculations via processors suffers from low efficiency. Summary of the Invention
[0005] This application provides a parallel computing method, apparatus, electronic device, storage medium, and product for improving parallel computing efficiency.
[0006] In a first aspect, this application provides a parallel computing method, comprising: receiving a computing request, the computing request including input data; sending the input data to a local accelerator according to the computing request, so that the local accelerator performs computing processing on the input data through a first module; receiving first boundary data sent by the local accelerator, obtaining second boundary data from a neighboring processor according to the first boundary data, and sending the second boundary data to the local accelerator, wherein the neighboring processor corresponds to a different computing node from the local accelerator; receiving a target computing result sent by the local accelerator, and writing the target computing result to a local hard disk through an input / output library.
[0007] Optionally, the method described above, in which the second boundary data is obtained from the neighboring processor based on the first boundary data, includes: determining the neighboring processor through the topology function of the Message Passing Interface (MPI); sending the first boundary data to the neighboring processor through the communication function of the MPI; and receiving the second boundary data sent by the neighboring processor.
[0008] Optionally, the method described above, writing the target calculation result to the local hard disk through the input / output library, includes: writing the target calculation result to a cache through the input / output library; determining a plurality of first calculation results in the cache through the input / output library, and writing the plurality of first calculation results to the local hard disk, so as to realize writing the target calculation result to the local hard disk, wherein the plurality of first calculation results include the target calculation result.
[0009] Optionally, as described above, determining multiple first calculation results in the cache through the input / output library includes: determining a write history, the write history including multiple second calculation results, the multiple second calculation results having been written from the cache to the local hard disk; determining the current occupied space and capacity threshold of the cache; if the current occupied space is greater than the capacity threshold, then determining the first calculation result from the cache through the input / output library based on the write history, wherein each first calculation result is different from the multiple second calculation results.
[0010] Optionally, the method described above, after sending the input data to the local accelerator, further includes: receiving first intermediate data sent by the local accelerator; performing computational processing on the first intermediate data through a second module of the local processor to obtain second intermediate data; and sending the second intermediate data to the local accelerator so that the local accelerator performs computational processing on the second intermediate data through the first module.
[0011] Optionally, the method described above further includes: determining a first memory and a second memory, the first memory being used to store data of the local processor and the second memory being used to store data of the local accelerator; and allocating the second memory to the local accelerator so that the local accelerator stores data through the second memory.
[0012] Secondly, this application provides a parallel computing device, comprising: a receiving module for receiving a computing request, the computing request including input data; a sending module for sending the input data to a local accelerator according to the computing request, so that the local accelerator performs computing processing on the input data through a first module; a sharing module for receiving first boundary data sent by the local accelerator, obtaining second boundary data from a neighboring processor according to the first boundary data, and sending the second boundary data to the local accelerator, wherein the neighboring processor corresponds to a different computing node than the local accelerator; and a writing module for receiving a target computing result sent by the local accelerator and writing the target computing result to a local hard disk through an input / output library.
[0013] Optionally, in the apparatus described above, the sharing module is specifically configured to determine the neighboring processor through the topology function of the Message Passing Interface (MPI); the sharing module is further configured to send the first boundary data to the neighboring processor through the communication function of the MPI; and the sharing module is further configured to receive the second boundary data sent by the neighboring processor.
[0014] Optionally, the apparatus as described above further includes: an output module, configured to write the target calculation result into a cache through the input / output library; the output module is further configured to determine a plurality of first calculation results in the cache through the input / output library, and write the plurality of first calculation results into the local hard disk, so as to realize the writing of the target calculation result into the local hard disk, wherein the plurality of first calculation results include the target calculation result.
[0015] Optionally, in the apparatus described above, the output module is specifically configured to determine a write history, the write history including a plurality of second calculation results, the plurality of second calculation results having been written from the cache to the local hard disk; the output module is further configured to, if the current occupied space is greater than the capacity threshold, determine the first calculation result from the cache through the input / output library based on the write history, wherein any first calculation result is different from the plurality of second calculation results.
[0016] Optionally, the apparatus as described above further includes: a computing module for receiving first intermediate data sent by the local accelerator; the computing module is further configured to perform computational processing on the first intermediate data through a second module of the local processor to obtain second intermediate data; the computing module is further configured to send the second intermediate data to the local accelerator so that the local accelerator performs computational processing on the second intermediate data through the first module.
[0017] Optionally, the apparatus as described above further includes: an allocation module, configured to determine a first memory and a second memory, the first memory being used to store data of a local processor and the second memory being used to store data of a local accelerator; the allocation module is further configured to allocate the second memory to the local accelerator so that the local accelerator stores data through the second memory.
[0018] Thirdly, this application provides an electronic device, including: a processor, and a memory communicatively connected to the processor; the memory stores computer-executable instructions; the processor executes the computer-executable instructions stored in the memory to implement the method described in any one of the first aspects.
[0019] Fourthly, this application provides a computer-readable storage medium storing computer-executable instructions, which are executed by a processor as described in any one of the first aspects.
[0020] Fifthly, this application provides a computer program product, including a computer program, which is executed by a processor as described in any one of the first aspects.
[0021] This application provides a parallel computing method, apparatus, electronic device, storage medium, and product. The method includes: receiving a computing request, the computing request including input data; sending the input data to a local accelerator according to the computing request, so that the local accelerator performs computing processing on the input data through a first module; receiving first boundary data sent by the local accelerator, obtaining second boundary data from a neighboring processor based on the first boundary data, and sending the second boundary data to the local accelerator, wherein the neighboring processor corresponds to a different computing node than the local accelerator; receiving a target computing result sent by the local accelerator, and writing the target computing result to a local hard disk through an input / output library. This solution, by using an accelerator with a larger number of cores for parallel computing, can execute multiple threads simultaneously, thereby improving parallel computing efficiency. Attached Figure Description
[0022] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0023] Figure 1 This is a schematic diagram illustrating an application scenario of a parallel computing method provided in an embodiment of this application;
[0024] Figure 2 A flowchart illustrating a parallel computing method provided in an embodiment of this application;
[0025] Figure 3 A schematic diagram of a distributed node provided in an embodiment of this application;
[0026] Figure 4 A flowchart illustrating a parallel computing method provided in an embodiment of this application;
[0027] Figure 5 A schematic diagram illustrating synchronous computation provided for an embodiment of this application;
[0028] Figure 6 A schematic diagram illustrating the determination of a first calculation result provided in an embodiment of this application;
[0029] Figure 7This is a schematic diagram of the structure of a parallel computing device provided in an embodiment of this application;
[0030] Figure 8 This is a schematic diagram of the structure of a parallel computing device provided in an embodiment of this application;
[0031] Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.
[0032] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation
[0033] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.
[0034] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use, processing, transmission, provision, disclosure, and application of the relevant data all comply with the relevant laws, regulations, and standards of the relevant countries and regions, have taken necessary confidentiality measures, do not violate public order and good morals, and provide corresponding operation portals for users to choose to authorize or refuse.
[0035] It should be noted that the parallel computing method, apparatus, electronic device, and storage medium of this application can be used in the field of distributed technology, or in any field other than distributed computing. The application fields of the parallel computing method, apparatus, electronic device, storage medium, and product of this application are not limited.
[0036] Figure 1 This is a schematic diagram illustrating an application scenario of a parallel computing method provided in an embodiment of this application. The scenario illustrated is as follows: the computing task is divided into multiple subtasks, and multiple computing nodes execute the corresponding subtasks to obtain multiple computing results, thereby completing the computing task.
[0037] For example, subtasks can be performed using algorithms within a computational model.
[0038] For example, in the computational scenario of weather forecasting, the Super Dynamics 3-Dimensional Model (SD3) employs a finite volume (FV) advection scheme to ensure the overall conservation of mass and energy in the physical and dynamic coupling processes of the model at high resolution. By systematically considering the terrain drag effect at the meter scale and deeply coupling the physical scheme with the dynamic core, it overcomes the "gray zone" problem commonly found in high-resolution models, enabling global or local focusing down to the kilometer level. SD3 can simulate the dynamic and thermodynamic processes of the atmosphere, ocean, and land to predict weather and climate change.
[0039] Specifically, SD3 consists of multiple modules, each responsible for a specific physical process: the SD3 Super Dynamics Core handles atmospheric dynamics calculations, including calculations of atmospheric parameters such as wind field, temperature, and humidity. The Radiation Module handles radiation calculations, including calculations of solar and terrestrial radiation. The Ocean Module handles ocean dynamics calculations, including calculations of ocean parameters such as ocean currents, sea surface temperature, and salinity. The Land Surface Module handles land dynamics calculations, including calculations of land parameters such as soil moisture, surface temperature, and vegetation cover.
[0040] In related technologies, the calculation process of the SD3 model is performed by a processor. However, due to the large amount of computation required for SD3, the process is inefficient when performed by a processor.
[0041] This application describes the execution of SD3 modules on accelerators, such as Graphics Processing Units (GPUs). Accelerators typically contain thousands of cores and can execute multiple threads simultaneously. This multi-core architecture enables the accelerator to achieve higher execution speeds, thereby improving the computational efficiency of SD3 modules and consequently enhancing weather forecasting efficiency.
[0042] The parallel computing method provided in this application aims to solve the above-mentioned technical problems in the prior art.
[0043] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.
[0044] Figure 2This application provides a flowchart illustrating a parallel computing method, which includes the following steps:
[0045] S201. Receive a calculation request, which includes input data.
[0046] In this application, the executing entity is the local processor of the current computing node, and the input data is the raw data to be computed for the subtask of the current computing node.
[0047] Optionally, for weather forecasting applications, the input data is the raw data to be calculated related to the weather forecast. Calculations can be performed on the input data to obtain the predicted weather.
[0048] For example, computing tasks can be executed in parallel by multiple computing nodes, with each computing node executing a corresponding subtask.
[0049] S202. Based on the computation request, send input data to the local accelerator so that the local accelerator can perform computation processing on the input data through the first module.
[0050] The first module is a module in SD3.
[0051] Both the local accelerator and the local processor are located on the current node.
[0052] Optionally, the local accelerator can be a GPU.
[0053] It is understandable that local accelerators have higher computational efficiency than local processors, thereby improving the efficiency of performing computational processing.
[0054] For example, taking a GPU as an example, the GPU's computing architecture is either CUDA architecture or ROCM architecture, which correspond to the CUDA C programming language and the HIP C programming language, respectively. SD3 is rewritten using the CUDA C programming language or the HIP C programming language so that SD3 can run on the GPU architecture.
[0055] S203: Receive the first boundary data sent by the local accelerator, obtain the second boundary data from the nearby processor based on the first boundary data, and send the second boundary data to the local accelerator.
[0056] In this context, the nearest processor and the local accelerator correspond to different computing nodes.
[0057] Below, in conjunction with Figure 3 The distributed nodes are explained.
[0058] Figure 3 This is a schematic diagram of a distributed node provided in an embodiment of this application. Figure 3As shown, the current computing node includes a local processor and a local accelerator, and the neighboring computing nodes include neighboring processors and neighboring accelerators.
[0059] It should be noted that this application does not limit the number of processors or accelerators in each computing node.
[0060] For example, the second boundary data is sent from the nearest accelerator to the nearest processor, and then from the nearest processor to the local processor.
[0061] For example, in parallel computing, each computing node processes a portion of the data. To ensure the integrity and accuracy of the computation, it needs to obtain boundary data from adjacent processors. Boundary data consists of data points located at the boundaries of the computation domain. These data points need to interact with data points on other computing nodes during the computation process to ensure consistency and accuracy. By exchanging boundary data between the local processor and neighboring processors, the local processor can update boundary conditions with its neighbors and proceed to the next step of the computation. By maintaining data consistency, the integrity and accuracy of the computation are ensured.
[0062] S204. Receive the target calculation results sent by the local accelerator and write the target calculation results to the local hard disk through the input / output library.
[0063] The input / output library can efficiently handle large-scale data reading and writing operations. Writing the target calculation results to the local hard drive through the input / output library can improve writing efficiency.
[0064] The local hard drive is the hard drive under the current node, used to store the data of the current node.
[0065] For example, the local accelerator can generate multiple computation results sequentially, with the target computation result being the currently generated result. After generating the target computation result, the local accelerator continues to execute computation. During the process of writing the target computation result into the input / output library, the local processor and the local accelerator simultaneously execute their own tasks, thereby achieving efficient computation.
[0066] The parallel computing method provided in this application embodiment receives a computing request, which includes input data; according to the computing request, it sends the input data to a local accelerator, so that the local accelerator performs computing processing on the input data through a first module; it receives first boundary data sent by the local accelerator, obtains second boundary data from a neighboring processor based on the first boundary data, and sends the second boundary data to the local accelerator, wherein the neighboring processor and the local accelerator correspond to different computing nodes; it receives the target computing result sent by the local accelerator, and writes the target computing result to the local hard disk through an input / output library. This scheme, by using an accelerator with a larger number of cores for parallel computing, can execute multiple threads simultaneously, thereby improving parallel computing efficiency.
[0067] Based on any of the above embodiments, the following, in conjunction with Figure 4 This section provides a detailed explanation of the parallel computing process.
[0068] Figure 4 This is a flowchart illustrating a parallel computing method provided in an embodiment of this application. Figure 4 As shown, the method includes:
[0069] S401. Receive a calculation request, which includes input data.
[0070] One feasible implementation of the parallel computing method may further include: determining a first memory and a second memory, wherein the first memory is used to store data of the local processor and the second memory is used to store data of the local accelerator; allocating the second memory to the local accelerator so that the local accelerator stores data through the second memory.
[0071] For example, after allocating the first memory and the second memory, the local processor uses only the first memory and the local accelerator uses only the second memory.
[0072] Optionally, memory can be allocated when the compute node starts up.
[0073] Using scenario examples, frequent memory allocation and deallocation increase program overhead, leading to low computational efficiency. Pre-allocating first and second memory blocks can avoid frequent memory allocation and deallocation.
[0074] In this feasible implementation, by pre-allocating memory, computational efficiency can be improved by reusing the pre-allocated memory when the local processor and local accelerator perform calculations.
[0075] S402. Based on the computation request, send input data to the local accelerator so that the local accelerator can perform computation processing on the input data through the first module.
[0076] One feasible implementation, after sending input data to the local accelerator, further includes: receiving first intermediate data sent by the local accelerator; performing computational processing on the first intermediate data through a second module of the local processor to obtain second intermediate data; and sending the second intermediate data to the local accelerator so that the local accelerator performs computational processing on the second intermediate data through the first module.
[0077] For example, modules in a computational model can be entirely assigned to local accelerators for computation, or they can be assigned to both local accelerators and local processors simultaneously. Taking SD3 as an example, it includes the SD3 Super Power Core, the Radiation Module, the Ocean Module, and the Land Module. All modules can be assigned to local processors for computation. Alternatively, the Radiation Module's computation can be performed by the local processor, while the SD3 Super Power Core, Ocean Module, and Land Module's computation can be performed by the local accelerator.
[0078] With the help of scenario examples, the computational complexity of the SD3 Super Power Core, Ocean Module, and Land Module is relatively high. Assigning the SD3 Super Power Core, Ocean Module, and Land Module to the local accelerator with higher computational efficiency to perform calculations, and assigning the Radiation Module to the local processor, with the local processor and local accelerator performing calculations synchronously, can effectively improve the overall computational efficiency of SD3.
[0079] Below, in conjunction with Figure 5 Explanation of synchronous computation.
[0080] Figure 5 This is a schematic diagram illustrating synchronous computation provided in an embodiment of this application. For example... Figure 5 As shown, the local processor sends input data to the local accelerator. The local accelerator processes the input data to obtain first intermediate data, which it then sends back to the local processor. The first intermediate data is the data required for the local processor to perform calculations. Based on the first intermediate data, the local processor performs calculations to obtain second intermediate data and sends this second intermediate data to the local accelerator, enabling the accelerator to perform further calculations based on the second intermediate data to obtain the target calculation result.
[0081] In this feasible implementation, parallel computing using local processors and local accelerators can effectively improve computational efficiency.
[0082] S403. Determine the nearest processor through the topology function of the Message Passing Interface (MPI).
[0083] The Message Passing Interface (MPI) is a standardized interface used to write and compute programs. MPI provides a standard method for efficient communication and data exchange between different processes. It is widely used in high-performance computing, scientific computing, and distributed systems.
[0084] MPI provides some topology-related functions that can help users define and manage the logical relationships between processes, thereby enabling more efficient communication.
[0085] For example, the process of determining neighboring processors may include: initializing the MPI environment; obtaining the rank of the current processor and the total number of processes; creating a Cartesian topology and determining the coordinates of the current process within the topology; and using MPI functions, such as the MPI_Cart_shift function, to find the rank of neighboring processors in a specified direction.
[0086] S404. Send the first boundary data to the nearest processor through the MPI communication function.
[0087] For example, in an MPI environment, each process has a unique rank that identifies it. Based on the rank of the nearest processor, the target of communication can be specified, thus ensuring accurate transmission of first-boundary data.
[0088] Optionally, the first boundary data is the packaged data obtained by packaging by the local accelerator.
[0089] With the help of scenario examples, it can be shown that packaging data can reduce the size of the data, thereby reducing communication overhead.
[0090] S405: Receive second boundary data sent by the nearby processor.
[0091] The second boundary data is generated by the nearby accelerator.
[0092] Optionally, the second boundary data is data obtained by packaging data from nearby accelerators. Packaging data can reduce communication overhead.
[0093] Optionally, the local processor sends the packaged second boundary data to the local accelerator, which unpacks the packaged second boundary data and updates the boundary data of the local accelerator with the data obtained from the unpacking.
[0094] S406. Write the target calculation result to the cache through the input / output library.
[0095] Optionally, the target computation result is the computation result currently generated by the local accelerator. The local accelerator can produce multiple computation results, and each generated computation result is first written to the cache.
[0096] With the help of scenario examples, caching is a temporary storage mechanism, typically located in memory, used to store frequently accessed data. The purpose of caching is to improve data access speed and reduce reliance on hard drives or other slow storage devices. By writing the target computation result to the cache, the access speed of the target computation result can be improved.
[0097] S407. Determine multiple first calculation results in the cache through the input / output library, and write multiple first calculation results to the local hard disk to realize the writing of the target calculation result to the local hard disk.
[0098] For example, for each computation result generated by the local accelerator, such as the target computation result, it is first written to the cache. When a preset condition is met, multiple data in the cache are written to the local hard disk.
[0099] With specific examples, it's clear that caches typically reside in memory, offering significantly faster access speeds than hard drives. Writing the target computation results to the cache reduces frequent write operations to the local hard drive, thereby significantly improving data write speed. A cache can temporarily store large amounts of data before writing them to the local hard drive all at once.
[0100] Optionally, during the input / output library writing process, the local processor and local accelerator continue to execute computational tasks to ensure the normal execution of the computation process.
[0101] Based on the above implementation method, writing the target calculation result to the cache can effectively reduce the number of local hard disk I / O operations and improve writing efficiency.
[0102] One feasible implementation method is to determine multiple first calculation results by: determining the write history, which includes multiple second calculation results that have been written from the cache to the local hard disk; determining the current occupied space and capacity threshold of the cache; if the current occupied space is greater than the capacity threshold, then determining the first calculation result from the cache through the input / output library based on the write history, wherein each first calculation result is different from the multiple second calculation results.
[0103] The write history includes the calculation results for each item written from the cache to the local hard drive.
[0104] Below, in conjunction with Figure 6 The determination of the first calculation result is explained.
[0105] Figure 6 This is a schematic diagram illustrating the determination of a first calculation result provided in an embodiment of this application. Figure 6 As shown, the current occupied space of the cache is obtained, and the current occupied space is compared with the capacity threshold. If the current occupied space is greater than the capacity threshold, then each calculation result in the cache is traversed, and any calculation result that is different from the second calculation result is determined as the first calculation result.
[0106] With the example scenario, the cache space usage is set as the trigger condition. When the cache space exceeds the capacity threshold, the first calculation result is determined. This trigger condition allows batch calculation results from the cache to be written to the local hard drive, reducing the number of write operations and improving write efficiency.
[0107] With the example of the scenario, the second calculation result is the calculation result that has been written to the local hard drive and stored in the cache. Determining the first calculation result that is different from the second calculation result from the cache can avoid the problem of repeatedly writing the calculation result that has already been written to the local hard drive, and improve the accuracy of writing the calculation result.
[0108] In this feasible implementation, when the cache reaches its capacity threshold, the computation result is written to disk. This prevents cache overflow and ensures that the computation result is written to disk in a timely manner.
[0109] Figure 7 This is a schematic diagram of the structure of a parallel computing device provided in an embodiment of this application. Figure 7 As shown, the parallel computing device 70 may include: a receiving module 71, a sending module 72, a sharing module 73, and a writing module 74, wherein,
[0110] The receiving module 71 is used to receive a calculation request, which includes input data.
[0111] The sending module 72 is used to send input data to the local accelerator according to the computation request, so that the local accelerator can perform computation processing on the input data through the first module.
[0112] The shared module 73 is used to receive the first boundary data sent by the local accelerator, obtain the second boundary data from the neighboring processor based on the first boundary data, and send the second boundary data to the local accelerator. The neighboring processor and the local accelerator correspond to different computing nodes.
[0113] The write module 74 is used to receive the target calculation results sent by the local accelerator and write the target calculation results to the local hard disk through the input / output library.
[0114] Optionally, the receiving module 71 can perform... Figure 2 S201 in the embodiment.
[0115] Optionally, the sending module 72 can perform... Figure 2 S202 in the embodiment.
[0116] Optionally, shared module 73 can execute Figure 2 S203 in the embodiment.
[0117] Optionally, the write module 74 can execute... Figure 2 S204 in the embodiment.
[0118] It should be noted that the parallel computing device shown in the embodiments of this application can execute the technical solutions shown in the above method embodiments, and its implementation principle and beneficial effects are similar, so they will not be described again here.
[0119] In one possible implementation, the shared module 73 is specifically used for:
[0120] The nearest processor is determined by the topology function of the Message Passing Interface (MPI).
[0121] The first boundary data is sent to the nearest processor via the MPI communication function;
[0122] Receive the second boundary data sent by the neighboring processor.
[0123] Figure 8 This is a schematic diagram of the structure of a parallel computing device provided in an embodiment of this application. Figure 7 Based on the illustrated embodiments, as Figure 8 As shown, the parallel computing device 80 further includes: an output module 75, a computing module 76, and a distribution module 77, wherein,
[0124] Output module 75 is used for:
[0125] The target calculation result is written to the cache through the input / output library;
[0126] The input / output library determines multiple first calculation results in the cache and writes these multiple first calculation results to the local hard disk, thereby realizing the writing of the target calculation result to the local hard disk. The multiple first calculation results include the target calculation result.
[0127] In one possible implementation, the output module 75 is specifically used for:
[0128] Determine the write history, which includes multiple second calculation results that have been written from the cache to the local hard drive;
[0129] If the current occupied space is greater than the capacity threshold, the first calculation result is determined from the cache through the input / output library based on the write history. Any first calculation result is different from multiple second calculation results.
[0130] Calculation module 76 is used for:
[0131] Receive the first intermediate data sent by the local accelerator;
[0132] The second module of the local processor performs calculations on the first intermediate data to obtain the second intermediate data;
[0133] Send second intermediate data to the local accelerator so that the local accelerator can perform computational processing on the second intermediate data through the first module.
[0134] Allocation module 77 is used for:
[0135] The first memory and the second memory are determined. The first memory is used to store data of the local processor, and the second memory is used to store data of the local accelerator.
[0136] Allocate a second memory to the local accelerator so that the local accelerator can store data through the second memory.
[0137] Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application, such as... Figure 9 As shown, the electronic device includes:
[0138] The electronic device includes a processor 291 and a memory 292; it may also include a communication interface 293 and a bus 294. The processor 291, memory 292, and communication interface 293 can communicate with each other via the bus 294. The communication interface 293 can be used for information transmission. The processor 291 can invoke logical instructions stored in the memory 292 to execute the methods of the above embodiments.
[0139] Furthermore, the logic instructions in the aforementioned memory 292 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium.
[0140] The memory 292, as a computer-readable storage medium, can be used to store software programs and computer-executable programs, such as program instructions / modules corresponding to the methods in the embodiments of this application. The processor 291 executes functional applications and data processing by running the software programs, instructions, and modules stored in the memory 292, thereby implementing the methods in the above-described method embodiments.
[0141] The memory 292 may include a program storage area and a data storage area. The program storage area may store the operating system and application programs required for at least one function; the data storage area may store data created based on the use of the terminal device. Furthermore, the memory 292 may include high-speed random access memory and may also include non-volatile memory.
[0142] This application provides a non-transitory computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, are used to implement the methods described in the foregoing embodiments.
[0143] This application provides a computer program product, including a computer program that, when executed by a processor, implements the method as described in the foregoing embodiments.
[0144] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are all optional embodiments, and the actions and modules involved are not necessarily essential to this application.
[0145] It should be further noted that although the steps in the flowchart are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowchart may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the sub-steps or stages of other steps.
[0146] It should be understood that the above-described device embodiments are merely illustrative, and the device of this application can also be implemented in other ways. For example, the division of units / modules in the above embodiments is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units, modules, or components may be combined, or integrated into another system, or some features may be ignored or not executed.
[0147] Furthermore, unless otherwise specified, the functional units / modules in the various embodiments of this application can be integrated into one unit / module, or each unit / module can exist physically separately, or two or more units / modules can be integrated together. The integrated units / modules described above can be implemented in hardware or as software program modules.
[0148] When the integrated unit / module is implemented in hardware, the hardware can be digital circuits, analog circuits, etc. The physical implementation of the hardware structure includes, but is not limited to, transistors, memristors, etc. The processor can be any suitable hardware processor, such as CPU, GPU, FPGA, DSP, and ASIC. The storage unit can be any suitable magnetic or magneto-optical storage medium, such as Resistive Random Access Memory (RRAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Enhanced Dynamic Random Access Memory (EDRAM), High-Bandwidth Memory (HBM), Hybrid Memory Cube (HMC), etc.
[0149] If the integrated unit / module is implemented as a software program module and sold or used as an independent product, it can be stored in a computer-readable storage device (CMD). Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a memory and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned memory includes various media capable of storing program code, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.
[0150] In the above embodiments, the descriptions of each embodiment have their own emphasis. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments. The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this specification.
[0151] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.
[0152] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.
Claims
1. A parallel computing method, characterized in that, include: Receive a calculation request, the calculation request including input data; According to the computation request, the input data is sent to the local accelerator so that the local accelerator performs computation processing on the input data through the first module; The local accelerator receives first boundary data sent by the local accelerator, obtains second boundary data from the neighboring processor based on the first boundary data, and sends the second boundary data to the local accelerator. The neighboring processor and the local accelerator correspond to different computing nodes. Receive the target calculation results sent by the local accelerator, and write the target calculation results to the local hard disk through the input / output library.
2. The method according to claim 1, characterized in that, Obtaining second boundary data from the nearest processor based on the first boundary data includes: The nearest processor is determined using the topology function of the Message Passing Interface (MPI). The first boundary data is sent to the nearby processor via the communication function of the MPI. Receive the second boundary data sent by the proximity processor.
3. The method according to claim 2, characterized in that, Write the target calculation result to the local hard disk through the input / output library, including: The target calculation result is written to the cache through the input / output library; The input / output library determines multiple first calculation results in the cache, and writes the multiple first calculation results to the local hard disk to realize the writing of the target calculation result to the local hard disk. The multiple first calculation results include the target calculation result.
4. The method according to claim 3, characterized in that, The input / output library determines multiple first calculation results in the cache, including: Determine the write history, which includes multiple second calculation results that have been written from the cache to the local hard disk; Determine the current occupied space and capacity threshold of the cache; If the current occupied space is greater than the capacity threshold, the first settlement result is determined from the cache through the input / output library according to the write history, and any first calculation result is different from the plurality of second calculation results.
5. The method according to any one of claims 1-4, characterized in that, After sending the input data to the local accelerator, the process also includes: Receive the first intermediate data sent by the local accelerator; The second module of the local processor performs calculations on the first intermediate data to obtain the second intermediate data; The second intermediate data is sent to the local accelerator so that the local accelerator performs computational processing on the second intermediate data through the first module.
6. The method according to any one of claims 1-5, characterized in that, The method further includes: A first memory and a second memory are determined, wherein the first memory is used to store data of the local processor and the second memory is used to store data of the local accelerator; Allocate the second memory to the local accelerator so that the local accelerator can store data through the second memory.
7. A parallel computing device, characterized in that, include: A receiving module is configured to receive a calculation request, the calculation request including input data; The sending module is configured to send the input data to the local accelerator according to the computation request, so that the local accelerator performs computation processing on the input data through the first module; A shared module is used to receive first boundary data sent by the local accelerator, obtain second boundary data from a neighboring processor based on the first boundary data, and send the second boundary data to the local accelerator. The neighboring processor and the local accelerator correspond to different computing nodes. The writing module is used to receive the target calculation results sent by the local accelerator and write the target calculation results to the local hard disk through the input / output library.
8. An electronic device, characterized in that, include: A processor, and a memory communicatively connected to the processor; The memory stores computer-executed instructions; The processor executes computer execution instructions stored in the memory to implement the method as described in any one of claims 1 to 6.
9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, are used to implement the method as described in any one of claims 1 to 6.
10. A computer program product, characterized in that, Includes a computer program that, when executed by a processor, implements the method described in any one of claims 1-6.