Quantum circuit verification method and device, storage medium and electronic equipment

By transforming the quantum circuit verification problem into an optimal control problem on a unitary manifold, and constructing an action functional to calculate the optimal control trajectory and minimum action value, the problem of high computational complexity in large-scale quantum circuit verification is solved, achieving efficient verification and rigorous mathematical guarantees.

CN122133845APending Publication Date: 2026-06-02GUANGXI XINBAITE MICROELECTRONICS CO LTD

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
GUANGXI XINBAITE MICROELECTRONICS CO LTD
Filing Date
2026-03-18
Publication Date
2026-06-02

AI Technical Summary

Technical Problem

Existing quantum circuit verification methods suffer from computational complexity that increases exponentially with circuit size when verifying large-scale quantum circuits, and they are difficult to provide rigorous mathematical guarantees.

Method used

The quantum circuit verification problem is transformed into an optimal control problem on a unitary manifold. By constructing an action functional, the optimal control trajectory and minimum action value are calculated, and the minimum action principle is used to determine the circuit equivalence.

Benefits of technology

It breaks through the exponential complexity bottleneck of traditional full-state simulation methods. The computational complexity increases polynomially with the circuit size, enabling efficient verification of large-scale quantum circuits and providing rigorous mathematical guarantees and diagnostic information.

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Abstract

This application discloses a quantum circuit verification method, device, storage medium, and electronic device. The quantum circuit verification method transforms the quantum circuit verification problem into an optimal control problem on a unitary manifold, calculates the optimal control trajectory and minimum action value using the minimum action principle, and determines the circuit equivalence by comparing these quantities. This method overcomes the bottleneck of exponential complexity in traditional full-state simulation methods, making the computational complexity of the verification process increase polynomially with the circuit size, thereby enabling efficient verification of large-scale quantum circuits.
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Description

Technical Field

[0001] This application relates to the field of quantum computing technology, specifically to a quantum circuit verification method, apparatus, storage medium, and electronic device. Background Technology

[0002] Quantum computing, as an emerging computing paradigm, holds the promise of surpassing the computational capabilities of classical computers for specific problems. With the rapid development of quantum hardware technology, quantum processors containing tens or even hundreds of qubits have become a reality, and the scale and complexity of quantum circuits have increased dramatically. Ensuring the correctness of these large-scale quantum circuits has become one of the key challenges restricting the practical application of quantum computing.

[0003] Traditional quantum circuit verification methods primarily rely on full-state simulation. This method directly simulates the evolution of quantum states within the circuit using a classical computer, storing and manipulating data in a 2D dimension. n The state vector is denoted by n, where n is the number of qubits. However, as the number of qubits increases, the dimension of the state vector grows exponentially, causing the required memory and computing resources to quickly exceed the capabilities of classical computers.

[0004] In other words, existing quantum circuit verification methods suffer from the drawback of computational complexity increasing exponentially with circuit size and difficulty in providing rigorous mathematical guarantees when verifying large-scale universal quantum circuits. Summary of the Invention

[0005] This application provides a quantum circuit verification method, apparatus, storage medium, and electronic device, which can solve the problem that the computational complexity of verifying large-scale quantum circuits increases exponentially with the circuit size and that it is difficult to provide strict mathematical guarantees in the prior art.

[0006] In a first aspect, embodiments of this application provide a quantum circuit verification method, including: Obtain the specification information of the target quantum circuit and the specification information of the realized quantum circuit to be verified; Based on the canonical information of the target quantum circuit and the canonical information of the realized quantum circuit, an action functional is constructed. The action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold. Based on the action functional, the optimal control trajectories of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values ​​are calculated respectively. The optimal control trajectory of the target quantum circuit is compared with the optimal control trajectory of the realized quantum circuit to obtain a trajectory comparison result; and the minimum action value of the target quantum circuit is compared with the minimum action value of the realized quantum circuit to obtain an action comparison result. Based on the trajectory comparison results and the action comparison results, the verification conclusion of the realized quantum circuit relative to the target quantum circuit is obtained.

[0007] In the quantum circuit verification method provided in this application embodiment, the construction of the action functional based on the canonical information of the target quantum circuit and the canonical information of the realized quantum circuit includes: Based on the specification information of the target quantum circuit, a reference term describing the ideal evolution path is constructed; Based on the specification information of the quantum circuit implementation, a parameterized control term describing the actual evolution path is constructed; Obtain the instantaneous deviation between the actual evolution described by the parameterized control term and the ideal evolution described by the reference term, and construct the Lagrange density term based on the instantaneous deviation; Construct constraint terms to define the physical constraints and performance metrics for the implementation of the packaged circuit; The Lagrange density term and the constraint term are combined using Lagrange multipliers to form an action functional.

[0008] In the quantum circuit verification method provided in the embodiments of this application, the Lagrange density term is based on the Hilbert-Schmidt norm and quantifies the difference between the actual evolution rate and the ideal evolution rate determined by the Hamiltonian.

[0009] In the quantum circuit verification method provided in this application embodiment, the step of calculating the optimal control trajectories of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values ​​based on the action functional includes: The time domain corresponding to the evolution process of the target quantum circuit and the realized quantum circuit is discretized, and the continuous optimal control problem on the unitary manifold is transformed into a discrete parameter optimization problem. Based on the Pontryagin minimum principle or gradient optimization algorithm, construct the objective function and calculate the gradient of the objective function with respect to the control parameters; The control parameters are iteratively updated according to the gradient until the convergence condition is met, thereby obtaining the optimal control trajectory and the corresponding minimum action value that minimizes the action functional on the unitary manifold.

[0010] In the quantum circuit verification method provided in this application embodiment, the objective function is the weighted sum of the action functional and the final state fidelity penalty term, and the final state fidelity penalty term is used to measure the difference between the final evolution result and the target unitary operator.

[0011] In the quantum circuit verification method provided in this application embodiment, obtaining the verification conclusion of the realized quantum circuit relative to the target quantum circuit based on the trajectory comparison result and the action comparison result includes: If the trajectory comparison result is less than or equal to the first preset threshold and the action comparison result is less than or equal to the second preset threshold, then the realized quantum circuit is functionally equivalent to the target quantum circuit, and equivalence verification information is output. If the trajectory comparison result is greater than a first preset threshold, or the action quantity comparison result is greater than a second preset threshold, it indicates that the realized quantum circuit and the target quantum circuit are not functionally equivalent, and the corresponding failure verification information is output according to the sign and magnitude of the action quantity comparison result.

[0012] In the quantum circuit verification method provided in this application embodiment, the step of outputting corresponding failure verification information based on the sign and magnitude of the action comparison result includes: If the action quantity comparison result is positive and exceeds the second preset threshold, it indicates that the realized quantum circuit is a suboptimal circuit or contains an error, and the first failure verification information is output. If the comparison result of the action amount is negative and the absolute value exceeds the second preset threshold, it indicates that the realized quantum circuit is an over-optimized circuit, and the second failure verification information is output.

[0013] Secondly, embodiments of this application provide a quantum circuit verification device, comprising: The acquisition unit is used to acquire the specification information of the target quantum circuit and the specification information of the realized quantum circuit to be verified. The construction unit is used to construct an action functional based on the canonical information of the target quantum circuit and the canonical information of the realized quantum circuit. The action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold. The computing unit is used to calculate, based on the action functional, the optimal control trajectories of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values. The comparison unit is used to compare the optimal control trajectory of the target quantum circuit with the optimal control trajectory of the realized quantum circuit to obtain a trajectory comparison result; and to compare the minimum action value of the target quantum circuit with the minimum action value of the realized quantum circuit to obtain an action comparison result. The output unit is used to obtain a verification conclusion of the realized quantum circuit relative to the target quantum circuit based on the trajectory comparison result and the action comparison result.

[0014] Thirdly, this application provides a storage medium storing a plurality of instructions adapted for loading by a processor to execute the quantum circuit verification method described in any of the preceding claims.

[0015] Fourthly, this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the quantum circuit verification method described in any of the preceding claims.

[0016] In summary, the quantum circuit verification method provided in this application includes: acquiring the canonical information of a target quantum circuit and the canonical information of the implemented quantum circuit to be verified; constructing an action functional based on the canonical information of the target quantum circuit and the implemented quantum circuit, wherein the action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold; calculating the optimal control trajectory of the target quantum circuit and the implemented quantum circuit on the unitary manifold and their corresponding minimum action values ​​based on the action functional; comparing the optimal control trajectory of the target quantum circuit with the optimal control trajectory of the implemented quantum circuit to obtain a trajectory comparison result; comparing the minimum action value of the target quantum circuit with the minimum action value of the implemented quantum circuit to obtain an action comparison result; and obtaining a verification conclusion of the implemented quantum circuit relative to the target quantum circuit based on the trajectory comparison result and the action comparison result. This application's embodiments transform the quantum circuit verification problem into an optimal control problem on a unitary manifold, utilize the principle of minimum action to calculate the optimal control trajectory and minimum action value, and determine circuit equivalence by comparing these quantities. This breaks through the bottleneck of the exponential complexity of traditional full-state simulation methods, making the computational complexity of the verification process grow polynomially with the circuit size (number of qubits), thereby enabling efficient verification of large-scale quantum circuits. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram illustrating an application scenario of the quantum circuit verification method provided in the embodiments of this application.

[0019] Figure 2 This is a flowchart illustrating the quantum circuit verification method provided in the embodiments of this application.

[0020] Figure 3This is a schematic diagram of the structure of the quantum circuit verification device provided in the embodiments of this application.

[0021] Figure 4 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0022] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0023] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.

[0024] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0025] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0026] In the description of this application, it should be noted that the terms "upper," "lower," "left," "right," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. In addition, terms such as "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0027] Traditional quantum circuit verification methods primarily rely on full-state simulation. This method directly simulates the evolution of quantum states within the circuit using a classical computer, storing and manipulating data in a 2D dimension. n The state vector is denoted by n, where n is the number of qubits. However, as the number of qubits increases, the dimension of the state vector grows exponentially, causing the required memory and computing resources to quickly exceed the capabilities of classical computers.

[0028] In other words, existing quantum circuit verification methods suffer from the drawback of computational complexity increasing exponentially with circuit size and difficulty in providing rigorous mathematical guarantees when verifying large-scale universal quantum circuits.

[0029] Based on this, embodiments of this application provide a quantum circuit verification method, apparatus, storage medium, and electronic device. Specifically, the quantum circuit verification apparatus can be integrated into an electronic device, which can be a server or a terminal, etc. The terminal can include mobile phones, wearable smart devices, tablets, laptops, and personal computers (PCs), etc. The server can be a single server or a server cluster composed of multiple servers, and can be a physical server or a virtual server.

[0030] For example, such as Figure 1 As shown, the electronic device can acquire the specification information of the target quantum circuit and the specification information of the realized quantum circuit to be verified. Based on the specification information of the target quantum circuit and the realized quantum circuit, an action functional is constructed. The action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold. Based on the action functional, the optimal control trajectory of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values ​​are calculated respectively. The optimal control trajectory of the target quantum circuit is compared with the optimal control trajectory of the realized quantum circuit to obtain the trajectory comparison result. The minimum action value of the target quantum circuit is compared with the minimum action value of the realized quantum circuit to obtain the action comparison result. Based on the trajectory comparison result and the action comparison result, the verification conclusion of the realized quantum circuit relative to the target quantum circuit is obtained.

[0031] The technical solutions shown in this application will be described in detail below through specific embodiments. It should be noted that the order of description of the following embodiments is not intended to limit the priority of the embodiments.

[0032] Please see Figure 2 , Figure 2 This is a schematic flowchart of the quantum circuit verification method provided in this application embodiment. The specific flow of the quantum circuit verification method can be as follows: 101. Obtain the specification information of the target quantum circuit and the specification information of the realized quantum circuit to be verified.

[0033] In this embodiment, the specification information of the target quantum circuit refers to a theoretically correct quantum circuit description used as a verification benchmark. This specification information may include information such as the target unitary operator implemented by the target quantum circuit, the gate sequence of the circuit, the gate connection method, and the expected evolution path.

[0034] The specification information of the quantum circuit to be verified refers to the actual description of the quantum circuit that needs to be verified. It can typically include parameterized control pulse sequences, parameter settings of parametric quantum gates, or circuit configuration information in the actual hardware implementation.

[0035] 102. Based on the gauge information of the target quantum circuit and the gauge information of the realized quantum circuit, construct the action functional. The action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold.

[0036] In this embodiment of the application, an action functional is constructed based on the gauge information of the target quantum circuit and the gauge information of the realized quantum circuit. Specifically, this may include the following steps: 1021. Based on the specification information of the target quantum circuit, construct a reference term describing the ideal evolution path.

[0037] This reference term reflects the evolutionary trajectory that the target quantum circuit should follow under ideal conditions, typically determined by the target unitary operator U. target The evolution path is determined by the corresponding Schrödinger equation. The Schrödinger equation followed by the evolution is shown below:

[0038] In the above equation, U(t) represents the evolution operator at time t. To reduce Planck's constant, H(θ(t)) represents the controlled Hamiltonian determined by the control parameter θ(t), and I is the unit operator.

[0039] 1022. Based on the specification information of realizing quantum circuits, construct parameterized control terms that describe the actual evolution path.

[0040] The specification information for realizing a quantum circuit includes a description of the actual circuit to be verified, usually presented in parameterized form, such as the rotation angle of the parametric quantum gate, the amplitude and duration of the control pulse, etc. These control parameters θ(t) determine the specific evolution process of the actual circuit, and the parameterized control terms describe the actual evolution path driven by these control parameters.

[0041] 1023. Obtain the instantaneous deviation between the actual evolution described by the parameterized control term and the ideal evolution described by the reference term, and construct the Lagrange density term based on the instantaneous deviation.

[0042] In this application embodiment, a Lagrange density term is introduced to quantify the deviation between actual evolution and ideal evolution. In some embodiments, the Lagrange density term, based on the Hilbert-Schmidt norm, quantifies the difference between the actual evolution rate and the ideal evolution rate determined by the Hamiltonian.

[0043] Specifically, the Lagrange density term It can be represented as:

[0044] Where U(t) represents the evolution operator at time t, Let θ(t) represent the time derivative of the evolution operator, θ(t) represent the control parameter at time t, and H(θ(t)) represent the controlled Hamiltonian determined by the control parameter. denoted by Hilbert-Schmidt norm. This Lagrange density term measures the deviation at each time step from the actual evolution rate to the ideal evolution rate defined by the Schrödinger equation. When the actual evolution strictly follows the Schrödinger equation, this term takes the value of zero.

[0045] 1024. Construct constraint terms to define the physical constraints and performance metrics for the implementation of the packaged circuit.

[0046] In practical quantum circuit implementations, various physical constraints and performance metrics often limit the process. The constraint term C(θ(t)) encapsulates these constraints and can include at least one of the following: gate fidelity constraints, state evolution accuracy constraints, energy consumption constraints, or runtime constraints. For example, a gate fidelity constraint requires that the fidelity of the actual gate is not lower than a certain threshold, and an energy consumption constraint requires that the energy of the control pulse does not exceed the upper limit allowed by the hardware.

[0047] 1025. By combining the Lagrange density term and the constraint term using Lagrange multipliers, an action functional is formed.

[0048] By combining the Lagrange density term and the constraint term using Lagrange multipliers, a complete action functional is formed. Action Functional The expression is as follows:

[0049] Where T represents the total execution time of the circuit. Let C(θ) represent the Lagrange density term constructed in step 1023, C(θ) represent the constraint term constructed in step 1024, and λ represent the Lagrange multiplier used to balance the weights between evolutionary bias and constraint satisfaction. In this way, the execution process of the quantum circuit is rigorously formulated as an optimal control problem of finding the trajectory U(t) that minimizes the action functional S and the control parameter θ(t) on the unitary manifold. Correct circuit execution corresponds to the trajectory that minimizes the action functional, thus transforming the circuit verification problem into an action minimization problem.

[0050] 103. Based on the action functional, calculate the optimal control trajectories of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values.

[0051] In this embodiment of the application, step 103 may specifically include the following steps: 1031. Discretizing the time domain corresponding to the evolution process of the target quantum circuit and the realization quantum circuit transforms the continuous optimal control problem on the unitary manifold into a discrete parameter optimization problem.

[0052] Specifically, the time interval [0, T] corresponding to the evolution process of the target quantum circuit and the realization of the quantum circuit can be divided into N discrete time points t0, t1, ..., t N The corresponding time step is Δt = T / N. The control parameter θ(t) is correspondingly discretized as follows: , where θ k This represents the control parameter (which can be considered a constant) during the k-th time interval. The evolution operator U(t) also takes values ​​at discrete time points, denoted as Uk=U(t). k Through this discretization, the problem of solving for the optimal trajectory in continuous time is transformed into optimizing a finite-dimensional parameter {θ} in a discrete parameter space. k The problem is...

[0053] 1032. Based on the Pontryagin minimum principle or gradient optimization algorithm, construct the objective function and calculate the gradient of the objective function with respect to the control parameters.

[0054] Within the discretization framework, an objective function needs to be defined to quantify the control effect. The objective function J(θ) is constructed as a weighted sum of the action functional S[U,θ] and the final-state fidelity penalty term, which measures the difference between the final evolution result and the objective unitary operator. Its expression is:

[0055] Where J(θ) represents the objective function, S[U(θ),θ] is the action functional (constructed by step 102), β is the weighting coefficient of the final state fidelity penalty term, and U N(θ) represents the unitary operator that evolves to the final time under the drive of discrete control parameter θ, U target Indicates the target unitary operator. This represents an appropriate norm (e.g., the Hilbert-Schmidt norm). This penalty term is used to ensure that the final evolution result is as close as possible to the target unitary operator.

[0056] To minimize the objective function, it is necessary to calculate its approximation for each control parameter θ. k The gradient can be calculated efficiently using quantum backpropagation or the adjoint state method. Taking the adjoint state method as an example, the general form of the gradient can be as follows:

[0057] in, It is the gradient of the objective function with respect to the k-th control parameter. It is the partial derivative of the Lagrange density term with respect to the control parameters. It is the partial derivative of the constraint term with respect to the control parameter. The Lagrange multiplier is the transpose, while the "adjoint term" is a term obtained by solving the adjoint equation that reflects the contribution of state evolution to the gradient. By introducing the adjoint variable for backpropagation, the gradient can be calculated efficiently without explicitly storing the entire trajectory.

[0058] 1033. Update the control parameters iteratively according to the gradient until the convergence condition is met, and obtain the optimal control trajectory and the corresponding minimum action value that minimizes the action functional on the unitary manifold.

[0059] After obtaining the gradient, gradient descent-type algorithms can be used to update the control parameters. The iterative update rule can be as follows:

[0060] Where θ(m) represents the control parameter for the m-th iteration, and η represents the learning rate or step size. J(θ (m) θ is the gradient of the objective function at the current parameters. More advanced optimization algorithms, such as the quasi-Newton method (BFGS), can also be used to accelerate convergence. The iterative process continues until the change in the objective function value is less than a preset threshold or the maximum number of iterations is reached. When convergence occurs, the control parameter θ is obtained. * and the corresponding evolutionary trajectory U * (t) represents the optimal control trajectory, at which point the value of the functional S is obtained. * =S[U * ,θ * This is the minimum action value.

[0061] In practical implementation, by independently performing the above optimization process on the target quantum circuit and the realization quantum circuit respectively, the optimal control trajectory Utarget of the target circuit can be obtained. * (t) and minimum action value Starget * And to achieve the optimal control trajectory Uimpl of the circuit * (t) and minimum action value Simpl * .

[0062] It should be noted that the dynamic evolution used in the above optimization process must satisfy the Schrödinger equation. Therefore, the evolution trajectory U(t) needs to be recalculated after each parameter update, which can be achieved through numerical integration of the Schrödinger equation. The computational complexity of the entire algorithm mainly depends on the number of discrete time points N and the number of qubits n, and grows polynomially with n, thus ensuring the scalability of the verification process. 104. Compare the optimal control trajectory of the target quantum circuit with the optimal control trajectory of the realized quantum circuit to obtain the trajectory comparison result; and compare the minimum action value of the target quantum circuit with the minimum action value of the realized quantum circuit to obtain the action comparison result.

[0063] In this embodiment, the trajectory comparison result can be obtained by calculating the distance between two optimal control trajectories. This trajectory comparison result quantifies the degree of closeness between the two evolution trajectories over the entire time domain.

[0064] The action comparison result can be obtained by calculating the difference between the two minimum action values. This difference reflects the degree of deviation of the realized circuit from the target circuit in terms of evolution cost.

[0065] 105. Based on the trajectory comparison results and the action comparison results, the verification conclusions of the realized quantum circuit relative to the target quantum circuit are obtained.

[0066] In this embodiment of the application, based on the trajectory comparison results and the action comparison results, a verification conclusion is obtained regarding the realized quantum circuit relative to the target quantum circuit, which may specifically include: If the trajectory comparison result is less than or equal to the first preset threshold and the action comparison result is less than or equal to the second preset threshold, then the realized quantum circuit is functionally equivalent to the target quantum circuit, and equivalent verification information is output. If the trajectory comparison result is greater than the first preset threshold, or the action comparison result is greater than the second preset threshold, it indicates that the realized quantum circuit and the target quantum circuit are not functionally equivalent, and the corresponding failure verification information is output according to the sign and magnitude of the action comparison result.

[0067] In some embodiments, outputting corresponding failure verification information based on the sign and magnitude of the action comparison result may include: if the action comparison result is positive and exceeds a second preset threshold, it indicates that the realized quantum circuit is a suboptimal circuit or contains an error, and outputting first failure verification information; if the action comparison result is negative and its absolute value exceeds the second preset threshold, it indicates that the realized quantum circuit is an overoptimized circuit, and outputting second failure verification information.

[0068] Understandably, the first failure verification message can indicate that the evolution cost of the implemented circuit is higher than that of the target circuit, and there may be problems such as inaccurate gate implementation, noise interference, or logic errors. The second failure verification message can indicate that the implemented circuit has obtained a lower action value than the target circuit at the cost of sacrificing certain constraints (such as energy consumption, running time, etc.). This over-optimization may lead to the actual hardware being unable to implement it or violating physical constraints.

[0069] In addition, when outputting failure verification information, it can also provide diagnostic information on time segments or circuit segments that cause functional inequivalence based on trajectory comparison results and deviations from the optimal control trajectory, helping users to locate and correct problems in the circuit.

[0070] In summary, the quantum circuit verification method provided in this application includes obtaining the canonical information of the target quantum circuit and the canonical information of the implemented quantum circuit to be verified; constructing an action functional based on the canonical information of the target quantum circuit and the implemented quantum circuit, wherein the action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold; calculating the optimal control trajectory and its corresponding minimum action value of the target quantum circuit and the implemented quantum circuit on the unitary manifold based on the action functional; comparing the optimal control trajectory of the target quantum circuit with the optimal control trajectory of the implemented quantum circuit to obtain a trajectory comparison result; comparing the minimum action value of the target quantum circuit with the minimum action value of the implemented quantum circuit to obtain an action comparison result; and obtaining a verification conclusion of the implemented quantum circuit relative to the target quantum circuit based on the trajectory comparison result and the action comparison result. This application transforms the quantum circuit verification problem into an optimal control problem on a unitary manifold, calculates the optimal control trajectory and minimum action value using the minimum action principle, and determines circuit equivalence by comparing these quantities. This method overcomes the bottleneck of exponential complexity in traditional full-state simulation methods, enabling the computational complexity of the verification process to increase polynomially with the circuit size (number of qubits), thus achieving efficient verification of large-scale quantum circuits. Furthermore, based on the mathematical framework of optimal control theory and variational principles, it provides rigorous mathematical guarantees for circuit equivalence and offers diagnostic information to guide circuit debugging and optimization in the event of verification failure.

[0071] To facilitate better implementation of the quantum circuit verification method provided in this application, this application also provides a quantum circuit verification device. The meanings of the terms used are the same as in the quantum circuit verification method described above, and specific implementation details can be found in the descriptions within the method embodiments.

[0072] Please see Figure 3 , Figure 3 This is a schematic diagram of the structure of a quantum circuit verification device provided in an embodiment of this application. The quantum circuit verification device may include an acquisition unit 201, a construction unit 202, a calculation unit 203, a comparison unit 204, and an output unit 205. Acquisition unit 201 is used to acquire the specification information of the target quantum circuit and the specification information of the realized quantum circuit to be verified; Construction unit 202 is used to construct an action functional based on the gauge information of the target quantum circuit and the gauge information of the realized quantum circuit. The action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold. The computing unit 203 is used to calculate the optimal control trajectory of the target quantum circuit and the realization quantum circuit on the unitary manifold and their corresponding minimum action value based on the action functional. The comparison unit 204 is used to compare the optimal control trajectory of the target quantum circuit with the optimal control trajectory of the realized quantum circuit to obtain the trajectory comparison result; and to compare the minimum action value of the target quantum circuit with the minimum action value of the realized quantum circuit to obtain the action comparison result. Output unit 205 is used to obtain verification conclusions about the realized quantum circuit relative to the target quantum circuit based on trajectory comparison results and action comparison results.

[0073] For specific implementation methods of each of the above units, please refer to the embodiments of the quantum circuit verification method described above, which will not be repeated here.

[0074] In summary, the quantum circuit verification device provided in this application embodiment can acquire the specification information of the target quantum circuit and the specification information of the implemented quantum circuit to be verified through the acquisition unit 201; construct the action functional based on the specification information of the target quantum circuit and the implemented quantum circuit, and use the action functional to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold; calculate the optimal control trajectory of the target quantum circuit and the implemented quantum circuit on the unitary manifold and their corresponding minimum action values ​​based on the action functional; compare the optimal control trajectory of the target quantum circuit and the optimal control trajectory of the implemented quantum circuit to obtain the trajectory comparison result; and compare the minimum action value of the target quantum circuit and the minimum action value of the implemented quantum circuit to obtain the action comparison result; and output the verification conclusion of the implemented quantum circuit relative to the target quantum circuit based on the trajectory comparison result and the action comparison result. This application's embodiments transform the quantum circuit verification problem into an optimal control problem on a unitary manifold. The optimal control trajectory and minimum action value are calculated using the principle of least action, and circuit equivalence is determined by comparing these quantities. This method overcomes the bottleneck of exponential complexity in traditional full-state simulation methods, allowing the computational complexity of the verification process to increase polynomially with the circuit size (number of qubits), thus enabling efficient verification of large-scale quantum circuits. Furthermore, the mathematical framework based on optimal control theory and variational principles provides a rigorous mathematical guarantee for circuit equivalence and can provide diagnostic information to guide circuit debugging and optimization in the event of verification failure.

[0075] This application also provides an electronic device that may integrate the quantum circuit verification device of this application, such as... Figure 4 As shown, it illustrates a structural schematic diagram of the electronic device involved in the embodiments of this application, specifically: The electronic device may include components such as a processor 301 with one or more processing cores and a memory 302 with one or more computer-readable storage media. Those skilled in the art will understand that... Figure 4 The electronic device structure shown does not constitute a limitation on the electronic device and may include more or fewer components than shown, or combine certain components, or have different component arrangements. Wherein: The processor 301 is the control center of the electronic device. It connects various parts of the electronic device via various interfaces and lines. By running or executing software programs stored in the memory 302 and / or this application, and by calling data stored in the memory 302, it performs various functions and processes data, thereby providing overall monitoring of the electronic device. Optionally, the processor 301 may include one or more processing cores; preferably, the processor 301 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operation of the storage medium, user interface, and application programs, while the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into the processor 301.

[0076] The memory 302 can be used to store software programs and this application. The processor 301 executes various functional applications and data processing by running the software programs and this application stored in the memory 302. The memory 302 may mainly include a program storage area and a data storage area. The program storage area may store applications required for operating the storage medium and at least one function; the data storage area may store data created based on the use of the electronic device. In addition, the memory 302 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device. Accordingly, the memory 302 may also include a memory controller to provide the processor 301 with access to the memory 302.

[0077] Although not shown, the electronic device may also include a display unit, an input unit, and a power supply, etc., which will not be described in detail here. Specifically, in this embodiment, the processor 301 in the electronic device loads the executable files corresponding to the processes of one or more application programs into the memory 302 according to the following instructions, and the processor 301 runs the application programs stored in the memory 302 to realize various functions, as follows: Obtain the specification information of the target quantum circuit and the specification information of the realized quantum circuit to be verified; Based on the specification information of the target quantum circuit and the specification information of the realized quantum circuit, an action functional is constructed. The action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold. Based on the action functional, the optimal control trajectories of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values ​​are calculated respectively. The optimal control trajectory of the target quantum circuit is compared with the optimal control trajectory of the realized quantum circuit to obtain the trajectory comparison result; and the minimum action value of the target quantum circuit is compared with the minimum action value of the realized quantum circuit to obtain the action comparison result. Based on the trajectory comparison results and the action comparison results, the verification conclusions of the realized quantum circuit relative to the target quantum circuit are obtained.

[0078] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be performed by instructions, or by instructions controlling related hardware. These instructions can be stored in a computer-readable storage medium and loaded and executed by a processor.

[0079] Therefore, embodiments of this application provide a storage medium storing a plurality of instructions that can be loaded by a processor to execute steps in any of the methods provided in embodiments of this application. For example, the instructions can execute the following steps: Obtain the specification information of the target quantum circuit and the specification information of the realized quantum circuit to be verified; Based on the specification information of the target quantum circuit and the specification information of the realized quantum circuit, an action functional is constructed. The action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold. Based on the action functional, the optimal control trajectories of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values ​​are calculated respectively. The optimal control trajectory of the target quantum circuit is compared with the optimal control trajectory of the realized quantum circuit to obtain the trajectory comparison result; and the minimum action value of the target quantum circuit is compared with the minimum action value of the realized quantum circuit to obtain the action comparison result. Based on the trajectory comparison results and the action comparison results, the verification conclusions of the realized quantum circuit relative to the target quantum circuit are obtained.

[0080] For details on the implementation of each of the above operations, please refer to the previous examples, which will not be repeated here.

[0081] The storage medium may include: read-only memory (ROM), random access memory (RAM), disk or optical disk, etc.

[0082] Since the instructions stored in the storage medium can execute the steps of any method provided in the embodiments of this application, the beneficial effects that any method provided in the embodiments of this application can achieve can be realized. For details, please refer to the previous embodiments, which will not be repeated here.

[0083] The quantum circuit verification method, apparatus, storage medium, and electronic device provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A quantum circuit verification method, characterized in that, include: Obtain the specification information of the target quantum circuit and the specification information of the realized quantum circuit to be verified; Based on the canonical information of the target quantum circuit and the canonical information of the realized quantum circuit, an action functional is constructed. The action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold. Based on the action functional, the optimal control trajectories of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values ​​are calculated respectively. The optimal control trajectory of the target quantum circuit is compared with the optimal control trajectory of the realized quantum circuit to obtain the trajectory comparison result; The minimum action value of the target quantum circuit is compared with the minimum action value of the realized quantum circuit to obtain the action comparison result. Based on the trajectory comparison results and the action comparison results, the verification conclusion of the realized quantum circuit relative to the target quantum circuit is obtained.

2. The quantum circuit verification method as described in claim 1, characterized in that, The construction of the action functional based on the canonical information of the target quantum circuit and the canonical information of the realized quantum circuit includes: Based on the specification information of the target quantum circuit, a reference term describing the ideal evolution path is constructed; Based on the specification information of the quantum circuit implementation, a parameterized control term describing the actual evolution path is constructed; Obtain the instantaneous deviation between the actual evolution described by the parameterized control term and the ideal evolution described by the reference term, and construct the Lagrange density term based on the instantaneous deviation; Construct constraint terms to define the physical constraints and performance metrics for the implementation of the packaged circuit; The Lagrange density term and the constraint term are combined using Lagrange multipliers to form an action functional.

3. The quantum circuit verification method as described in claim 2, characterized in that, The Lagrange density term, based on the Hilbert-Schmidt norm, quantifies the difference between the actual evolution rate and the ideal evolution rate determined by the Hamiltonian.

4. The quantum circuit verification method as described in claim 1, characterized in that, The calculation of the optimal control trajectories of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values ​​based on the action functional includes: The time domain corresponding to the evolution process of the target quantum circuit and the realized quantum circuit is discretized, and the continuous optimal control problem on the unitary manifold is transformed into a discrete parameter optimization problem. Based on the Pontryagin minimum principle or gradient optimization algorithm, construct the objective function and calculate the gradient of the objective function with respect to the control parameters; The control parameters are iteratively updated according to the gradient until the convergence condition is met, thereby obtaining the optimal control trajectory and the corresponding minimum action value that minimizes the action functional on the unitary manifold.

5. The quantum circuit verification method as described in claim 4, characterized in that, The objective function is a weighted sum of the action functional and the final state fidelity penalty term, which is used to measure the difference between the final evolution result and the objective unitary operator.

6. The quantum circuit verification method as described in claim 1, characterized in that, The verification conclusion obtained based on the trajectory comparison results and the action comparison results, relative to the target quantum circuit, includes: If the trajectory comparison result is less than or equal to the first preset threshold and the action comparison result is less than or equal to the second preset threshold, then the realized quantum circuit is functionally equivalent to the target quantum circuit, and equivalence verification information is output. If the trajectory comparison result is greater than a first preset threshold, or the action quantity comparison result is greater than a second preset threshold, it indicates that the realized quantum circuit and the target quantum circuit are not functionally equivalent, and the corresponding failure verification information is output according to the sign and magnitude of the action quantity comparison result.

7. The quantum circuit verification method as described in claim 6, characterized in that, The step of outputting corresponding failure verification information based on the sign and magnitude of the action comparison result includes: If the action quantity comparison result is positive and exceeds the second preset threshold, it indicates that the realized quantum circuit is a suboptimal circuit or contains an error, and the first failure verification information is output. If the comparison result of the action amount is negative and the absolute value exceeds the second preset threshold, it indicates that the realized quantum circuit is an over-optimized circuit, and the second failure verification information is output.

8. A quantum circuit verification device, characterized in that, include: The acquisition unit is used to acquire the specification information of the target quantum circuit and the specification information of the realized quantum circuit to be verified. The construction unit is used to construct an action functional based on the canonical information of the target quantum circuit and the canonical information of the realized quantum circuit. The action functional is used to describe the execution process of the quantum circuit as an action minimization problem on a unitary manifold. The computing unit is used to calculate, based on the action functional, the optimal control trajectories of the target quantum circuit and the realized quantum circuit on the unitary manifold and their corresponding minimum action values. A comparison unit is used to compare the optimal control trajectory of the target quantum circuit with the optimal control trajectory of the realized quantum circuit to obtain a trajectory comparison result; The minimum action value of the target quantum circuit is compared with the minimum action value of the realized quantum circuit to obtain the action comparison result. The output unit is used to obtain a verification conclusion of the realized quantum circuit relative to the target quantum circuit based on the trajectory comparison result and the action comparison result.

9. A storage medium, characterized in that, The storage medium stores multiple instructions adapted for loading by a processor to execute the quantum circuit verification method according to any one of claims 1-7.

10. An electronic device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the quantum circuit verification method as described in any one of claims 1-7.