A high-speed moving object recognition method and system based on a pulse neural network
By combining event cameras and spiking neural networks, the problem of information loss in high-speed motion scenes by traditional frame cameras is solved, and high-speed moving object recognition with low latency and low power consumption is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- PEKING UNIV
- Filing Date
- 2026-03-03
- Publication Date
- 2026-06-02
AI Technical Summary
Traditional frame-based cameras struggle to capture crucial details in high-speed motion scenes, and high-speed motion recognition algorithms based on deep learning models consume high power when deployed at the edge.
Event cameras are used to acquire event information such as pixel position, timestamp, and brightness change polarity. Inference is performed on the PAICORE2.0 neuromorphic chip using a spiking neural network to achieve high-speed moving object recognition.
It achieves high-speed moving object recognition with low latency and low power consumption, with fast perception speed, system power consumption of less than 1W, and response latency in the millisecond range.
Smart Images
Figure CN122135271A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the fields of computer vision and neuromorphic computing technology, specifically to a method and system for high-speed moving object recognition based on spiking neural networks, which is particularly suitable for real-time high-speed moving object recognition scenarios driven by event cameras. Background Technology
[0002] In the fields of machine vision and computer vision, target recognition technology typically relies on frame-based image acquisition devices to capture continuous image frames and then uses image processing algorithms or deep learning models to analyze and identify the target's category features. In high-speed motion scenarios, existing technologies usually mitigate imaging blur caused by high-speed motion by increasing camera frame rates, shortening exposure times, and using high-brightness light sources. However, these solutions still rely on the periodic sampling mechanism of frame-based image sensors, whose temporal resolution is limited by the camera frame rate and exposure parameters. In high-speed motion scenarios, targets undergo significant spatial displacement within a very short time, easily leading to the loss of key information between frames and noticeable motion blur. Furthermore, brightness changes and contrast reductions under complex lighting conditions further degrade the imaging quality and recognition reliability of traditional pixel-based imaging methods. Simultaneously, to meet real-time recognition requirements, existing solutions typically rely on high-performance computing units, resulting in high overall system power consumption and hardware costs.
[0003] In recent years, event cameras, as a novel type of visual sensor, have been increasingly applied in the field of high-speed visual perception. Unlike traditional frame-based cameras, event cameras operate asynchronously, outputting event information as pixel brightness changes. This event information typically includes pixel location, timestamp, and the polarity of the brightness change, thus possessing high temporal resolution (down to the microsecond level) and low latency. Meanwhile, Spiking Neural Networks (SNNs) have demonstrated significant success in multiple fields, such as image classification, object detection, and speech recognition. The asynchronous event-driven mechanism of SNNs updates the state only when an input event occurs, significantly reducing redundant computation and energy consumption, making them particularly suitable for deployment on low-power neuromorphic hardware to perform real-time tasks. Furthermore, SNNs are highly compatible with the spatiotemporal perception mechanisms of biological visual systems in event camera data processing, naturally addressing the problems of inter-frame discontinuities and information loss caused by high-speed motion. They possess high temporal resolution and robustness, providing a bio-inspired and efficient computational paradigm for high-speed dynamic visual recognition.
[0004] The existing technologies mainly suffer from the following drawbacks: 1. Traditional frame-based cameras exhibit significant limitations in high-speed motion scenes. Even by increasing the frame rate to shorten the frame interval, frame-based cameras still struggle to capture the key details of high-speed moving targets completely within a very short time, resulting in missing keyframes. 2. High-speed motion recognition algorithms based on traditional deep learning models require substantial computing resources when deployed at the edge, leading to high power consumption. Summary of the Invention
[0005] To address at least one of the problems mentioned in the background section, this invention proposes a method and system for high-speed moving object recognition based on a spiking neural network. It utilizes a dynamic vision sensor (DVS), i.e., an event camera, to acquire event information such as pixel position, timestamp, and brightness change polarity of high-speed moving objects. This information is then used as input to a spiking neural network via pulse coding, and spiking neural network inference is deployed on the PAICORE2.0 chip to obtain the recognition result of the moving object. The recognition result is then visualized and output. This invention achieves the technical effect of reducing computational latency and system power consumption, solving the problems of long computation time and high hardware power consumption in traditional algorithms.
[0006] To achieve the above-mentioned technical effects, the technical solution adopted by the present invention includes:
[0007] A method for high-speed moving object recognition based on spiking neural networks includes the following steps:
[0008] S1. Obtain event information;
[0009] S2. Encode the event information into a pulse signal;
[0010] S3. Input the pulse signal into the pulse neural network;
[0011] S4. The spiking neural network is inferred using a neuromorphic chip to obtain the recognition result of the moving object;
[0012] S5. Visualize the recognition results.
[0013] Furthermore, the event information is acquired through an event camera.
[0014] Furthermore, the event information includes pixel location, timestamp, and brightness change polarity.
[0015] Furthermore, the neuromorphic chip is PAICORE2.0, and PAICORE2.0 supports the LIF neuron model.
[0016] Furthermore, the LIF neuron is configured with a membrane time constant of 2.0, a voltage threshold of 1.0, a reset value of 0, and a time step of 3.
[0017] Furthermore, the spiking neural network undergoes 8-bit quantization before deployment and is trained using the QAT quantization method.
[0018] This invention also relates to a high-speed moving object recognition system based on a spiking neural network, comprising:
[0019] The input module is used to obtain event information;
[0020] The processing module is used to encode the event information into a pulse signal, input it into a spiking neural network, and perform inference through a neuromorphic chip to obtain the recognition result of the moving object;
[0021] The output module is used to visualize the recognition results.
[0022] Furthermore, the event information in the input module is acquired through an event camera, and the event information includes pixel position, timestamp, and brightness change polarity. The neuromorphic chip in the processing module is PAICORE2.0, which supports the LIF neuron model.
[0023] The present invention also relates to a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method of any one of claims 1 to 6.
[0024] The present invention also relates to an electronic device, including a processor, a memory, and a communication module, wherein the memory stores a computer program, and the computer program, when executed by the processor, implements the method of any one of claims 1 to 6.
[0025] The present invention also relates to a computer product comprising a computer program and / or instructions which, when executed by a processor, implement the steps of the method as described in any one of claims 1 to 6.
[0026] The beneficial effects of this invention are as follows:
[0027] 1. Low response latency. Based on the aforementioned event camera (DVS), its event acquisition method, and spiking neural network inference structure, millisecond-level response latency can be achieved in high-speed moving object recognition tasks, and the single inference feedback time can be controlled within the order of 10ms.
[0028] 2. Low system power consumption. Based on the hardware implementation of the PAICORE2.0 neuromorphic chip, the overall system power consumption is significantly reduced compared to traditional general-purpose processor solutions, with typical operating power consumption of less than 1W.
[0029] 3. High perception speed. Utilizing a digital video surveillance system (DVS) to capture more complete event information and leveraging the temporal correlation of events, a biological-like information processing approach is achieved. The video stream is encoded as pulse information, and the constructed spiking neural network uses the temporal and spatial correlation of pulse sequences for inference, significantly improving perception speed. Attached Figure Description
[0030] Figure 1 A flowchart illustrating a high-speed moving object recognition method based on a spiking neural network provided in this application;
[0031] Figure 2 This is a schematic diagram illustrating the principle of a method provided in an embodiment of this application;
[0032] Figure 3 An abstract process diagram provided for an embodiment of this application;
[0033] Figure 4 This is a schematic diagram of a LIF neuron computation mode provided in an embodiment of this application;
[0034] Figure 5 This is a schematic diagram of a high-speed moving object scene provided in an embodiment of this application;
[0035] Figure 6 A schematic diagram of a network structure provided in an embodiment of this application;
[0036] Figure 7 This is a schematic diagram of a visual interface output result provided in an embodiment of this application;
[0037] Figure 8 A system program flowchart provided for an embodiment of this application;
[0038] Figure 9 A schematic diagram of the structure of a high-speed moving object recognition system based on a spiking neural network provided in an embodiment of this application;
[0039] Figure 10 This is a schematic diagram of the structure of an exemplary electronic device provided in an embodiment of this application. Detailed Implementation
[0040] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting the invention.
[0041] The first aspect of this invention relates to a method for recognizing high-speed moving objects based on a spiking neural network, such as... Figure 1 As shown, it includes the following steps:
[0042] S1. Obtain event information;
[0043] like Figure 5 As shown, a high-speed moving object task is constructed using a playing card dealing machine. At the moment of dealing, the playing cards leave the machine at high speed, making it difficult to discern their rank and suit with the naked eye. A high-speed moving object scene is built by capturing the movement events of the playing cards using a Distributed Visual Event Camera (DVS).
[0044] Specifically, event information of high-speed moving objects is captured using a Distributor Status Camera (DVS). In the experimental scenario of a card dealing machine, playing cards leave the machine at high speed, and the event camera captures the event information generated during the movement of the playing cards in real time. The event information includes at least three key dimensions: pixel position (x, y), used to represent the coordinates of the event (unit: pixels); timestamp (t), used to represent the time point of the event (unit: microseconds, precision 1μs); and brightness change polarity (p), used to represent the direction of brightness change (+1 indicates brightness increase, -1 indicates brightness decrease).
[0045] Additionally, a noise event filtering step is included, the purpose of which is to judge the noise of each captured event; if the time difference between the event timestamp and the previous event is less than a set value, such as Δt < 50μs, or the pixel position jump distance is greater than a set value, such as d > 5 pixels, or the polarity statistics are abnormal, such as more than 80% of the polarities within a local window are opposite, then it is judged as a noise event; if a noise event is determined, the event is discarded, and the process immediately returns to step S1 to recapture the event without proceeding to the subsequent process; if no noise event is determined, the event is retained and the process proceeds to step S2.
[0046] S2. Encode the event information into a pulse signal;
[0047] Specifically, valid event information is divided into time windows, and the polarity of brightness changes is encoded to form a 48×48 event tensor with 3 channels (normalized x-coordinate value, normalized y-coordinate value, and polarity value). For example, the pixel position (x, y) is normalized to the range [0, 1], and the polarity value p is mapped to +1 or -1, constructing a pulse input tensor with a shape of (3, 48, 48).
[0048] S3. Input the pulse signal into the pulse neural network;
[0049] A spiking neural network consists of multiple interconnected spiking neurons, and its basic computational unit is derived from an abstract model of the information processing mechanism of biological neurons. In biological nervous systems, neurons receive signal stimuli released from the synapses of preceding neurons via dendrites, and perform potential integration within the cell body. When the membrane potential reaches a threshold condition, an action potential signal is generated. This action potential is transmitted outward via the axon and triggers signal release at the synapse, thereby realizing information transmission between neurons. The spiking neuron model, while retaining the above information transmission mechanism, simplifies and mathematically describes the structure and function of biological neurons. Its abstraction process is illustrated as follows: Figure 3 As shown.
[0050] Specifically, the encoded event tensor is input into a spiking neural network, and the network structure is as follows:
[0051] Input(3,48,48) → FC4608 → FC512 → FC128 → FC4
[0052] The input layer flattens out to a 3×48×48 tensor, which is a 4608-dimensional vector.
[0053] The fully connected layers of FC4608 (4608→512), FC512 (512→128), and FC128 (128→4) are processed layer by layer;
[0054] The output is a 4-dimensional vector, corresponding to the four suits of playing cards: hearts, spades, clubs, and diamonds. The model in this embodiment consists of fully connected and LIF neurons, as shown below. Figure 6 As shown. The network structure is specifically optimized for neuromorphic chips, avoiding convolutional layers to reduce hardware complexity.
[0055] S4. The spiking neural network is inferred using a neuromorphic chip to obtain the recognition result of the moving object;
[0056] Specifically, the spiking neural network was deployed on the PAICORE2.0 neuromorphic chip to perform inference, and the LIF neuron parameters were set as follows: membrane time constant. =2.0 (controls potential decay rate), voltage threshold =1.0 (trigger pulse threshold), reset value =0 (Post-pulse membrane potential reset), time step =3 (pulse sequence window length).
[0057] The PAICORE2.0 neuromorphic chip supports a spiking neuron model based on the accumulation-leakage-fire mechanism, namely the LIF (Leaky Integrate-and-Fire) neuron. This model updates the neuronal membrane potential at discrete time steps. Its calculation process includes stages such as potential accumulation, threshold determination, pulse firing, and potential reset and decay. The specific calculation flow is as follows: Figure 4 As shown, LIF neurons have been widely used in spiking neural network modeling due to their good balance between expressing temporal pulse characteristics, computational complexity, and hardware implementation efficiency. Therefore, in this invention, the LIF neuron is selected as the basic unit to construct the spiking neural network model.
[0058] LIF neurons can be numerically simulated using the following formula:
[0059]
[0060]
[0061]
[0062] in This represents the membrane potential value after neurodynamic treatment. Indicates the first Layer At time step, one neuron The membrane potential value after the pulse is generated. It is the membrane time constant that controls the decay. It is the resting potential after discharge. It is a time step The output of the neuron at that time, It is the voltage threshold. It is the Heaviside step function.
[0063] S5. Visualize the recognition results.
[0064] Specifically, the recognition results, such as "5 of Hearts" and "King of Spades," are output in real time via a PC and monitor. Taking playing card suit recognition as an example, the software interface for the final inference results is shown below. Figure 7 As shown.
[0065] Furthermore, the event information is acquired through an event camera.
[0066] Specifically, the event camera (DVS) can be mounted directly above the card dealing machine, such as at a height of 50cm and a viewing angle of 120°, to asynchronously capture card movement events. Experimental data is collected for model training. Dependent variables may include lighting conditions and lighting angles. For example, three lighting conditions can be used (strong light: 1000 lux; weak light: 50 lux; mixed light: 200-500 lux), with 20 samples collected at five angles (0° to 30°) under each lighting condition.
[0067] Furthermore, the event information includes pixel location, timestamp, and brightness change polarity.
[0068] Furthermore, the neuromorphic chip is PAICORE2.0, and PAICORE2.0 supports the LIF neuron model.
[0069] Furthermore, the LIF neuron is configured with a membrane time constant of 2.0, a voltage threshold of 1.0, a reset value of 0, and a time step of 3.
[0070] Specifically, the membrane time constant τ=2.0 is used to balance computational efficiency and accuracy, the voltage threshold Vth=1.0 is used to avoid noise interference, the reset value Vreset=0 is used to simplify hardware implementation, and the time step T=3 is used to capture key motion information.
[0071] Furthermore, the spiking neural network undergoes 8-bit quantization before deployment and is trained using the QAT quantization method.
[0072] Specifically, the QAT (Quantization-Aware Training) quantization method is used to quantize network weights and activation values into 8-bit integers, which can be converted into a chip-executable format via the PAIBOX toolchain.
[0073] The principle block diagram of the present invention is as follows: Figure 2 As shown.
[0074] Another aspect of this invention relates to a high-speed moving object recognition system based on a spiking neural network, such as... Figure 9 As shown, it includes:
[0075] The input module is used to obtain event information;
[0076] The processing module is used to encode the event information into a pulse signal, input it into a spiking neural network, and perform inference through a neuromorphic chip to obtain the recognition result of the moving object;
[0077] The output module is used to visualize the recognition results.
[0078] Furthermore, the event information in the input module is acquired through an event camera, and the event information includes pixel position, timestamp, and brightness change polarity. The neuromorphic chip in the processing module is PAICORE2.0, which supports the LIF neuron model.
[0079] The system provided in this embodiment is mainly divided into three modules, which sequentially transmit and process information: an input module, a processing module, and an output module. The input module is a DVS camera, primarily used to acquire event information of high-speed moving objects. The processing module consists of a PC and an AI computing device, mainly used to process the event signals input from the input module and convert them into pulse streams. Through a spiking neural network deployed on it, the category of the moving object is predicted. The output module consists of a PC and a monitor, used to visualize the prediction results. The program flow used by the system is as follows: Figure 8 As shown.
[0080] The present invention also relates to a computer-readable storage medium capable of implementing all steps of the high-speed moving object recognition method based on spiking neural networks in the above embodiments, storing a computer program that, when executed by a processor, implements all steps of the high-speed moving object recognition method based on spiking neural networks in the above embodiments.
[0081] Embodiments of the present invention also provide an electronic device 100, such as... Figure 10 As shown, the electronic device, as an implementation apparatus of the method, includes at least a processing module 1001, a storage module 1003, and a communication module 1002. In particular, the storage module 1003 stores the data and related computer programs required to execute the method, such as acquiring event information, encoding the event information into a pulse signal, and inputting the pulse signal into a spiking neural network. The processing module 1001 calls the data and programs in the storage module to execute all the steps of the method. The communication module 1003 acquires data such as pixel position, timestamp, and brightness change polarity obtained by the event camera, and outputs the visualized recognition results to external devices or systems, thereby achieving the corresponding technical effect.
[0082] Preferably, the electronic device 100 may include a bus 1004 architecture. The bus 1004 may include any number of interconnected buses and bridges, and the bus 1004 will link together various circuits including one or more processing modules 1001 and storage modules 1003. The bus 1004 may also link together various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. The processing module 1001 is responsible for managing the bus 1004 and general processing, while the storage module 1003 can be used to store data used by the processing module 1001 during operation. The communication module 1002 is a transmitter / receiver that transmits and receives signals via an antenna. The communication module 1002 (transmitter / receiver) is coupled to the processing module 1001 via the bus 1004 to provide input signals and receive output signals, which can be the same as in a conventional mobile communication terminal. Based on different communication technologies, multiple communication modules can be set in the same electronic device, such as cellular network module, Bluetooth module and / or wireless LAN module.
[0083] Additionally, the electronic device may further include an input unit, an audio processor, a display, a power supply, and other components. The processing module 1001 (or controller, operation control) may include a microprocessor or other processor device and / or logic device. This processing module 1001 receives input and controls the operation of various components of the electronic device. The storage module 1003 may be one or more of a buffer, flash memory, hard drive, removable media, volatile memory, non-volatile memory, or other suitable devices, capable of storing the aforementioned data information. It may also store programs for executing the relevant information, and the processing module 1001 can execute the programs stored in the storage module 1003 to achieve information storage or processing. The input unit provides input to the processing module, for example, it may be a button or touch input device. The power supply provides power to the electronic device. The display displays images and text, for example, it may be an LCD display. The communication module 1002 (transmitter / receiver) is also coupled to a speaker and microphone via the audio processor to provide audio output via the speaker and receive audio input from the microphone, thereby realizing typical telecommunications functions. An audio processor can include any suitable buffer, decoder, amplifier, etc. Additionally, the audio processor can be coupled to a central processing unit (CPU) to enable on-device recording via a microphone and to play back on-device stored sound via speakers.
[0084] This invention also relates to a computer product comprising a computer program and / or instructions that, when executed by a processor, implement all the steps of the high-speed moving object recognition method based on a spiking neural network described in the above embodiments. Those skilled in the art will understand that embodiments of this invention can be provided as methods, systems, or computer program products. Therefore, this invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0085] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A system that specifies functions in one or more boxes.
[0086] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including an instruction set implemented in a process. Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0087] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the functions specified in one or more boxes. Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the invention.
[0088] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0089] In this application, "at least one" means one or more, and "more than" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or multiple items.
[0090] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0091] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical module division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection between apparatuses or units through some interfaces, and may be electrical, mechanical, or other forms.
[0092] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be obtained according to actual needs to achieve the purpose of this embodiment.
[0093] Furthermore, the module units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software module unit.
[0094] If the integrated unit is implemented as a software module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0095] Those skilled in the art will recognize that, in one or more of the examples above, the functions described in this invention can be implemented using hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium.
[0096] Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of computer programs from one place to another. Storage media can be any available medium that can be accessed by a general-purpose or special-purpose computer.
[0097] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention.
[0098] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit it. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. A method for high-speed moving object recognition based on a spiking neural network, characterized in that, Includes the following steps: S1. Obtain event information; S2. Encode the event information into a pulse signal; S3. Input the pulse signal into the pulse neural network; S4. The spiking neural network is inferred using a neuromorphic chip to obtain the recognition result of the moving object; S5. Visualize the recognition results.
2. The method according to claim 1, characterized in that, The event information is obtained through the event camera.
3. The method according to claim 2, characterized in that, The event information includes pixel location, timestamp, and brightness change polarity.
4. The method according to claim 1, characterized in that, The neuromorphic chip is PAICORE2.0, and PAICORE2.0 supports the LIF neuron model.
5. The method according to claim 4, characterized in that, The LIF neuron uses parameters set with a membrane time constant of 2.0, a voltage threshold of 1.0, a reset value of 0, and a time step of 3.
6. The method according to claim 1, characterized in that, The spiking neural network was quantized to 8 bits before deployment and trained using the QAT quantization method.
7. A high-speed moving object recognition system based on a spiking neural network, characterized in that, include: The input module is used to obtain event information; The processing module is used to encode the event information into a pulse signal, input it into a spiking neural network, and perform inference through a neuromorphic chip; The output module is used to visualize the recognition results.
8. The system according to claim 7, characterized in that, The event information in the input module is acquired through an event camera. The event information includes pixel position, timestamp, and brightness change polarity. The neuromorphic chip in the processing module is PAICORE2.0, which supports the LIF neuron model.
9. A computer-readable storage medium, characterized in that, The device contains a computer program that, when executed by a processor, implements the method of any one of claims 1 to 6.
10. An electronic device comprising a processor, a memory, and a communication module, wherein the memory stores a computer program, characterized in that, When the computer program is executed by the processor, it implements the method of any one of claims 1 to 6.
11. A computer product comprising computer programs and / or instructions, characterized in that, When the computer program and / or instructions are executed by a processor, they implement the steps of the method according to any one of claims 1 to 6.