A driver, control method and control system for a high temperature gas cooled reactor control rod

Abstract

This application provides a driver, control method, and control system for a high-temperature gas-cooled reactor control rod, relating to the field of motor technology. The output of the control unit is connected to the switching devices of a T-type three-level inverter circuit, and the sampling terminal of the control unit is connected to the output of each phase arm. The control unit outputs voltage vectors Uq and Ud based on a given reference value and feedback signal, through a PI Tustin controller. It acquires motor control signals and decomposes the voltage vectors Uq and Ud into three-phase fundamental voltages through Inv-Park and Inv-Clark transformations. The three-phase voltages obtained by superimposing the third harmonic on the three-phase fundamental voltages are then used to generate modulation signals using a unipolar SPWM algorithm. These modulation signals drive the switching devices of each phase arm in the T-type three-level inverter circuit. This effectively improves sinusoidal characteristics, reduces electromagnetic interference, and lowers reflected voltage during long-line transmission.

Description

Technical Field

[0001] This application relates to the field of electrical machinery technology, and in particular to a driver, a control method, and a control system for control rods of a high-temperature gas-cooled reactor. Background Technology

[0002] Currently, the motors used in the control rod system of high-temperature gas-cooled reactors are used to lift or lower the control rods in the system. The drivers adapted to these motors are often two-level. Two-level drivers generate significant electromagnetic interference. At the same time, the drive cables connecting the motors to the drivers are quite long, sometimes exceeding 100 meters. Under long-line drive, a large reflected voltage is generated. Consequently, due to the large variation in bus voltage, the sinusoidal nature of the output current of the two-level driver is affected, causing the motor to pulsate and affecting the smoothness of the control rod movement. Summary of the Invention

[0003] In view of this, this application provides a driver, a control method, and a control system for a high-temperature gas-cooled reactor control rod, aiming to improve the sinusoidal nature of the motor driver output voltage and reduce electromagnetic interference and reflected voltage of long-line output.

[0004] In a first aspect, this application provides a drive device, including an inverter and a control unit; the inverter adopts a T-type three-level inverter circuit, the input terminal of the inverter is connected to a DC bus, and the output terminal is connected to a motor winding; the output terminal of the control unit is connected to the switching device of the T-type three-level inverter circuit, and the sampling terminal of the control unit is connected to the output terminal of each phase arm of the T-type three-level inverter circuit; The control unit is used to output voltage vectors Uq and Ud based on a given reference value and a feedback signal via a PI Tustin controller. The feedback signal is determined based on the sampling signal collected from the output terminal of each phase arm of the T-type three-level inverter circuit. It also acquires a motor control signal and decomposes the voltage vectors Uq and Ud into three-phase fundamental voltages using Inv-Park and Inv-Clark transformations. The motor control signal is a signal indicating the motor speed. Finally, it generates a modulation signal by superimposing the third harmonic on the three-phase fundamental voltages using a unipolar SPWM algorithm, and drives the switching devices of each phase arm in the T-type three-level inverter circuit based on the modulation signal.

[0005] Optionally, the control unit is specifically used to convert the sampling signal acquired from the sampling terminal into a three-phase current through an analog-to-digital converter, and then obtain current feedback values ​​Iq and Id by sequentially passing through Clark transformation and Park transformation based on the motor control signal; and to compare Iq and Id with a given reference value through a PI Tustin controller to adjust the output voltage vector Uq and voltage vector Ud.

[0006] Optionally, the control unit is specifically used to calculate the average of the maximum and minimum values ​​of the three-phase fundamental voltages as an amplitude reference; and to superimpose the amplitude references on the fundamental voltages of each phase to obtain the three-phase voltages.

[0007] Optionally, the control unit is further configured to determine, based on the current sampling signal collected from the output terminal of each phase bridge arm, whether the phase power is operating in the positive half-cycle, to increase the voltage of the phase power by a compensation value, or the phase power is operating in the negative half-cycle, to decrease the voltage of the phase power by a compensation value.

[0008] Optionally, each phase arm of the T-type three-level inverter circuit includes a first switching device, a second switching device, a third switching device, and a fourth switching device; wherein, the first end of the second and third switching devices connected in series is connected to the midpoint of the capacitor, and the second end is connected to the connection point between the first and fourth switching devices. The control unit is configured to switch the on / off states of the first and third switching devices during the positive half-cycle of the sine wave of each phase, and switch the on / off states of the second and fourth switching devices during the negative half-cycle of the sine wave of each phase, based on the modulation signal.

[0009] Optionally, the carrier frequency of the unipolar SPWM algorithm is 10kHz.

[0010] Optionally, the inverter may further include a sampling resistor and a filtering circuit; Each phase output terminal of the T-type three-level inverter circuit is connected to the filter circuit through a sampling resistor, and the output terminal of the filter circuit is connected to the three-phase windings of the motor.

[0011] Optionally, the inverter further includes a contactor; the contactor is disposed between the filter circuit and the three-phase windings of the motor.

[0012] Secondly, this application also provides a control method for a T-type three-level inverter circuit, wherein the input terminal of the T-type three-level inverter circuit is connected to a DC source and the output terminal is connected to the winding of a motor. Based on a given reference value and a feedback signal, the PI Tustin controller outputs voltage vectors Uq and Ud, wherein the feedback signal is a signal determined based on the sampling signal collected from the output of each phase arm of the T-type three-level inverter circuit. The motor control signal is acquired, and the voltage vectors Uq and Ud are decomposed into three-phase fundamental voltages through Inv-Park and Inv-Clark transformations. The motor control signal is a signal indicating the motor speed. The three-phase voltage obtained by superimposing the third harmonic on the three-phase fundamental voltage is used to generate a modulation signal through a unipolar SPWM algorithm. Based on the modulation signal, the switching devices of each phase bridge arm in the T-type three-level inverter circuit are driven.

[0013] Thirdly, this application provides a control system for a high-temperature gas-cooled reactor control rod, characterized in that it includes a redundant coil motor and two sets of drive devices as described in any of the above claims, wherein the output terminal of the T-type three-level inverter circuit of each drive device is correspondingly connected to one set of coils in the redundant coil motor.

[0014] This application provides a driver, a control method, and a control system for a high-temperature gas-cooled reactor control rod, including an inverter and a control unit; the inverter adopts a T-type three-level inverter circuit, the input terminal of the inverter is connected to the DC bus, and the output terminal is connected to the motor winding; the output terminal of the control unit is connected to the switching device of the T-type three-level inverter circuit, and the sampling terminal of the control unit is connected to the output terminal of each phase arm of the T-type three-level inverter circuit; the control unit is used to, based on a given reference value and a feedback signal, control the control rod via a PI controller. The Tustin controller outputs voltage vectors Uq and Ud. The feedback signal is determined based on the sampling signal collected from the output of each phase arm of the T-type three-level inverter circuit. It acquires a motor control signal and decomposes the voltage vectors Uq and Ud into three-phase fundamental voltages using Inv-Park and Inv-Clark transformations. The motor control signal indicates the motor speed. The three-phase voltages obtained by superimposing the third harmonic on the three-phase fundamental voltages are then used to generate a modulation signal using a unipolar SPWM algorithm. This modulation signal drives the switching devices of each phase arm in the T-type three-level inverter circuit. This application employs a T-type three-level inverter circuit combined with a unipolar SPWM algorithm. The output pulse voltage waveform alternates between 0 and +Udc / 2, or between 0 and -Udc / 2, reducing the voltage variation by half compared to bipolar SPWM. This results in a lower voltage change rate (dv / dt), making the output voltage closer to a sinusoidal waveform and effectively improving sinusoidality. This improved sinusoidality reduces electromagnetic interference, and the lower output voltage change rate (dv / dt) significantly reduces reflected voltage during long-distance transmission. Simultaneously, by introducing third harmonic injection, the DC bus voltage utilization rate is further improved, enhancing motor operating efficiency. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in this embodiment or the prior art, the drawings used in the description of the embodiment or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 A schematic diagram of the connection structure of a T-type three-level inverter circuit provided in an embodiment of this application; Figure 2 A flowchart illustrating a control unit provided in an embodiment of this application; Figure 3 A schematic flowchart of a control method for a T-type three-level inverter circuit provided in this application embodiment; Figure 4 This is a schematic diagram of a redundant inverter configuration provided in an embodiment of this application. Detailed Implementation

[0017] To provide a more detailed understanding of the features and technical content of the embodiments of this disclosure, the implementation of the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings. The accompanying drawings are for illustrative purposes only and are not intended to limit the embodiments of this disclosure. In the following technical description, for ease of explanation, several details are used to provide a full understanding of the disclosed embodiments. However, one or more embodiments may still be implemented without these details. In other cases, well-known structures and devices may be simplified in their depiction to simplify the drawings.

[0018] The terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this disclosure are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of this disclosure described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion.

[0019] Unless otherwise stated, the term "multiple" means two or more. In embodiments of this disclosure, the character " / " indicates that the preceding and following objects are in an "or" relationship. For example, A / B means: A or B. The term "and / or" describes an association between objects, indicating that three relationships can exist. For example, A and / or B means: A or B, or, A and B.

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0021] See Figure 1The diagram shows the connection structure of a T-type three-level inverter circuit. Figure 2 The diagram shows a flow chart of a control unit. A drive device includes an inverter and a control unit; the inverter employs a T-type three-level inverter circuit, with its input terminal connected to a DC bus and its output terminal connected to a motor winding; the output terminal of the control unit is connected to the switching devices of the T-type three-level inverter circuit, and the sampling terminal of the control unit is connected to the output terminal of each phase arm of the T-type three-level inverter circuit; the control unit is configured to generate corresponding PWM drive signals based on the sampled signals from the output terminals of each phase arm. The control unit is used to output voltage vectors Uq and Ud based on a given reference value and a feedback signal via a PI Tustin controller. The feedback signal is determined based on the sampling signal collected from the output terminal of each phase arm of the T-type three-level inverter circuit. It also acquires a motor control signal and decomposes the voltage vectors Uq and Ud into three-phase fundamental voltages using Inv-Park and Inv-Clark transformations. The motor control signal is a signal indicating the motor speed. Finally, it generates a modulation signal by superimposing the third harmonic on the three-phase fundamental voltages using a unipolar SPWM algorithm, and drives the switching devices of each phase arm in the T-type three-level inverter circuit based on the modulation signal.

[0022] Optionally, the control unit of this application can be designed using FPGA logic; for example, the FPGA chip model is M2GL025T-FGG484I. This enables high-speed computing and real-time control capabilities. Through hardware logic programming, the switching timing is precisely generated, ensuring the stable operation of the three-level inverter circuit.

[0023] The aforementioned PI Tustin controller can perform high-precision integral calculations, achieving high-precision torque and speed control, and reducing steady-state errors and torque ripple. Furthermore, the algorithm is simple and efficient, easily implemented in real-time on an FPGA, meeting the high real-time requirements of motor control.

[0024] Optionally, the proportional gain Kp and integral gain Ki of the PI Tustin controller can be pre-configured in the FPGA programmable logic. Optionally, the proportional gain Kp of the above physical quantities can be 1.953, and the integral gain Ki can be 0.006; the corresponding digital quantities can be Kp=4000 and Ki=400, respectively.

[0025] like Figure 2 The PI Tustin controller outputs Ud and Uq, which are then converted to Inv-Park, resulting in Uα and Uβ. This is followed by Inv-Clark conversion, which in turn generates three-phase voltage commands Uu, Uv, and Uw.

[0026] The aforementioned motor control signal is a signal indicating the motor speed. Based on the required motor speed, a corresponding angular velocity is determined (which increases with increasing motor speed), and then a motor control signal (such as...) is generated based on this angular velocity. Figure 2 The larger the electrical angle θ shown, the faster the rate of change of the electrical angle θ, and the higher the synchronous speed of the corresponding motor. Specifically, in the Inv-Park transformation, Uα = Ud × cosθ - Uq × sinθ, Uβ = Ud × sinθ + Uq × cosθ.

[0027] Furthermore, such as Figure 2 The aforementioned feedback signal is determined based on the sampled signal acquired from the output terminal of each phase arm of the T-type three-level inverter circuit. The specific implementation process in the control unit can be as follows: The sampling signal acquired from the sampling terminal is converted into a three-phase current by an analog-to-digital converter, and then subjected to Clark transformation and Park transformation based on the motor control signal to obtain current feedback values ​​Iq and Id. The PITustin controller compares Iq and Id with a given reference value to adjust the output voltage vector Uq and voltage vector Ud.

[0028] Understandably, the sampled three-phase currents Ia, Ib, Ic → Clark transformation → Iα, Iβ → Park transformation → Id, Iq (entering the PI Tustin controller).

[0029] In one example, such as Figure 2 The aforementioned analog-to-digital converter can use a Δ-Σ modulator to convert the sampled current signal into a high-precision digital signal. Optionally, a filter (such as...) can also be configured. Figure 2 The SINC3 filter in the Δ-Σ modulator filters the conversion output to obtain a high-resolution digital current sample value, effectively suppressing high-frequency noise interference.

[0030] Understandable, such as Figure 2The Inv-Park transformation described above is the inverse Park transformation. The voltage vectors Uq and Ud output by the PI Tustin controller are transformed into Uα and Uβ by the Inv-Park transformation module. The principle of the Park transformation is that the d / q rotating coordinate system is synchronized with the rotor speed. Therefore, after the transformation, the d-axis control flux component and the q-axis control torque component are determined, realizing decoupled control of torque and flux (d-axis controls flux, q-axis controls torque). Therefore, the Inv-Park transformation converts the control commands (such as voltages Ud and Uq) in the d / q rotating coordinate system back to two orthogonal variables Uα and Uβ in the α / β coordinate system. The α / β coordinate system is the core transition coordinate system in the vector control (FOC) of permanent magnet synchronous motors. It is a stationary coordinate system and a key bridge connecting the three-phase coordinate system (A / B / C) and the two-phase rotating coordinate system (d / q).

[0031] like Figure 2 In the above-mentioned Inv-Clark transformation, the voltage components (Uα, Uβ) in the α / β coordinate system are converted into the three-phase fundamental voltages (Uu, Uv, Uw) in the three-phase coordinate system (U / V / W phases). The Clark transformation, on the other hand, converts the current / voltage in the three-phase coordinate system (U / V / W phases) into components in the two-phase stationary coordinate system (α / β axis).

[0032] Optionally, the Clark, Park, Inv-Park, and Inv-Clark transformations can employ the CORDIC (Coordinate Rotation Digital Computer) algorithm. The CORDIC algorithm, due to its iterative and pipelined characteristics, is suitable for FPGAs. The computational result of the CORDIC algorithm is determined by the number of iterations; the more iterations, the higher the accuracy. In this application, the number of iterations is 11, which meets the accuracy requirements.

[0033] Based on the above steps, after obtaining the three-phase fundamental voltage through Inv-Clark transformation, this application further needs to superimpose the third harmonic on the three-phase fundamental voltage to obtain the three-phase voltage. Specifically, the control unit is used to calculate the average of the maximum and minimum values ​​of the three-phase fundamental voltage as the amplitude reference; and to superimpose the amplitude reference on the fundamental voltage of each phase to obtain the three-phase voltage.

[0034] The formula for calculating the third harmonic is as follows: U=(Umax{Uu,Uv,Uw}+ Umin{Uu,Uv,Uw})÷2, Where Umax refers to the maximum value among the three-phase fundamental voltages Uu, Uv, and Uw, and Umin refers to the minimum value among the three-phase fundamental voltages Uu, Uv, and Uw.

[0035] Furthermore, after obtaining the three-phase voltage, it needs to be converted into a modulation signal to control the switching devices. The driving device of this application adopts a T-type three-level topology to control the three-phase current. The T-type three-level topology has three output levels: 0VDC, Udc / 2, and -Udc / 2. The aforementioned unipolar SPWM algorithm can achieve better harmonic performance and lower electromagnetic interference (EMI). The output pulse voltage waveform alternates between 0 and +Udc / 2, or between 0 and -Udc / 2, which is half the voltage variation of bipolar SPWM, resulting in a lower voltage change rate (dv / dt), making the output voltage closer to a sinusoidal waveform and effectively improving sinusoidality. Thus, the improved sinusoidality reduces electromagnetic interference; the reduced output voltage change rate dv / dt also significantly reduces the reflected voltage of long-line transmission. Here, Udc is the DC bus voltage. In addition, the superimposed third harmonic topology of this application can effectively improve the utilization rate of the bus voltage compared to the original SPWM algorithm alone.

[0036] Furthermore, based on the modulation signal determined by the aforementioned SPWM algorithm, based on Figure 1 The inverter circuit shown includes a first switching device, a second switching device, a third switching device, and a fourth switching device in each phase arm of the T-type three-level inverter circuit. The first end of the second and third switching devices connected in series is connected to the midpoint of the capacitor (the bus mid-voltage point MV) to obtain the mid-voltage, and the second end is connected to the connection point between the first and fourth switching devices.

[0037] like Figure 1 The high voltage of the bus is HV, and the power supply section uses PFC power output to ensure the stability of the power output. Three sets of large capacitors are connected in series and then in parallel to obtain the medium voltage. The high voltage output is controlled by the first and third switches of the bridge arm, and the medium voltage output is controlled by the second and fourth switches of the bridge arm.

[0038] Optionally, the above-mentioned T-type three-level inverter circuit can use SiC switching transistors, with 4 SiC transistors controlling the output voltage of each phase, for a total of 12 switching transistors across the three phases.

[0039] The control unit is specifically configured to, based on the modulation signal, switch the on / off states of the first and third switching devices during the positive half-cycle of the sine wave of each phase, so that the first and third switching devices are in a high-frequency switching state; and switch the on / off states of the second and fourth switching devices during the negative half-cycle of the sine wave of each phase, so that the second and fourth switching devices are in a high-frequency switching state. This achieves a three-level output, ensuring that the voltage of each phase switches between +Udc / 2 and 0 levels during the positive half-cycle and between -Udc / 2 and 0 levels during the negative half-cycle. Based on a unipolar SPWM algorithm, this effectively reduces switching losses and improves the quality of the output sine wave.

[0040] Optionally, the driver will monitor the high voltage, medium voltage, current output, and three-phase current output of the bus in real time. When faults such as overvoltage, undervoltage, overcurrent, phase loss, or open circuit occur, the driver will enter a fault state and stop outputting three-phase voltage.

[0041] Optionally, the carrier frequency of the unipolar SPWM algorithm is 10kHz.

[0042] The aforementioned unipolar SPWM (sinusoidal pulse width modulation) algorithm is a pulse width modulation technique with a single output voltage polarity within half a cycle, switching only between 0 and a certain fixed level. Its core is to generate a unipolar pulse sequence equivalent to a sine wave by controlling the high-frequency on / off of the switching transistor.

[0043] Based on the above embodiments, there is a certain delay during the switching process of the switching transistors. To prevent short circuits in the bus power supply and ensure that the first and third switching transistors, or the second and fourth switching transistors, or the first and fourth switching transistors, cannot conduct simultaneously, a certain dead time is added. This dead time refers to the short period of non-conductivity artificially inserted when the complementary switches of the upper and lower bridge arms commutate. However, increasing the dead time will shorten the effective conduction time, causing current distortion, increased harmonics, torque pulsation, and deterioration in performance at low speeds. To ensure that the motor can output with high precision across the entire speed range from low to high speeds, dead time compensation is required.

[0044] In one example, the control unit is further configured to determine, based on the current sampling signal collected from the output terminal of each phase arm, whether the phase power is operating in the positive half-cycle, to increase the voltage of the phase power by a compensation value, or the phase power is operating in the negative half-cycle, to decrease the voltage of the phase power by a compensation value.

[0045] Optionally, the switching device in this application is a SiC switching transistor.

[0046] In one example, the hardware and control parameters can be set as follows: Bus voltage Udc = 400V (T-type three-level output range: (-Udc / 2, +Udc / 2), i.e. (-200V, +200V); Dead time Tdead = 2μs (the minimum safe time to avoid bus short circuits due to SiC switch high-frequency characteristic adaptation). Unipolar SPWM carrier frequency fc=10KHz (carrier period Tcarrier=1 / fc=100μs); The current sampling uses a Sigma-Delta chip to acquire the three-phase output current (ia, ib, ic) with a precision of 16-bit fixed-point numbers; Furthermore, if the three-phase voltages after harmonic superposition (the three-phase fundamental voltages output by Inv-Clark after the third harmonic injection) are set to Uu_pre = 129.9V, Uv_pre = -129.9V, and Uw_pre = -129.9V; since in unipolar SPWM, the dead time will shorten the effective conduction time of the switching transistors, resulting in a decrease in the equivalent voltage, the compensation value needs to offset this voltage loss. Therefore, the calculation logic for the dead time compensation value can be derived based on the proportion of the dead time to the carrier period, thus deriving the voltage compensation amount ΔU.

[0047] For example, the compensation value ΔU can be expressed as ΔU = (Tdead / Tcarrier) × (Udc / 2) = 4V. Further, in the positive half-cycle: the sampling current ix > 0 (x = a / b / c), the dead zone causes the effective voltage to be too low, requiring an additional compensation value ΔU; in the negative half-cycle: the sampling current ix < 0, the dead zone causes the effective voltage to be too high, requiring a subtraction of the compensation value ΔU; optionally, in the zero-current region (|ix| < 0.1A, engineering tolerance threshold), the original voltage is maintained to avoid incorrect compensation.

[0048] Taking U-phase compensation as an example, assuming the U-phase current sampling value ia = 8A > 0, then U-phase is in the positive half-cycle, and a compensation value ΔU of 133.9V needs to be added on top of the original preset voltage Uu_pre. Furthermore, the coordinated operation of the switching devices of the U-phase bridge arm is as follows: during the positive half-cycle of U-phase, the first switching device (upper bridge arm) and the second switching device (middle bridge arm) operate at high frequency. During the dead zone, both transistors are turned off. The added compensation value effectively extends the conduction time of the first and third switching devices, offsetting the voltage drop caused by the dead zone.

[0049] Optional, such as Figure 1 The inverter also includes a sampling resistor and a filter circuit. Each phase output terminal of the T-type three-level inverter circuit is connected to the filter circuit through a sampling resistor, and the output terminal of the filter circuit is connected to the three-phase windings of the motor.

[0050] The sampling resistor is used to detect the output current of each phase in real time and feed the detection signal back to the control unit to realize closed-loop control; the filter circuit consists of inductors and capacitors and is used to filter out high-frequency harmonic components to ensure that the voltage waveform input to the motor is closer to the ideal sine wave, thereby reducing the noise and torque pulsation during motor operation.

[0051] Optionally, the inverter further includes a contactor; the contactor is disposed between the filter circuit and the three-phase windings of the motor.

[0052] The contactor is used to control the connection and disconnection between the filter circuit and the three-phase winding of the motor. It cuts off the power supply to the motor during the initial startup of the equipment or during fault protection to ensure system safety. During normal operation, it closes to allow the filtered voltage to be connected to the motor. Then, the three-phase output of the driver is output through the contactor control. The contactor will only close when the driver is in a ready state. When the driver detects a fault, it will automatically disconnect the contactor to ensure that its own output does not interfere with the output of the normal driver.

[0053] Based on the above embodiments, see Figure 3 The diagram shows a control method flowchart for a T-type three-level inverter circuit. This application also provides a control method for a T-type three-level inverter circuit. The T-type three-level inverter circuit has its input terminal connected to a DC source and its output terminal connected to the windings of a motor. The method includes: S301. Based on a given reference value and a feedback signal, the PI Tustin controller outputs voltage vector Uq and voltage vector Ud, wherein the feedback signal is a signal determined based on the sampling signal collected from the output terminal of each phase arm of the T-type three-level inverter circuit. S302. Obtain the motor control signal, and decompose the voltage vector Uq and the voltage vector Ud into three-phase fundamental voltages through Inv-Park transformation and Inv-Clark transformation. The motor control signal is a signal indicating the motor speed. S303. The three-phase voltage obtained by superimposing the third harmonic on the three-phase fundamental voltage is used to generate a modulation signal through a unipolar SPWM algorithm, and the switching devices of each phase bridge arm in the T-type three-level inverter circuit are driven based on the modulation signal.

[0054] Based on steps S101-S103 above, this application employs a T-type three-level inverter circuit combined with a unipolar SPWM algorithm. The output pulse voltage waveform alternates between 0 and +Udc / 2, or between 0 and -Udc / 2, reducing the voltage variation by half compared to bipolar SPWM. This results in a lower voltage change rate (dv / dt), making the output voltage closer to a sinusoidal waveform and effectively improving sinusoidality. This improved sinusoidality reduces electromagnetic interference; the lower output voltage change rate (dv / dt) also significantly reduces reflected voltage over long-distance transmission. Simultaneously, by introducing third harmonic injection, the DC bus voltage utilization rate is further improved, enhancing motor operating efficiency. Furthermore, the unipolar SPWM modulation strategy significantly reduces the switching frequency of switching devices, decreasing switching losses and suppressing electromagnetic interference. The closed-loop control mechanism relies on real-time sampling feedback to ensure current tracking accuracy and improve the system's dynamic feedback performance, ensuring stable motor operation over a wide speed range.

[0055] In one possible implementation, in step S301, the feedback signal is determined based on the sampling signal collected from the output terminal of each phase bridge arm of the T-type three-level inverter circuit. The sampling signal collected from the sampling terminal is converted into a three-phase current through an analog-to-digital converter, and then subjected to Clark transformation and Park transformation based on the motor control signal to obtain the current feedback values ​​Iq and Id.

[0056] Then, the PI Tustin controller compares Iq and Id with a given reference value to adjust the output voltage vectors Uq and Ud.

[0057] In one possible implementation, in step S303 above, the three-phase voltage obtained by superimposing the third harmonic on the three-phase fundamental voltage can be obtained by calculating the average of the maximum and minimum values ​​of the three-phase fundamental voltage as an amplitude reference; and superimposing the amplitude reference on the fundamental voltage of each phase to obtain the three-phase voltage.

[0058] In one possible implementation, the method further includes determining, based on the current sampling signal collected from the output terminal of each phase arm, whether the phase voltage is operating in the positive half-cycle, to increase the compensation value of the phase voltage, or the phase voltage is subtracted from the compensation value of the phase voltage if it is operating in the negative half-cycle.

[0059] In one possible implementation, each phase arm of the T-type three-level inverter circuit includes a first switching device, a second switching device, a third switching device, and a fourth switching device; wherein, the first end of the second and third switching devices connected in series is connected to the midpoint of a capacitor, and the second end is connected to the connection point between the first and fourth switching devices. Step S303, driving the switching devices of each phase arm in the T-type three-level inverter circuit based on the modulation signal, includes: based on the modulation signal, switching the on / off state of the first and third switching devices during the positive half-cycle of the sine wave of each phase, and switching the on / off state of the second and fourth switching devices during the negative half-cycle of the sine wave of each phase.

[0060] Based on the above embodiments, see Figure 4 The present application also provides a control system for a high-temperature gas-cooled reactor control rod, characterized in that it includes a redundant coil motor and two sets of drive devices as described in any of the above claims, wherein the output terminal of the T-type three-level inverter circuit of each drive device is correspondingly connected to one set of coils in the redundant coil motor.

[0061] The redundant coil motor has two sets of coils that are independently powered and serve as backups for each other. When one set of coils or its corresponding drive device fails, the control system automatically switches to start the other set of coils that are working properly and the drive device connected to them.

[0062] This application also provides corresponding devices and computer storage media for implementing the solutions provided in this application.

[0063] The device includes a memory and a processor. The memory stores instructions or code, and the processor executes the instructions or code to enable the device to perform a control method for a T-type three-level inverter circuit as described in any embodiment of this application.

[0064] The computer storage medium stores code. When the code is executed, the device running the code implements a control method for a T-type three-level inverter circuit as described in any embodiment of this application.

[0065] In the embodiments of this application, the terms "first" and "second" (if they exist) are used only as name identifiers and do not represent the order of first and second.

[0066] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that all or part of the steps in the methods of the above embodiments can be implemented by means of software plus a general-purpose hardware platform. Based on this understanding, the technical solution of this application can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as a read-only memory (ROM) / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, a server, or a network communication device such as a router) to execute the methods described in various embodiments or some parts of the embodiments of this application.

[0067] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on its differences from other embodiments. In particular, the apparatus embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions in the method embodiments. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without creative effort.

[0068] The above description is merely an exemplary implementation of this application and is not intended to limit the scope of protection of this application.

Claims

1. A driving device, characterized in that, It includes an inverter and a control unit; the inverter adopts a T-type three-level inverter circuit, the input terminal of the inverter is connected to the DC bus, and the output terminal is connected to the motor winding; the output terminal of the control unit is connected to the switching device of the T-type three-level inverter circuit, and the sampling terminal of the control unit is connected to the output terminal of each phase arm of the T-type three-level inverter circuit; The control unit is used to output voltage vectors Uq and Ud based on a given reference value and a feedback signal via a PI Tustin controller. The feedback signal is determined based on the sampling signal collected from the output terminal of each phase arm of the T-type three-level inverter circuit. It also acquires a motor control signal and decomposes the voltage vectors Uq and Ud into three-phase fundamental voltages using Inv-Park and Inv-Clark transformations. The motor control signal is a signal indicating the motor speed. Finally, it generates a modulation signal by superimposing the third harmonic on the three-phase fundamental voltages using a unipolar SPWM algorithm, and drives the switching devices of each phase arm in the T-type three-level inverter circuit based on the modulation signal.

2. The device according to claim 1, characterized in that, The control unit is specifically used to convert the sampling signal collected from the sampling terminal into a three-phase current through an analog-to-digital converter, and then obtain current feedback values ​​Iq and Id by passing them through Clark transformation and Park transformation based on the motor control signal. The PI Tustin controller compares Iq and Id with a given reference value to adjust the output voltage vector Uq and voltage vector Ud.

3. The device according to claim 1, characterized in that, The control unit is specifically used to calculate the average of the maximum and minimum values ​​of the three-phase fundamental voltages as an amplitude reference; and to superimpose the amplitude references on the fundamental voltages of each phase to obtain the three-phase voltages.

4. The device according to claim 1, characterized in that, The control unit is further configured to determine, based on the current sampling signal collected from the output terminal of each phase bridge arm, whether the phase power is operating in the positive half-cycle, to increase the voltage of the phase power by a compensation value, or the phase power is operating in the negative half-cycle, to decrease the voltage of the phase power by a compensation value.

5. The device according to claim 1, characterized in that, Each phase arm of the T-type three-level inverter circuit includes a first switching device, a second switching device, a third switching device, and a fourth switching device; wherein, the first end of the second and third switching devices connected in series is connected to the midpoint of the capacitor, and the second end is connected to the connection point between the first and fourth switching devices; The control unit is configured to switch the on / off states of the first and third switching devices during the positive half-cycle of the sine wave of each phase, and switch the on / off states of the second and fourth switching devices during the negative half-cycle of the sine wave of each phase, based on the modulation signal.

6. The device according to claim 5, characterized in that, The carrier frequency of the unipolar SPWM algorithm is 10kHz.

7. The device according to claim 1, characterized in that, The inverter also includes a sampling resistor and a filtering circuit; Each phase output terminal of the T-type three-level inverter circuit is connected to the filter circuit through a sampling resistor, and the output terminal of the filter circuit is connected to the three-phase windings of the motor.

8. The device according to claim 1, characterized in that, The inverter also includes a contactor; the contactor is disposed between the filter circuit and the three-phase windings of the motor.

9. A control method for a T-type three-level inverter circuit, characterized in that, Used in a T-type three-level inverter circuit, the input terminal of the T-type three-level inverter circuit is connected to a DC source, and the output terminal is connected to the winding of a motor; Based on a given reference value and a feedback signal, the PI Tustin controller outputs voltage vectors Uq and Ud, wherein the feedback signal is a signal determined based on the sampling signal collected from the output of each phase arm of the T-type three-level inverter circuit. The motor control signal is acquired, and the voltage vectors Uq and Ud are decomposed into three-phase fundamental voltages through Inv-Park and Inv-Clark transformations. The motor control signal is a signal indicating the motor speed. The three-phase voltage obtained by superimposing the third harmonic on the three-phase fundamental voltage is used to generate a modulation signal through a unipolar SPWM algorithm. Based on the modulation signal, the switching devices of each phase bridge arm in the T-type three-level inverter circuit are driven.

10. A control system for control rods in a high-temperature gas-cooled reactor, characterized in that, The device includes a redundant coil motor and two sets of drive devices as described in any one of claims 1 to 8, wherein the output terminal of the T-type three-level inverter circuit of each drive device is connected to one set of coils in the redundant coil motor.

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