Analog front end circuit based on common mode dynamic tracking power rail technique

Abstract

This invention relates to the field of analog front-end technology and discloses an analog front-end circuit based on common-mode dynamic tracking power rail technology. The circuit includes: a common-mode dynamic tracking power rail generation module for capturing power frequency interference signals from the power supply or ground line in the environment and generating power rails that dynamically track changes in the common-mode signal; a low-noise analog front-end for capacitively coupled differential input of weak signals and outputting amplified analog signals; and a common-mode shielding structure for eliminating layout parasitic effects. This invention, through the structure of the common-mode dynamic tracking power rail, enables all nodes in the analog front-end amplifier to dynamically follow the common-mode signal, thereby effectively improving the common-mode input impedance of the operational amplifier and suppressing the common-mode signal amplitude at the differential output, thus improving the intrinsic common-mode rejection ratio of the operational amplifier. Simultaneously, the common-mode dynamic tracking power rail technology has the advantages of low power consumption, small area, and applicability to multi-channel analog front-end chips.

Description

Technical Field

[0001] This invention relates to the field of analog front-end technology, and more specifically to an analog front-end circuit based on common-mode dynamic tracking power rail technology. Background Technology

[0002] Multichannel neural recording chips are widely used in brain disease monitoring and neuroscience research, but they are susceptible to common-mode interference (CMI) during in vivo measurements. To explore the complex mechanisms of brain behavior, it is essential to simultaneously monitor the electrical signals of a large number of neurons distributed across different brain regions. To meet this application requirement, multichannel neural recording chips have become the mainstream solution in various brain-computer interface fields. Therefore, much research focuses on optimizing power consumption, chip area, and analog front-end (AFE) noise in neural recording circuits to improve the number of channels per chip and signal acquisition accuracy. However, implantable devices are susceptible to significant common-mode interference generated by power line coupling noise and electromagnetic radiation, which can drastically reduce the quality of recorded signals. In multichannel neural recording chips, the total common-mode rejection ratio (T-CMRR) is determined by the electrode common-mode rejection ratio (E-CMRR) and the intrinsic common-mode rejection ratio (I-CMRR). The electrode common-mode rejection ratio is determined by the input impedance matching between the neural acquisition electrodes and the analog front-end, while the intrinsic common-mode rejection ratio is related to the degree of suppression of common-mode signals by the analog front-end's own circuitry.

[0003] Some traditional methods for improving the common-mode rejection ratio (CMRR) of neural signal acquisition chips are as follows: 1. Common-mode replication (CM-REP): This technique extracts the common-mode signal from the input terminal and biases it against the internal common-mode feedback of the op-amp, thereby improving the op-amp's intrinsic CMRR. This method is very effective in dual-electrode biosignal detection systems, such as ECG systems, but it is not suitable for multi-channel neural signal acquisition systems. 2. Pre-amp: Adding an additional independent op-amp before the analog front-end ensures electrode impedance-input impedance matching and improves T-CMRR. However, the independent op-amp introduces additional noise, and its gain still has a mismatch. 3. Chopper-stabilization: This technique ensures impedance matching through pre-chopping and optimizes the circuit's own mismatch and noise. However, chopping significantly reduces the input impedance. The above methods are insufficient to simultaneously achieve the design goals of a high-performance analog front-end circuit that satisfies "high input impedance," "high CMRR," and "suitability for multi-channel neural signal acquisition systems." Summary of the Invention

[0004] To address the technical challenge of simultaneously achieving high input impedance, high common-mode rejection ratio, and suitability for multi-channel neural acquisition systems using existing technologies, this invention provides an analog front-end circuit based on common-mode dynamic tracking power track technology. The technical solution is as follows:

[0005] The common-mode dynamic tracking power rail generation module is used to capture power frequency interference signals from the power supply or ground wire in the environment and generate power rails that dynamically track changes in the common-mode signal.

[0006] A low-noise analog front end is used for capacitively coupled differential input of weak signals and output of amplified analog signals.

[0007] Common-mode shielding structure, used to eliminate layout parasitic effects;

[0008] The power rail generated by the common-mode dynamic tracking power rail generation module supplies power to the amplifier in the low-noise analog front-end; the low-noise analog front-end has a gain of 40dB in a bandwidth of 0.5Hz-10kHz and an in-band equivalent input noise of 2.48μV_rms; the common-mode shielding structure includes an on-chip resistor voltage divider, a unity-gain drive buffer, and a common-mode shielding layer.

[0009] Furthermore, the common-mode dynamic tracking power rail generation module includes a common-mode extraction module and a power rail generation module. The common-mode extraction module performs DC bias and passive common-mode bias; the power rail generation module provides power rails.

[0010] Furthermore, the DC bias and passive common-mode bias are specifically as follows: the reference current provided by the on-chip bandgap reference source is input, and the DC bias voltages of 0.15V and 1.35V are output. Then, the DC bias voltages of 0.15V and 1.35V and the common-mode signal collected by the common-mode electrode are superimposed through a pseudo resistor and a capacitor to obtain the common-mode signals with DC bias: V_BL and V_BH.

[0011] Furthermore, the input terminal of the power rail generation module is connected to the output terminal of the common mode extraction module, inputting a common mode signal with DC bias, and the output terminal is connected to an external capacitor to output power rails VDD_IA and VSS_IA. The power rails VDD_IA and VSS_IA provide current drive and synchronously track changes in the common mode signal.

[0012] Furthermore, the low-noise analog front-end inputs the weak signals VINP and VINN acquired by the differential electrodes, and outputs the analog signals VOUTP and VOUTN after being amplified by 40dB. Its power supply level is VDD_IA and its ground level is VSS_IA. All internal nodes dynamically track the common-mode signal.

[0013] Furthermore, the dynamic tracking of the common-mode signal specifically involves: VDD_IA and VSS_IA synchronously and dynamically tracking the common-mode signal, and all nodes inside the low-noise analog front-end also synchronously and dynamically tracking the common-mode signal. The differential output of its analog signals VOUTP and VOUTN eliminates the common-mode signal, thereby improving the intrinsic common-mode rejection ratio. The input coupling capacitor has the same magnitude of common-mode signal on both sides, thereby improving the common-mode input impedance.

[0014] Furthermore, the on-chip resistor voltage divider and unity-gain drive buffer in the common-mode shielding structure are specifically as follows: VDD_IA and VSS_IA are divided by two on-chip resistors of the same size, and the common-mode tracking reference signal VCM_IA is provided by the unity-gain drive buffer.

[0015] Furthermore, the common-mode shielding structure specifically comprises: on the layout, the input terminal of the analog front-end amplifier uses metal layer M6 for routing, and its upper metal layer M7, lower metal layer M5, and vias VIA5 and VIA6 between them surround the signal line to form a metal shielding layer, and is driven by the common-mode tracking reference signal VCM_IA to eliminate the parasitic capacitance of the signal line to the substrate.

[0016] Beneficial effects:

[0017] This invention effectively improves the common-mode input impedance and common-mode rejection ratio of the analog front-end amplifier circuit by using a common-mode dynamic tracking power rail for power supply. Compared with traditional common-mode replication, pre-amplification and chopping stabilization schemes, it has advantages such as high T-CMRR, high common-mode input impedance and low noise, and is suitable for multi-channel neural acquisition systems. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the overall implementation of the analog front-end circuit based on common-mode dynamic tracking power rail technology.

[0019] Figure 2 This is a schematic diagram of a common-mode dynamic tracking power track generation module, which consists of a mode extraction module and a power track generation module.

[0020] Figure 3 This is a schematic diagram of a low-noise analog front-end based on capacitively coupled input and an inverter structure.

[0021] Figure 4 This is a schematic diagram of the common-mode shielding layer in a common-mode shielding structure.

[0022] Figure 5 Common-mode power rail gain frequency response diagram of the module for generating common-mode dynamic tracking power rails;

[0023] Figure 6 The frequency response diagram of the low-noise analog front end;

[0024] Figure 7 This is a comparison chart of the total mode rejection ratio of the analog front-end circuit based on common-mode dynamic tracking power rail technology when the common-mode dynamic tracking power rail is on and off.

[0025] Figure 8 This is a comparison diagram of the equivalent input noise of the analog front-end circuit based on common-mode dynamic tracking power rail technology when the common-mode dynamic tracking power rail is on and off.

[0026] Figure 9 This is a comparison graph showing the common-mode input impedance of an analog front-end circuit based on common-mode dynamic tracking power rail technology when the common-mode dynamic tracking power rail is on and off. Detailed Implementation

[0027] The specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are for illustration and explanation only and are not intended to limit the present invention.

[0028] like Figure 1 As shown, an analog front-end circuit based on common-mode dynamic tracking power rail technology of the present invention includes the following structure:

[0029] A common-mode dynamic tracking power rail generation module is provided. The input of the power rail generation module is connected to an external common-mode signal acquisition electrode to collect the common-mode signal of the environment in which the electrode is located. The output of the power rail generation module generates power rails VDD_IA and VSS_IA with DC offsets of 1.35V and 0.15V respectively. The common-mode signal collected by the common-mode acquisition electrode is coupled on them. The differential-mode signal of the two is still a stable 1.2V to supply power to the front-end circuit.

[0030] The low-noise analog front end has a capacitively coupled differential input to sense weak signals on the sensing electrodes and outputs an analog signal amplified by the front end. It has a magnification of 40dB in a bandwidth of 0.5Hz-10kHz and an in-band equivalent input noise of 2.48μV_rms.

[0031] The common-mode shielding structure incorporates a voltage divider and unity-gain drive buffer in each analog front-end to generate a reference voltage for dynamically tracking the common-mode signal. On the layout, the input-sensitive nodes on the amplifier are shielded by a metal layer and driven by the reference voltage to suppress the decrease in common-mode rejection ratio caused by the parasitic capacitance of the input to the substrate.

[0032] like Figure 2 As shown, the common-mode dynamic tracking power track generation module of the present invention specifically includes:

[0033] The common-mode extraction module takes as input the environmental common-mode signal collected by the common-mode interference acquisition electrode and outputs common-mode signals V_BH and V_BL with DC bias of 1.35V and 0.15V respectively.

[0034] The power rail generation module takes V_BH and V_BL as inputs and outputs power rails VDD_IA and VSS_IA with driving capability. The voltage gain from V_BH to VDD_IA and from V_BL to VSS_IA is 1, so the power rails VDD_IA and VSS_IA can completely replicate the amplitude and frequency of the DC bias and common-mode signals.

[0035] like Figure 3 As shown, the specific structure of the low-noise analog front-end in this invention is as follows:

[0036] The analog front-end operational amplifier adopts a capacitively coupled architecture, with differential inputs V_IP and V_IN, and differential outputs V_OP and V_ON.

[0037] Common-mode feedback has inputs to the differential outputs V_OP and V_ON of the op-amp, and VCM_IA obtained by voltage division of VDD_IA and VSS_IA. Its DC bias point is 0.75V, and its output is V_CMFB.

[0038] The unity-gain drive buffer has VCM_IA as its input. The inverting input and output terminals of the buffer are connected in a unity-gain configuration and are used to drive a common-mode shielded structure.

[0039] The current mirror takes the bias voltages V_BN and V_BP from the external bias circuit as inputs and outputs the total current of the front-end circuit.

[0040] like Figure 4 As shown, the specific structure of the common-mode shielding structure of the present invention is as follows:

[0041] The signal path is drawn using metal layer M6, and the shielding layer is formed by metal layers M7, M5, and vias VIA5 and VIA6 between M5 and M7.

[0042] The working principle of the analog front-end circuit based on common-mode dynamic tracking power rail technology proposed in this invention is as follows:

[0043] First, the common-mode acquisition electrode on the common-mode dynamic tracking power rail generation module captures the common-mode signal in the system's operating environment, including the amplitude and frequency of the common-mode signal. This signal is then coupled to the high-impedance nodes V_BH and V_BL through capacitor C_C on the common-mode signal coupling path. Simultaneously, a fixed current bias and resistor generate two fixed DC biases, 1.35V and 0.15V respectively. These DC biases are transmitted to the nodes V_BH and V_BL through pseudo-resistors P_R, thus forming signals of "1.35V / 0.15V DC bias + common-mode signal" on V_BH and V_BL respectively, which are then input to the power rail generation module. Internally, the power rail generation module uses NMOS and PMOS input pairs to amplify the signals of V_BH and V_BL with unity gain, forming power rails VDD_IA and VSS_IA that can dynamically track the common-mode signal with driving capability. Their voltage difference is always 1.2V, which is used to supply power to the analog front-end circuit.

[0044] The low-noise analog front-end acquires a weak differential signal at its input electrodes, and the DC offset from the external environment is isolated through capacitively coupled inputs. The main amplification structure of the analog front-end is an inverter-type amplifier, using PMOS and NMOS transistors to form two pairs of input transistors, improving the front-end's transconductance and reducing noise. Simultaneously, the output stage employs cross-coupled transistors, increasing output impedance and further enhancing open-loop gain. The analog front-end is powered by VDD_IA and VSS_IA. Since VDD_IA and VSS_IA dynamically follow the common-mode signal changes in the environment, all nodes in the front-end dynamically follow these changes. Internally, a resistor divides VDD_IA and VSS_IA to obtain VCM_IA, and a common-mode feedback amplifier A_CMFB controls a PMOS current mirror to correct the DC operating point of the differential output to VCM_IA. Furthermore, a pseudo-resistor R_P feeds back the common-mode point of the output to the input nodes of the front-end, ensuring they also operate at VCM_IA, thus achieving the maximum input / output dynamic range. The gain of the front-end is determined by the ratio of the input capacitor C_IN to the feedback capacitor C_FB, which is 40dB. Simultaneously, the feedback capacitor also serves to transmit the common-mode signal. Due to the existence of dynamic power rails, the outputs V_OP and V_ON of the analog front-end dynamically follow the common-mode signal, which is transmitted to the high-impedance input node of the analog front-end through the feedback capacitor C_FB. Therefore, for the input capacitor C_IN, the common-mode signals on both sides are of the same magnitude and change synchronously, thereby suppressing the common-mode current and improving the common-mode input impedance. The dynamic common-mode following of the outputs V_OP and V_ON also eliminates the common-mode signal in the differential output, resulting in a high common-mode rejection ratio (CMRR) output.

[0045] In the common-mode shielding structure, in order to further reduce the impact of parasitic capacitance between the analog front-end input terminal and the substrate, the input terminal of the analog front-end amplifier uses metal layer M6 for routing on the layout. The upper metal layer M7, the lower metal layer M5, and the vias VIA5 and VIA6 between them surround the signal line to form a metal shielding layer. The common-mode tracking reference signal VCM_IA is used for driving, thus eliminating the parasitic capacitance of the signal line to the substrate.

[0046] The common-mode dynamic tracking power track generation module output in this embodiment of the invention is as follows: Figure 5 As shown in the figure, the gain of the common-mode signal to the dynamic power rails VDD_IA and VSS_IA acquired in the actual test is clearly visible. It can be seen that the gain remains at 0dB within the effective bandwidth, which means that the power rails dynamically follow the changes of the common-mode signal very well.

[0047] The frequency response test diagram of the low-noise analog front-end in this embodiment of the invention is as follows: Figure 6 As shown in the figure, the input-output differential gain, power supply-output gain, and common-mode-output gain of the low-noise analog front-end are displayed. It can be seen that the front-end provides a gain of 40dB, and its power supply rejection ratio and intrinsic common-mode rejection ratio at the power frequency interference frequency are 100dB and 117dB, respectively.

[0048] The total mode rejection ratio (TMR) test chart of the low-noise analog front-end in this embodiment of the invention is shown below. Figure 7 As shown in the figure, the effect of enabling or disabling the common-mode dynamic tracking power track on the total mode suppression ratio is illustrated in a multi-channel neural acquisition system as the number of channels of the shared reference electrode increases.

[0049] The equivalent input noise test diagram of the low-noise analog front-end in this embodiment of the invention is as follows: Figure 8 As shown in the figure, enabling the common-mode dynamic tracking power rail only increases the analog front-end equivalent input noise by 0.075 μV_rms.

[0050] The common-mode input impedance test diagram of the low-noise analog front-end in this embodiment of the invention is as follows: Figure 9 As shown in the figure, enabling the common-mode dynamic tracking power rail increases the common-mode input impedance to 50 GΩ at the power frequency interference frequency.

[0051] The working process of this invention embodiment is as follows:

[0052] The common-mode dynamic tracking power rail generation module uses common-mode acquisition electrodes to capture common-mode signals in the system's operating environment, forming power rails VDD_IA and VSS_IA with dynamic common-mode signal tracking capability. Their voltage difference remains constant at 1.2V, used to supply power to the analog front-end circuitry. The common-mode tracking capability of the common-mode dynamic tracking power rails is as follows: Figure 5 As shown, the weak differential signal is acquired at the input electrodes of the low-noise analog front-end, amplified by 40dB, and then output. Simultaneously, due to the common-mode dynamic tracking of the power supply rail, the intrinsic common-mode rejection ratio and power supply rejection ratio of the analog front-end are also improved, such as... Figure 6 As shown. In multi-channel neural signal acquisition systems, sharing a reference electrode leads to a decrease in the total mode suppression ratio (TMR), while the proposed technique enables a TMR greater than 87 dB in this scenario, such as... Figure 7 As shown. The inverter used, combined with the analog front-end circuit structure of the cross-coupled output stage, achieves a low equivalent input noise of 2.484μV_rms, as... Figure 8 As shown. Finally, due to the use of a common-mode shielding structure on the layout, the common-mode input impedance of the analog front-end was further increased to 50 GΩ, as shown. Figure 9 As shown.

[0053] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An analog front-end circuit based on common-mode dynamic tracking power rail technology, comprising: The common-mode dynamic tracking power rail generation module is used to capture power frequency interference signals from the power supply or ground wire in the environment and generate power rails that dynamically track changes in the common-mode signal. A low-noise analog front end is used for capacitively coupled differential input of weak signals and output of amplified analog signals. Common-mode shielding structure, used to eliminate layout parasitic effects; The feature is that: the power rail generated by the common-mode dynamic tracking power rail generation module supplies power to the amplifier in the low-noise analog front-end; the low-noise analog front-end has a gain of 40dB in a bandwidth of 0.5Hz-10kHz and an in-band equivalent input noise of 2.48μV_rms; the common-mode shielding structure includes an on-chip resistor voltage divider, a unity-gain drive buffer, and a common-mode shielding layer.

2. The analog front-end circuit based on common-mode dynamic tracking power rail technology as described in claim 1, characterized in that: The common-mode dynamic tracking power rail generation module includes a common-mode extraction module and a power rail generation module. The common-mode extraction module performs DC bias and passive common-mode bias; the power rail generation module provides power rails.

3. The analog front-end circuit based on common-mode dynamic tracking power rail technology as described in claim 2, characterized in that: The DC bias and passive common-mode bias are specifically as follows: the reference current provided by the on-chip bandgap reference source is input, and the DC bias voltages of 0.15V and 1.35V are output. Then, the DC bias voltages of 0.15V and 1.35V and the common-mode signal collected by the common-mode electrode are superimposed through a pseudo resistor and a capacitor to obtain the common-mode signals with DC bias: V_BL and V_BH.

4. The analog front-end circuit based on common-mode dynamic tracking power rail technology as described in claim 2, characterized in that: The input terminal of the power rail generation module is connected to the output terminal of the common mode extraction module. It inputs a common mode signal with DC bias and connects an external capacitor to the output terminal to output power rails VDD_IA and VSS_IA. The power rails VDD_IA and VSS_IA provide current drive and synchronously track changes in the common mode signal.

5. The analog front-end circuit based on common-mode dynamic tracking power rail technology as described in claim 4, characterized in that: The low-noise analog front-end inputs weak signals VINP and VINN collected by differential electrodes, and outputs analog signals VOUTP and VOUTN amplified by 40dB. Its power supply level is VDD_IA and its ground level is VSS_IA. All internal nodes dynamically track common-mode signals.

6. The analog front-end circuit based on common-mode dynamic tracking power rail technology as described in claim 5, characterized in that: The dynamic tracking of the common-mode signal specifically involves: VDD_IA and VSS_IA synchronously and dynamically tracking the common-mode signal, and all nodes inside the low-noise analog front-end also synchronously and dynamically tracking the common-mode signal. The differential output of its analog signals VOUTP and VOUTN eliminates the common-mode signal, thereby improving the intrinsic common-mode rejection ratio. The input coupling capacitor has the same magnitude of common-mode signal on both sides, thereby improving the common-mode input impedance.

7. The analog front-end circuit based on common-mode dynamic tracking power rail technology as described in claim 6, characterized in that: The on-chip resistor voltage divider and unity-gain drive buffer in the common-mode shielding structure are as follows: VDD_IA and VSS_IA are divided by two on-chip resistors of the same size, and the common-mode tracking reference signal VCM_IA is provided by the unity-gain drive buffer.

8. The analog front-end circuit based on common-mode dynamic tracking power rail technology as described in claim 7, characterized in that: The common-mode shielding structure specifically comprises: on the layout, the input terminal of the analog front-end amplifier uses metal layer M6 for routing, and its upper metal layer M7, lower metal layer M5, and vias VIA5 and VIA6 between them surround the signal line to form a metal shielding layer, and is driven by the common-mode tracking reference signal VCM_IA to eliminate the parasitic capacitance of the signal line to the substrate.

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