Phase-amplitude conversion method and device for direct digital frequency synthesizer

Abstract

This invention discloses a phase-amplitude conversion method and apparatus for a direct digital frequency synthesizer. The method includes the following steps: receiving an input phase word; performing trigone normalization on a subdivided phase field based on a trigone control field in the input phase word; using the first field of the normalized subdivided phase field as an index to look up a table, retrieving the initial sine and initial cosine values ​​corresponding to the index from a preset lookup table to obtain a coarse rotation result; generating a rotation code based on the second field of the normalized subdivided phase field; performing rotation correction on the coarse rotation result based on the rotation code to obtain a fine rotation result; and restoring the trigone control field to the final fine rotation result to obtain the final sine and cosine amplitude values. This invention can meet the high-precision requirements of phase-amplitude conversion while reducing storage requirements.

Description

Technical Field

[0001] This invention relates to the field of digital frequency synthesis technology, and in particular to a phase-amplitude conversion method and apparatus for a direct digital frequency synthesizer. Background Technology

[0002] In direct digital frequency synthesis systems, the phase-to-amplitude conversion is crucial for determining the spectral purity, phase accuracy, and system delay of the output signal. It mainly involves mapping the digital phase output by the phase accumulator to the corresponding sine or cosine amplitude value.

[0003] Traditional phase-to-amplitude conversion methods often employ lookup tables, directly mapping phase to amplitude by pre-storing complete or partial period waveform data. This method is simple and has a fixed delay, but as phase resolution or amplitude accuracy increases, the required storage capacity grows exponentially, leading to a significant increase in chip area and power consumption, making it unsuitable for high-resolution or large-scale parallel output systems.

[0004] Therefore, there is an urgent need for a phase-amplitude conversion method for direct digital frequency synthesizers that can meet high-precision requirements while reducing storage needs. Summary of the Invention

[0005] In view of the shortcomings of the prior art, the technical problem to be solved by the present invention is to provide a phase-amplitude conversion method and apparatus for a direct digital frequency synthesizer that can meet high precision requirements while reducing storage requirements.

[0006] To solve the above-mentioned technical problems, one technical solution adopted by the present invention is to provide a phase-amplitude conversion method for a direct digital frequency synthesizer, comprising the following steps: Receive the input phase word, and perform trigram normalization on the subdivided phase field based on the trigram control field in the input phase word; The first field in the normalized subdivision phase field is used as an index to look up the table. The initial sine and initial cosine values ​​corresponding to the index are read from the preset lookup table to obtain the coarse rotation result. A rotation code is generated based on the second field in the normalized subdivision phase field. The coarse rotation result is then rotated and corrected based on the rotation code to obtain a fine rotation result. Based on the octave control field, the final fine rotation result is restored to the octave to obtain the final sine amplitude value and cosine amplitude value.

[0007] Furthermore, the quagmire control field is the highest three phase fields in the input phase word, the subdivision phase field is the phase field in the input phase word excluding the quagmire control field, the first field is the predefined high-order field in the normalized subdivision phase field, and the second field is the low-order field in the normalized subdivision phase field excluding the first field.

[0008] Furthermore, the step of performing quadrant normalization on the subdivision phase field based on the quadrant control field in the input phase word includes the following sub-steps: Select the least significant bit in the trigram control field; Perform a bitwise XOR operation between the selected octet and the subdivided phase field to map all phases to the interval of the first octet, thus obtaining the normalized subdivided phase field.

[0009] Furthermore, the second field is divided evenly from the most significant bit to the least significant bit to obtain at least one level of rotation code. Each level of rotation code includes three binary digits. When the number of rotation codes is greater than one level, the step of rotating and correcting the coarse rotation result based on the rotation code to obtain the fine rotation result includes the following sub-steps: The initial sine and initial cosine values ​​in the coarse rotation result are rotated and corrected using the first-level rotation code. Each subsequent level of the rotating code is rotated and corrected in sequence. The sine and cosine values ​​of the rotated code of the next level are obtained after the rotation correction of the previous level of the rotating code. The output is a fine rotation result after rotation correction through the last level of rotation code, the fine rotation result including the intermediate value of the sine and the intermediate value of the cosine.

[0010] Furthermore, in the process of rotating and correcting the initial sine and cosine values ​​using the first-level rotating code, the correction of the initial cosine value includes the following sub-steps: Several sinusoidal rotational components are obtained by shifting and adding the initial sine value and the pre-set fixed-point value of π / 4. Based on the value of the first-level rotating code, select the target sinusoidal rotating component from several sinusoidal rotating components; Based on the highest bit in the first-level rotation code, the target sinusoidal rotation component is XORed to obtain the sinusoidal rotation correction amount. The sinusoidal rotation correction amount is added to the initial cosine value to obtain the corrected cosine value. The correction of the initial sine value includes the following sub-steps: Several cosine rotation components are obtained by shifting and adding the initial cosine value and the pre-set fixed-point value of π / 4. Based on the value of the first-level rotation code, select the target cosine rotation component from several cosine rotation components; Based on the value of the inverted highest bit in the first-level rotation code, the target cosine rotation component is XORed to obtain the cosine rotation correction amount. The cosine rotation correction is added to the initial sine value to obtain the corrected sine value.

[0011] Furthermore, in the step of correcting the sine and cosine values ​​of the previous stage rotation code after the subsequent stage rotation code correction, the correction of the cosine value obtained from the previous stage rotation code correction includes the following sub-steps: The sinusoidal rotation component calculated during the rotation correction of the previous level of the rotating code is shifted three positions to the right to obtain the secondary sinusoidal rotation component. Based on the current value of the rotation code, select the secondary target sinusoidal rotation component from several secondary sinusoidal rotation components; Based on the highest bit in the current rotation code, the secondary target sinusoidal rotation component is XORed to obtain the secondary sinusoidal rotation correction amount. The secondary sinusoidal rotation correction amount is added to the cosine value of the previous rotation code after rotation correction to obtain the cosine value of the current rotation code after correction. When correcting the sine value obtained from the previous level of rotating code correction, the following sub-steps are included: The cosine rotation component calculated during the rotation correction of the previous stage of the rotating code is shifted three positions to the right to obtain the secondary cosine rotation component. Based on the current value of the rotation code, select the secondary target cosine rotation component from several secondary cosine rotation components; Based on the value of the inverted highest bit in the current rotation code, the secondary target cosine rotation component is XORed to obtain the secondary cosine rotation correction amount. The secondary cosine rotation correction is added to the sine value after the previous rotation code rotation correction to obtain the sine value after the current rotation code correction.

[0012] Furthermore, the sinusoidal rotation component includes a first component, a second component, a third component, and a fourth component, wherein: The first component is obtained by right-shifting the product of the initial sine value and the fixed-point value of π / 4 by a preset number of bits; The second component is obtained by shifting the first component one position to the right. The third component is obtained by shifting the second component one position to the right. The fourth component is obtained by adding the second component and the third component. The cosine rotation component includes a fifth component, a sixth component, a seventh component, and an eighth component, wherein: The fifth component is obtained by right-shifting the product of the initial cosine value and the fixed-point value of π / 4 by a preset number of bits. The sixth component is obtained by shifting the fifth component one position to the right. The seventh component is obtained by shifting the sixth component one position to the right. The eighth component is obtained by adding the fifth component and the sixth component.

[0013] Furthermore, the step of restoring the final fine rotation result based on the octagonal control field to obtain the final sine and cosine amplitude values ​​includes the following sub-steps: Obtain the octagonal control field from the input phase word and the median sine and cosine values ​​from the calculated fine rotation result; Based on the octave control field, the sign inversion operation and / or value exchange operation are performed on the intermediate values ​​of the sine and cosine to generate the final sine amplitude value and cosine amplitude value corresponding to the complete circle.

[0014] Furthermore, the step of performing sign inversion and / or value swapping operations on the intermediate sine and cosine values ​​based on the octave control field to generate the final sine and cosine amplitude values ​​corresponding to the complete circle includes the following sub-steps: When the limit control field is 000, the sine amplitude value is the midpoint of the sine, and the cosine amplitude value is the midpoint of the cosine. When the limit control field is 001, the sine amplitude value is the median value of the cosine, and the cosine amplitude value is the median value of the sine. When the threshold control field is 010, the sine amplitude value is the median value of the cosine, and the cosine amplitude value is the inverse value of the median value of the sine. When the threshold control field is 011, the sine amplitude value is the midpoint of the sine, and the cosine amplitude value is the inverse of the midpoint of the cosine. When the threshold control field is 100, the sine amplitude value is the inverse of the midpoint of the sine, and the cosine amplitude value is the inverse of the midpoint of the cosine. When the threshold control field is 101, the sine amplitude value is the inverse of the midpoint of the cosine value, and the cosine amplitude value is the inverse of the midpoint of the sine value. When the threshold control field is 110, the sine amplitude value is the inverse of the midpoint of the cosine value, and the cosine amplitude value is the midpoint of the sine value. When the threshold control field is 111, the sine amplitude value is the inverse of the midpoint of the sine, and the cosine amplitude value is the midpoint of the cosine.

[0015] To solve the above-mentioned technical problems, another technical solution adopted in this paper is: providing a phase-amplitude conversion device for a direct digital frequency synthesizer, comprising: The normalization module is used to receive the input phase word and perform trigram normalization processing on the subdivided phase field based on the trigram control field in the input phase word. The query module is used to look up the table by using the first field in the normalized subdivision phase field as an index. It reads the initial sine and initial cosine values ​​corresponding to the index from the preset lookup table to obtain the coarse rotation result. The correction module is used to generate a rotation code based on the second field in the normalized subdivided phase field, and to perform rotation correction on the coarse rotation result based on the rotation code to obtain a fine rotation result. The restoration module is used to restore the final fine rotation result based on the octagon control field to obtain the final sine amplitude value and cosine amplitude value.

[0016] The phase-amplitude conversion method and apparatus for the direct digital frequency synthesizer of the present invention have at least the following beneficial effects: The present invention adopts a method combining lookup table coarse mapping and improved super-four rotation correction. Only two small-capacity lookup tables storing the first octet waveform data are needed, and high-precision results can be approximated through subsequent multi-level rotation correction. This fundamentally overcomes the problem of exponential growth in storage capacity caused by the traditional pure lookup table scheme in order to achieve high precision, and significantly saves chip area and static power consumption. At the same time, the rotation correction effectively suppresses the errors introduced by phase truncation and limited lookup table resolution, and finally obtains high-purity, high-precision sine and cosine waveforms. The bitwise XOR operation replaces the subtraction required to calculate (π / 4-θ) in the traditional algorithm. The algorithm achieves phase normalization without arithmetic operations, completely eliminating carry delay in this step and optimizing power consumption, area, and spurious emissions. The improved super-four rotation algorithm uses shift, addition, and selector networks to simulate micro-rotations, avoiding the use of complex multipliers. It also applies common subexpression elimination technology, further reducing resource consumption and computational latency, making phase-amplitude conversion both high-speed and low-complexity, which is beneficial for increasing operating frequency and reducing power consumption. By continuously and finely correcting the coarse values ​​obtained from the lookup table through multi-stage super-four rotation units, this method can effectively compensate for phase quantization errors, approximate ideal sine / cosine function values, and thus significantly suppress high-order harmonic distortion in the signal, improving the spectral purity of the conversion result. Attached Figure Description

[0017] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a flowchart of one embodiment of the phase-amplitude conversion method for the direct digital frequency synthesizer of the present invention.

[0018] Figure 2 for Figure 1Flowchart of step S100.

[0019] Figure 3 This is a flowchart of the rotation correction of the coarse rotation result based on the rotation code.

[0020] Figure 4 for Figure 3 The flowchart for correcting the initial cosine value in step S310.

[0021] Figure 5 for Figure 3 The flowchart for correcting the initial sine value in step S310.

[0022] Figure 6 This is a structural block diagram of one embodiment of the phase-amplitude conversion device of the direct digital frequency synthesizer of the present invention. Detailed Implementation

[0023] The invention will now be further described with reference to the accompanying drawings.

[0024] Please see Figure 1 This is a flowchart of an embodiment of the phase-amplitude conversion method for the direct digital frequency synthesizer of the present invention. This embodiment includes the following steps: S100: Receive the input phase word and perform trigram normalization processing on the subdivided phase field based on the trigram control field in the input phase word.

[0025] Specifically, the quorum control field is the highest three phase bits in the input phase word, and the subdivision phase field is the phase field in the input phase word excluding the quorum control field. In this embodiment, the input phase word is 32 bits, where bits 31 to 29 are the quorum control field, and bits 28 to 12 are the subdivision phase field. Please refer to [link / reference]. Figure 2 This step S100 includes the following sub-steps: S110. Select the least significant bit in the trigram control field. In this embodiment, the least significant bit is the 29th bit.

[0026] S120. Perform a bitwise XOR operation between the selected octet and the subdivided phase field to map all phases to the interval of the first octet, obtaining the normalized subdivided phase field. The specific calculation formula is as follows: φ[28:12]=phase[28:12]⊕{17·phase

[29] } Wherein, phase

[29] represents the trigone selection bit, phase[28:12] represents the original subdivision phase field, φ[28:12] represents the normalized subdivision phase field, ⊕ represents bitwise XOR, and {17· phase

[29] } represents copying the 1-bit trigone selection bit 17 times to form an all-1 or all-0 mask.

[0027] When phase

[29] =0, the above formula gives φ[28:12]=phase[28:12], that is, no change is made; when phase

[29] =1, the above formula is equivalent to bitwise inversion: φ[28:12]=phase[28:12]⊕(2 17 -1) = (2 17 -1)-phase[28:12].

[0028] To address the issue of additional adder overhead introduced by the need for subtraction (calculating π / 4-θ) during octagonal normalization in the classic Super 4 algorithm, this invention proposes a bit-level XOR normalization preprocessing strategy that utilizes the mirror symmetry of the sine and cosine functions about the π / 4 axis in the first quadrant to directly perform logical transformation on the subdivided phase field of the original phase word. Specifically, phase

[29] and phase[28:12] are subjected to bitwise XOR operation to generate the normalized subdivided phase field φ[28:12]. Through this logical operation, when the phase is in an even octagon (i.e., the interval where π / 4-θ needs to be calculated), the XOR operation is equivalent to realizing the reverse mapping of phase complementation. This XOR operation differs from the ideal mapping by one least significant bit. However, while the symmetrical waveform generated based on the two's complement operation is mathematically perfect, in the actual model where phase truncation error exists, this absolute symmetry will amplify the periodic error law of phase quantization, and thus concentrate on specific octave points of the frequency spectrum of the output signal, forming discrete spikes. In contrast, after switching to inverse code operation, since the +1 correction is deliberately discarded, a small phase discontinuity similar to "pseudo-random perturbation" is injected precisely at the moment when the phase crosses the quadrant boundary. This asymmetric randomness disrupts the error periodicity originally caused by truncation, effectively diffuses the spurious energy concentrated at a certain frequency point into the broadband quantization background noise of the entire frequency band. This inverse code operation dominated by simple XOR operation not only eliminates a set of high-bit full adders, but also improves SFDR at the system level. This makes it possible for subsequent waveform reconstruction to not call adders to calculate physical differences, but only to control the sine and cosine swaps and sign inversion of the output amplitude according to phase

[29] to complete quadrant restoration. This design completely eliminates the addition logic unit on the critical path, realizes "arithmetic-free" phase folding, and reduces the consumption of computing resources.

[0029] It should be noted that in this scheme, phase represents the original input phase, and φ represents the phase after XOR.

[0030] S200. Obtain the coarse rotation result by looking up a table. Use the first field in the normalized subdivision phase field as an index to look up a table. Read the initial sine and initial cosine values ​​corresponding to the index from the preset lookup table to obtain the coarse rotation result.

[0031] Specifically, the first field is a predefined high-order field in the normalized subdivided phase field. In this embodiment, the predefined high-order field is bits 28 to 21, bits 20 to 12 are low-order fields, and the fields after bit 12 are truncated. This solution only performs phase-amplitude conversion on the truncated phase, so the fields after bit 12 are not considered in this solution.

[0032] S300. Obtain a fine rotation result through rotation correction. Generate a rotation code based on the second field in the normalized subdivision phase field, and perform rotation correction on the coarse rotation result based on the rotation code to obtain a fine rotation result.

[0033] Specifically, the second field is the low-order field excluding the first field in the normalized subdivision phase field. The second field is divided evenly from the most significant bit to the least significant bit to obtain at least one level of rotation code. Each level of rotation code includes three binary digits. In this embodiment, the second field consists of bits 20 to 12, and can be divided into three levels of rotation code. In this case, the number of rotation codes is greater than one level; please refer to [link to relevant documentation]. Figure 3 The specific steps for performing rotation correction on the coarse rotation result based on the rotation code to obtain the fine rotation result are as follows: S310. Correct the initial sine and initial cosine values. The initial sine and initial cosine values ​​in the coarse rotation result are corrected by rotation using the first-level rotation code.

[0034] Please see Figure 4 The correction of the initial cosine value includes the following sub-steps: S311a, Pre-calculate sinusoidal rotation components. Several sinusoidal rotation components are obtained by shifting and adding the initial sine value with a pre-set fixed-point value of π / 4.

[0035] Specifically, the sinusoidal rotation component includes a first component, a second component, a third component, and a fourth component. The first component is obtained by right-shifting the product of the initial sine value and the fixed-point value of π / 4 by a preset number of bits; the second component is obtained by right-shifting the first component by one bit; the third component is obtained by right-shifting the second component by one bit; and the fourth component is obtained by adding the second component and the third component. In this embodiment, the preset number of bits is obtained by adding the number of bits in the octet control field to the number of bits in the first field, i.e., the preset number of bits is 11 bits.

[0036] To address the issue of traditional Super 4 algorithms using multiple multiplications when implementing π / 4 and 3π / 4 multiplications, this solution employs a common subexpression elimination technique. Instead of independently calculating the four components Y1 to Y4, it first calculates the high-precision base term Y×π / 4, then directly obtains the first component Y1, the second component Y2, and the third component Y3 through shifting. For the fourth component Y4 with a coefficient of 3π / 4, it is obtained directly through a single addition operation of Y2+Y3 (i.e., 2Y3+Y3) using the mathematical relation 3π / 4=π / 4×(2+1). This simplifies the originally complex multiplication operations into a single base shift-addition tree and an additional adder, significantly reducing logic resource consumption and computational latency.

[0037] S311b: Obtain the target sinusoidal rotation component based on the first-level rotation code. Based on the value of the first-level rotation code, select the target sinusoidal rotation component from several sinusoidal rotation components. In this embodiment, the specific calculation process is as follows: Y5=Y1&(~φ

[20] ) Where Y1 represents the first component, Y5 represents the fifth candidate value, φ

[20] represents the 20th phase after normalization, & represents logical AND, and ~ represents logical NOT. When φ

[20] =0, the AND gate is open and Y5=Y1; when φ

[20] =1, the AND gate is closed and Y5=0.

[0038] Y6=φ

[20] ?(Y2:Y5) Where Y2 represents the second component, Y6 represents the sixth candidate value, and ? represents the conditional selection. When φ

[20] =1, Y6=Y2; when φ

[20] =0, Y6=Y5 (that is, the result of the previous step may be Y1 or 0).

[0039] Y7=(φ

[20] ⊕φ

[19] )?(Y3:Y4) Wherein, φ

[19] represents the 19th phase after normalization, Y3 represents the third component, Y4 represents the fourth component, and Y7 represents the seventh candidate value. First, calculate the XOR result of φ

[20] ⊕φ

[19] . If the XOR result is 1, Y7=Y3; if the XOR result is 0, Y7=Y4.

[0040] Y8=φ

[18] ?(Y7:Y6) Where Y8 represents the target sinusoidal rotation component, φ

[18] represents the 18th phase after normalization, when φ

[18] =1, Y8=Y7; when φ

[18] =0, Y8=Y6.

[0041] S311c. Determine the sinusoidal rotation correction amount. Based on the highest bit in the first-level rotation code, perform an XOR operation on the target sinusoidal rotation component to obtain the sinusoidal rotation correction amount.

[0042] Y9=φ

[20] ⊕Y8 Y9 represents the sinusoidal rotation correction amount. The positive and negative directions of rotation are determined by XORing each bit of φ

[20] with each bit of Y8. When φ

[20] =1, Y9 is equal to the bitwise inversion of Y8; when φ

[20] =0, Y9=Y8.

[0043] S311d, Calculate the corrected cosine value. Add the sine rotation correction amount to the initial cosine value to obtain the corrected cosine value.

[0044] Please see Figure 5 The correction of the initial sine value includes the following sub-steps: S312a, Pre-calculate cosine rotation components. Several cosine rotation components are obtained by shifting and adding the initial cosine value with a pre-set fixed-point value of π / 4.

[0045] Specifically, the cosine rotation component includes a fifth component, a sixth component, a seventh component, and an eighth component. The fifth component is obtained by right-shifting the product of the initial cosine value and the fixed-point value of π / 4 by a preset number of positions; the sixth component is obtained by right-shifting the fifth component by one position; the seventh component is obtained by right-shifting the sixth component by one position; and the eighth component is obtained by adding the fifth component and the sixth component.

[0046] S312b: Obtain the target cosine rotation component based on the first-level rotation code. Select the target cosine rotation component from several cosine rotation components according to the value of the first-level rotation code. The specific calculation for this step is the same as in step S311b, and will not be repeated here.

[0047] S312c. Determine the cosine rotation correction amount. Based on the value of the inverted highest bit in the first-level rotation code, perform XOR processing on the target cosine rotation component to obtain the cosine rotation correction amount.

[0048] S312d: Calculate the corrected sine value. Add the cosine rotation correction amount to the initial sine value to obtain the corrected sine value.

[0049] It should be noted that if only the first-level rotation code is divided, then step S320 is not needed. Here, the sine and cosine values ​​obtained after the first-level rotation code are the median values ​​of the sine and cosine in the fine rotation result.

[0050] S320, each subsequent level of the rotating code is rotated and corrected in sequence. The sine and cosine values ​​of the rotated code of the next level are obtained after the rotation correction of the previous level.

[0051] When correcting the cosine value obtained from the rotation correction of the previous level rotation code, the specific method is as follows: shift the sine rotation component calculated during the rotation correction of the previous level rotation code three bits to the right to obtain the secondary sine rotation component; select the secondary target sine rotation component from several secondary sine rotation components according to the value of the current rotation code; perform XOR operation on the secondary target sine rotation component according to the highest bit in the current rotation code to obtain the secondary sine rotation correction amount; add the secondary sine rotation correction amount to the cosine value after rotation correction of the previous level rotation code to obtain the cosine value after correction of the current rotation code.

[0052] When correcting the sine value obtained from the previous level of rotation code, the specific method is as follows: shift the cosine rotation component calculated during the previous level of rotation code rotation correction three bits to the right to obtain the secondary cosine rotation component; select the secondary target cosine rotation component from several secondary cosine rotation components based on the value of the current rotation code; perform XOR operation on the secondary target cosine rotation component based on the value of the inverted highest bit in the current rotation code to obtain the secondary cosine rotation correction amount; add the secondary cosine rotation correction amount to the sine value after rotation correction of the previous level of rotation code to obtain the sine value after correction of the current rotation code.

[0053] Since the rotation correction for each subsequent level is similar to the process of the first level rotation correction, the specific process will not be described in detail.

[0054] S330. Obtain the intermediate values ​​of the sine and cosine. Output the fine rotation result after rotation correction through the last level of rotation code, the fine rotation result including the intermediate values ​​of the sine and cosine.

[0055] S400. Obtain the final sine and cosine amplitude values ​​through octet restoration. Based on the octet control field, perform octet restoration on the final fine rotation result to obtain the final sine and cosine amplitude values. Specifically, obtain the octet control field from the input phase word and the intermediate sine and cosine values ​​from the calculated fine rotation result. Based on the octet control field, perform sign inversion and / or value exchange operations on the intermediate sine and cosine values ​​to generate the final sine and cosine amplitude values ​​corresponding to the complete circle.

[0056] Specifically, when the finite element control field is 000, the sine amplitude is the midpoint of the sine, and the cosine amplitude is the midpoint of the cosine; when the finite element control field is 001, the sine amplitude is the midpoint of the cosine, and the cosine amplitude is the midpoint of the sine; when the finite element control field is 010, the sine amplitude is the midpoint of the cosine, and the cosine amplitude is the inverse of the midpoint of the sine; when the finite element control field is 011, the sine amplitude is the midpoint of the sine, and the cosine amplitude is the inverse of the midpoint of the cosine; when the finite element control field is 0 ... midpoint of the cosine; when the finite element control field is 000, the sine amplitude is the midpoint of the sine, and the cosine amplitude is the midpoint of the cosine; when the finite element control field is 000, the sine amplitude is the midpoint of the sine, and the cosine amplitude When the segment value is 100, the sine amplitude is the inverse of the midpoint of the sine, and the cosine amplitude is the inverse of the midpoint of the cosine; when the quadrant control field is 101, the sine amplitude is the inverse of the midpoint of the cosine, and the cosine amplitude is the inverse of the midpoint of the sine; when the quadrant control field is 110, the sine amplitude is the inverse of the midpoint of the cosine, and the cosine amplitude is the midpoint of the sine; when the quadrant control field is 111, the sine amplitude is the inverse of the midpoint of the sine, and the cosine amplitude is the midpoint of the cosine. See Table 1 for the specific correspondence.

[0057] Table 1 Please see Figure 6 This is a structural block diagram of an embodiment of the phase-amplitude conversion device for a direct digital frequency synthesizer of the present invention. The phase-amplitude conversion device of this embodiment is used to implement the phase-amplitude conversion method of the direct digital frequency synthesizer as described in the above embodiment. Specifically, the phase-amplitude conversion device of this embodiment includes a normalization module 100, a query module 200, a correction module 300, and a restoration module 400. Wherein: The normalization module 100 is used to receive the input phase word and perform quagmire normalization processing on the subdivided phase field based on the quagmire control field in the input phase word. Specifically, the quagmire control field is the highest three phase fields in the input phase word, and the subdivided phase field is the phase field in the input phase word excluding the quagmire control field.

[0058] The query module 200 is used to look up the table by using the first field in the normalized subdivided phase field as an index, and reads the initial sine value and initial cosine value corresponding to the index from the preset lookup table to obtain the coarse rotation result.

[0059] The correction module 300 is used to generate a rotation code based on the second field in the normalized subdivision phase field, and to perform rotation correction on the coarse rotation result based on the rotation code to obtain a fine rotation result. In this embodiment, the correction module 300 includes three cascaded super-four rotation units, each of which pre-stores an 18-bit fixed-point number of π / 4. Specifically, the initial sine and initial cosine values ​​are input to the three cascaded super-four rotation units. Each super-four rotation unit receives the sine and cosine values ​​output from the previous stage, as well as the corresponding first-level rotation code, and performs rotation correction on the input amplitude value based on the corresponding rotation code. The last super-four rotation unit outputs the intermediate sine and cosine values ​​obtained after correction as the fine rotation result.

[0060] The restoration module 400 is used to restore the final fine rotation result based on the octagon control field to obtain the final sine amplitude value and cosine amplitude value.

[0061] This invention employs a combination of lookup table coarse mapping and improved super-four rotation correction. It requires only a small-capacity lookup table to store the first octet waveform data, and subsequent multi-stage rotation correction can approximate high-precision results. This fundamentally overcomes the problem of exponential growth in storage capacity caused by traditional pure lookup table schemes in achieving high precision, significantly saving chip area and static power consumption. Simultaneously, rotation correction effectively suppresses errors introduced by phase truncation and limited lookup table resolution, ultimately yielding high-purity, high-precision sine and cosine waveforms. By replacing the subtractor required to calculate (π / 4-θ) in the traditional algorithm with a bitwise XOR operation, phase normalization without arithmetic operations is achieved, completely eliminating carry delay in this step and optimizing power consumption, area, and spurious behavior. The improved super-four rotation algorithm uses shift, addition, and selector networks to simulate micro-rotations, avoiding the use of complex multipliers. It also applies common subexpression elimination technology, further reducing resource consumption and computational latency, making phase-amplitude conversion both high-speed and low-complexity, which is beneficial for increasing operating frequency and reducing power consumption. By continuously and precisely correcting the coarse values ​​obtained from the lookup table using a multi-stage super-four rotating unit, this method can effectively compensate for phase quantization errors, approximate ideal sine / cosine function values, thereby significantly suppressing high-order harmonic distortion in the signal and improving the spectral purity of the conversion result.

[0062] The above description merely illustrates preferred embodiments of the present invention and is quite specific and detailed; however, it should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the inventive concept, and these all fall within the scope of protection of the present invention. Therefore, the scope of protection of this invention should be determined by the appended claims.

Claims

1. A phase-amplitude conversion method for a direct digital frequency synthesizer, characterized in that, Includes the following steps: Receive the input phase word, and perform trigram normalization on the subdivided phase field based on the trigram control field in the input phase word; The first field in the normalized subdivision phase field is used as an index to look up the table. The initial sine and initial cosine values ​​corresponding to the index are read from the preset lookup table to obtain the coarse rotation result. A rotation code is generated based on the second field in the normalized subdivision phase field. The coarse rotation result is then rotated and corrected based on the rotation code to obtain a fine rotation result. Based on the octave control field, the final fine rotation result is restored to the octave to obtain the final sine amplitude value and cosine amplitude value.

2. The phase-amplitude conversion method for a direct digital frequency synthesizer as described in claim 1, characterized in that... The quagmire control field is the highest three phase fields in the input phase word, and the subdivision phase field is the phase field in the input phase word excluding the quagmire control field. The first field is the predefined high-order field in the normalized subdivision phase field, and the second field is the low-order field in the normalized subdivision phase field excluding the first field.

3. The phase-amplitude conversion method for a direct digital frequency synthesizer as described in claim 1, characterized in that, The step of performing quadrant normalization on the subdivision phase field based on the quadrant control field in the input phase word includes the following sub-steps: Select the least significant bit in the trigram control field; Perform a bitwise XOR operation between the selected octet and the subdivided phase field to map all phases to the interval of the first octet, thus obtaining the normalized subdivided phase field.

4. The phase-amplitude conversion method for a direct digital frequency synthesizer as described in claim 1, characterized in that, The second field is divided evenly from the most significant bit to the least significant bit to obtain at least one level of rotation code. Each level of rotation code includes three binary digits. When the number of rotation codes is greater than one, the step of rotating and correcting the coarse rotation result based on the rotation code to obtain the fine rotation result includes the following sub-steps: The initial sine and initial cosine values ​​in the coarse rotation result are rotated and corrected using the first-level rotation code. Each subsequent level of the rotating code is rotated and corrected in sequence. The sine and cosine values ​​of the rotated code of the next level are obtained after the rotation correction of the previous level of the rotating code. The output is a fine rotation result after rotation correction through the last level of rotation code, the fine rotation result including the intermediate value of the sine and the intermediate value of the cosine.

5. The phase-amplitude conversion method for a direct digital frequency synthesizer as described in claim 4, characterized in that, In the process of rotating and correcting the initial sine and cosine values ​​using the first-level rotating code, the correction of the initial cosine value includes the following sub-steps: Several sinusoidal rotational components are obtained by shifting and adding the initial sine value and the pre-set fixed-point value of π / 4. Based on the value of the first-level rotating code, select the target sinusoidal rotating component from several sinusoidal rotating components; Based on the highest bit in the first-level rotation code, the target sinusoidal rotation component is XORed to obtain the sinusoidal rotation correction amount. The sinusoidal rotation correction amount is added to the initial cosine value to obtain the corrected cosine value. The correction of the initial sine value includes the following sub-steps: Several cosine rotation components are obtained by shifting and adding the initial cosine value and the pre-set fixed-point value of π / 4. Based on the value of the first-level rotation code, select the target cosine rotation component from several cosine rotation components; Based on the value of the inverted highest bit in the first-level rotation code, the target cosine rotation component is XORed to obtain the cosine rotation correction amount. The cosine rotation correction is added to the initial sine value to obtain the corrected sine value.

6. The phase-amplitude conversion method for a direct digital frequency synthesizer as described in claim 5, characterized in that, In the step of correcting the sine and cosine values ​​of the previous stage rotation code after the subsequent stage rotation code correction, the following sub-steps are included when correcting the cosine value obtained from the previous stage rotation code correction: The sinusoidal rotation component calculated during the rotation correction of the previous level of the rotating code is shifted three positions to the right to obtain the secondary sinusoidal rotation component. Based on the current value of the rotation code, select the secondary target sinusoidal rotation component from several secondary sinusoidal rotation components; Based on the highest bit in the current rotation code, the secondary target sinusoidal rotation component is XORed to obtain the secondary sinusoidal rotation correction amount. The secondary sinusoidal rotation correction amount is added to the cosine value of the previous rotation code after rotation correction to obtain the cosine value of the current rotation code after correction. When correcting the sine value obtained from the previous level of rotating code correction, the following sub-steps are included: The cosine rotation component calculated during the rotation correction of the previous stage of the rotating code is shifted three positions to the right to obtain the secondary cosine rotation component. Based on the current value of the rotation code, select the secondary target cosine rotation component from several secondary cosine rotation components; Based on the value of the inverted highest bit in the current rotation code, the secondary target cosine rotation component is XORed to obtain the secondary cosine rotation correction amount. The secondary cosine rotation correction is added to the sine value after the previous rotation code rotation correction to obtain the sine value after the current rotation code correction.

7. The phase-amplitude conversion method for a direct digital frequency synthesizer as described in claim 5, characterized in that, The sinusoidal rotation component includes a first component, a second component, a third component, and a fourth component, wherein: The first component is obtained by right-shifting the product of the initial sine value and the fixed-point value of π / 4 by a preset number of bits; The second component is obtained by shifting the first component one position to the right. The third component is obtained by shifting the second component one position to the right. The fourth component is obtained by adding the second component and the third component. The cosine rotation component includes a fifth component, a sixth component, a seventh component, and an eighth component, wherein: The fifth component is obtained by right-shifting the product of the initial cosine value and the fixed-point value of π / 4 by a preset number of bits. The sixth component is obtained by shifting the fifth component one position to the right. The seventh component is obtained by shifting the sixth component one position to the right. The eighth component is obtained by adding the fifth component and the sixth component.

8. The phase-amplitude conversion method for a direct digital frequency synthesizer as described in claim 1, characterized in that, The step of restoring the final fine rotation result based on the octagonal control field to obtain the final sine and cosine amplitude values ​​includes the following sub-steps: Obtain the octagonal control field from the input phase word and the median sine and cosine values ​​from the calculated fine rotation result; Based on the octave control field, the sign inversion operation and / or value exchange operation are performed on the intermediate values ​​of the sine and cosine to generate the final sine amplitude value and cosine amplitude value corresponding to the complete circle.

9. The phase-amplitude conversion method for a direct digital frequency synthesizer as described in claim 8, characterized in that, The step of performing sign inversion and / or value swapping operations on the intermediate sine and cosine values ​​based on the octave control field to generate the final sine and cosine amplitude values ​​corresponding to the complete circle includes the following sub-steps: When the limit control field is 000, the sine amplitude value is the midpoint of the sine, and the cosine amplitude value is the midpoint of the cosine. When the limit control field is 001, the sine amplitude value is the median value of the cosine, and the cosine amplitude value is the median value of the sine. When the threshold control field is 010, the sine amplitude value is the median value of the cosine, and the cosine amplitude value is the inverse value of the median value of the sine. When the threshold control field is 011, the sine amplitude value is the midpoint of the sine, and the cosine amplitude value is the inverse of the midpoint of the cosine. When the threshold control field is 100, the sine amplitude value is the inverse of the midpoint of the sine, and the cosine amplitude value is the inverse of the midpoint of the cosine. When the threshold control field is 101, the sine amplitude value is the inverse of the midpoint of the cosine value, and the cosine amplitude value is the inverse of the midpoint of the sine value. When the threshold control field is 110, the sine amplitude value is the inverse of the midpoint of the cosine value, and the cosine amplitude value is the midpoint of the sine value. When the threshold control field is 111, the sine amplitude value is the inverse of the midpoint of the sine, and the cosine amplitude value is the midpoint of the cosine.

10. A phase-amplitude conversion device for a direct digital frequency synthesizer, characterized in that, include: The normalization module is used to receive the input phase word and perform trigram normalization processing on the subdivided phase field based on the trigram control field in the input phase word. The query module is used to look up the table by using the first field in the normalized subdivision phase field as an index. It reads the initial sine and initial cosine values ​​corresponding to the index from the preset lookup table to obtain the coarse rotation result. The correction module is used to generate a rotation code based on the second field in the normalized subdivided phase field, and to perform rotation correction on the coarse rotation result based on the rotation code to obtain a fine rotation result. The restoration module is used to restore the final fine rotation result based on the octagon control field to obtain the final sine amplitude value and cosine amplitude value.

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