A method for manufacturing a heterojunction cell
By optimizing the heterojunction battery fabrication process and employing plasma-enhanced chemical vapor deposition and physical vapor deposition methods, heterojunction batteries are formed by low-temperature sintering, which solves the problem of complex fabrication process and improves production efficiency and battery performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 华能(嘉峪关)新能源有限公司
- Filing Date
- 2024-11-30
- Publication Date
- 2026-06-02
AI Technical Summary
Existing heterojunction solar cell fabrication processes are numerous and complex, severely limiting production efficiency.
The fabrication steps of heterojunction solar cells were optimized, including texturing, thin film deposition, and electrode printing. Plasma-enhanced chemical vapor deposition and physical vapor deposition were used, and the heterojunction solar cells were formed by low-temperature sintering.
It simplifies the preparation process, improves production efficiency, enhances the photoelectric conversion capability and stability of the battery, and reduces material costs.
Smart Images
Figure CN122138508A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of solar cell technology and relates to a method for preparing a heterojunction solar cell. Background Technology
[0002] Improving efficiency and reducing costs are the core drivers and perennial topics of the photovoltaic industry. Among the many links in the industrial chain, cells are the core of technological progress, determining the efficiency limits of photovoltaic products. Historically, the monocrystalline PERC route was a significant turning point, making a major contribution to achieving grid parity for photovoltaic power generation. However, as its mass production performance gradually reaches its limit, with conversion efficiency reaching 23.3-23.5% and non-silicon costs around 0.15 yuan / W, the industry urgently needs to develop new cell routes with greater upgrade potential.
[0003] In recent years, with the global emphasis on renewable energy and the rapid development of the photovoltaic industry, heterojunction (HJT) cell technology has gradually gained market recognition. Heterojunction (HJT) cells have higher theoretical limit efficiency than other cell technologies, and also have advantages such as lower power temperature coefficient, higher bifaciality, lower aging degradation, and better warranty.
[0004] The fabrication of heterojunction solar cells requires strict control over parameters and quality at each stage to ensure battery performance and safety. The process typically involves material selection, material processing, positive and negative electrode coating, drying, rolling and cutting, positive and negative electrode assembly, electrolyte injection and encapsulation, encapsulation design, terminal welding, pre-charging and testing, and final encapsulation. This complex and multi-step process significantly hinders the production efficiency of heterojunction solar cells.
[0005] In summary, existing methods for fabricating heterojunction solar cells suffer from numerous steps and complex processes. Summary of the Invention
[0006] The purpose of this invention is to provide a method for fabricating heterojunction solar cells, thereby solving the technical problems of complex and multi-step processes in existing heterojunction solar cell fabrication methods. This invention simplifies the fabrication process and improves the production efficiency of heterojunction solar cells by optimizing the fabrication steps.
[0007] To achieve the above objectives, the present invention employs the following technical solution: This invention discloses a method for preparing a heterojunction solar cell, comprising the following steps: Texturing of silicon wafers; An intrinsic amorphous silicon thin film and a P-type hydrogenated amorphous silicon oxide thin film are deposited on the front side of the texturized silicon wafer to form a pn heterojunction with separated photogenerated carriers. An intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film are deposited on the back side of the silicon wafer to form a back surface field. A transparent conductive oxide thin film with conductive function is deposited on both the front and back sides of the silicon wafer; A heterojunction cell is obtained by printing grid electrodes on the front and back sides of a silicon wafer and then sintering it at a low temperature.
[0008] Furthermore, the texturing of the silicon wafer is performed as follows: Pre-clean the silicon wafers; The damaged layer on the surface of the silicon wafer is removed by chemical etching; The silicon wafers are treated by immersing them in a mixture of alkaline solution and texturing additive. Acid-base neutralization cleaning removes contaminants and residual chemicals from the surface of silicon wafers; The silicon wafers are treated with a mixture of hydrofluoric acid and nitric acid to remove organic matter, metal ions, and oxidize and etch the silicon, while also improving the roundness of the wafers.
[0009] Furthermore, the specific steps of depositing an intrinsic amorphous silicon thin film and a P-type hydrogenated amorphous silicon oxide thin film on the front side of the texturized silicon wafer are as follows: An intrinsic hydrogenated amorphous silicon oxide film and a P-type hydrogenated amorphous silicon oxide film were deposited on the front side of a texturized silicon wafer using plasma-enhanced chemical vapor deposition.
[0010] Furthermore, the thickness of the intrinsic hydrogenated amorphous silicon oxide film is 5nm to 10nm, and the thickness of the P-type hydrogenated amorphous silicon oxide film is 15nm to 20nm.
[0011] Furthermore, the specific steps of depositing an intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film on the back side of the silicon wafer are as follows: An intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film were deposited on the back side of a silicon wafer using plasma-enhanced chemical vapor deposition.
[0012] Furthermore, the thickness of the intrinsic hydrogenated amorphous silicon oxide thin film is 5 nm to 10 nm.
[0013] Furthermore, the thickness of the N-type hydrogenated amorphous silicon oxide thin film is 15 nm to 20 nm.
[0014] Furthermore, the step of depositing a transparent conductive oxide thin film layer with conductive function on both sides of the silicon wafer is as follows: A transparent conductive oxide thin film with conductive function is deposited on both sides of a silicon wafer using physical vapor deposition.
[0015] Furthermore, the printing of gate electrodes on the front and back sides of the silicon wafer is specifically as follows: The grid line electrodes are printed using screen printing technology, where a predetermined low-temperature silver paste is printed onto a transparent conductive oxide thin film layer to form a metal electrode.
[0016] Furthermore, the temperature of the low-temperature sintering is below 250 degrees Celsius.
[0017] Compared with the prior art, the present invention has the following beneficial effects: 1. This invention texturizes silicon wafers, which helps reduce light reflection loss and improve light capture efficiency, thereby increasing the photoelectric conversion capability of the battery. An intrinsic amorphous silicon thin film and a P-type hydrogenated amorphous silicon oxide thin film are deposited on the front side of the texturized silicon wafer to form a pn heterojunction with separated photogenerated carriers. The intrinsic amorphous silicon thin film serves as a transition layer, helping to improve the quality and performance of subsequently deposited films. The deposition of the P-type hydrogenated amorphous silicon oxide thin film forms the p-type portion of the pn heterojunction, together with the silicon wafer to constitute the heterojunction. This structure can effectively separate photogenerated carriers, improving the battery's conversion efficiency. An intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film are deposited on the back side of the silicon wafer to form a back surface field. The formation of the back surface field helps reduce carrier recombination on the back surface of the silicon wafer, thereby improving the battery's open-circuit voltage and short-circuit current. The deposition of the N-type hydrogenated amorphous silicon oxide thin film provides the necessary conductivity type and electrical properties for the back surface field. A transparent conductive oxide (TCO) thin film layer with conductive properties is deposited on both sides of a silicon wafer. The deposition of the TCO layer simplifies the electrical contact design between the electrodes and the silicon wafer. The TCO layer possesses good conductivity and light transmittance, serving as a carrier transport layer to effectively transfer photogenerated carriers to the electrodes. Simultaneously, the TCO layer also acts as an anti-reflection layer and protects the amorphous silicon thin film, further improving the photoelectric conversion efficiency and stability of the battery. Gate electrodes are printed on the front and back sides of the silicon wafer and then sintered at low temperature to obtain a heterojunction battery. Conductive materials such as silver paste are printed onto the TCO layer using screen printing technology, and then sintered at low temperature to form robust metal electrodes. These electrodes can effectively collect and transport photogenerated carriers, thereby realizing the battery's power output. This invention simplifies the fabrication process of heterojunction batteries by optimizing the fabrication steps, thus improving the production efficiency of heterojunction batteries. Furthermore, the heterojunction battery prepared by this invention exhibits good stability.
[0018] 2. This invention employs a double-sided symmetrical structure and a low-temperature process to reduce stress on the silicon wafer, enabling the use of thinner silicon wafers and reducing material costs. It also aligns with future requirements for thinner and more flexible silicon wafers. Attached Figure Description
[0019] Figure 1 This is a flowchart of the method of the present invention; Figure 2 This is a schematic diagram of the heterojunction battery structure of the present invention. Detailed Implementation
[0020] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0021] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0022] The present invention will now be described in further detail with reference to the accompanying drawings: See Figure 1 This invention discloses a method for preparing a heterojunction solar cell, the structure of which is as follows: Figure 2 As shown, it includes the following steps: S1. Texturing the silicon wafer, as follows: The silicon wafers are pre-cleaned to remove contaminants and oxides from their surface, preparing them for subsequent texturing. Specific concentrations and temperatures will be adjusted based on experimental conditions.
[0023] The damaged layer on the surface of the silicon wafer is removed by chemical etching to avoid cracks or breakage during subsequent texturing.
[0024] Silicon wafers are treated by immersing them in a mixture of an alkaline solution and a texturing additive. The texturing additive promotes a textured surface on the silicon wafer, increasing its reflectivity. Common texturing additives include sodium hydroxide, potassium hydroxide, and isopropanol.
[0025] Acid-base neutralization cleaning removes contaminants and residual chemicals from the surface of silicon wafers, ensuring the cleanliness and quality of the wafers.
[0026] Treating silicon wafers with a mixture of hydrofluoric acid and nitric acid removes organic matter, metal ions, and oxidizes and etches the silicon, while also improving the roundness of the wafers, which helps to improve battery efficiency.
[0027] S2. An intrinsic amorphous silicon thin film and a p-type hydrogenated amorphous silicon oxide thin film are deposited on the front side of the texturized silicon wafer to form a pn heterojunction with separated photogenerated carriers, as detailed below: An intrinsic hydrogenated amorphous silicon oxide film and a P-type hydrogenated amorphous silicon oxide film were deposited on the front side of a texturized silicon wafer using plasma-enhanced chemical vapor deposition.
[0028] Preferably, the thickness of the intrinsic hydrogenated amorphous silicon oxide film is 5 nm to 10 nm, and the thickness of the P-type hydrogenated amorphous silicon oxide film is 15 nm to 20 nm.
[0029] S3. An intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film are deposited on the back side of the silicon wafer to form a back surface field, reducing carrier recombination at the back surface. The deposition is also performed using the PECVD method, with film thicknesses ranging from 5 to 10 nm, as detailed below: An intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film were deposited on the back side of a silicon wafer using plasma-enhanced chemical vapor deposition.
[0030] Preferably, the thickness of the intrinsic hydrogenated amorphous silicon oxide thin film is 5 nm to 10 nm.
[0031] Preferably, the thickness of the N-type hydrogenated amorphous silicon oxide thin film is 15 nm to 20 nm.
[0032] S4. A transparent conductive oxide (TCO) thin film layer with conductive function is deposited on both sides of the silicon wafer. The transparent conductive oxide thin film layer is called the TCO layer, which serves as a carrier transport layer. The TCO layer not only has good conductivity but also ensures light transmittance, thereby improving the photoelectric conversion efficiency of the battery, as detailed below: A transparent conductive oxide thin film with conductive function is deposited on both sides of a silicon wafer using physical vapor deposition.
[0033] S5. Print grid electrodes on the front and back sides of the silicon wafer and perform low-temperature sintering to obtain a heterojunction solar cell, as detailed below: The grid line electrodes are printed using screen printing technology, where a predetermined low-temperature silver paste is printed onto a transparent conductive oxide thin film layer to form a metal electrode.
[0034] Preferably, the temperature of the low-temperature sintering is below 250 degrees Celsius.
[0035] See Figure 1 In another feasible embodiment of the present invention, the following modifications are made as appropriate. The steps include: Texturing silicon wafers involves etching away the damaged layer on the wafer surface and creating a textured surface structure. This structure helps reduce light reflection loss and improves light capture efficiency, thereby increasing the photoelectric conversion capability of the battery. The textured silicon wafer surface forms pyramid-shaped or similar microstructures, which can more effectively capture and trap incident light, causing it to be reflected multiple times and absorbed within the wafer.
[0036] An intrinsic amorphous silicon thin film and a p-type hydrogenated amorphous silicon oxide thin film are deposited on the front side of a texturized silicon wafer to form a pn heterojunction with separated photogenerated carriers. The intrinsic amorphous silicon thin film serves as a transition layer, helping to improve the quality and performance of subsequently deposited films. The deposition of the p-type hydrogenated amorphous silicon oxide thin film forms the p-type portion of the pn heterojunction, which together with the silicon wafer constitutes the heterojunction. The silicon wafer is typically used as an n-type semiconductor. This structure can effectively separate photogenerated carriers, namely photogenerated electrons and holes, thereby improving the conversion efficiency of the battery.
[0037] An intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film are deposited on the back side of a silicon wafer to form a back surface field. The formation of the back surface field helps to reduce carrier recombination on the back surface of the silicon wafer, thereby improving the open-circuit voltage and short-circuit current of the battery. The deposition of the N-type hydrogenated amorphous silicon oxide thin film provides the necessary conductivity type and electrical properties for the back surface field.
[0038] A transparent conductive oxide (TCO) thin film is deposited on both sides of the silicon wafer. The deposition of the TCO simplifies the electrical contact design between the electrode and the silicon wafer. The TCO layer possesses good conductivity and light transmittance, serving as a carrier transport layer to effectively transfer photogenerated carriers to the electrode. Simultaneously, the TCO layer also reduces reflection and protects the amorphous silicon thin film, further improving the photoelectric conversion efficiency and stability of the battery.
[0039] Heterojunction solar cells are obtained by printing grid electrodes on the front and back sides of a silicon wafer and then sintering them at low temperatures. The printing and sintering of the grid electrodes is the final step in cell fabrication and a crucial step in extracting the current generated inside the cell to the outside. Conductive materials such as silver paste are printed onto a TCO layer using screen printing technology, and then sintered at low temperatures to form robust metal electrodes. These electrodes can effectively collect and transport photogenerated carriers, thereby enabling the cell's energy output.
[0040] This invention simplifies the fabrication process of heterojunction solar cells by optimizing the fabrication steps, thereby improving the production efficiency. Furthermore, the heterojunction solar cells fabricated using this invention exhibit good stability.
[0041] Example 1: See Figure 1This embodiment discloses a method for preparing a heterojunction solar cell, including the following steps: S1. Texturing the silicon wafer, as follows: The silicon wafers are pre-cleaned to remove contaminants and oxides from their surface, preparing them for subsequent texturing. Specific concentrations and temperatures will be adjusted based on experimental conditions.
[0042] The damaged layer on the surface of the silicon wafer is removed by chemical etching to avoid cracks or breakage during subsequent texturing.
[0043] Silicon wafers are treated by immersing them in a mixture of an alkaline solution and a texturing additive. The texturing additive promotes a textured surface on the silicon wafer, increasing its reflectivity. Common texturing additives include sodium hydroxide, potassium hydroxide, and isopropanol.
[0044] Acid-base neutralization cleaning removes contaminants and residual chemicals from the surface of silicon wafers, ensuring the cleanliness and quality of the wafers.
[0045] Treating silicon wafers with a mixture of hydrofluoric acid and nitric acid removes organic matter, metal ions, and oxidizes and etches the silicon, while also improving the roundness of the wafers, which helps to improve battery efficiency.
[0046] S2. An intrinsic amorphous silicon thin film and a p-type hydrogenated amorphous silicon oxide thin film are deposited on the front side of the texturized silicon wafer to form a pn heterojunction with separated photogenerated carriers, as detailed below: An intrinsic hydrogenated amorphous silicon oxide film and a P-type hydrogenated amorphous silicon oxide film were deposited on the front side of a texturized silicon wafer using plasma-enhanced chemical vapor deposition.
[0047] Preferably, the thickness of the intrinsic hydrogenated amorphous silicon oxide film is 5nm~10nm, and the thickness of the P-type hydrogenated amorphous silicon oxide film is 15nm.
[0048] The conductive layer of conventional heterojunction solar cells using doped hydrogenated nanocrystalline silicon thin films is a doped amorphous silicon layer, abbreviated as a-Si:H. Its main problem is: A. Low conductivity increases the series resistance of solar cells; B. A narrow bandgap will cause some light absorption, reducing short-circuit current; C. A low Fermi level is not conducive to the formation of a higher built-in electric field and band bending.
[0049] Nanocrystalline silicon thin films are materials in which nanoscale crystalline silicon particles are encapsulated within an amorphous silicon matrix. Due to the quantum size effect, they exhibit a wide band gap, reaching 1.9 eV or even above 2.0 eV. Furthermore, their internal crystallization facilitates high-ratio doping, resulting in high electrical conductivity and a high Fermi level. The deposition process employs "three highs and one low," namely, high hydrogen dilution ratio, high power, high gas pressure, and low temperature.
[0050] This invention uses hydrogenated amorphous silicon oxide thin film, abbreviated as a-SiOx:H. The a-SiOx:H layer of this invention has a better surface passivation effect than the a-Si:H layer.
[0051] S3. Deposit an intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film on the back side of the silicon wafer to form a back surface field; reduce carrier recombination at the back surface. The deposition is also performed using the PECVD method, as detailed below: An intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film were deposited on the back side of a silicon wafer using plasma-enhanced chemical vapor deposition.
[0052] Preferably, the thickness of the intrinsic hydrogenated amorphous silicon oxide thin film is 5 nm to 10 nm.
[0053] Preferably, the thickness of the N-type hydrogenated amorphous silicon oxide thin film is 15 nm.
[0054] S4. A transparent conductive oxide (TCO) thin film layer with conductive function is deposited on both sides of the silicon wafer. The transparent conductive oxide thin film layer is called the TCO layer, which serves as a carrier transport layer. The TCO layer not only has good conductivity but also ensures light transmittance, thereby improving the photoelectric conversion efficiency of the battery, as detailed below: A transparent conductive oxide thin film with conductive function is deposited on both sides of a silicon wafer using physical vapor deposition.
[0055] S5. Print grid electrodes on the front and back sides of the silicon wafer and perform low-temperature sintering to obtain a heterojunction solar cell, as detailed below: The grid line electrodes are printed using screen printing technology, where a predetermined low-temperature silver paste is printed onto a transparent conductive oxide thin film layer to form a metal electrode.
[0056] Preferably, the temperature of the low-temperature sintering is below 250 degrees Celsius.
[0057] Example 2: See Figure 1 This embodiment discloses a method for fabricating a heterojunction solar cell. The difference between this embodiment and the previous embodiments is that the thickness of the P-type hydrogenated amorphous silicon oxide thin film is 17.5 nm. The thickness of the N-type hydrogenated amorphous silicon oxide thin film is 17.5 nm.
[0058] Example 3: See Figure 1 This embodiment discloses a method for fabricating a heterojunction solar cell. The difference between this embodiment and the previous embodiments is that the thickness of the P-type hydrogenated amorphous silicon oxide thin film is 20 nm. The thickness of the N-type hydrogenated amorphous silicon oxide thin film is 20 nm.
[0059] The heterojunction solar cells prepared by the above steps all exhibit good stability.
[0060] Since the positive and negative electrodes of the battery are all located at the rear end, this invention can avoid the overlap loss between battery cells and completely solve the problem of low CTM rate of matrix stacked modules.
[0061] In summary, the main steps of this invention include texturing, front-side 1 / P-layer deposition, back-side 1 / N-layer deposition, front and back TCO layers, grid line printing, and low-temperature sintering, which have the following effects: 1. High conversion efficiency. Currently the most efficient crystalline silicon solar cell. 2. High back-side power generation. It has the highest bifaciality among crystalline silicon solar cells, reaching up to 95%.
[0062] 3. High power generation throughout its entire lifespan. Utilizing N-type silicon wafers, with no boron doping process, resulting in minimal power decay.
[0063] 4. The double-sided symmetrical structure and low-temperature process reduce the stress on the silicon wafer, allowing for the use of thinner wafers and reducing material costs. This also aligns with future requirements for thinner and more flexible silicon wafers. 5. Fewer production steps, resulting in relatively better quality control.
[0064] The above content is only for illustrating the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solution based on the technical concept proposed in this invention shall fall within the scope of protection of the claims of this invention.
Claims
1. A method for preparing a heterojunction solar cell, characterized in that, Includes the following steps: Texturing of silicon wafers; An intrinsic amorphous silicon thin film and a P-type hydrogenated amorphous silicon oxide thin film are deposited on the front side of the texturized silicon wafer to form a pn heterojunction with separated photogenerated carriers. An intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film are deposited on the back side of the silicon wafer to form a back surface field. A transparent conductive oxide thin film with conductive function is deposited on both the front and back sides of the silicon wafer; A heterojunction cell is obtained by printing grid electrodes on the front and back sides of a silicon wafer and then sintering it at a low temperature.
2. The method for preparing a heterojunction solar cell according to claim 1, characterized in that, The texturing of the silicon wafer is specifically as follows: Pre-clean the silicon wafers; The damaged layer on the surface of the silicon wafer is removed by chemical etching; The silicon wafers are treated by immersing them in a mixture of alkaline solution and texturing additive. Acid-base neutralization cleaning removes contaminants and residual chemicals from the surface of silicon wafers; The silicon wafers are treated with a mixture of hydrofluoric acid and nitric acid to remove organic matter, metal ions, and oxidize and etch the silicon, while also improving the roundness of the wafers.
3. The method for preparing a heterojunction solar cell according to claim 1, characterized in that, The specific steps for depositing an intrinsic amorphous silicon thin film and a P-type hydrogenated amorphous silicon oxide thin film on the front side of the texturized silicon wafer are as follows: An intrinsic hydrogenated amorphous silicon oxide film and a P-type hydrogenated amorphous silicon oxide film were deposited on the front side of a texturized silicon wafer using plasma-enhanced chemical vapor deposition.
4. The method for preparing a heterojunction solar cell according to claim 3, characterized in that, The thickness of the intrinsic hydrogenated amorphous silicon oxide film is 5 nm to 10 nm, and the thickness of the P-type hydrogenated amorphous silicon oxide film is 15 nm to 20 nm.
5. The method for preparing a heterojunction solar cell according to claim 1, characterized in that, The specific steps for depositing an intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film on the back side of the silicon wafer are as follows: An intrinsic amorphous silicon thin film and an N-type hydrogenated amorphous silicon oxide thin film were deposited on the back side of a silicon wafer using plasma-enhanced chemical vapor deposition.
6. The method for preparing a heterojunction solar cell according to claim 5, characterized in that, The thickness of the intrinsic hydrogenated amorphous silicon oxide thin film is 5 nm to 10 nm.
7. The method for preparing a heterojunction solar cell according to claim 5, characterized in that, The thickness of the N-type hydrogenated amorphous silicon oxide thin film is 15 nm to 20 nm.
8. The method for preparing a heterojunction solar cell according to claim 1, characterized in that, The specific steps for depositing a transparent conductive oxide thin film layer with conductive function on both sides of the silicon wafer are as follows: A transparent conductive oxide thin film with conductive function is deposited on both sides of a silicon wafer using physical vapor deposition.
9. The method for preparing a heterojunction solar cell according to claim 1, characterized in that, The specific steps for printing gate electrodes on the front and back sides of the silicon wafer are as follows: The grid line electrodes are printed using screen printing technology, where a predetermined low-temperature silver paste is printed onto a transparent conductive oxide thin film layer to form a metal electrode.
10. The method for preparing a heterojunction solar cell according to claim 1, characterized in that, The temperature of the low-temperature sintering is below 250 degrees Celsius.