Intrinsic thin film heterojunction cell and method of making the same
By inserting an intrinsic amorphous silicon buffer layer with a thickness of less than 10 nm between the PN junctions and performing heat treatment, the damage problem to the amorphous silicon thin film during the growth of TCO materials was solved, thus improving the electrical and optical performance of solar cells.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 华能(嘉峪关)新能源有限公司
- Filing Date
- 2024-11-30
- Publication Date
- 2026-06-02
AI Technical Summary
In existing technologies, high-energy particles damage the effective doping sites of amorphous silicon thin films during the sputtering growth of TCO materials, leading to an increase in carrier recombination centers and affecting battery performance.
An intrinsic amorphous silicon layer with a thickness of less than 10 nm is inserted between the PN junctions as a buffer layer, and heat treatment is performed in an inert atmosphere. A transparent conductive film is prepared by combining chemical vapor deposition, physical vapor deposition or atomic layer deposition methods to avoid damaging the doping sites.
By inserting an intrinsic amorphous silicon buffer layer, carrier recombination is significantly reduced, improving the minority carrier lifetime and open-circuit voltage of the battery, thus enhancing battery performance.
Smart Images
Figure CN122138509A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of solar cell technology, specifically relating to an intrinsic thin-film heterojunction solar cell and its preparation method. Background Technology
[0002] Transparent conductive oxide (TCO) films are a crucial component of photovoltaic (PV) technology, serving both electrical conductivity and light transmission. With the rapid development of PV technology, the demands on TCO films are constantly increasing. Researchers are exploring new fabrication methods and materials to improve the conductivity and transparency of the films, as well as reduce production costs. Heterojunction with Intrinsic Thin-film (HJT) cells are one of the new N-type PV cell technologies. HJT cells have a symmetrical bifacial structure, with N-type crystalline silicon in the center. Intrinsic amorphous silicon and P-type amorphous silicon films are sequentially deposited on the front side to form a PN junction. On the back side, intrinsic amorphous silicon and N-type amorphous silicon films are sequentially deposited to form a back surface field. Because amorphous silicon has relatively poor conductivity, transparent conductive oxide (TCO) films are deposited on both sides of the cell to facilitate conductivity. Finally, screen printing technology is used to form the bifacial electrodes. In the sputtering growth of TCO materials, high-energy particles can damage the optoelectronic properties of doped amorphous silicon films only a few nanometers thick. In existing technologies, damage at effective doping sites in amorphous silicon mainly includes defects such as dangling bonds and voids. These defects severely affect the electrical and optical properties of amorphous silicon materials. Dangling bonds in amorphous silicon refer to unbonded valence electrons in atoms; these dangling bonds can be saturated by hydrogenation, thereby reducing the dangling bond density in the band gap. Voids, on the other hand, are defects in the material, leading to reduced density and decreased performance. During doping, these defect sites become recombination centers, affecting carrier transport and recombination processes, and consequently impacting device performance. It is necessary to simultaneously address the potential impact of high-energy particles on the optoelectronic properties of doped amorphous silicon films without affecting the effective doping sites. Summary of the Invention
[0003] To address the problems existing in the prior art, the present invention provides a method for preparing a transparent conductive film, avoiding damage to the effective doping sites of amorphous silicon.
[0004] To achieve the above objectives, the technical solution adopted by the present invention is: a method for preparing an intrinsic thin-film heterojunction solar cell, comprising the following steps:
[0005] An intrinsic amorphous silicon layer is deposited on the substrate as a buffer layer, and the thickness of the buffer layer is less than 10 nm.
[0006] The buffer layer is heat-treated in an inert atmosphere;
[0007] Deposit a doped amorphous silicon layer and a TCO layer on the buffer layer;
[0008] The doped amorphous silicon layer and the TCO layer are heat-treated in an inert atmosphere to obtain an intrinsic thin-film heterojunction battery structure layer.
[0009] An intrinsic thin-film heterojunction battery is obtained by fabricating a silver electrode on the intrinsic thin-film heterojunction battery structure layer.
[0010] Furthermore, chemical vapor deposition, physical vapor deposition, or atomic layer deposition methods are used when depositing intrinsic amorphous silicon layers.
[0011] Furthermore, the substrate is an N-type crystalline silicon wafer.
[0012] Furthermore, the TCO layer is made of VTTO, SCOT, or AZO.
[0013] Furthermore, the TCO layer is prepared by magnetron sputtering, CVD, or PECVD.
[0014] Furthermore, the doped amorphous silicon layer and the TCO layer are heat-treated in an inert atmosphere at a temperature of 180°C to 240°C.
[0015] Furthermore, the buffer layer is heat-treated in an inert atmosphere at a temperature of 350°C to 450°C.
[0016] Furthermore, the raw material for the intrinsic amorphous silicon layer is silane or dimethylsilane.
[0017] A transparent conductive film is also provided, which is obtained by the above-described preparation method.
[0018] The present invention also provides a solar panel, comprising a transparent conductive film obtained by the above-described preparation method.
[0019] Compared with the prior art, the present invention has at least the following beneficial effects: an intrinsic amorphous silicon layer is inserted between the PN junctions as a buffer layer, and the intrinsic amorphous silicon layer has a good passivation effect on the surface of crystalline silicon, which can greatly avoid carrier recombination, achieve higher minority carrier lifetime and open circuit voltage, and thus improve battery performance. Attached Figure Description
[0020] Figure 1 This is a schematic diagram of a typical HJT solar cell structure. Detailed Implementation
[0021] The technical solution of the present invention will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0022] The preparation method of the present invention will be described in detail below, including preferred conditions and operating procedures for each step.
[0023] Example 1:
[0024] An N-type silicon wafer is provided as the substrate. First, it is ultrasonically cleaned using acetone, alcohol, and deionized water in sequence to remove surface impurities and particles. Then, the cleaned silicon wafer is placed in a reaction chamber and heated to approximately 300°C under vacuum for 30 minutes as a preheating treatment to remove moisture and organic matter from the silicon wafer surface.
[0025] Next, an intrinsic amorphous silicon layer was deposited on the silicon wafer as a buffer layer using plasma-enhanced chemical vapor deposition (PECVD). The pressure in the reaction chamber was maintained at about 500 mTorr, silane (SiH4) was used as the raw gas, and the plasma reaction was initiated by an RF power supply with a power of about 100W. The deposition time was about 30 minutes, and the thickness of the buffer layer was about 5 nm.
[0026] Subsequently, the buffer layer was heat-treated in an inert atmosphere at a temperature of 400°C for approximately 60 minutes to enhance the interfacial bonding and stability between the buffer layer and the substrate.
[0027] Next, a doped amorphous silicon layer and a TCO layer are deposited sequentially above the buffer layer. The doped amorphous silicon layer is deposited using PECVD technology, with silane and ammonia (NH3) as the feed gases. The TCO layer is prepared by magnetron sputtering, using AZO as the material, with a working gas pressure of approximately 10 mTorr and a sputtering power of approximately 150 W.
[0028] After all layers have been deposited, the entire structure is heat-treated again in an inert atmosphere at a temperature of 200°C for approximately 30 minutes to optimize the contact characteristics between layers and the overall electrical performance.
[0029] Finally, silver electrodes were fabricated on the battery structure layer using photolithography and metallization processes, thus completing the fabrication of the intrinsic thin-film heterojunction battery.
[0030] Example 2:
[0031] An N-type crystalline silicon wafer is provided. After the same cleaning steps as in Example 1, an intrinsic amorphous silicon layer is deposited on the silicon wafer using atomic layer deposition (ALD) technology. At this time, the pressure in the reaction chamber is maintained at about 100 mTorr, dimethylsilane is used as the raw material gas, the deposition time is about 60 minutes, and the thickness of the resulting buffer layer is about 8 nm.
[0032] The heat treatment steps for the buffer layer are the same as in Example 1. A doped amorphous silicon layer and a TCO layer are deposited on top of the buffer layer. The doped amorphous silicon layer is also deposited using PECVD technology, while the TCO layer is made of SCOT material and prepared by CVD method.
[0033] The subsequent heat treatment steps and electrode preparation process are similar to those in Example 1, and an intrinsic thin-film heterojunction battery is finally obtained.
[0034] in conclusion
[0035] Through the above embodiments, the present invention provides a simple and effective method for preparing intrinsic thin-film heterojunction solar cells. The resulting cells have a stable structure, high photoelectric conversion efficiency, and are suitable for large-scale production applications.
Claims
1. A method for preparing an intrinsic thin-film heterojunction solar cell, characterized in that, Includes the following steps: An intrinsic amorphous silicon layer is deposited on the substrate as a buffer layer, and the thickness of the buffer layer is less than 10 nm. The buffer layer is heat-treated in an inert atmosphere; Deposit a doped amorphous silicon layer and a TCO layer on the buffer layer; The doped amorphous silicon layer and the TCO layer are heat-treated in an inert atmosphere to obtain an intrinsic thin-film heterojunction battery structure layer. An intrinsic thin-film heterojunction cell was obtained by fabricating a silver electrode on the intrinsic thin-film heterojunction cell structure layer.
2. The method for preparing an intrinsic thin-film heterojunction solar cell according to claim 1, characterized in that, Chemical vapor deposition, physical vapor deposition, or atomic layer deposition methods are used to deposit intrinsic amorphous silicon layers.
3. The method for preparing an intrinsic thin-film heterojunction solar cell according to claim 1, characterized in that, The substrate is an N-type crystalline silicon wafer.
4. The method for preparing an intrinsic thin-film heterojunction solar cell according to claim 1, characterized in that, The TCO layer is made of VTTO, SCOT, or AZO.
5. The method for preparing an intrinsic thin-film heterojunction solar cell according to claim 3, characterized in that, The TCO layer is prepared by magnetron sputtering, CVD, or PECVD.
6. The method for preparing an intrinsic thin-film heterojunction solar cell according to claim 1, characterized in that, The doped amorphous silicon layer and the TCO layer are heat-treated in an inert atmosphere at temperatures ranging from 180°C to 240°C.
7. The method for preparing an intrinsic thin-film heterojunction solar cell according to claim 1, characterized in that, The buffer layer is heat-treated in an inert atmosphere at a temperature of 350℃~450°.
8. The method for preparing an intrinsic thin-film heterojunction solar cell according to claim 1, characterized in that, The raw material for intrinsic amorphous silicon layers is silane or dimethylsilane.
9. An intrinsic thin-film heterojunction battery, characterized in that, It is obtained by the preparation method according to any one of claims 1-8.
10. A solar cell module, characterized in that, Intrinsic thin-film heterojunction solar cells obtained by the preparation method according to any one of claims 1-8.