A Micro LED chip with an array electrode structure and its fabrication method
By using an array of concave mirror reflective electrode structures, the problems of poor beam guidance and photon loss in Micro LED chips at the micrometer scale are solved, achieving efficient light extraction and light emission directionality, thus improving the performance and applicability of displays.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- JUCAN PHOTOELECTRIC TECH (SUQIAN) CO LTD
- Filing Date
- 2026-03-09
- Publication Date
- 2026-06-02
AI Technical Summary
Existing Micro LED chips suffer from problems at the micrometer scale, such as poor beam guidance, severe photon loss due to sidewall defects, increased optical path and significant absorption loss, and divergence and crosstalk in the light emission angle, which affect the display effect.
An array of concave mirror reflective electrode structures is used to concentrate and reflect the light emitted from the active layer. By designing the focal position of the concave mirror and optimizing the transparent conductive layer, an optical concave mirror is formed to improve light extraction efficiency and light directionality.
It significantly improves light extraction efficiency, enhances light directionality, reduces optical crosstalk, and increases the contrast and resolution of displays, making it suitable for small-view applications such as AR/VR, while also reducing manufacturing costs.
Smart Images
Figure CN122138537A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor optoelectronic devices, and more specifically to a MicroLED chip with an array electrode structure and its fabrication method. Background Technology
[0002] Micro LED display technology is considered a core direction for next-generation microdisplay technology due to its advantages such as high brightness, high contrast, low power consumption, and long lifespan. As pixel sizes continue to shrink to 50 micrometers or even below 10 micrometers, the sidewall area of the chip increases significantly, leading to fundamental changes in the physical behavior of photons propagating within the chip. At this scale, efficiently extracting and utilizing photons generated by the active layer of the chip becomes a key challenge for improving the luminous efficiency, brightness uniformity, and color performance of Micro LED devices.
[0003] Currently, mainstream Micro LED chips often employ planar reflective electrode structures (such as distributed Bragg mirrors or metal reflective layers), designed to reflect downward-emitted photons back to the light-emitting surface. However, traditional designs have the following inherent limitations, which are particularly prominent at the micrometer scale: 1) Lack of beam guidance: Planar reflective electrodes only provide non-directional specular reflection, which cannot effectively shape and concentrate photon paths. Photons emitted laterally from the active layer or reflected and then incident on the sidewalls are prone to multiple disordered scattering and reflections within the chip.
[0004] 2) Severe losses due to sidewall defects: When chip size shrinks to the micrometer scale, the ratio of sidewall area to volume increases dramatically. Due to the inevitable introduction of surface defects, dangling bonds, and damaged layers into the sidewalls by processes such as dry etching, these sidewall regions become nonradiative recombination centers and light scattering sources. Photons incident on the sidewalls are largely absorbed or scattered, resulting in severe photon loss.
[0005] 3) Increased optical path and absorption loss: The disordered multiple reflections of photons inside the chip significantly increase their propagation optical path and increase the probability of intrinsic absorption by semiconductor materials. This loss is even more significant for photons whose wavelengths are close to the absorption threshold of the material.
[0006] 4) Light emission angle divergence and crosstalk: The light emitted after reflection from the planar electrode has a wide angular distribution, which not only reduces the brightness of the front view, but also makes it easier to cause optical crosstalk between adjacent pixels in a dense pixel array, affecting the display contrast and resolution, which is not conducive to small-view applications such as AR / VR displays. Summary of the Invention
[0007] This invention addresses the problems in the background art by providing a Micro LED chip with an array electrode structure and its fabrication method. By employing an array concave mirror reflective electrode structure, the light emitted from the active layer located at a near-focal position can be concentrated and reflected, thereby improving the light extraction efficiency and small-angle light emission ratio of the Micro LED chip.
[0008] To achieve the above objectives, the present invention provides the following technical solution: A Micro LED chip with an arrayed electrode structure is applied to flip-chip and vertical structures. The flip-chip structure sequentially includes a substrate, an epitaxial structure, a transparent conductive layer, a first electrode layer, a first passivation layer, a second electrode layer, a second passivation layer, and a third electrode layer. The vertical structure sequentially includes a substrate, an epitaxial structure, a transparent conductive layer, a first electrode layer, a protective layer, a first passivation layer, a second electrode layer, and a second passivation layer. A concave mirror substrate pattern layer is provided between the epitaxial structure and the transparent conductive layer. The concave mirror substrate pattern layer is an elliptical array of protrusions. The first electrode layer covers the protrusions of the substrate pattern layer to form an optical concave mirror.
[0009] Preferably, the concave mirror substrate pattern layer is made of silicon dioxide with a thickness of 300-500 nanometers, and the transparent conductive layer has a thickness of 30-200 nanometers.
[0010] Preferably, the elliptical array of protrusions has a notch, the length and width of which do not exceed D, and the cross-sectional area is... <D 2 *π / 4. By optimizing the opening through the pattern of the insulating concave mirror substrate, the transparent conductive layer is brought into contact with P-type gallium nitride, which increases the conductivity and further enhances the light-gathering effect.
[0011] Preferably, the notch is designed as a straight line, cross, circle, hexagon, or any polygon or irregular shape.
[0012] Preferably, the concave mirror substrate pattern layer is made of a transparent conductive material with a thickness of 20 nanometers, and the transparent conductive layer has a thickness of 100-200 nanometers.
[0013] Preferably, the protrusion array is arranged as a hexagonal close-packed array, a square array, a gradient density array, or a multi-size mixed array.
[0014] Preferably, a single concave mirror is designed as a small pixel or a medium pixel according to the chip size; when the chip size is 10-30 micrometers, the diameter D of the concave mirror unit is 3-5 micrometers and the depth H is 1.5-2.5 micrometers; when the chip size is 30-100 micrometers, the diameter D of the concave mirror unit is 5-10 micrometers and the depth H is 2.0-3.5 micrometers.
[0015] A method for fabricating a Micro LED chip with an arrayed electrode structure includes the following steps: 1) Provide a substrate, and grow epitaxial structures sequentially on the substrate; 2) MESA mesas and isolation trenches are formed by photolithography and dry etching; 3) Deposit a concave mirror substrate pattern layer, and use the difference in selectivity to form an elliptical array of protrusions as the substrate pattern for subsequent concave mirrors; characterize the key array of protrusions. 4) A transparent conductive layer is grown, and after high-temperature thermal annealing, a transparent photolithography pattern is formed and a wet etching is performed to leave the designated area. 5) A highly reflective metal layer is deposited by vapor deposition to form the first electrode layer of the concave mirror structure. This metal layer covers the substrate protrusion to form an optical concave mirror. 6) Perform subsequent conventional production processes for inverted or vertical structures.
[0016] Preferably, in step 3), a silicon dioxide concave mirror substrate pattern layer with a thickness of 300-500 nanometers is deposited by photolithography and dry etching using a gradient mask, and in step 4), a transparent conductive layer with a thickness of 30-200 nanometers is grown.
[0017] Preferably, after forming the elliptical protrusion array in step 3), a specific notch is then created on the elliptical protrusion array pattern through photolithography.
[0018] Preferably, in step 3), a transparent conductive material concave mirror substrate pattern layer with a thickness of 20 nanometers is grown by sputtering or ion beam deposition, and in step 4), a transparent conductive layer with a thickness of 100-200 nanometers is continuously grown on the concave mirror substrate pattern layer by photolithography.
[0019] Compared with the prior art, the beneficial effects of the present invention are: This invention utilizes an array-type concave mirror electrode structure to shape and concentrate the disordered light emitted from the active layer, which is beneficial for small field-of-view applications (such as AR / VR) and improves light extraction efficiency, thereby enhancing overall brightness. The array structure overcomes the limitation of achieving ideal curvature within a finite thickness due to the metal thickness constraints of a single concave mirror. Furthermore, this invention can be flexibly adapted to universal electrode structure solutions for Micro LED and Mini LED chips, covering flip-chip and vertical chip structures. Attached Figure Description
[0020] The accompanying drawings, which are included to provide a further understanding of embodiments of the invention and form part of this application, do not constitute a limitation thereof. In the drawings: Figure 1 This is a chip structure diagram of Embodiment 1 of the present invention.
[0021] Figure 2 These are design diagrams for different array arrangements of the present invention.
[0022] Figure 3 This is a pixel layout design diagram for the present invention.
[0023] Figure 4 This is a chip structure diagram of Embodiment 2 of the present invention.
[0024] Figure 5 This is a design drawing of the ITO through hole in Embodiment 2 of the present invention.
[0025] Figure 6 This is a chip structure diagram of Embodiment 3 of the present invention.
[0026] Figure 7 This is a chip structure diagram of Embodiment 4 of the present invention. Detailed Implementation
[0027] To further illustrate the technical means and effects of the present invention in achieving its intended purpose, the following detailed description of the specific implementation methods, structures, features, and effects of the present invention, in conjunction with the accompanying drawings and preferred embodiments, is provided below.
[0028] Implementation Case 1: Reference Figure 1 A method for fabricating a Micro LED chip with an arrayed electrode structure, applied in a flip-chip structure, specifically includes the following steps: 1) Provide a sapphire substrate 100, on which an LED epitaxial structure including an N-type gallium nitride layer 101, a multi-quantum well active layer 103 and a P-type gallium nitride layer 102 are grown sequentially.
[0029] 2) Step 1: MESA mesa and isolation trench are formed by photolithography and dry etching, wherein the MESA etching depth is about 1.2 micrometers and the isolation trench depth is about 67 micrometers.
[0030] 3) Step 2: Deposit concave mirror substrate pattern layer 105 (preferably silicon dioxide) with a thickness of 300-500 nm; perform photolithography and dry etching using a gradient mask to form an elliptical array of protrusions using the selectivity difference, which serves as the substrate pattern for the subsequent concave mirror.
[0031] 4) Step 3: Grow a transparent conductive layer 104 (preferably but not limited to indium tin oxide) with a thickness of 30-200 nanometers, and after high-temperature thermal annealing, perform photolithography to create a transparent pattern and wet etching to leave a designated area.
[0032] 5) Step 4: Evaporate a high-reflectivity metal layer to form the first electrode layer 107 of the concave mirror structure; the electrode thickness is 11.5 micrometers, and the composition can be a titanium / silver / (nickel + titanium tungsten) multilayer structure, wherein the first adhesive layer can be titanium, chromium or nickel, the main reflective layer can be silver, aluminum or their alloys, and the protective layer can be one or more combinations of nickel, titanium tungsten, platinum, ruthenium, rhodium, etc.; the metal layer covers the substrate protrusion to form an optical concave mirror.
[0033] 6) Characterization of key array-type bumps: The preferred array arrangement is a hexagonal close-packed array (it can also be a square array, a gradient density array, or a multi-size mixed array, such as...). Figure 2 The goal is to position the LED active layer approximately at the focal point of the concave mirror. The design of a single concave mirror can be tailored to the chip size using the following two methods ( Figure 3 ): a) Design Case 1: Small pixel design, chip size 10-30 micrometers, concave mirror unit diameter D preferably 3-5 micrometers, depth H preferably 1.5~2.5 micrometers.
[0034] b) Design Case 2: Medium pixel design, chip size 30-100 micrometers, concave mirror unit diameter D preferably 5-10 micrometers, depth H preferably 2.0~3.5 micrometers.
[0035] 7) Step 5: Deposit the first passivation layer 106. Preferably, an aluminum oxide film with a thickness of 60 nanometers is prepared by atomic layer deposition (ALD), and then a silicon dioxide film with a thickness of 800 nanometers is grown by chemical vapor deposition as a composite passivation layer.
[0036] 8) Step Six: Open the windows of the first passivation layer in the P-type and N-type regions by photolithography and dry etching to expose the electrode contact surface.
[0037] 9) Step 7: Deposit the second electrode layer 109, the structure of which may include multiple layers of metal such as aluminum, titanium, chromium, platinum, etc., wherein the reflective layer is preferably aluminum, the protective layer is preferably platinum, the thickness of each layer is 5500 nanometers, and the total thickness is 1000-1500 nanometers.
[0038] 10) Step 8: Deposit the second passivation layer 108, which is a Bragg mirror structure. It improves the light extraction efficiency by maintaining high reflectivity within the 075-degree incident angle range. This multilayer film is composed of 4050 layers of alternating high / low refractive index materials. The high refractive index materials can be selected from TiO2, HfO2, Ta2O5, Nb2O5, ZrO2, etc., and the low refractive index materials can be selected from SiO2, Al2O3, MgF2, MgO, etc. The stacking order can be adjusted according to whether the first layer material is high or low refractive index, and the alternation period is 1024 pairs.
[0039] 11) Step Nine: Open the window of the second passivation layer on the P electrode and N electrode by photolithography and dry etching.
[0040] 12) Step 10: Deposit the third electrode layer 110 as a bonding layer. The structure can be (aluminum + titanium) multilayer stack + nickel + gold, wherein the number of aluminum-titanium stack pairs can be 3 or more, and the protective layer is preferably nickel. The thickness of each layer is 50-150 nanometers, and the total thickness is 1000-2000 nanometers.
[0041] Implementation Case 2: By optimizing the openings in the substrate pattern of an insulating concave mirror, the transparent conductive layer is brought into contact with P-type gallium nitride, increasing conductivity and further enhancing the light-gathering effect. (See reference...) Figure 4 ; A method for fabricating a Micro LED chip with an array electrode structure specifically includes the following steps: 1) Provide a sapphire substrate 100, on which an LED epitaxial structure including an N-type gallium nitride layer 101, a multi-quantum well active layer 103 and a P-type gallium nitride layer 102 are grown sequentially.
[0042] 2) Step 1: MESA mesa and isolation trench are formed by photolithography and dry etching, wherein the MESA etching depth is about 1.2 micrometers and the isolation trench depth is about 67 micrometers.
[0043] 3) Step 2: Deposit concave mirror substrate pattern layer 105 (preferably silicon dioxide) with a thickness of 300-500 nm; perform photolithography and dry etching using a gradient mask to form an elliptical array of protrusions using the selectivity difference, which serves as the substrate pattern for the subsequent concave mirror.
[0044] 4) Step 3: Next, using photolithography, a specific notch is created on the elliptical raised array pattern, with its length and width not exceeding D, and the cross-sectional area... <D 2 *π / 4, the opening design can be straight, cross-shaped, circular, hexagonal, or any polygonal and irregular shape. Figure 5 ).
[0045] 5) Step 4: Grow a transparent conductive layer 104 (preferably but not limited to indium tin oxide) to fill and cover the opening in step 3. Its total thickness is preferably 30-200 nanometers. After high-temperature thermal annealing, a transparent photolithography pattern is formed and a designated area is left by wet etching.
[0046] 6) Step 5: Evaporate a high-reflectivity metal layer to form the first electrode layer 107 of the concave mirror structure; the electrode thickness is 11.5 micrometers, and the composition can be a titanium / silver / (nickel + titanium tungsten) multilayer structure, wherein the first adhesive layer can be titanium, chromium or nickel, the main reflective layer can be silver, aluminum or their alloys, and the protective layer can be one or more combinations of nickel, titanium tungsten, platinum, ruthenium, rhodium, etc.; the metal layer covers the substrate protrusion to form an optical concave mirror.
[0047] 7) Characterization of key array-type bumps: The preferred array arrangement is a hexagonal close-packed array (it can also be a square array, a gradient density array, or a multi-size mixed array, such as...). Figure 2 The goal is to position the LED active layer approximately at the focal point of the concave mirror. The design of a single concave mirror can be tailored to the chip size using the following two methods ( Figure 3 ): a) Design Case 1: Small pixel design, chip size 10-30 micrometers, concave mirror unit diameter D preferably 3-5 micrometers, depth H preferably 1.5~2.5 micrometers.
[0048] b) Design Case 2: Medium pixel design, chip size 30-100 micrometers, concave mirror unit diameter D preferably 5-10 micrometers, depth H preferably 2.0~3.5 micrometers.
[0049] 8) Step 6: Deposit the first passivation layer 106. Preferably, an aluminum oxide film with a thickness of 60 nanometers is prepared by atomic layer deposition (ALD), and then a silicon dioxide film with a thickness of 800 nanometers is grown by chemical vapor deposition as a composite passivation layer.
[0050] 9) Step 7: Open the windows of the first passivation layer in the P-type and N-type regions by photolithography and dry etching to expose the electrode contact surface.
[0051] 10) Step 8: Deposit the second electrode layer 109, the structure of which may include multiple layers of metal such as aluminum, titanium, chromium, platinum, etc., wherein the reflective layer is preferably aluminum, the protective layer is preferably platinum, the thickness of each layer is 5500 nanometers, and the total thickness is 1000-1500 nanometers.
[0052] 11) Step Nine: Deposit the second passivation layer 108, which is a Bragg mirror structure. It improves the light extraction efficiency by maintaining high reflectivity within the 075-degree incident angle range. This multilayer film is composed of 4050 layers of alternating high / low refractive index materials. The high refractive index materials can be selected from TiO2, HfO2, Ta2O5, Nb2O5, ZrO2, etc., and the low refractive index materials can be selected from SiO2, Al2O3, MgF2, MgO, etc. The stacking order can be adjusted according to whether the first layer material is high or low refractive index, and the alternation period is 1024 pairs.
[0053] 12) Step 10: Open the window of the second passivation layer on the P electrode and N electrode by photolithography and dry etching.
[0054] 13) Step 11: Deposit the third electrode layer 110 as a bonding layer. The structure can be (aluminum + titanium) multilayer stack + nickel + gold, wherein the number of aluminum and titanium stack pairs can be 3 or more, and the protective layer is preferably nickel. The thickness of each layer is 50-150 nanometers, and the total thickness is 1000-2000 nanometers.
[0055] Implementation Case 3: The concave mirror substrate pattern was fabricated entirely using a low-resistivity transparent conductive material. This significantly reduced the vertical conduction resistance in the central region of the concave mirror, allowing current to be injected more efficiently into the active layer directly beneath it. This significantly improved the current density and radiative recombination efficiency in this local area, thereby enhancing electro-optic efficiency while achieving beam shaping. (See reference...) Figure 6 ; A method for fabricating a Micro LED chip with an array electrode structure specifically includes the following steps: 1) Provide a sapphire substrate 100, on which an LED epitaxial structure including an N-type gallium nitride layer 101, a multi-quantum well active layer 103 and a P-type gallium nitride layer 102 are grown sequentially.
[0056] 2) Step 1: MESA mesa and isolation trench are formed by photolithography and dry etching, wherein the MESA etching depth is about 1.2 micrometers and the isolation trench depth is about 67 micrometers.
[0057] 3) Step 2: Deposit the concave mirror substrate pattern layer 104a (preferably but not limited to indium tin oxide, or IWO, IZO, or stacks of different indium-tin ratios or mixed stacks of different transparent conductive materials). First, a first layer of ITO with a thickness of 20 nanometers is grown by sputtering or ion beam deposition. After defining the pattern by photolithography, a second layer of ITO with a thickness of 100~200 nanometers is grown and etched together to finally form an elliptical array of protrusions, which serves as the substrate pattern for the subsequent concave mirror.
[0058] 4) Step 3: Evaporate a high-reflectivity metal layer to form the first electrode layer 107 of the concave mirror structure; the electrode thickness is 11.5 micrometers, and the composition can be a titanium / silver / (nickel + titanium tungsten) multilayer structure, wherein the first adhesive layer can be titanium, chromium or nickel, the main reflective layer can be silver, aluminum or their alloys, and the protective layer can be one or more combinations of nickel, titanium tungsten, platinum, ruthenium, rhodium, etc.; the metal layer covers the substrate protrusion to form an optical concave mirror.
[0059] 5) Characterization of key array-type bumps: The preferred array arrangement is a hexagonal close-packed array (it can also be a square array, a gradient density array, or a multi-size mixed array, such as...). Figure 2 The goal is to position the LED active layer approximately at the focal point of the concave mirror. The design of a single concave mirror can be tailored to the chip size using the following two methods ( Figure 3 ): a) Design Case 1: Small pixel design, chip size 10-30 micrometers, concave mirror unit diameter D preferably 3-5 micrometers, depth H preferably 1.5~2.5 micrometers.
[0060] b) Design Case 2: Medium pixel design, chip size 30-100 micrometers, concave mirror unit diameter D preferably 5-10 micrometers, depth H preferably 2.0~3.5 micrometers.
[0061] 6) Step 4: Deposit the first passivation layer 106. Preferably, an alumina film with a thickness of 60 nanometers is prepared by atomic layer deposition (ALD), followed by the growth of a silicon dioxide film with a thickness of 800 nanometers as a composite passivation layer by chemical vapor deposition.
[0062] 7) Step 5: Open the windows of the first passivation layer in the P-type and N-type regions by photolithography and dry etching to expose the electrode contact surface.
[0063] 8) Step 6: Deposit the second electrode layer 109. The structure may include multiple layers of metal such as aluminum, titanium, chromium, platinum, etc., wherein the reflective layer is preferably aluminum, the protective layer is preferably platinum, the thickness of each layer is 5500 nanometers, and the total thickness is 1000-1500 nanometers.
[0064] 9) Step 7: Deposit the second passivation layer 108, which is a Bragg mirror structure. It improves the light extraction efficiency by maintaining high reflectivity within the 075-degree incident angle range. This multilayer film is composed of 4050 layers of alternating high and low refractive index materials. The high refractive index materials can be selected from TiO2, HfO2, Ta2O5, Nb2O5, ZrO2, etc., and the low refractive index materials can be selected from SiO2, Al2O3, MgF2, MgO, etc. The stacking order can be adjusted according to whether the first layer material is high or low refractive index, and the alternation period is 1024 pairs.
[0065] 10) Step 8: Open the window of the second passivation layer on the P electrode and N electrode by photolithography and dry etching.
[0066] 11) Step 9: Deposit the third electrode layer 110 as a bonding layer. The structure can be (aluminum + titanium) multilayer stack + nickel + gold, wherein the number of aluminum-titanium stack pairs can be 3 or more, and the protective layer is preferably nickel. The thickness of each layer is 50-150 nanometers, and the total thickness is 1000-2000 nanometers.
[0067] Implementation Case 4: Similar to Case 3, a low-resistivity transparent conductive material is used to realize the concave mirror substrate pattern, which is applied in a vertical structure. (See reference...) Figure 7 ; A method for fabricating a Micro LED chip with an array electrode structure specifically includes the following steps: 1) Provide a sapphire substrate 100a, on which an LED epitaxial structure including an N-type gallium nitride layer 101, a multi-quantum well active layer 103 and a P-type gallium nitride layer 102 are grown in sequence.
[0068] 2) Step 1: MESA mesa and isolation trench are formed by photolithography and dry etching, wherein the MESA etching depth is about 1.2 micrometers.
[0069] 3) Step 2: Deposit the concave mirror substrate pattern layer 104a (preferably but not limited to indium tin oxide, or IWO, IZO, or stacks of different indium-tin ratios or mixed stacks of different transparent conductive materials). First, a first layer of ITO with a thickness of 20 nanometers is grown by sputtering or ion beam deposition. After defining the pattern by photolithography, a second layer of ITO with a thickness of 100~200 nanometers is grown and etched together to finally form an elliptical array of protrusions, which serves as the substrate pattern for the subsequent concave mirror.
[0070] 4) Step 3: Evaporate a high-reflectivity metal layer to form the first electrode layer 107 of the concave mirror structure; the electrode thickness is 11.5 micrometers, and the composition can be a titanium / silver / (nickel + titanium tungsten) multilayer structure, wherein the first adhesive layer can be titanium, chromium or nickel, the main reflective layer can be silver, aluminum or their alloys, and the protective layer can be one or more combinations of nickel, titanium tungsten, platinum, ruthenium, rhodium, etc.; the metal layer covers the substrate protrusion to form an optical concave mirror.
[0071] 5) Characterization of key array-type bumps: The preferred array arrangement is a hexagonal close-packed array (it can also be a square array, a gradient density array, or a multi-size mixed array, such as...). Figure 2 The goal is to position the LED active layer approximately at the focal point of the concave mirror. The design of a single concave mirror can be tailored to the chip size using the following two methods ( Figure 3 ): a) Design Case 1: Small pixel design, chip size 10-30 micrometers, concave mirror unit diameter D preferably 3-5 micrometers, depth H preferably 1.5~2.5 micrometers.
[0072] b) Design Case 2: Medium pixel design, chip size 30-100 micrometers, concave mirror unit diameter D preferably 5-10 micrometers, depth H preferably 2.0~3.5 micrometers.
[0073] 6) Step 4: Evaporate a metal protective layer 111, which serves as a protection for the high-reflectivity layer and to reserve space for the subsequent P electrode bonding. The electrode thickness is 0.5 micrometers, and the composition can be a titanium / platinum / gold / chromium stacked structure. The first adhesive layer can be titanium, chromium or nickel, and the second barrier layer can be one or more combinations of platinum group elements such as nickel, platinum, ruthenium, rhodium, etc. 7) Step 5: Deposit the first passivation layer 106. Preferably, an alumina film with a thickness of 60 nanometers is prepared by atomic layer deposition (ALD), followed by the growth of a silicon dioxide film with a thickness of 800 nanometers as a composite passivation layer by chemical vapor deposition.
[0074] 8) Step Six: Open the window of the first passivation layer on the N-type region by photolithography and dry etching to expose the electrode contact surface.
[0075] 9) Step 7: Grind the sapphire substrate from 650um to 330um, then perform copper polishing + CMP to 300um, and then perform wax cleaning to remove the photoresist on the front side. 10) Step 8: Deposit the second electrode layer 112 as the bonding electrode. First, chromium / silver / chromium is deposited on the entire surface with a thickness of 200 nanometers. Then, titanium / nickel / tin / nickel / tin stacked structure is deposited with a total thickness of 1-1.5 micrometers.
[0076] 11) Step 9: Flip the above structure and bond it to the second substrate 100a by direct metal bonding. The second substrate can be a material with high thermal conductivity and high strength such as silicon, molybdenum, or silicon carbide. Its surface is plated with a nickel / tin metal layer for bonding, and the original substrate 100 is laser-removed. 12) Step 10: Use photolithography and dry etching technology to define the pattern on the surface of the stripped substrate and etch to the metal protective layer 111, with an etching depth of 6~7um; 13) Step 11: Use strong acid KOH at 55℃ for 1-2 minutes to roughen the surface of N-type gallium nitride to improve the light extraction efficiency; 14) Step Twelve: Photolithography and metal evaporation to prepare P electrode 113. First, plasma bombardment is performed, followed by deposition of a titanium / platinum / gold / nickel / gold stacked structure with a thickness of 2~2.5 micrometers. 15) Step Thirteen: Deposit the second passivation layer 114. A silicon nitride layer with a thickness of 300 nanometers is grown by chemical vapor deposition at 220°C. Openings are defined by photolithography and wet etching as contact points for subsequent testing.
[0077] 16) Subsequent processes may involve back gold plating or no plating, depending on the product application. The process continues with scratching, flipping, testing, and sorting to complete the final core preparation.
[0078] In summary, the array-type concave mirror reflective electrode structure provided by this invention has the following advantages: 1) Significantly improved light extraction efficiency: By placing the LED active layer near the focal point of the concave mirror, the light-gathering properties of the concave mirror are used to directionally and centrally reflect diverging light, reducing multiple reflections and material absorption of photons within the chip. Compared to traditional planar reflective electrodes, the light extraction efficiency is expected to be improved by 20%-40%.
[0079] 2) Improve light output directionality and reduce optical crosstalk: The array-type concave mirror structure has the effect of shaping and collimating the light beam, which can improve the light output ratio at small angles (e.g., within ±30°) to more than 80%, which is beneficial to enhance the brightness of the front and suppress optical crosstalk between adjacent pixels, improve the contrast and resolution of the microdisplay, and is especially suitable for small FOV applications such as AR / VR.
[0080] 3) Strong process compatibility, conducive to mass production: The concave mirror structure can be realized by gradient mask and standard dry etching process without introducing complex or additional process steps. It is compatible with existing Micro LED and Mini LED production lines, which helps to reduce manufacturing costs and improve yield.
[0081] 4) Effectively suppressing nonradiative recombination on the sidewalls: The first passivation layer is made of atomic layer deposition (ALD) aluminum oxide film, which can achieve uniform and dense coverage of the sidewalls, significantly reducing the surface state density caused by etching damage, reducing the nonradiative recombination rate of the sidewalls by more than 50%, thereby improving the quantum efficiency within the device.
[0082] 5) Wide-angle high-efficiency reflection: The second passivation layer adopts a Bragg mirror design, which maintains high reflectivity (>95%) in the 0-75 degree incident angle range, effectively recovering light emitted at large angles and further improving the overall light output.
[0083] 6) The design of current injection optimization is demonstrated in Case 2 and Case 3. Through the opening of the insulating layer, the transparent conductive layer can inject current into the active layer more efficiently. Furthermore, in Case 3, the design of the insulating layer is abandoned and a fully transparent conductive method is adopted, which can significantly increase the current density in the active area directly below the concave mirror. This allows it to achieve both optical focusing effect and efficient electrical excitation, thus achieving dual optimization of optics and electricity.
[0084] 7) Flexible structural design to adapt to different pixel sizes and LED structures: By adjusting the diameter, depth and arrangement of the concave mirror unit, it can adapt to the pixel requirements of different sizes from 10 to 100 micrometers, and achieve ideal optical curvature within a limited thickness, overcoming the difficulty of manufacturing a single concave mirror at the micrometer scale.
[0085] The above description of the embodiments is provided to enable those skilled in the art to understand and apply the present invention. It will be apparent to those skilled in the art that various modifications can be made to these embodiments, and the general principles described herein can be applied to other embodiments without inventive effort. Therefore, the present invention is not limited to the above embodiments, and any improvements and modifications made by those skilled in the art based on the disclosure of the present invention without departing from the scope of the present invention should be within the protection scope of the present invention.
Claims
1. A Micro LED chip with an arrayed electrode structure, applicable to flip-chip and vertical structures, wherein, The flip-chip structure sequentially includes a substrate, an epitaxial structure, a transparent conductive layer, a first electrode layer, a first passivation layer, a second electrode layer, a second passivation layer, and a third electrode layer; the vertical structure sequentially includes a substrate, an epitaxial structure, a transparent conductive layer, a first electrode layer, a protective layer, a first passivation layer, a second electrode layer, and a second passivation layer. The characteristic feature is that a concave mirror substrate pattern layer is provided between the epitaxial structure and the transparent conductive layer. The concave mirror substrate pattern layer is an elliptical array of protrusions, and the first electrode layer covers the protrusions of the substrate pattern layer to form an optical concave mirror.
2. A Micro LED chip with an array electrode structure as described in claim 1, characterized in that: The concave mirror substrate pattern layer is made of silicon dioxide with a thickness of 300-500 nanometers, and the transparent conductive layer has a thickness of 30-200 nanometers.
3. A Micro LED chip with an array electrode structure as described in claim 2, characterized in that: The elliptical array of protrusions has a notch, the length and width of which do not exceed D, and the cross-sectional area is... <D 2 *π / 4; The notch can be designed as a straight line, cross, circle, hexagon, or any polygon and irregular shape.
4. A Micro LED chip with an array electrode structure as described in claim 1, characterized in that: The concave mirror substrate pattern layer is made of a transparent conductive material with a thickness of 20 nanometers, and the transparent conductive layer has a thickness of 100-200 nanometers.
5. A Micro LED chip with an array electrode structure as described in any one of claims 1 to 4, characterized in that: The protrusion array is arranged as a hexagonal close-packed array, a square array, a gradient density array, or a multi-size mixed array.
6. A Micro LED chip with an array electrode structure as described in claim 5, characterized in that: The individual concave mirror is designed with small or medium pixels depending on the chip size; when the chip size is 10-30 micrometers, the diameter D of the concave mirror unit is 3-5 micrometers and the depth H is 1.5-2.5 micrometers; when the chip size is 30-100 micrometers, the diameter D of the concave mirror unit is 5-10 micrometers and the depth H is 2.0-3.5 micrometers.
7. A method for fabricating a Micro LED chip with an arrayed electrode structure, comprising the following steps: 1) Provide a substrate, and grow epitaxial structures sequentially on the substrate; 2) MESA mesas and isolation trenches are formed by photolithography and dry etching; 3) Deposit a concave mirror substrate pattern layer, and use the difference in selectivity to form an elliptical array of protrusions as the substrate pattern for subsequent concave mirrors; characterize the key array of protrusions. 4) A transparent conductive layer is grown, and after high-temperature thermal annealing, a transparent photolithography pattern is formed and a wet etching is performed to leave the designated area. 5) A highly reflective metal layer is deposited by vapor deposition to form the first electrode layer of the concave mirror structure. This metal layer covers the substrate protrusion to form an optical concave mirror. 6) Perform subsequent conventional production processes for inverted or vertical structures.
8. The method for fabricating a Micro LED chip with an array electrode structure as described in claim 7, characterized in that: In step 3), a silicon dioxide concave mirror substrate pattern layer with a thickness of 300-500 nanometers is deposited by photolithography and dry etching using a gradient mask. In step 4), a transparent conductive layer with a thickness of 30-200 nanometers is grown.
9. The method for fabricating a Micro LED chip with an arrayed electrode structure as described in claim 8, characterized in that: After forming the elliptical protrusion array in step 3), a specific notch is then created on the elliptical protrusion array pattern through photolithography.
10. The method for fabricating a Micro LED chip with an arrayed electrode structure as described in claim 7, characterized in that: In step 3), a transparent conductive material concave mirror substrate pattern layer with a thickness of 20 nanometers is grown by sputtering or ion beam deposition. In step 4), a transparent conductive layer with a thickness of 100-200 nanometers is continuously grown on the concave mirror substrate pattern layer by photolithography.