Haptic presentation device

Abstract

Provided is a haptic presentation device that can reduce manufacturing costs even when a relatively high application voltage is required for a haptic presentation section. The haptic presentation device has a plurality of unit regions whose haptic presentations can be controlled independently of one another. The haptic presentation device includes: a haptic presentation section that is provided in each unit region and presents haptics; and a unit circuit that is electrically connected to the haptic presentation section and drives the haptic presentation section. The unit circuit includes a plurality of sub-circuits that are electrically connected in parallel to one another. Each sub-circuit includes: a first internal node; and a first capacitor that has a first terminal electrically connected to the first internal node and a second terminal electrically connected to the haptic presentation section. The haptic presentation device controls an application voltage to the haptic presentation section or a current flowing through the haptic presentation section by controlling the potential of the first internal node of each sub-circuit.

Description

Technical Field

[0001] This invention relates to a tactile presentation device. Background Technology

[0002] In recent years, haptic presentation devices (sometimes called "haptic devices") that can present tactile sensations to users have attracted attention and have been promoted for applications in many fields such as healthcare, education, entertainment, and remote operation. Several types of haptic presentation devices are known.

[0003] From the perspectives of minimal individual differences in tactile sensitivity and superior safety, providing vibration to the user—that is, presenting tactile sensation through vibration stimulation (hereinafter referred to as "vibration mode")—is one of the most powerful methods. A tactile presentation device using a vibration mode is disclosed, for example, in Patent Document 1. Existing technical documents Patent documents

[0004] Patent Document 1: Japanese Patent Application Publication No. 2012-128499 Summary of the Invention The problem the invention aims to solve

[0005] In tactile presentation devices based on vibration, tactile sensation is presented by generating vibration using an actuator while a specific part of the human body (e.g., a finger) is in contact with the tactile presentation device. Furthermore, in this specification, the part of the tactile presentation device that actually presents tactile sensation, such as the actuator in the vibration method, is sometimes referred to as the "tactile presentation section." As the actuator, a piezoelectric element (also called a piezoelectric element) is used, for example.

[0006] However, in general, to generate sufficiently strong vibrations through a piezoelectric element, a high voltage of tens of volts or more needs to be applied to the piezoelectric element. To achieve tactile representation of multiple gray levels, special driver ICs are required to handle the high voltage, thus increasing manufacturing costs.

[0007] The embodiments of the present invention were made in view of the above-mentioned problems, and the object is to provide a tactile presentation device that can reduce manufacturing costs even when the tactile presentation part requires a relatively high applied voltage. Solution for solving the problem

[0008] This specification discloses the tactile presentation device described in the following items.

[0009] [Project 1] A tactile presentation device having multiple unit areas whose tactile presentation can be independently controlled, comprising: A tactile presentation unit, disposed in each of the plurality of unit regions, presents tactile sensation; and A unit circuit, electrically connected to the tactile presentation unit, drives the tactile presentation unit. The unit circuit comprises multiple sub-circuits that are electrically connected in parallel. Each of the plurality of sub-circuits includes: The first internal node; and The first capacitor has its first terminal electrically connected to the first internal node and its second terminal electrically connected to the tactile presentation unit. The voltage applied to the tactile presentation unit or the current flowing through the tactile presentation unit is controlled by controlling the potential of the first internal node of each of the plurality of sub-circuits.

[0010] [Project 2] According to the tactile presentation device described in Project 1, wherein... Each of the plurality of sub-circuits further includes: Second internal node; A first transistor, wherein one of its source and drain is supplied with a data voltage of a specified amplitude, and the other of its source and drain is electrically connected to the second internal node; and The second transistor has its gate electrically connected to the second internal node, one of its source and drain is given a drive voltage with an amplitude greater than that of the data voltage, and the other of its source and drain is electrically connected to the first internal node.

[0011] [Project 3] According to the tactile presentation device described in Project 2, wherein... Each of the plurality of sub-circuits further includes: a second capacitor, the first end of which is electrically connected to the second internal node, and the second end of which is electrically connected to the first internal node.

[0012] [Project 4] According to the tactile presentation device described in Project 2 or 3, wherein... Each of the plurality of sub-circuits further includes: The third transistor has one of its source and drain electrically connected to the first internal node, and the other of its source and drain electrically connected to a reference voltage source.

[0013] [Project 5] According to the tactile presentation device described in Project 2 or 3, wherein... Each of the plurality of sub-circuits does not contain a transistor for resetting the first internal node.

[0014] [Project 6] The tactile presentation device according to any one of items 2 to 5, wherein... The unit circuit also includes: The fourth transistor has one of its source and drain electrically connected to the second terminal of the first capacitor of each of the plurality of sub-circuits, and the other of its source and drain electrically connected to a reference voltage source.

[0015] [Project 7] The tactile presentation device according to any one of items 2 to 6, wherein... The first transistor of the plurality of sub-circuits is supplied with the data voltage from a common data voltage line.

[0016] [Project 8] The tactile presentation device according to any one of items 2 to 6, wherein... The first transistor of the plurality of sub-circuits is supplied with the data voltage from mutually different data voltage lines.

[0017] [Project 9] The tactile presentation device according to any one of items 2 to 8, wherein... The driving voltage supplied to the second transistor is a pulse voltage. The frequency of the pulse voltage is variable.

[0018] [Project 10] The tactile presentation device according to any one of items 2 to 9, wherein... It has a tactile presentation area that includes the multiple unit regions. The tactile presentation area includes multiple regions where the driving voltage supplied to the second transistor can be different from each other.

[0019] [Project 11] The tactile presentation device according to any one of items 2 to 10, wherein... The first transistor and the second transistor are each oxide semiconductor TFTs containing an oxide semiconductor layer.

[0020] [Project 12] The tactile presentation device according to any one of items 1 to 11, wherein... The capacitance values ​​of the first capacitors in the plurality of sub-circuits are the same.

[0021] [Project 13] The tactile presentation device according to any one of items 1 to 11, wherein... The capacitance values ​​of the first capacitors in the plurality of sub-circuits are different from each other.

[0022] [Project 14] The tactile presentation device according to any one of items 1 to 13, wherein... The unit circuit includes three or more sub-circuits.

[0023] [Project 15] The tactile presentation device according to any one of items 1 to 14, wherein... The tactile presentation unit includes: vibrating body layer; and The first electrode and the second electrode are arranged opposite each other with respect to each other across the vibrating body layer.

[0024] [Project 16] According to the tactile presentation device described in Project 15, wherein... The vibrating body layer is a piezoelectric layer formed of piezoelectric material.

[0025] [Project 17] The tactile presentation device according to any one of items 1 to 14, wherein... The tactile presentation unit can present tactile sensations through electrical stimulation. Invention Effects

[0026] According to embodiments of the present invention, a tactile presentation device can be provided that reduces manufacturing costs even when the tactile presentation part requires a relatively high applied voltage. Attached Figure Description

[0027] Figure 1 This is a block diagram schematically illustrating a tactile presentation device 100 according to an embodiment of the present invention. Figure 2 This is a diagram used to illustrate the fingertip pad (fp). Figure 3 This is a schematic top view of the tactile presentation element 1 of the tactile presentation device 100. Figure 4 This is a diagram showing the equivalent circuit of the unit area UR of the tactile presentation element 1. Figure 5 This is a diagram showing an example of the configuration of the data voltage line DL and the gate signal line GL. Figure 6 This is a coordinate graph showing the relationship between the gray level and the applied voltage Vpz to the tactile presentation unit 10 for the cases of Vp=62 [V], Cpz=15 [pF], and Cst=60 [pF]. Figure 7This is a timing diagram showing an example of the drive voltage Vp, gate signals S1, S2, S3, and initialization signal Sini. Figure 8A This is a diagram used to illustrate the operation of the tactile presentation device 100 (tactile presentation element 1). Figure 8B This is a diagram used to illustrate the operation of the tactile presentation device 100 (tactile presentation element 1). Figure 8C This is a diagram used to illustrate the operation of the tactile presentation device 100 (tactile presentation element 1). Figure 9 This is a graph showing the relationship between the applied voltage Vpz to the haptic presentation unit 10 and the data writing period. Figure 10 This is a diagram showing the equivalent circuit of the unit area UR of the tactile presentation element 1A. Figure 11 This is a diagram showing an example of the configuration of the data voltage line DL and the gate signal line GL in the tactile presentation element 1A. Figure 12 This is a timing diagram showing an example of the drive voltage Vp, gate signal S, and initialization signal Sini in the haptic presentation element 1A. Figure 13 This is a diagram showing the equivalent circuit of the unit region UR of the tactile presentation element 1B. Figure 14 This is a coordinate graph showing the relationship between the gray level presented and the applied voltage Vpz to the tactile presentation unit 10 for the cases of Vp=62 [V], Cpz=15 [pF], and Cs'=60 [pF] in the tactile presentation element 1B. Figure 15 This is a diagram showing the equivalent circuit of the unit region UR of the tactile presentation element 1C. Figure 16 This is a timing diagram showing an example of the drive voltage Vp, gate signal S, initialization signal Sini, and data voltage Vd in the haptic presentation element 1C. Figure 17 This is a diagram illustrating an example of how the frequency of the driving voltage Vp, which is a pulse voltage, changes. Figure 18 This is a diagram illustrating an example of an active region AR containing multiple regions with different drive voltages Vp. Figure 19 This is a diagram illustrating other examples of active regions AR that contain multiple regions with different drive voltages Vp. Figure 20 This is a diagram illustrating a tactile presentation device 200 using an electrical stimulation method. Explanation of reference numerals in the attached figures 1, 1A, 1B, 1C, 1D tactile presentation elements 2. Control device 10, 10A Tactile Presentation Section 11. Vibrating body layer (piezoelectric body layer) 12 First Electrode 13 Second Electrode 14 electrodes 20 Unit Circuits 21 Sub-circuits 21A Sub-circuit 1 21B Sub-circuit 2 21C Third Sub-circuit 100, 100A tactile presentation device 210 Personal Computer (PC) 220 Head-Mounted Display (HMD) N1 First internal node N2, second internal node Ts is the first transistor (set transistor). Tp is the second transistor (driving transistor). Tr - 3rd transistor (reset transistor) Tr' The 4th transistor (another reset transistor) TD 5th transistor (another driving transistor) Cs is the first capacitor (storage capacitor). Cbst, the second capacitor (bootstrap capacitor) UR unit area AR active area GL gate signal line DL data voltage line PL drive voltage line. Detailed Implementation

[0028] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.

[0029] Reference Figure 1 The tactile presentation device 100 of the present invention will be described below. Figure 1 This is a schematic block diagram illustrating the tactile presentation device 100. Figure 1 In addition to the haptic presentation device 100, a personal computer (PC) 210 and a head-mounted display (HMD) 220 are also shown.

[0030] like Figure 1As shown, the tactile presentation device 100 includes at least one tactile presentation element 1 and a control device 2 for controlling the tactile presentation element 1. In the illustrated example, the tactile presentation device 100 includes multiple tactile presentation elements 1, more specifically, five tactile presentation elements 1. Furthermore, the number of tactile presentation elements 1 is not limited to five.

[0031] When using the haptic presentation device 100, the five haptic presentation elements 1 interact with the user's hand (on... Figure 1 (Shown in dashed lines) The five fingers F of H are arranged in a way that their fingertips are in contact. Each tactile sensing element 1 stimulates the fingertip of one finger F with vibration to produce a tactile sensation. Here, as... Figure 2 As shown, "finger tip pad" refers to the area fp of finger F that is forward of the first joint j1 and located closer to the palm side than the center when viewed from the side.

[0032] Control device 2 controls haptic sensing element 1. Control device 2 controls haptic sensing element 1 based on control signals sent from PC 210. Data communication between control device 2 and PC 210 can be performed wirelessly or via wired communication. Wireless and wired communication can follow various known communication standards. Control device 2 can be implemented, for example, via a microcomputer.

[0033] The tactile sensing element 1 uses a flexible substrate, wiring, etc., to ensure that the wiring does not hinder the movement of the hand H. The control device 2 can be configured, for example, in a part corresponding to the user's arm. The tactile sensing element 1 and the control device 2 can also be integrated as a glove.

[0034] PC210 outputs image signals to HMD220, and HMD220 displays the received image signals. Additionally, HMD220 outputs location tracking data and other information related to its position to PC210. ​​Data communication between PC210 and HMD220 can be conducted wirelessly or via wired communication.

[0035] Furthermore, this example shows a tactile presentation device 100 presenting tactile sensation in conjunction with a display made by HMD 220, but the use of the tactile presentation device 100 is not limited to this.

[0036] Reference Figure 3 and Figure 4 To illustrate the specific structure of tactile presentation element 1. Figure 3 This is a schematic top view of the tactile presentation element 1. Figure 4 This is a diagram showing the equivalent circuit of the unit area UR of the tactile presentation element 1.

[0037] like Figure 3 As shown, the tactile presentation element 1 has multiple unit regions UR whose tactile presentation can be independently controlled. In the illustrated example, the multiple unit regions UR are arranged in a matrix with multiple rows and columns. Furthermore, in Figure 3 The example shown has 16 unit regions (URs), but the number of unit regions (URs) is not limited to this. Furthermore, the arrangement of multiple unit regions (URs) is not limited to this. Figure 3 The example shown illustrates this. Multiple unit regions UR can also be arranged in one row and multiple columns or multiple rows and one column. Furthermore, in the illustrated example, the shape of the unit region UR is approximately rectangular, but the shape of the unit region UR is not limited to this.

[0038] The haptic presentation area (hereinafter also referred to as the "active area") AR is defined by multiple unit areas UR. That is, the haptic presentation element 1 has an active area AR that includes multiple unit areas UR. In addition, although not shown here, the haptic presentation element 1 may also have a peripheral area (border area) disposed around the active area AR. In addition, in the example shown, the active area AR is generally rectangular, but the shape of the active area AR is not limited to being generally rectangular.

[0039] like Figure 4 As shown, the tactile presentation element 1 includes: a tactile presentation section 10 disposed in each of a plurality of unit regions UR; and a unit circuit 20 electrically connected to the tactile presentation section 10.

[0040] The tactile presentation unit 10 is the part in the tactile presentation element 1 that presents tactile sensation. Here, the tactile presentation unit 10 includes: a vibrating body layer 11; and a first electrode 12 and a second electrode 13, which are arranged opposite each other with respect to each other across the vibrating body layer 11.

[0041] The vibrating body layer 11 is a layer that undergoes physical deformation and vibrates in response to an applied voltage or current. Here, the vibrating body layer 11 is a piezoelectric layer formed of a piezoelectric material. Various known piezoelectric materials can be used as the piezoelectric material, such as zinc zirconate titanate (PZT) and barium titanate (BATiO3) piezoelectric ceramics. Alternatively, the piezoelectric material can be a material in which piezoelectric ceramic particles are dispersed in a resin material. Furthermore, piezoelectric materials other than piezoelectric ceramics (such as piezoelectric single crystals like quartz) can also be used. The thickness of the piezoelectric body layer 11 is not particularly limited.

[0042] Furthermore, the vibrator layer is not limited to the illustrated vibrator layer. Organic actuators using PVDF (polyvinylidene fluoride) or ionically conductive polymers, layers containing tiny induction coils, etc., can also be used as vibrator layers. PVDF is a type of piezoelectric material; therefore, organic actuators using PVDF can also be called piezoelectric layers.

[0043] The first electrode 12 and the second electrode 13 can each be formed from various known conductive materials, such as metals like copper (Cu), nickel (Ni), silver (Ag), and gold (Au), alloys like Al-Nd alloys (aluminum-neodymium alloys), or metal oxides like indium tin oxide (ITO). There are no particular limitations on the thickness of the first electrode 12 and the second electrode 13.

[0044] The first electrode 12 is electrically connected to the unit circuit 20. The second electrode 13 is electrically connected to the reference voltage source GND. When a voltage is applied between the first electrode 12 and the second electrode 13, the piezoelectric layer 11 deforms. More specifically, the piezoelectric layer 11 stretches and contracts in the thickness direction, thereby generating vibration.

[0045] The unit circuit 20 drives the tactile presentation unit 10. The configuration of the unit circuit 20 will be described below. As will be described later, the unit circuit 20 includes multiple transistors as switching elements. The transistors included in the unit circuit 20 are typically TFTs. The following description uses an n-type TFT as an example of the switching element included in the unit circuit 20. Note that the electrical connection between the source and drain of a p-type TFT is reversed compared to the electrical connection between the source and drain of an n-type TFT.

[0046] The unit circuit 20 includes multiple sub-circuits 21 that are electrically connected in parallel. In the illustrated example, the unit circuit 20 includes three sub-circuits 21, specifically, a first sub-circuit 21A, a second sub-circuit 21B, and a third sub-circuit 21C.

[0047] Each of the multiple sub-circuits 21 includes a first internal node N1, a second internal node N2, a first transistor Ts, a second transistor Tp, a third transistor Tr, a first capacitor Cs, and a second capacitor Cbst. Furthermore, in the following description, the components of the first sub-circuit 21A are sometimes designated with a sub-number such as "_1" after the reference numerals (e.g., the first transistor Ts of the first sub-circuit 21A is sometimes referred to as the first transistor Ts_1). Similarly, the components of the second sub-circuit 21B are sometimes designated with a sub-number such as "_2" after the reference numerals, and the components of the third sub-circuit 21C are sometimes designated with a sub-number such as "_3" after the reference numerals.

[0048] The gate of the first transistor Ts is given a gate signal. Here, the first transistor Ts_1 of the first sub-circuit 21A, the first transistor Ts_2 of the second sub-circuit 21B, and the first transistor Ts_3 of the third sub-circuit 21C are given different gate signals S1, S2, and S3. The source of the first transistor Ts is electrically connected to the data voltage line DL and is given a data voltage Vd with a specified amplitude. Here, the first transistors Ts of the multiple sub-circuits 21 are supplied with the data voltage Vd from the common data voltage line DL. The drain of the first transistor Ts is electrically connected to the second internal node N2. Hereinafter, the first transistor Ts will also be referred to as the "set transistor".

[0049] The gate of the second transistor Tp is electrically connected to the second internal node N2. The source of the second transistor Tp is electrically connected to the drive voltage line PL and is supplied with a drive voltage Vp having an amplitude larger than that of the data voltage Vd. Here, the drive voltage Vp supplied to the second transistor Tp is a pulse voltage (square wave). The drain of the second transistor Tp is electrically connected to the first internal node N1. Hereinafter, the second transistor Tp will also be referred to as the "drive transistor".

[0050] The gate of transistor 3 Tr is given the initialization signal Sini. The source of transistor 3 Tr is electrically connected to the reference voltage source GND. The drain of transistor 3 Tr is electrically connected to the first internal node N1. Hereinafter, transistor 3 Tr will also be referred to as the "reset transistor".

[0051] The first terminal of the second capacitor Cbst is electrically connected to the second internal node N2. The second terminal of the second capacitor Cbst is electrically connected to the first internal node N1. Therefore, it can be said that the second capacitor Cbst is positioned between the first internal node N1 and the second internal node N2. Hereinafter, the second capacitor Cbst will also be referred to as the "bootstrap capacitor".

[0052] The first terminal of the first capacitor Cs is electrically connected to the first internal node N1. The second terminal of the first capacitor Cs is electrically connected to the tactile presentation unit 10. Therefore, it can be said that the first capacitor Cs is disposed between the first internal node N1 and the tactile presentation unit 10. Here, the capacitance values ​​of the first capacitor Cs_1 of the first sub-circuit 21A, the first capacitor Cs_2 of the second sub-circuit 21B, and the first capacitor Cs_3 of the third sub-circuit 21C are the same. That is, if the capacitance values ​​of the first capacitors Cs_1, Cs_2, and Cs_3 are represented by the same reference numerals, and their sum is represented as "Cst", then Cs_1 = Cs_2 = Cs_3 = (1 / 3)·Cst. Hereinafter, the first capacitor Cs will also be referred to as the "storage capacitor".

[0053] In addition to the multiple sub-circuits 21 described above, unit circuit 20 also includes a fourth transistor Tr'. The gate of the fourth transistor Tr' is given an initialization signal Sini. The source of the fourth transistor Tr' is electrically connected to the reference voltage source GND. The drain of the fourth transistor Tr' is electrically connected to the second terminal of the first capacitor Cs of each sub-circuit 21. Hereinafter, the fourth transistor Tr' will also be referred to as the "additional reset transistor".

[0054] Figure 5 This diagram illustrates an example configuration of the data voltage line DL supplying data voltage Vd to each unit circuit 20 and the gate signal lines GL supplying gate signals S1, S2, and S3 to each unit circuit 20. Figure 5 In the example shown, multiple unit regions UR are arranged in n rows and m columns.

[0055] like Figure 5 As shown, multiple data voltage lines DL extend in the column direction, with one data voltage line DL configured for each unit area column. Furthermore, in Figure 5 In this context, the voltage Vd supplied to the data in columns 1, 2, 3, ..., m is denoted as Vd(1), Vd(2), Vd(3), ..., Vd(m), respectively. Additionally, as... Figure 5 As shown, multiple gate signal lines GL extend in the row direction, with three gate signal lines GL arranged in each unit area row. Furthermore, in Figure 5 In the diagram, the gate signals S1 supplied to the first row, second row, third row, ..., nth row are respectively denoted as S1(1), S1(2), S1(3), ..., S1(n). Similarly, the gate signals S2 supplied to the first row, second row, third row, ..., nth row are respectively denoted as S2(1), S2(2), S2(3), ..., S2(n), and the gate signals S3 supplied to the first row, second row, third row, ..., nth row are respectively denoted as S3(1), S3(2), S3(3), ..., S3(n).

[0056] In the tactile presentation device 100 according to an embodiment of the present invention, the effective capacitance value of the capacitor (the storage capacitor Cs of the multiple sub-circuits 21) connected to the tactile presentation unit 10 is changed by controlling the on / off state of the driving transistors Tp of the multiple sub-circuits 21 (in other words, by appropriately selecting a combination of driving transistors Tp_1, Tp_2, and Tp_3 that are set to the on state), thereby controlling the amplitude of the voltage Vpz applied to the tactile presentation unit 10. Therefore, multiple grayscale levels of tactile presentation can be appropriately performed.

[0057] exist Figure 4The illustrated configuration enables tactile presentation of four gray levels, from 0 to 3 gray levels. Furthermore, in the following examples, the Y gray level in a tactile presentation of X gray levels is sometimes represented as "Y / X gray level". For example, the 2 gray levels in a tactile presentation of four gray levels are sometimes represented as "2 / 4 gray level".

[0058] The case where all three driving transistors Tp in unit circuit 20 are turned off is called "0 gray level", the case where one driving transistor Tp is turned on and two driving transistors Tp are turned off is called "1 gray level", the case where two driving transistors Tp are turned on and one driving transistor Tp is turned off is called "2 gray level", and the case where all three driving transistors Tp are turned on is called "3 gray level".

[0059] When k is set to represent grayscale level (0-3), the applied voltage Vpz to the tactile presentation unit 10 is expressed by the following formula: the sum of the capacitance values ​​Cst of the storage capacitors Cs_1, Cs_2 and Cs_3, the capacitance value (piezoelectric capacitance) Cpz of the tactile presentation unit 10, and the driving voltage Vp. Vpz=[{(k / 3)·Cst} / {(k / 3)·Cst+Cpz}]·Vp

[0060] Figure 6 This is a graph showing the relationship between the grayscale level and the applied voltage Vpz to the tactile display unit 10 for the cases of Vp=62 [V], Cpz=15 [pF], and Cst=60 [pF]. Figure 6 In the example shown, the applied voltage Vpz to the tactile presentation unit 10 is 0V at 0 gray level, approximately 35V at 1 gray level, approximately 45V at 2 gray levels, and approximately 50V at 3 gray levels.

[0061] Figure 7 This is a timing diagram showing an example of the drive voltage Vp, gate signals S1, S2, S3, and initialization signal Sini.

[0062] like Figure 7As shown, the driving voltage Vp is a pulse voltage. Data is written to the active region AR during the period when the driving voltage Vp is low. During the data writing period, each unit region row is scanned sequentially as row 1, row 2, ..., row n. In the illustrated example, during the scanning period of each unit region row (one horizontal scan period), the gate signals S1, S2, and S3 sequentially become high, so the set transistors Ts_1, Ts_2, and Ts_3 sequentially become on during one horizontal scan period. Although not illustrated here, the data voltage Vd can be a binary signal used to select the on / off state of the driving transistors Tp_1, Tp_2, and Tp_3. The initialization signal Sini is a signal that is high during the data writing period and low during other periods.

[0063] Here, refer to Figure 8A , Figure 8B as well as Figure 8C Here's an example illustrating the operation of the tactile presentation device 100 (tactile presentation element 1). We'll use the case of 2 / 4 grayscale tactile presentation with the voltage and capacitance values ​​shown in Table 1 as an example. Figure 8A , Figure 8B as well as Figure 8C In the diagram, a '0' symbol on a transistor indicates that the transistor is in the on state, and an '×' symbol on a transistor indicates that the transistor is in the off state. Additionally, an '×' symbol on a portion of the storage capacitor Cs indicates that the storage capacitor Cs is not effectively functioning as a capacitor connected to the haptic display unit 10. Furthermore, in... Figure 8A , Figure 8B as well as Figure 8C The diagram shows the potentials at several points in the circuit.

[0064] Table 1

[0065] Step 1: Reset and Data Writing ( Figure 8A )] First, such as Figure 8A As shown, during data writing (when the driving voltage Vp is low (=0V)), the set transistors Ts_1, Ts_2, and Ts_3 of the first sub-circuit 21A, the second sub-circuit 21B, and the third sub-circuit 21C are sequentially turned on to write data to the second internal node N2. In this example, a data voltage Vp (specifically 5V) is written to the second internal node N2 of the first sub-circuit 21A and the third sub-circuit 21C to turn on the driving transistor Tp, and a data voltage Vp (specifically -5V) is written to the second internal node N2 of the second sub-circuit 21B to turn off the driving transistor Tp.

[0066] Additionally, at this time, the reset transistors Tr_1, Tr_2, and Tr_3 of the first sub-circuit 21A, the second sub-circuit 21B, and the third sub-circuit 21C, as well as the other reset transistor Tr', are all turned on, and the nodes other than the second internal node N2 are reset to 0V.

[0067] Step 2: Apply a high-level driving voltage Vp ( Figure 8B )] After the data writing period ends, the drive voltage Vp becomes high (i.e., 62V) and as... Figure 8B As shown, reset transistors Tr_1, Tr_2, and Tr_3, along with the other reset transistor Tr', are all in the off state. At this time, since set transistors Ts_1, Ts_2, and Ts_3 are also all in the off state, the second internal nodes N2_1, N2_2, and N2_3 are all in a floating state. Therefore, the voltage applied to the bootstrap capacitor Cbst, i.e., the potential difference between the first internal node N1 and the second internal node N2, is maintained by the charge charged into the bootstrap capacitor Cbst. Since the driving transistors Tp_1 of the first sub-circuit 21A and Tp_3 of the third sub-circuit 21C are in the on state, when their source potentials rise, the potentials of the second internal nodes N2_1 and N2_3 also rise. Specifically, since the source potentials of driving transistors Tp_1 and Tp_3 rise to 62V, the potentials of the second internal nodes N2_1 and N2_3 rise to 67V. Through this bootstrapping, the conduction state of the driving transistor Tp_1 and the driving transistor Tp_3 of the third sub-circuit 21C is maintained, so the driving voltage Vp is transmitted to the haptic presentation unit 10 at 2 / 3 times the original size (i.e., about 45V).

[0068] Step 3: Apply a low-level drive voltage Vp ( Figure 8C )] Next, it is linked to the drive voltage Vp becoming low (i.e., 0V), such as Figure 8C As shown, each node returns to the state of step 1. A low-level driving voltage Vp (i.e., 0V) is transmitted to the haptic presentation unit 10.

[0069] Thus, in the tactile presentation device 100 according to an embodiment of the present invention, by controlling the on / off state of the driving transistor Tp of the plurality of sub-circuits 21, the effective capacitance value of the capacitor connected to the tactile presentation unit 10 is changed, thereby controlling the amplitude of the voltage Vpz applied to the tactile presentation unit 10. This can also be expressed as: the tactile presentation device 100 controls the potential of the first internal node N1 of each of the plurality of sub-circuits 21 (please also note...) Figure 8A , Figure 8B as well as Figure 8CThe potential of the first internal node N1 shown is used to control the voltage applied to the tactile presentation unit 10.

[0070] In the tactile presentation device 100 of the embodiment of the present invention, as can be seen from the above-described operating example, only the driving voltage Vp is driven at a relatively high voltage, while other signals can be driven at a relatively low voltage. Therefore, in the driving circuit for driving the data voltage line DL, a general-purpose driver IC for display devices can be used, thereby reducing manufacturing costs. Furthermore, since the driving circuit for driving the data voltage line DL can be a binary driver for controlling the on / off state of transistors, manufacturing costs can be further reduced.

[0071] Furthermore, in the tactile presentation device 100 according to the embodiments of the present invention, the on-state voltage (gate-source voltage Vgs) applied to each transistor of the unit circuit 20 can be suppressed to a low level (in the above example, the gate-source voltage Vgs in the off-state transistor is -5V, and the gate-source voltage Vgs in the on-state transistor is 5V). Therefore, it is possible to suppress large shifts in the threshold voltage of the transistors of the unit circuit 20 or damage to the transistors of the unit circuit 20.

[0072] Figure 9 This is a graph showing the relationship between the applied voltage Vpz to the haptic presentation unit 10 and the data writing period. From Figure 9 It can also be seen that data writing occurs during the period when the drive voltage Vp is low, just before the amplitude of the applied voltage Vpz changes. During other periods (hereinafter referred to as "absence periods"), the gate scan (scanning of a unit region column) can be aborted, and the driver driving the data signal line DL is set to high impedance (Hi-Z). That is, during the abortion period, only the drive voltage line PL supplying the drive voltage Vp needs to be driven, and since other signals can be set to an aborted state, low power consumption can be achieved.

[0073] During the aforementioned suspension period, from the viewpoint of maintaining a constant potential by suppressing charge leakage from the second internal node N2 of the unit circuit 20, each transistor of the unit circuit 20 is preferably an oxide semiconductor TFT containing an oxide semiconductor layer as an active layer.

[0074] In addition, Figure 4 The example shown is a unit circuit 20 containing three sub-circuits 21, but the number of sub-circuits 21 is not limited to three. The number of sub-circuits 21 can also be two or more.

[0075] In addition, Figure 4The diagram shows an example where each sub-circuit 21 includes a bootstrap capacitor (second capacitor) Cbst, but the configuration of the sub-circuit 21 is not limited to this example. When the driving transistor Tp has a sufficiently large capacitance (e.g., when the size of the driving transistor Tp is large), this capacitor can be used instead of the bootstrap capacitor Cbst, so the bootstrap capacitor Cbst can also be omitted.

[0076] Next, a modified example of the tactile presentation device 100 will be described.

[0077] The haptic presentation device 100 can also be equipped with Figure 10 The tactile presentation element 1A shown is used to replace Figure 4 The tactile presentation element 1 shown.

[0078] exist Figure 4 In the tactile presentation element 1 shown, the first transistors Ts_1, Ts_2, and Ts_3 of the first sub-circuit 21A, the second sub-circuit 21B, and the third sub-circuit 21C are given different gate signals S1, S2, and S3. Furthermore, the first transistors Ts_1, Ts_2, and Ts_3 are supplied with a data voltage Vd from a common data voltage line DL.

[0079] In contrast, Figure 10 In the tactile presentation element 1A shown, the first transistors Ts_1, Ts_2, and Ts_3 of the first sub-circuit 21A, the second sub-circuit 21B, and the third sub-circuit 21C are given a common gate signal S. Furthermore, the first transistors Ts_1, Ts_2, and Ts_3 are supplied with data voltages Vd1, Vd2, and Vd3 respectively from different data voltage lines DL.

[0080] Figure 11 This is a diagram showing an example of the configuration of data voltage lines DL supplying data voltages Vd1, Vd2, and Vd3 to each unit circuit 20 of the tactile presentation element 1A and gate signal lines GL supplying gate signals S to each unit circuit 20.

[0081] In the tactile presentation element 1A, such as Figure 11 As shown, three data voltage lines (DL) are configured for each unit area column. Furthermore, in... Figure 11In this context, the data voltage Vd1 supplied to the 1st, 2nd, 3rd, ..., mth columns is denoted as Vd1(1), Vd1(2), Vd1(3), ..., Vd1(m), respectively. Similarly, the data voltage Vd2 supplied to the 1st, 2nd, 3rd, ..., mth columns is denoted as Vd2(1), Vd2(2), Vd2(3), ..., Vd2(m), and the data voltage Vd3 supplied to the 1st, 2nd, 3rd, ..., mth columns is denoted as Vd3(1), Vd3(2), Vd3(3), ..., Vd3(m). Furthermore, in the tactile presentation element 1A, one gate signal line GL is arranged in each unit area row. Additionally, in... Figure 11 In the diagram, the gate signals S supplied to the first row, the second row, the third row, ..., the nth row are respectively denoted as S(1), S(2), S(3) ... S(n).

[0082] Figure 12 This is a timing diagram showing an example of the drive voltage Vp, gate signal S, and initialization signal Sini in the haptic presentation element 1A.

[0083] like Figure 12 As shown, data is written to the active region AR while the driving voltage Vp is low. During the data writing period, each unit region row is scanned sequentially as row 1, row 2, ..., row n. Figure 12 In the example shown, during the period when each unit region row is scanned (one horizontal scan period), the set transistors Ts_1, Ts_2, and Ts_3 are simultaneously turned on by a common gate signal S. The turn-on / turn-off of the drive transistors Tp_1, Tp_2, and Tp_3 is selected according to the potentials of the data voltages Vd1, Vd2, and Vd3.

[0084] Thus, in Figure 10 In the tactile sensing element 1A shown, it is driven by simultaneously turning on the set transistors Ts_1, Ts_2, and Ts_3, so it can be more responsive than... Figure 4 The haptic sensing element 1 shown performs data writing at a higher speed. Therefore, it is more advantageous in dealing with high-frequency driving or high-precision active area AR.

[0085] The haptic presentation device 100 can also be equipped with Figure 13 The tactile presentation element 1B is shown. Figure 13In the tactile presentation element 1B shown, the capacitance values ​​of the storage capacitor CsA in the first sub-circuit 21A, the storage capacitor CsB in the second sub-circuit 21B, and the storage capacitor CsC in the third sub-circuit 21C are different from each other. When the capacitance values ​​of the storage capacitors CsA, CsB, and CsC are assumed to be represented by the same reference numerals, the capacitance values ​​of the storage capacitors CsA, CsB, and CsC are, for example, set to satisfy the relationship CsA = 2·CsB = 4·CsC. When twice the capacitance value CsA is assumed to be represented as "Csv", this relationship can be expressed as: CsA = (1 / 2)·Csv, CsB = (1 / 4)·Csv, CsC = (1 / 8)·Csv.

[0086] By making the capacitance values ​​of the storage capacitors CsA, CsB, and CsC of the multiple sub-circuits 21 different from each other, it is possible to achieve a configuration that is not like this (e.g., Figure 4 The tactile presentation element 1 shown is configured such that the storage capacitors Cs_1, Cs_2, and Cs_3 have the same capacitance values. A circuit with the same or smaller scale can achieve more grayscale levels of tactile presentation. Specifically, when the number of sub-circuits 21 is set to X, 2... X The number of gray levels. In Figure 13 In the example shown, since the number of sub-circuits 21 is 3, it is possible to perform 8 (=2) 3 A grayscale tactile presentation.

[0087] When the capacitance values ​​of storage capacitors CsA, CsB, and CsC are set to satisfy the exemplified relationship (i.e., CsA = (1 / 2)·Csv, CsB = (1 / 4)·Csv, CsC = (1 / 8)·Csv), and k is set to display gray levels (0 to 7), the applied voltage Vpz to the tactile display unit 10 is expressed by the following formula. Vpz=[{(k / 8)·Csv} / {(k / 8)·Csv+Cpz}]·Vp

[0088] Figure 14 This is a graph showing the relationship between the grayscale level and the applied voltage Vpz to the tactile display unit 10 for the cases of Vp=62 [V], Cpz=15 [pF], and Csv=60 [pF]. Figure 14 In the example shown, the applied voltage Vpz to the tactile presentation unit 10 is 0V at gray level 0, approximately 21V at gray level 1, approximately 31V at gray level 2, and approximately 37V at gray level 3. Furthermore, the applied voltage Vpz is approximately 41V at gray level 4, approximately 44V at gray level 5, approximately 47V at gray level 6, and approximately 48V at gray level 7.

[0089] The haptic presentation device 100 can also be equipped with Figure 15 The tactile presentation element 1C shown is shown. Figure 15 The haptic presentation element 1C shown does not include a reset transistor Tr in each sub-circuit 21, which is consistent with... Figure 13 The haptic presentation element 1B shown is different. That is, each sub-circuit 21 of the haptic presentation element 1C does not contain a transistor for resetting the first internal node N1.

[0090] In the haptic display element 1C, a reset operation can be performed by setting a reset period before data writing. During the reset period, by setting gate signals S1, S2, and S3 to a high level and the data voltage Vd to a high level, driving transistors Tp_1, Tp_2, and Tp_3 are turned on, so a low-level driving voltage Vp (i.e., 0V) can be written. Therefore, in the haptic display element 1C, data writing can be performed without the reset transistors Tr_1, Tr_2, and Tr_3. Figure 13 The reset of the first internal node N1 in the haptic presentation element 1B shown is handled by reset transistors Tr_1, Tr_2, and Tr_3. Therefore, the circuit size can be reduced, making the haptic presentation element 1C advantageous in terms of high precision or improved yield.

[0091] Figure 16 This is a timing diagram showing an example of the drive voltage Vp, gate signal S, initialization signal Sini, and data voltage Vd in the haptic presentation element 1C.

[0092] exist Figure 16 In the example shown, before the data is written during the data writing period (when the drive voltage Vp is low), a common reset period is set for all unit area rows, during which the above-mentioned reset action is performed.

[0093] In addition, Figure 16 The example shown is an example of setting a common reset period for all unit area rows, but it is not limited to this. The reset action can also be performed before data is written to each unit area row, or before data is written to each sub-circuit 21.

[0094] The tactile presentation device 100 can also be configured such that the frequency of the driving voltage Vp, which is a pulse voltage, is variable. Figure 17 The example shown illustrates a change in the frequency of the drive voltage Vp. For example... Figure 17 As shown, by changing the frequency of the driving voltage Vp, the frequency of the applied voltage Vpz to the haptic presentation unit 10 can also be changed synchronously.

[0095] Furthermore, when the frequency of the driving voltage Vp is varied, the length of the period during which the driving voltage Vp is at a low level (the period during which the data writing period can be set) naturally changes. Therefore, when the frequency of the driving voltage Vp is variable, the tactile presentation device 100 is configured to complete data writing within the aforementioned period even when the frequency of the driving voltage Vp is at its highest.

[0096] The driving voltage Vp can be supplied the same or different throughout the entire active region (haptic presentation region) AR. That is, the active region AR can also contain multiple regions where the driving voltage Vp supplied to the driving transistor Tp can be different from each other. Figure 18 and Figure 19 The image shows an example of such a structure.

[0097] exist Figure 18 In the example shown, the active region AR includes region 1 R1, region 2 R2, and region 3 R3. Region 1 R1, region 2 R2, and region 3 R3 are arranged in the row direction (more specifically, in 1 row and 3 columns).

[0098] Region 1 R1 is supplied with drive voltage Vp1 via drive voltage line PL1. Region 2 R2 is supplied with drive voltage Vp2 via drive voltage line PL2, and Region 3 R3 is supplied with drive voltage Vp3 via drive voltage line PL3. Drive voltages Vp1, Vp2, and Vp3 can be different from each other.

[0099] exist Figure 19 In the example shown, the active region AR includes region 1 R1, region 2 R2, region 3 R3, region 4 R4, region 5 R5, and region 6 R6. Regions 1 R1, 2 R2, 3 R3, 4 R4, 5 R5, and 6 R6 are arranged in both row and column directions (more specifically, in a 2x3 row, 3x3 column configuration).

[0100] Region 1 R1 is supplied with drive voltage Vp1 via drive voltage line PL1, and Region 2 R2 is supplied with drive voltage Vp2 via drive voltage line PL2. Region 3 R3 is supplied with drive voltage Vp3 via drive voltage line PL3, and Region 4 R4 is supplied with drive voltage Vp4 via drive voltage line PL4. Region 5 R5 is supplied with drive voltage Vp5 via drive voltage line PL5, and Region 6 R6 is supplied with drive voltage Vp6 via drive voltage line PL6. Drive voltages Vp1, Vp2, Vp3, Vp4, Vp5, and Vp6 can be different from each other.

[0101] Through such Figure 18 and Figure 19As shown in the example, the active region AR is divided into multiple regions with different driving voltages Vp, which allows vibrations of different frequencies to coexist within the active region AR, thus enabling a more delicate tactile presentation.

[0102] In addition, Figure 18 and Figure 19 Examples are shown below, illustrating multiple regions with different driving voltages Vp arranged in the row direction and in both the row and column directions. However, these multiple regions can also be arranged in the column direction. Furthermore, the number of these multiple regions is not limited. Figure 18 and Figure 19 The example shown.

[0103] In the description so far, a tactile presentation device 100 in the form of vibration has been illustrated, but the tactile presentation device of the embodiments of the present invention is not limited to the form of vibration. For example, it may also be a form of tactile presentation by electrical stimulation (hereinafter referred to as "electrical stimulation method").

[0104] exist Figure 20 The diagram shows a tactile presentation device 100A that uses electrical stimulation. The tactile presentation element 1D included in the tactile presentation device 100A is similar to the tactile presentation section 10A that can present tactile sensation through electrical stimulation. Figure 13 The tactile presentation element 1B shown is different. Here, the tactile presentation section 10A includes an electrode 14 in contact with a resistive element Re. The resistive element Re is, for example, the user's finger. Furthermore, the tactile presentation element 1D is also different from the tactile presentation element 1B in the following aspects. Figure 13 The tactile presentation element 1B shown is different.

[0105] The unit circuit 20 of the haptic presentation element 1D includes two fourth transistors (an additional reset transistor) Tr'. Additionally, the unit circuit 20 of the haptic presentation element 1D also includes a fifth transistor TD.

[0106] The gate of the fifth transistor TD is electrically connected to the second terminal of the first capacitors CsA, CsB, and CsC in each sub-circuit 21. The source of the fifth transistor TD is electrically connected to the negative power supply VSS. The drain of the fifth transistor TD is electrically connected to the tactile presentation unit 10A. Hereinafter, the fifth transistor TD will also be referred to as the "additional driving transistor".

[0107] One of the two additional reset transistors Tr', reset transistor Tr'1, is related to... Figure 13Similarly, the drain of the additional reset transistor Tr' of the haptic sensing element 1B shown is electrically connected to the second terminal of the second capacitors CsA, CsB, and CsC of each sub-circuit 21. However, the source of the additional reset transistor Tr'1 is not electrically connected to the reference voltage source GND but to the negative power supply VSS. The other reset transistor Tr'2 of the two additional reset transistors Tr' has its source electrically connected to the reference voltage source GND and its drain electrically connected to the drain of the additional driving transistor TD. During the reset operation, through these additional reset transistors Tr'1 and Tr'2, the gate voltage of the additional driving transistor TD is initialized to the potential of the negative power supply VSS, and the drain voltage of the additional driving transistor TD is initialized to the potential of the reference voltage source GND.

[0108] The haptic presentation element 1D of the haptic presentation device 100A and Figure 13 The haptic presentation element 1B shown operates almost identically. However, in the haptic presentation element 1D, a voltage corresponding to the grayscale level is applied to the gate of another driving transistor TD, and a current corresponding to the difference between the gate voltage and the source voltage (the potential of the negative power supply VSS) of the other driving transistor TD flows along the path of the reference voltage source GND, the resistor Re (e.g., a finger), the other driving transistor TD, and the negative power supply VSS. Furthermore, it can also be said that the illustrated haptic presentation device 100A controls the current flowing through the haptic presentation section 10A by controlling the potential of the first internal node N1 of each of the plurality of sub-circuits 21.

[0109] The same effect as the vibration-based tactile presentation device 100A can be obtained in the tactile presentation device 100A that uses electrical stimulation. Industrial availability

[0110] According to embodiments of the present invention, a tactile presentation device can be provided that reduces manufacturing costs even when the tactile presentation unit requires a relatively high applied voltage. Embodiments of the present invention can be suitably used, for example, in vibration-based tactile presentation devices.

Claims

1. A tactile presentation device having multiple unit areas whose tactile presentation can be independently controlled, characterized in that, have: A tactile presentation unit, disposed in each of the plurality of unit regions, presents tactile sensation; and A unit circuit, electrically connected to the tactile presentation unit, drives the tactile presentation unit. The unit circuit comprises multiple sub-circuits that are electrically connected in parallel. Each of the plurality of sub-circuits includes: The first internal node; and The first capacitor has its first terminal electrically connected to the first internal node and its second terminal electrically connected to the tactile presentation unit. The voltage applied to the tactile presentation unit or the current flowing through the tactile presentation unit is controlled by controlling the potential of the first internal node of each of the plurality of sub-circuits.

2. The tactile presentation device according to claim 1, wherein, Each of the plurality of sub-circuits further includes: Second internal node; The first transistor has one of its source and drain terminals being supplied with a data voltage of a specified amplitude, and the other of its source and drain terminals being electrically connected to the second internal node. as well as The second transistor has its gate electrically connected to the second internal node, one of its source and drain is given a drive voltage with an amplitude greater than that of the data voltage, and the other of its source and drain is electrically connected to the first internal node.

3. The tactile presentation device according to claim 2, wherein, Each of the plurality of sub-circuits further includes: a second capacitor, the first end of which is electrically connected to the second internal node, and the second end of which is electrically connected to the first internal node.

4. The tactile presentation device according to claim 2, wherein, Each of the plurality of sub-circuits further includes: The third transistor has one of its source and drain electrically connected to the first internal node, and the other of its source and drain electrically connected to a reference voltage source.

5. The tactile presentation device according to claim 2, wherein, Each of the plurality of sub-circuits does not contain a transistor for resetting the first internal node.

6. The tactile presentation device according to claim 2, wherein, The unit circuit also includes: The fourth transistor has one of its source and drain electrically connected to the second terminal of the first capacitor of each of the plurality of sub-circuits, and the other of its source and drain electrically connected to a reference voltage source.

7. The tactile presentation device according to claim 2, wherein, The first transistor of the plurality of sub-circuits is supplied with the data voltage from a common data voltage line.

8. The tactile presentation device according to claim 2, wherein, The first transistor of the plurality of sub-circuits is supplied with the data voltage from mutually different data voltage lines.

9. The tactile presentation device according to claim 2, wherein, The driving voltage supplied to the second transistor is a pulse voltage. The frequency of the pulse voltage is variable.

10. The tactile presentation device according to claim 2, wherein, It has a tactile presentation area that includes the multiple unit regions. The tactile presentation area includes multiple regions where the driving voltage supplied to the second transistor can be different from each other.

11. The tactile presentation device according to claim 2, wherein, The first transistor and the second transistor are each oxide semiconductor TFTs containing an oxide semiconductor layer.

12. The tactile presentation device according to claim 1, wherein, The capacitance values ​​of the first capacitors in the plurality of sub-circuits are the same.

13. The tactile presentation device according to claim 1, wherein, The capacitance values ​​of the first capacitors in the plurality of sub-circuits are different from each other.

14. The tactile presentation device according to claim 1, wherein, The unit circuit includes three or more sub-circuits.

15. The tactile presentation device according to any one of claims 1 to 14, wherein, The tactile presentation unit includes: vibrating body layer; and The first electrode and the second electrode are arranged opposite each other with respect to each other across the vibrating body layer.

16. The tactile presentation device according to claim 15, wherein, The vibrating body layer is a piezoelectric layer formed of piezoelectric material.

17. The tactile presentation device according to any one of claims 1 to 14, wherein, The tactile presentation unit can present tactile sensations through electrical stimulation.

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