An optimization method and device for integer divider
By using lookup tables and combinational logic adders to optimize the integer divider, the problems of excessive resource consumption and latency in high-precision integer dividers are solved. This results in low-latency, low-resource-consumption, and logically simple integer division by 3 and (2ⁿ)×3, which is suitable for FPGA/ASIC digital circuit design.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING FENGHUA CHUANGZHI TECHNOLOGY CO LTD
- Filing Date
- 2026-04-16
- Publication Date
- 2026-06-05
AI Technical Summary
Existing high-precision integer dividers consume excessive resources, have huge circuit delays, and are logically complex in scenarios such as dividing by 3 and (2ⁿ)×3, and cannot meet the timing and resource requirements of FPGA/ASIC.
The implementation scheme adopts a lookup table and a combinational logic adder. By establishing a lookup table for quotient and remainder values, using the dividend as a mask, the quotient and remainder values are extracted from the lookup table, and then adjusted by summation and remainder correction to finally output the quotient and remainder that meet the requirements.
It significantly reduces circuit latency, minimizes hardware resource consumption, and features simple and easily expandable logic. Its performance in specific scenarios surpasses that of general division algorithms, meeting the timing and resource requirements of high-precision division.
Smart Images
Figure CN122152269A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of digital circuit design technology, and more specifically, relates to an optimization method and apparatus for an integer divider. Background Technology
[0002] In digital circuit design such as FPGA / ASIC, high-precision integer division (scenarios where the operand and result bit width is 64 bits, 128 bits, 256 bits, or even 1024 bits, which is much larger than the basic word length) is a type of operation that is difficult to implement. Division itself is a complex and resource-intensive operation in hardware, especially in scenarios such as division by 3 or division by 6, which cannot be achieved by simple bit truncation.
[0003] In existing technologies, high-precision integer division is mainly achieved using two methods: iterative shift-subtraction algorithms and the Newton-Raphson iterative method. However, both have significant drawbacks. In the iterative shift-subtraction algorithm, circuit delay is proportional to division precision. When implementing ultra-high precision division such as 1024 bits, the delay increases dramatically, failing to meet the timing requirements of digital circuits. In the Newton-Raphson iterative method, high-quality initial approximations are required, resulting in complex logic. Each iteration requires two multiplications and one subtraction, consuming significant hardware resources such as multipliers. The bit width of intermediate results needs to be greater than the final precision, necessitating additional bit width management logic. Furthermore, denormalized numbers and special values such as 0 require separate processing modules, further increasing circuit complexity.
[0004] Therefore, for specific scenarios such as dividing by 3 or (2ⁿ)×3, existing general division algorithms cannot optimize resources and latency, and a targeted integer divider implementation scheme is urgently needed. Summary of the Invention
[0005] To address the above-mentioned deficiencies or improvement needs of existing technologies, this invention provides an optimization method and apparatus for an integer divider, which can solve the technical problems of excessive resource consumption, huge circuit delay, and complex implementation logic of existing high-precision integer dividers in scenarios such as division by 3 and division by (2ⁿ)×3. It is especially suitable for specific integer division scenarios such as division by 3 and division by (2ⁿ)×3 in FPGA / ASIC.
[0006] To achieve the above objectives, according to one aspect of the present invention, an optimization method for an integer divider is provided, including an optimization method for integer division by 3; the optimization method for integer division by 3 includes: Establish a lookup table for the quotient and remainder values of binary numbers with different bit weights 2^k divided by 3; where k is a non-negative integer; Use the dividend to create a mask, and extract the quotient and remainder values from a lookup table of quotient and remainder values. Sum all the extracted quotients to obtain the initial quotient; Sum all the extracted remainder values to obtain the initial remainder; Based on the value of the initial remainder, the initial remainder is corrected, and the initial quotient is adjusted simultaneously. The final quotient and final remainder that meet the requirements are then output.
[0007] In some implementations, the remainder value in the quotient and remainder lookup table is either 1 or -1, and the quotient, remainder value, and position weight satisfy the following relationship: quotient value × 3 + remainder value = position weight.
[0008] In some implementations, using the dividend as a mask to extract the quotient and remainder values from a quotient and remainder lookup table includes: Convert the dividend to a binary number; The bits that are 1 in the binary number are taken as the valid bits, and the quotient and remainder values corresponding to the valid bits are extracted from the quotient and remainder lookup table.
[0009] In some implementations, the initial remainder is corrected based on its value, and the initial quotient is adjusted simultaneously. The output of the final quotient and final remainder that meet the requirements includes: When the initial remainder is greater than or equal to 3, add 1 to the initial quotient and subtract 3 from the initial remainder. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient. When the initial remainder satisfies 0 ≤ initial remainder ≤ 2, no correction is needed, and the initial quotient is taken as the final quotient, and the initial remainder is taken as the final remainder. When the initial remainder is negative, subtract 1 or 2 from the initial quotient so that the corrected remainder is 0, 1 or 2. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient.
[0010] In some implementations, the above optimization method further includes establishing a correction lookup table, which includes the quotient adjustment value and the corrected remainder value corresponding to different negative remainder values; when the initial remainder is negative, the corresponding quotient adjustment value and the corrected remainder value are extracted from the correction lookup table according to the value of the initial remainder.
[0011] In some embodiments, the above optimization method further includes an optimization method for integer division by (2ⁿ)×3; the optimization method for integer division by (2ⁿ)×3 includes: The dividend A is truncated into binary numbers A1 and A2, satisfying the expression A = (2ⁿ) × A1 + A2, and A2 < 2ⁿ, where n is a non-negative integer; Using A1 as the new dividend, the final quotient B1 and the final remainder B2 of A1 divided by 3 are calculated using the integer division optimization method described above. Take the final quotient B1 as the final quotient of the dividend A divided by (2ⁿ)×3, and take (2n)×B2+A2 as the final remainder of the dividend A divided by (2ⁿ)×3.
[0012] According to another aspect of the present invention, an optimization device for an integer divider is provided, comprising a lookup table storage module, a mask extraction module, a summation module, and a remainder correction and quotient adjustment module; The lookup table storage module is used to store lookup tables for the quotient and remainder values corresponding to different bit weights 2^k divided by 3; The mask extraction module is used to create a mask using the dividend and extract the quotient and remainder values from a lookup table of quotient and remainder values. The summation module is used to sum all extracted quotient values to obtain the initial quotient, and to sum all extracted remainder values to obtain the initial remainder; The remainder correction and quotient adjustment module is used to correct the initial remainder based on its value, simultaneously adjust the initial quotient, and output the final quotient and final remainder that meet the requirements.
[0013] In some implementations, the remainder value in the quotient and remainder lookup table is either 1 or -1, and the quotient, remainder value, and position weight satisfy the following relationship: quotient value × 3 + remainder value = position weight.
[0014] In some implementations, the remainder correction and quotient adjustment module corrects the initial remainder according to preset rules and simultaneously adjusts the initial quotient; these rules include: When the initial remainder is greater than or equal to 3, add 1 to the initial quotient and subtract 3 from the initial remainder. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient. When the initial remainder satisfies 0 ≤ initial remainder ≤ 2, no correction is needed, the initial quotient is the final quotient, and the initial remainder is the final remainder; When the initial remainder is negative, subtract 1 or 2 from the initial quotient so that the corrected remainder is 0, 1 or 2. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient.
[0015] In some embodiments, the above-described optimization apparatus further includes a truncation processing module; The truncation processing module is used to perform binary truncation processing on the dividend A when dividing by (2ⁿ)×3, to obtain A1 and A2. A1 and A2 satisfy the expression A=(2ⁿ)×A1+A2, and A2<2ⁿ, where n is a non-negative integer. A1 is also used as a new dividend to be input into the mask extraction module. The remainder correction and quotient adjustment module is also used to take the final quotient B1 of the new dividend A1 divided by 3 as the final quotient of (2ⁿ)×3 and the final remainder B2 as the final remainder of the dividend A divided by (2ⁿ)×3 when the final quotient of the new dividend A1 divided by 3 is B1 and the final remainder is B2.
[0016] In summary, the technical solutions conceived by this invention have the following beneficial effects compared with the prior art: 1) Significantly reduced circuit delay: It abandons the iterative operation method of existing technology and adopts the implementation scheme of lookup table + combinational logic adder. There is no iteration delay, the timing performance is friendly, and the delay does not increase significantly with the increase of the divider bit width.
[0017] 2) Reduced hardware resource consumption: The lookup table implementation logic is simple, requires fewer mask bits, does not require a large number of multipliers, iterative operation units, or complex bit width management and special value processing modules, thus greatly saving FPGA / ASIC logic resources and storage resources.
[0018] 3) Simple and easy to expand: The basic lookup table can be continuously expanded to high-precision division scenarios with arbitrary bit width according to a fixed pattern. The calculation logic of division by 3 can be directly reused in the (2ⁿ)×3 scenario. Only a simple truncation processing module needs to be added, without reconstructing the core circuit of the divider.
[0019] 4) Targeted optimization for specific scenarios: Special designs have been made for scenarios that are difficult to optimize with existing algorithms, such as division by 3 and division by (2ⁿ)×3. The performance in these scenarios is far superior to the general division algorithm, while ensuring the accuracy of the calculation results.
[0020] 5) Balance between timing and resources: By replacing complex iteration and multiplication operations with lookup tables, dual optimization of resource consumption and circuit delay is achieved while ensuring division accuracy, thus meeting the timing and resource requirements of FPGA / ASIC digital circuits for high-precision division. Attached Figure Description
[0021] Figure 1 This is a flowchart of the optimization method for the integer divider according to an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of the optimization device for the integer divider according to an embodiment of the present invention. Detailed Implementation
[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. As those skilled in the art will recognize, the described embodiments can be modified in various ways without departing from the spirit or scope of this application. Therefore, the drawings and description are considered exemplary in nature and not restrictive.
[0023] The optimization method for the integer divider in this invention is applicable to integer division scenarios involving division by 3 and division by (2ⁿ)×3 (where n is a positive integer), such as... Figure 1 As shown, the method includes: Step S101: Construct a lookup table for quotient and remainder values.
[0024] A lookup table is pre-established to find the quotient and remainder values corresponding to different bit weights of a binary number 2^k (where k is a non-negative integer, starting from 0 for the least significant bit and proceeding to the most significant bit) when divided by 3. In some implementations, the remainder value is only 1 or -1. The quotient, remainder value, and bit weight satisfy the following relationship: Quotient value × 3 + Remainder value = Bit weight.
[0025] The basic data for this quotient and remainder lookup table is as follows: Bit 0 (2 0 Quotient 0, remainder 1; The first bit (2¹): Quotient 1, remainder -1; The second bit (2²): Quotient 1, remainder 1; The 3rd bit (2³): Quotient 3, remainder -1; The 4th bit (2 4 Quotient 5, remainder 1; Furthermore, the lookup table for quotient and remainder values can be flexibly expanded according to the bit width requirements of the divider. For a divider with an m-bit width, it is only necessary to supplement the lookup table with the quotient and remainder values corresponding to 2^(m-1) divided by 3, without refactoring the overall logic.
[0026] Step S103: Use the dividend to create a mask and extract data from the quotient and remainder lookup table.
[0027] The dividend is converted to a binary number, and this binary number is used as a mask to extract the corresponding quotient and remainder values from the quotient and remainder lookup table.
[0028] In some implementations, the bits with a value of 1 in the binary number are taken as valid bits, and the quotient and remainder values corresponding to the valid bits are extracted from the quotient and remainder lookup table.
[0029] Step S105: Obtain the initial values of the quotient and remainder by summing.
[0030] The initial quotient is obtained by summing all the extracted quotient values using a combinational logic adder; the initial remainder is obtained by summing all the extracted remainder values.
[0031] Step S107: Correct the remainder value and adjust the quotient value.
[0032] Correct the initial remainder and simultaneously adjust the initial quotient, then output the final quotient and final remainder that meet the requirements.
[0033] The specific rules for remainder correction and quotient adjustment are as follows: When the initial remainder is greater than or equal to 3, add 1 to the initial quotient and subtract 3 from the initial remainder. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient. When the initial remainder satisfies 0 ≤ initial remainder ≤ 2, no correction is needed, the initial quotient is the final quotient, and the initial remainder is the final remainder; When the initial remainder is negative, subtract 1 or 2 from the initial quotient so that the corrected remainder is 0, 1 or 2 (this operation can be achieved through a correction lookup table). Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient.
[0034] The correction lookup table is pre-built and stores the quotient adjustment value and remainder correction value corresponding to different negative remainders, simplifying the correction logic. The remainder after correction according to the remainder correction and quotient adjustment rules is the final remainder, and the adjusted quotient is the final quotient. The corrected remainder only takes values from 0, 1, and 2.
[0035] Steps S101 to S107 above apply to integer division scenarios involving division by 3. For integer division scenarios involving division by (2ⁿ)×3, the optimization method for the integer divider in this embodiment further includes: Step S100: Truncate the dividend A into binary numbers A1 and A2, satisfying the expression A = (2ⁿ) × A1 + A2, and A2 < 2ⁿ, where n is a non-negative integer. Use A1 as the new dividend.
[0036] Then proceed through steps S101 to S107 (step S101 can also be as attached). Figure 1 As shown, this is completed before step S100. Generally, regardless of whether it is an integer division by 3 or an integer division by (2ⁿ)×3, the quotient and remainder lookup table only needs to be constructed once if the divider bit width does not need to be expanded. Calculate the final quotient B1 of the new dividend A1 divided by 3, and the final remainder is B2. The final quotient B1 is the final quotient of the dividend A divided by (2ⁿ)×3, and (2n)×B2+A2 is the final remainder of the dividend A divided by (2ⁿ)×3.
[0037] like Figure 2 As shown, the optimization device for the integer divider in this embodiment of the invention includes a lookup table storage module, a mask extraction module, a summation module, a remainder correction and quotient adjustment module, and a truncation processing module.
[0038] The lookup table storage module is a read-only storage unit used to store quotient and remainder lookup tables. These tables include the quotient and remainder values corresponding to different bit weights of 2^k divided by 3 in binary numbers. In some implementations, the lookup table storage module also stores a correction lookup table. This correction lookup table is pre-built and includes quotient adjustment values and remainder correction values corresponding to different negative remainders, simplifying the correction logic.
[0039] The contents of the quotient and remainder lookup tables can be configured and expanded according to the divider's bit width requirements, thus requiring minimal hardware resources.
[0040] The input to the mask extraction module is the dividend. It performs a binary conversion of the dividend and uses the converted binary number as a mask to extract the quotient and remainder values corresponding to each significant bit from the quotient and remainder value lookup table stored in the lookup table storage module. The extraction logic is simple.
[0041] The summation module is used to sum the extracted quotient and remainder values to obtain the initial quotient and initial remainder. In some implementations, the summation module is implemented using a combinational logic adder, which performs non-iterative operations and has low latency. In some implementations, the summation module includes a quotient summation adder and a remainder summation adder. The quotient summation adder is used to sum the extracted quotient values and output the initial quotient; the remainder summation adder is used to sum the extracted remainder values and output the initial remainder.
[0042] The remainder correction and quotient adjustment module takes an initial quotient and an initial remainder as input, and outputs a final quotient and a final remainder. It is used to correct the initial remainder and simultaneously adjust the initial quotient, outputting a final quotient and a final remainder that meet the requirements. In some implementations, the remainder correction and quotient adjustment module has built-in preset remainder correction and quotient adjustment rules. The module corrects the initial remainder according to these preset rules and simultaneously adjusts the initial quotient.
[0043] In some implementations, the preset remainder correction and quotient adjustment rules are specifically as follows: When the initial remainder is greater than or equal to 3, add 1 to the initial quotient and subtract 3 from the initial remainder. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient. When the initial remainder satisfies 0 ≤ initial remainder ≤ 2, no correction is needed, the initial quotient is the final quotient, and the initial remainder is the final remainder; When the initial remainder is negative, subtract 1 or 2 from the initial quotient so that the corrected remainder is 0, 1 or 2 (this operation can be achieved through a correction lookup table). Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient.
[0044] The remainder after correction according to the remainder correction and quotient adjustment rules is the final remainder, and the adjusted quotient is the final quotient. The remainder after correction can only take values from 0, 1, and 2.
[0045] The truncation processing module is optional and specifically designed for division by (2ⁿ)×3. The module takes the dividend A as input and performs binary truncation to obtain A1 and A2. A1 and A2 satisfy the expression A = (2ⁿ)×A1 + A2, where A2 < 2ⁿ, and n is a non-negative integer. The truncation processing module inputs A1 as the new dividend to the mask extraction module and A2 to the remainder correction and quotient adjustment module, reusing the calculation logic for division by 3 without requiring additional division circuitry.
[0046] In some implementations, the remainder correction and quotient adjustment module is also used to take the final quotient B1 of the new dividend A1 divided by 3 as the final quotient of (2ⁿ)×3 and the final remainder B2 as the final remainder of the dividend A divided by (2ⁿ)×3 when the final quotient of the new dividend A1 divided by 3 is B1 and the final remainder is B2.
[0047] In other words, for the scenario of division by (2ⁿ)×3, the dividend is first input to the truncation processing module to obtain a new dividend. The new dividend is then processed by the mask extraction module. After the remainder correction and quotient adjustment module obtains the final quotient and final remainder of the new dividend divided by 3, the final quotient of the new dividend divided by 3 is used as the final quotient of the original dividend divided by (2ⁿ)×3. Furthermore, the final remainder of the new dividend divided by 3 is corrected to obtain the final remainder of the original dividend divided by (2ⁿ)×3. For the scenario of division by 3, the dividend is directly input to the mask extraction module for processing, and the remainder correction and quotient adjustment module obtains the final quotient and final remainder of the dividend divided by 3.
[0048] The modules of the optimization device for the integer divider in this embodiment of the invention are connected by combinational logic, with no clock iteration. The timing delay is only the inherent delay of the adder and the lookup table, which is much lower than that of existing iterative algorithms.
[0049] Example 1: Implementation of dividing an 8-bit integer by 3 The following example illustrates the optimization method of this invention by dividing an 8-bit wide divisor 151 (10010111 in binary) by 3.
[0050] Construct a lookup table for quotient and remainder values: The quotient and remainder values of binary numbers with different bit weights from the 0th bit of the least significant bit to the 7th bit of the most significant bit are shown in Table 1 below.
[0051] Use the dividend to create a mask and extract data from the quotient and remainder lookup table: The binary representation of the dividend 151 is 10010111, and the valid bits (values of 1) are bits 0, 1, 2, 4, and 7. Extract the corresponding data from the quotient and remainder lookup table: Quotient: 0, 1, 1, 5, 43; Remainder: 1, -1, 1, 1, -1.
[0052]
[0053] The initial values of the quotient and remainder are obtained by summing: Initial quotient = 0 + 1 + 1 + 5 + 43 = 50; Initial remainder = 1 - 1 + 1 + 1 - 1 = 1 Correcting the remainder and adjusting the quotient: The initial remainder is 1, which satisfies 0 ≤ initial remainder ≤ 2, so no correction is needed; the final quotient is 50, and the final remainder is 1, which is consistent with the actual calculation result.
[0054] In this example, the sum of the remainders of the 8-bit wide divider is at most 4, which can be corrected with simple numerical judgment without complex logic, making it simple to implement and timing-friendly.
[0055] Example 2: Implementation of dividing an 8-bit wide integer by 6 (i.e., n=1, (2¹)×3) The following example illustrates the implementation of the optimization method of this invention in the (2ⁿ)×3 scenario, using an 8-bit wide divisor 151 (10010111 in binary) divided by 6.
[0056] Truncation: The dividend A=151 is truncated into binary bits A1 and A2, satisfying A=(2¹)×A1+A2 and A2<2¹=2; The calculation yields: 151 = 2 × 75 + 1, i.e., A1 = 75, A2 = 1 (A2 = 1 < 2, which satisfies the truncation requirement).
[0057] Calculate A1 divided by 3: Use A1 as the dividend (binary is 1001011), use A1 to create a mask and extract data from the quotient and remainder lookup table to get the quotient values: 0, 1, 3, 21; remainder values: 1, -1, -1, 1; by summing, we get the initial quotient = 0 + 1 + 3 + 21 = 25, and the initial remainder = 1 - 1 - 1 + 1 = 0; the initial remainder is 0, which satisfies 0 ≤ initial remainder ≤ 2, so no correction is needed. The final quotient of A1 divided by 3 is 25, and the final remainder is 0.
[0058] The final quotient 25 is the final quotient of the dividend 151 divided by 6. After correcting the final remainder of A1 divided by 3, the final remainder of the dividend 151 divided by 6 is 1, which is consistent with the actual calculation result.
[0059] Example 3: Implementation of Compensation for Negative Remainders This example uses a 16-bit wide dividend divided by 3 as an example. The sum of the extracted remainders yields an initial remainder of -2 and an initial quotient of 100, illustrating the remainder correction process.
[0060] The initial remainder is -2 (negative). According to the correction rule, subtract 2 from the initial quotient, and the remainder is corrected to -2 + 6 = 4. Since 4 ≥ 3, add 1 to the quotient and subtract 3 from the remainder, resulting in: The adjusted quotient = 100 - 2 + 1 = 99; The remainder after correction = 4 - 3 = 1; The corrected remainder is 1, satisfying the requirement that 0 ≤ remainder ≤ 2. The corrected remainder of 1 is the final remainder, and the adjusted quotient of 99 is the final quotient. Furthermore, this correction operation can be implemented using a correction lookup table, directly extracting the quotient adjustment value -1 corresponding to a remainder of -2 and the corrected remainder value of 1, completing the correction in one step and simplifying the logic.
[0061] Example 4: Extended implementation of divider bit width This example demonstrates how to expand the lookup tables for quotient and remainder values by extending an 8-bit divider to a 16-bit divider.
[0062] The highest bit of an 8-bit lookup table is the 7th bit (2). 7 The quotient is 43 and the remainder is -1. Calculate the quotient and remainder values of bits 8 to 15 sequentially according to the existing pattern, and add them to the quotient and remainder lookup table. The mask extraction module and the summation module only need to expand the corresponding bit width input ports, without refactoring the core logic.
[0063] The rules for remainder correction and quotient adjustment remain unchanged, because the range of the sum of remainders after expansion can still be corrected through simple judgment.
[0064] The extended 16-bit wide divider retains its original low latency and low resource consumption characteristics, and has a low implementation cost.
[0065] The optimization method and apparatus for the integer divider in this invention adopts a lookup table + combinational logic implementation scheme, which significantly optimizes the resource consumption and circuit delay of the high-precision integer divider in the scenarios of dividing by 3 and dividing by (2ⁿ)×3. The implementation logic is simple and easy to expand, and can be directly applied to the design and implementation of digital circuits such as FPGA / ASIC. It is especially suitable for high-precision integer division scenarios such as 64-bit, 128-bit, and 1024-bit, and has wide industrial applicability and promotion value in digital circuit application fields such as communication, industrial control, and chip design.
[0066] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of those different embodiments or examples.
[0067] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.
[0068] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more (two or more) executable instructions for implementing a particular logical function or process. Furthermore, the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functionality involved.
[0069] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus or device (such as a computer-based system, a processor-included system or other system that can fetch and execute instructions from, an instruction execution system, apparatus or device).
[0070] It should be understood that various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. All or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware, the program being stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiments.
[0071] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. This storage medium can be a read-only memory, a disk, or an optical disk, etc.
[0072] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various variations or substitutions within the technical scope disclosed in this application, and these should all be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. An optimization method for an integer divider, characterized in that, This includes an optimized method for integer division by 3; the optimized method for integer division by 3 includes: Establish a lookup table for the quotient and remainder values of binary numbers with different bit weights 2^k divided by 3; where k is a non-negative integer; Use the dividend to create a mask, and extract the quotient and remainder values from a lookup table of quotient and remainder values. Sum all the extracted quotients to obtain the initial quotient; Sum all the extracted remainder values to obtain the initial remainder; Based on the value of the initial remainder, the initial remainder is corrected, and the initial quotient is adjusted simultaneously. The final quotient and final remainder that meet the requirements are then output.
2. The optimization method as described in claim 1, characterized in that, In the lookup table for quotient and remainder values, the remainder value can only be 1 or -1. The quotient, remainder value, and place weight satisfy the following relationship: quotient value × 3 + remainder value = place weight.
3. The optimization method as described in claim 1, characterized in that, The step of using the dividend to create a mask and extracting the quotient and remainder values from a quotient and remainder lookup table includes: converting the dividend into a binary number; The bits that are 1 in the binary number are taken as the valid bits, and the quotient and remainder values corresponding to the valid bits are extracted from the quotient and remainder lookup table.
4. The optimization method as described in claim 1, characterized in that, The process of correcting the initial remainder based on its value, simultaneously adjusting the initial quotient, and outputting a final quotient and a final remainder that meet the requirements includes: When the initial remainder is greater than or equal to 3, add 1 to the initial quotient and subtract 3 from the initial remainder. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient. When the initial remainder satisfies 0 ≤ initial remainder ≤ 2, no correction is needed, and the initial quotient is taken as the final quotient, and the initial remainder is taken as the final remainder. When the initial remainder is negative, subtract 1 or 2 from the initial quotient so that the corrected remainder is 0, 1 or 2. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient.
5. The optimization method as described in claim 4, characterized in that, It also includes establishing a correction lookup table, which includes the quotient adjustment value and the corrected remainder value corresponding to different negative remainder values; when the initial remainder is negative, the corresponding quotient adjustment value and the corrected remainder value are extracted from the correction lookup table according to the value of the initial remainder.
6. The optimization method as described in any one of claims 1 to 5, characterized in that, It also includes an optimization method for integer division by (2ⁿ)×3; the optimization method for integer division by (2ⁿ)×3 includes: The dividend A is truncated into binary numbers A1 and A2, satisfying the expression A = (2ⁿ) × A1 + A2, and A2 < 2ⁿ, where n is a non-negative integer; Using A1 as the new dividend, the final quotient B1 and the final remainder B2 of A1 divided by 3 are calculated using the integer division optimization method described above. Take the final quotient B1 as the final quotient of the dividend A divided by (2ⁿ)×3, and then... n (2) × B2 + A2 is the final remainder when the dividend A is divided by (2) × 3.
7. An optimization device for an integer divider, characterized in that, It includes a lookup table storage module, a mask extraction module, a summation module, and a remainder correction and quotient adjustment module; The lookup table storage module is used to store lookup tables for the quotient and remainder values corresponding to different bit weights 2^k divided by 3. The mask extraction module is used to create a mask using the dividend and extract the quotient and remainder values from the quotient and remainder value lookup table. The summation module is used to sum all extracted quotient values to obtain an initial quotient, and to sum all extracted remainder values to obtain an initial remainder; The remainder correction and quotient adjustment module is used to correct the initial remainder based on its value, simultaneously adjust the initial quotient, and output the final quotient and final remainder that meet the requirements.
8. The optimization apparatus as described in claim 7, characterized in that, In the lookup table for quotient and remainder values, the remainder value can only be 1 or -1. The quotient, remainder value, and place weight satisfy the following relationship: quotient value × 3 + remainder value = place weight.
9. The optimization apparatus as described in claim 7, characterized in that, The remainder correction and quotient adjustment module corrects the initial remainder according to preset rules and simultaneously adjusts the initial quotient; these rules include: When the initial remainder is greater than or equal to 3, add 1 to the initial quotient and subtract 3 from the initial remainder. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient. When the initial remainder satisfies 0 ≤ initial remainder ≤ 2, no correction is needed, the initial quotient is the final quotient, and the initial remainder is the final remainder; When the initial remainder is negative, subtract 1 or 2 from the initial quotient so that the corrected remainder is 0, 1 or 2. Use the corrected remainder as the final remainder and the adjusted quotient as the final quotient.
10. The optimization apparatus as described in any one of claims 7 to 9, characterized in that, It also includes a truncation processing module; The truncation processing module is used to perform binary truncation processing on the dividend A when dividing by (2ⁿ)×3 to obtain A1 and A2, where A1 and A2 satisfy the expression A=(2ⁿ)×A1+A2, and A2<2ⁿ, where n is a non-negative integer, and to input A1 as a new dividend to the mask extraction module. The remainder correction and quotient adjustment module is also used to, when the final quotient of the new dividend A1 divided by 3 is B1 and the final remainder is B2, take the final quotient B1 as the final quotient of the dividend A divided by (2ⁿ)×3, and adjust (2ⁿ)×3. n (2) × B2 + A2 is the final remainder when the dividend A is divided by (2) × 3.