A control flow graph runtime offline estimation method

Abstract

The present application relates to the technical field of flexible direct current transmission, and discloses a kind of control flow chart running time offline estimation method, the estimation method includes generating several embedded C codes to visual control flow chart, when generating, all function calls are unfolded in the form of inline function;Embedded C code is compiled into assembly code;Accumulate the code instruction cycle of each assembly instruction cycle to obtain code instruction cycle;Code instruction cycle is divided by the offline estimation result of the main frequency of processor calculated control flow chart running time.The present application can not depend on specific hardware platform and operating environment, can accurately estimate the running time of visual control flow chart offline, thereby intuitively positioning code running performance bottleneck, quickly predict code execution efficiency in development stage and guide subsequent optimization.

Description

Technical Field

[0001] This invention belongs to the field of flexible DC transmission technology and relates to an offline estimation method for control flow graph running time. It provides developers with an efficient and accurate means of predicting code execution efficiency during the development phase, and guides subsequent code optimization work based on the prediction results, thereby improving the stability and real-time performance of the entire flexible DC transmission control and protection system. Background Technology

[0002] In flexible DC transmission control and protection systems, the control flow graph, as the core logical framework for system operation, must meet extremely stringent real-time requirements. Even the slightest delay can lead to inaccurate system control, affecting the stable operation of the entire transmission system and potentially causing serious safety accidents. Currently, code execution time is typically measured using online debugging simulation or offline manual estimation methods, which presents the following problems:

[0003] (1) Low efficiency and difficulty in covering complex operating conditions. Online debugging simulation method requires testing in the actual operating environment of the system, which not only consumes a lot of system resources, but may also interfere with the running equipment; offline manual estimation method relies on the experience and expertise of developers, the estimation process is cumbersome and easily affected by human factors, making it difficult to guarantee the accuracy and reliability of the estimation results.

[0004] (2) Insufficient accuracy of offline estimation. Single-dimensional static analysis ignores the coupled effects of multiple factors such as hardware resource contention and interrupt latency. It often only considers the logical structure of the code itself, while ignoring the impact of these external factors on runtime, resulting in a large deviation between the estimation results and the actual runtime.

[0005] (3) Lack of visualization assistance. For complex control flow graphs, traditional estimation methods often fail to clearly show the execution flow of the code and where the performance bottlenecks are. Developers can only rely on their own experience to judge which parts may have performance problems, making it difficult to intuitively locate performance bottlenecks and carry out targeted optimizations, and easily overlooking some potential performance problems.

[0006] (4) Poor scenario adaptability. The code logic in the control and protection scenario of flexible DC transmission is complex and the operating conditions are varied. Existing estimation methods are often developed based on fixed scenarios and assumptions, which makes it difficult to adapt to such a variable environment, resulting in a significant decrease in the accuracy of estimation results in practical applications.

[0007] (5) The online debugging simulation method has significant limitations. The online debugging simulation method usually focuses more on high-priority critical tasks to ensure that the core functions of the system can operate normally. However, for low-priority tasks, since the tasks are frequently interrupted, traditional online debugging estimation methods cannot make sufficient estimates, which may cause the running time of low-priority tasks to exceed expectations, thereby affecting the performance and stability of the entire system. Summary of the Invention

[0008] The purpose of this invention is to provide an offline estimation method for control flow graph runtime, which can improve the accuracy and efficiency of offline estimation.

[0009] To solve the above-mentioned technical problems, the present invention is implemented using the following technical solution.

[0010] This invention generates embedded C code from a visualized control flow graph and compiles it into assembly code. Based on the processor instruction set, it calculates the code instruction cycle through static code analysis and the runtime through hardware resource calculations, achieving accurate prediction without actual execution. Specifically, the offline estimation method of this invention comprehensively and accurately estimates the runtime of the control flow graph by analyzing factors such as the logical structure of the code, hardware resource status, task scheduling strategies, and CPU pipeline characteristics.

[0011] In a first aspect, the present invention proposes an offline estimation method for the runtime of a control flow graph. If the control flow graph is a fully sequential control flow graph, the offline estimation method for the runtime of the control flow graph includes the following steps:

[0012] The visualization control flow graph generates several embedded C codes, with all function calls expanded as inline functions during generation.

[0013] Compile embedded C code into assembly code;

[0014] The code instruction cycle is obtained by summing up each assembly instruction cycle.

[0015] The offline estimate of the control flow graph runtime is obtained by dividing the code instruction cycle by the processor clock frequency.

[0016] In conjunction with the first aspect, it can further be used to estimate the runtime of control flow graphs including those with cyclic logic. If cyclic logic parsing is added to the control flow graph, the offline runtime estimation method for the control flow graph further includes the following steps:

[0017] Parse all loop logic in the embedded C code using keywords related to loop structures;

[0018] The assembly code corresponding to all loop logic is separated from the assembly code obtained by compiling the embedded C code, and the remaining part is the assembly code of the sequential execution part;

[0019] Calculate the assembly instruction cycle of each loop logic's single execution, multiply it by the number of loops to obtain the assembly code instruction cycle corresponding to each loop logic, thus obtaining the instruction cycle of each loop logic;

[0020] The sequential execution instruction cycle is obtained by summing up each assembly instruction cycle of the sequential execution section;

[0021] The total code instruction cycle is obtained by summing the sequential execution instruction cycle and the cycle of each loop logic instruction;

[0022] The offline estimate of the control flow graph runtime is obtained by dividing the total code instruction cycle by the processor clock frequency.

[0023] In conjunction with the first aspect, further, in the above scenario, runtime estimation can be optimized based on CPU pipeline. Based on the addition of pipeline switching after cyclic logic parsing is added to the control flow graph, the offline runtime estimation method for the control flow graph further includes the following steps:

[0024] If the assembly instruction is found to be a jump instruction, then additional fetch and decode cycles are needed when calculating the instruction cycle for the next assembly code.

[0025] Building upon the first aspect, further, for the control flow graph of task scheduling, the offline runtime estimation method includes the following steps:

[0026] Based on the task scheduling strategy, the visualized control flow graph generates several embedded C codes according to the task;

[0027] Compile the embedded C code for each task into task assembly code;

[0028] Each task's analysis and accumulation of each task's assembly instruction cycle yields the task's code instruction cycle;

[0029] The execution time of each task's algorithm is obtained by dividing the task code instruction cycle by the processor's clock speed.

[0030] The task switching time is estimated based on experience with task switching code.

[0031] The task execution time is obtained by adding the algorithm execution time of each task to the task switching time;

[0032] The running time of each scan cycle is obtained by summing the running times of the tasks running in each scan cycle.

[0033] It should be noted that since the task code contains sequential execution instructions and loop execution instructions, the above analysis and accumulation refers to analyzing the sequential execution instruction cycle and the loop instruction cycle and accumulating them.

[0034] In conjunction with the first aspect, further, for estimating the actual runtime of a low-priority task, based on the task priority scheduling strategy, the control flow graph is decomposed into one high-priority task and one low-priority task, wherein the high-priority task has a higher priority than the low-priority task. The method for estimating the actual runtime of the low-priority task is as follows:

[0035] Execute scan cycle P using a high-priority task. H Subtract the execution time T of the high-priority task H Obtain the remaining time T for each scan cycle Δ That is, T Δ = P H -T H ;

[0036] Use the remaining time T of each scan cycle Δ Subtract task switching time T θ Obtain the low-priority task slice time T N That is, T N =T Δ -T θ ;

[0037] Running time T using low-priority task algorithm L Divide by the low-priority task slice time T N And rounding up gives the number of slices N for low-priority tasks, i.e., for T L / T N The result of the calculation, rounded down, is N.

[0038] The runtime T of the final slice of the low-priority task is obtained by subtracting the slice time and the number of slices of the low-priority task from the runtime of the low-priority task algorithm. LAST That is, T LAST =T L -T N ×N;

[0039] The high-priority task's scan cycle is multiplied by the low-priority task's slice count, plus the high-priority task's runtime T. H The runtime T of the last slice of a low-priority task LAST and task switching time T θ The actual runtime T of the low-priority task is obtained. total That is, T total =P H ×N+T H +T LAST +T θ .

[0040] In conjunction with the first aspect, further, multiple high-priority tasks and low-priority tasks can be considered. If, according to the task priority scheduling strategy, the control flow graph is decomposed into at least one high-priority task and at least two low-priority tasks, then the method for estimating the total actual runtime of the low-priority tasks is as follows:

[0041] High-priority task execution time T H It equals the sum of the running times of all high-priority tasks, i.e., T. H =ΣT Hn Where n represents the number of high-priority tasks, and T Hn This represents the execution time of the nth high-priority task; when calculating the number of slices for low-priority tasks, the execution time of the first slice of that low-priority task must be subtracted. N m =(T Lm -T FIRSTm ) / T N Where m represents the number of low-priority tasks, and N m T represents the slice count of the m-th low-priority task. Lm T represents the running time of the algorithm for the m-th low-priority task. FIRSTm T represents the first slice execution time of the m-th low-priority task. N Indicates the slice time for low-priority tasks;

[0042] The runtime of the last slice of a low-priority task needs to be subtracted from the runtime of the first slice of that low-priority task. LASTm =T Lm -T FIRSTm -T N ×N m , among which, T LASTm This represents the execution time of the last slice of the m-th low-priority task;

[0043] The actual execution time of a low-priority task needs to be added to the remaining time of the previous low-priority task, T. totalm =T Δm-1 +P H ×N m +T H +T LASTm +T θ , among which, T Δm-1 This represents the remaining time for the (m-1)th low-priority task; when m=1, T Δ0 =0; T Δm =T Δ -T LASTm -T θ T Δ T represents the remaining time for each scan cycle. Δ =P H -T H ;

[0044] The execution time of the first low-priority task is the time it takes to run this low-priority task within the remaining time of the previous low-priority task. When T Δm-1 ≤T θ At that time, T FIRSTm =0, when T Δm-1 >T θ At that time, T FIRSTm =T Δm-1 -T θ ;

[0045] The total actual runtime T of low-priority tasks total The sum of the actual runtime of all low-priority tasks, i.e., T total =ΣT totalm .

[0046] Secondly, this invention proposes an offline estimation method for control flow graph runtime, which can visually display the runtime and execution order of each task, specifically including the following steps:

[0047] The visual control flow graph is decomposed according to the task scheduling strategy to generate several embedded C codes;

[0048] Estimate the algorithm runtime for each task;

[0049] The actual execution time of high-priority tasks was estimated.

[0050] Based on the control flow graph decomposition, the actual runtime of low-priority tasks is estimated.

[0051] The list displays the sequential execution instruction cycles, loop counts, assembly instruction cycles for a single execution of each loop logic within each task, task code instruction cycles, and task execution time for each task; the list also displays the actual execution span and number of slices within each scan cycle for each task.

[0052] The chart simulates the task switching operation diagram of the entire control and protection device, and marks the running time of each task and the actual running span of each priority task in segments;

[0053] The method for estimating the algorithm running time for each task is as follows:

[0054] If the control flow graph is a fully sequential control flow graph, then the estimation method for the algorithm runtime of each task is as follows:

[0055] The visualization control flow graph generates several embedded C codes, with all function calls expanded as inline functions during generation.

[0056] Compile embedded C code into assembly code;

[0057] The code instruction cycle is obtained by summing up each assembly instruction cycle.

[0058] The execution time of the algorithm for each task is calculated by dividing the code instruction cycle by the processor clock speed.

[0059] Based on the full sequential control flow graph, if loop logic analysis is added, the estimation method for the algorithm runtime of each task also includes the following steps:

[0060] Parse all loop logic in the embedded C code using keywords related to loop structures;

[0061] The assembly code corresponding to all loop logic is separated from the assembly code obtained by compiling the embedded C code, and the remaining part is the assembly code of the sequential execution part;

[0062] Calculate the assembly instruction cycle of each loop logic's single execution, multiply it by the number of loops to obtain the assembly code instruction cycle corresponding to each loop logic, thus obtaining the instruction cycle of each loop logic;

[0063] The sequential execution instruction cycle is obtained by summing up each assembly instruction cycle of the sequential execution section;

[0064] The total code instruction cycle is obtained by summing the sequential execution instruction cycle and the cycle of each loop logic instruction;

[0065] The offline estimate of the control flow graph runtime is obtained by dividing the total code instruction cycle by the processor clock frequency.

[0066] Based on adding loop logic analysis to the full control flow graph, if pipeline switching is added, the estimation method for the algorithm runtime of each task also includes the following steps:

[0067] If the assembly instruction is found to be a jump instruction, then when calculating the instruction cycle of the next assembly code, an additional value fetching cycle and decoding cycle are required.

[0068] The method for estimating the actual running time of the high-priority tasks is as follows:

[0069] Compile the embedded C code for each task into task assembly code;

[0070] Each task's analysis and accumulation of each task's assembly instruction cycle yields the task's code instruction cycle;

[0071] The execution time of each task's algorithm is obtained by dividing the task code instruction cycle by the processor's clock speed.

[0072] The task switching time is estimated based on experience with task switching code.

[0073] The task execution time is obtained by adding the algorithm execution time of each task to the task switching time;

[0074] The running time of each scan cycle is obtained by summing the running time of the tasks running in each scan cycle, which is the actual running time of the advanced task.

[0075] The method for estimating the actual runtime of the low-priority task is as follows:

[0076] Execute scan cycle P using a high-priority task. H Subtract the execution time T of the high-priority task H Obtain the remaining time T for each scan cycle Δ That is, T Δ = P H -T H ;

[0077] Use the remaining time T of each scan cycle Δ Subtract task switching time T θ Obtain the low-priority task slice time T N That is, T N =T Δ -T θ ;

[0078] Running time T using low-priority task algorithm L Divide by the low-priority task slice time T N And rounding up gives the number of slices N for low-priority tasks, i.e., for T L / T N The result of the calculation, rounded down, is N.

[0079] The runtime T of the final slice of the low-priority task is obtained by subtracting the slice time and the number of slices of the low-priority task from the runtime of the low-priority task algorithm. LAST That is, T LAST =T L -T N ×N;

[0080] The high-priority task's scan cycle is multiplied by the low-priority task's slice count, plus the high-priority task's runtime T. H The runtime T of the last slice of a low-priority task LAST and task switching time T θ The actual runtime T of the low-priority task is obtained. total That is, T total =P H ×N+T H +T LAST +T θ.

[0081] Thirdly, the present invention proposes a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-described offline estimation method for control flow graph runtime.

[0082] Fourthly, the present invention provides a computer device comprising:

[0083] Memory, used to store computer programs;

[0084] A processor for executing the computer program to implement the steps of the offline estimation method for control flow graph runtime according to any one of claims 1 to 7.

[0085] Fifthly, the present invention provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the above-described offline estimation method for control flow graph runtime.

[0086] Compared with the prior art, the beneficial effects achieved by the present invention are as follows:

[0087] (1) This invention can improve the accuracy and efficiency of offline estimation, quickly locate performance bottlenecks, and adapt to complex and ever-changing working conditions in flexible DC transmission control and protection scenarios. It can also quickly predict code execution efficiency and guide subsequent optimization during the development stage.

[0088] (2) This invention achieves code-level offline estimation. It decouples application scenarios, control logic, and flow graph programming by using C code and assembly code estimation schemes, making it applicable to dynamic adaptation of multiple scenarios and models. This invention does not depend on specific hardware platforms and operating environments. Through the analysis of C code and assembly code, it can accurately estimate the runtime of code in different scenarios. Whether it is a simple sequential control flow graph or a complex control flow graph containing loop logic and task scheduling, the estimation method of this invention can be used for estimation. Moreover, as system requirements change and models are updated, the estimation method of this invention can quickly adapt to new scenarios and models without the need for extensive modifications and adjustments.

[0089] (3) This invention can estimate the running time from multiple dimensions based on sequential execution, loop execution, and task scheduling execution. In sequential execution, this invention accurately calculates the code execution time by calculating the assembly code instruction cycle and the processor clock frequency. Considering the CPU pipeline characteristics, it estimates the additional time overhead caused by jump instructions, further improving the accuracy of the estimation. In loop execution, this invention can accurately obtain the number of loops by parsing the loop keywords in the C code, and calculate the total execution time of the loop logic by combining the cycle of the assembly instructions in each loop. This not only improves the accuracy of the estimation but also simplifies the estimation process, making it easier for developers to perform performance analysis and optimization. In embedded task systems, this invention can calculate the running time and actual running span time of each task according to the task priority, preventing a low-priority task from affecting the execution of high-priority tasks due to excessive execution time. This allows for intuitive location of software performance bottlenecks, rapid prediction of code execution efficiency during the development phase, and guidance for subsequent optimization. Attached Figure Description

[0090] Figure 1 This is a flowchart illustrating the estimation process of the sequential execution portion in the offline estimation method for control flow graph runtime in Embodiment 1 of the present invention.

[0091] Figure 2 This is a flowchart illustrating the estimation process of the loop execution portion in the offline estimation method for control flow graph runtime in Embodiment 1 of the present invention.

[0092] Figure 3 This is a schematic diagram of low-priority task switching in the offline estimation method for control flow graph runtime in Embodiment 3 of the present invention;

[0093] Figure 4 This is a schematic diagram illustrating the switching of multiple low-priority tasks in the offline estimation method for control flow graph runtime in Embodiment 4 of the present invention;

[0094] Figure 5 This is a schematic diagram illustrating the actual running span and switching sequence of a task in the offline estimation method for control flow graph runtime in Embodiment 5 of the present invention. Detailed Implementation

[0095] To enable those skilled in the art to better understand the technical solutions of this invention, the invention will be further described below with reference to the accompanying drawings of the embodiments of this application. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The following embodiments are only used to more clearly illustrate the technical solutions of this invention, and should not be used to limit the scope of protection of this invention.

[0096] It should be understood that the terminology used in this application specification is for the purpose of describing particular embodiments only and is not intended to limit the application. As used in this application specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0097] The terms “comprising” and “including” indicate the presence of the described feature, whole, step, operation, element and / or component, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or collections thereof.

[0098] The term “and / or” refers to any combination of one or more of the associated listed items, as well as all possible combinations, and includes these combinations.

[0099] Example 1

[0100] like Figure 1 As shown, if the control flow graph is a fully sequential control flow graph, the offline estimation method for the runtime of the control flow graph includes the following steps:

[0101] The visualization control flow graph generates several embedded C codes, with all function calls expanded as inline functions during generation.

[0102] Compile embedded C code into assembly code;

[0103] The code instruction cycle is obtained by summing up each assembly instruction cycle.

[0104] The offline estimate of the control flow graph runtime is obtained by dividing the code instruction cycle by the processor clock frequency.

[0105] like Figure 2 As shown, adding a loop logic parsing method to the above scenario enables runtime estimation of control flow graphs including loop logic. The offline runtime estimation method for control flow graphs includes the following steps:

[0106] The visualization control flow graph generates several embedded C codes, with all function calls expanded as inline functions during generation.

[0107] Compile embedded C code into assembly code;

[0108] Parse all loop logic in the embedded C code using keywords related to loop structures;

[0109] Separate the assembly code corresponding to all loop logic from the total assembly code in sequence; the remaining part is the assembly code for the sequential execution part.

[0110] Calculate the assembly instruction cycle of each loop logic's single execution, multiply it by the number of loops to obtain the assembly code instruction cycle corresponding to each loop logic, thus obtaining the instruction cycle of each loop logic;

[0111] The sequential execution instruction cycle is obtained by summing up each assembly instruction cycle of the sequential execution section;

[0112] The total code instruction cycle is obtained by summing the sequential execution instruction cycle and the cycle of each loop logic instruction;

[0113] The offline estimate of the control flow graph runtime is obtained by dividing the total code instruction cycle by the processor clock frequency.

[0114] It should be noted that the keywords mentioned above refer to the keywords of loop structures in programming languages, such as for, while, do-while, etc.

[0115] In one specific implementation of this example, in the above scenario, the runtime estimation method for the control flow graph can be further divided into the following steps, based on the CPU pipeline optimization operation time estimation and the pipeline switching instruction cycle.

[0116] When analyzing assembly instructions, if a jump instruction is found, an additional value fetching and decoding cycle is added when calculating the instruction cycle of the next assembly code.

[0117] Example 2

[0118] This embodiment takes a voltage control module in a flexible DC transmission control and protection system as an example. The control flow graph of the voltage control module includes a sequential execution part, a cyclic execution part, and a task scheduling part.

[0119] Sequential execution section: The visualized control flow graph is converted into embedded C code, which is then compiled into assembly code. By accumulating the cycles of each assembly instruction and combining this with the processor's clock frequency (assumed to be 1GHz), the instruction cycle for the sequential execution section is calculated to be 2000 clock cycles, with a runtime of 2 microseconds. Additionally, considering the presence of jump instructions in the code, extra cycles for fetching and decoding are added for the next instruction, resulting in a revised runtime of 2.2 microseconds.

[0120] Loop Execution Section: Analyzing the loop logic in the C code, we found a calculation loop that iterates 20 times. The assembly instruction cycle for a single loop iteration is 75 clock cycles, therefore the instruction cycle for the loop execution section is 1500 clock cycles. Combining this with the instruction cycle of the sequential execution section, the total instruction cycle for the loop execution section is 3500 clock cycles, with a runtime of 3.7 microseconds.

[0121] Task scheduling section: Following a priority scheduling strategy, the control flow graph is decomposed into two high-priority tasks, namely high-priority task 1 and high-priority task 2. The algorithm execution time and task switching time for each high-priority task are calculated. The algorithm execution time for high-priority task 1 is 3.7 microseconds, the task switching time is 0.3 microseconds, and the total execution time is 4 microseconds. The algorithm execution time for high-priority task 2 is 2 microseconds, the task switching time is 0.3 microseconds, and the total execution time is 2.3 microseconds. Since both high-priority tasks need to be executed within a single scan cycle, the execution time for that scan cycle is 6.3 microseconds.

[0122] Example 3

[0123] This embodiment takes a version of the control flow graph program of a co-control device in a flexible DC transmission control and protection system as an example, such as... Figure 3 As shown, the control flow graph is decomposed into one high-priority task and one low-priority task. The high-priority task has a runtime T. H The estimated runtime is 31 microseconds (including task switching time), and the low-priority task algorithm execution time T is... L The estimated scan cycle is 205 microseconds, with a high-priority task scan period P. H =50 microseconds, low-priority scan cycle P L =1000 microseconds, task switching time T θ =0.3 microseconds, then:

[0124] Remaining time T for each scan cycle Δ =P H -T H =50-31=19 microseconds;

[0125] Low priority task slice time T N =T Δ -T θ =19-0.3=18.7 microseconds;

[0126] The number of slices for low-priority tasks is N=T L / T N =205 / 18.7=10.9, and rounded down, we get 10 times;

[0127] Low priority task last slice execution time T LAST = T L -T N ×N = 205 - 18.7 × 10 = 18 microseconds;

[0128] The actual execution time T of low-priority tasks total =P H ×N+T H +T LAST +Tθ =50×10+31+18+0.3=549.3 microseconds.

[0129] Compare the actual running time T of the lower priority. total and low priority scan cycle P L The former is much smaller than the latter, indicating that the code execution efficiency is high and the co-control device is stable.

[0130] Example 4

[0131] This embodiment takes a certain version of the control flow graph program of the pole protection device in the flexible DC transmission control and protection system as an example, such as... Figure 4 As shown, the control flow graph is decomposed into two high-priority tasks and two low-priority tasks, namely high-priority task 1, high-priority task 2, low-priority task 1, and low-priority task 2. The runtime T of high-priority task 1 is... H1 The estimated runtime is 21 microseconds (including task switching time), and the execution time of high-priority task 2 is T. H2 The estimated runtime is 18 microseconds (including task switching time), then the advanced task execution time T is... H = T H1 +T H2 =21+18=39 microseconds, the running time of low-priority task 1 algorithm T L1 The estimated runtime is 102 microseconds; the running time T for low-priority task 2 algorithm is... L2 The estimated time is 86 microseconds, with a high-priority scan period P. H =50 microseconds, low-priority scan cycle P L =1000 microseconds, task switching time T θ =0.3 microseconds, then:

[0132] Remaining time T for each scan cycle Δ =P H -T H1 -T H2 =50-21-18=11 microseconds;

[0133] Low priority task slice time T N = T Δ -T θ =11-0.3=10.7 microseconds;

[0134] The remaining time T of the previous task for low priority task 1 Δ0 =0 microseconds;

[0135] Low priority task 1 first slice execution time T FIRST1 =0 microseconds (T) Δ0 <T θ );

[0136] Low-priority task 1 slice count N1 = (T L1 - T FIRST1 ) / T N =(102-0) / 10.7=9.53, and rounded down, we get 9 times;

[0137] Low priority task 1 last slice execution time T LAST1 = T L1 -T FIRST1 -T N ×N1 = 102 - 0 - 10.7 × 9 = 5.7 microseconds;

[0138] Low priority task 1 actual running time T total1 =T Δ0 +P H ×N1+T H +T LAST1 +T θ =0 + 50 × 9 + (21 + 18) + 5.7 + 0.3 = 495 microseconds; It should be noted that: because T Δ0 =0, Figure 4 China T total1 T is omitted in the calculation formula Δ0 ;

[0139] The remaining time T of the previous task for low priority task 2 Δ1 =T Δ -T LAST1 -T θ =11-5.7-0.3=5 microseconds;

[0140] Low priority task 2 first slice execution time T FIRST2 = T Δ1 -T θ =5 - 0.3 = 4.7 microseconds (T) Δ1 >T θ );

[0141] Low-priority task 2 slice count N2 = (T L2 -T FIRST2 ) / T N =(86-4.7) / 10.7=7.5, and rounded down, we get 7 times;

[0142] Low priority task 2 last slice execution time T LAST2 =T L2 -T FIRST2 -T N ×N2 =86-4.7-10.7×7=6.4 microseconds;

[0143] Low priority task 2 actual running time T total2 =TΔ1 +P H ×N2+T H +T LAST2 +T θ =5 + 50 × 7 + (21 + 18) + 6.4 + 0.3 = 400.7 microseconds;

[0144] The total actual runtime T of low-priority tasks total =T total1 +T total2 =495 + 400.7 = 895.7 microseconds.

[0145] Compare the total actual runtime T of low priority tasks total and low priority scan cycle P L The former is slightly less than or greater than the latter (generally, the total actual running time T of low-priority tasks is...). total It should not exceed the low-priority scan period P. L If the execution efficiency is greater than 75%, it indicates low code execution efficiency. A value greater than 75% indicates low code execution efficiency, suggesting the protection device is prone to various unstable states, and the code needs further optimization.

[0146] It should be noted that: Figure 4 This demonstrates how the control flow graph is decomposed into multiple high-priority tasks and multiple low-priority tasks. Figure 4 In the middle, T Δ2 T represents the remaining time of the previous task of low-priority task 3. FIRST3 This indicates the runtime of the first slice of the low-priority task 3.

[0147] Example 5

[0148] This embodiment estimates the actual runtime of each task using the estimation method shown in Embodiment 4. This embodiment proposes an offline estimation method for control flow graph runtime, which can visually display the runtime and sequence of each task. Specifically, it includes the following steps:

[0149] The visual control flow graph is decomposed according to the task scheduling strategy to generate several embedded C codes;

[0150] Estimate the algorithm runtime for each task;

[0151] The actual execution time of high-priority tasks was estimated.

[0152] Based on the control flow graph decomposition, the actual runtime of low-priority tasks is estimated.

[0153] The list displays the sequential execution instruction cycles, loop counts, assembly instruction cycles for a single execution of each loop logic within each task, task code instruction cycles, and task execution time for each task; the list also displays the actual execution span and number of slices within each scan cycle for each task.

[0154] The chart simulates the task switching operation diagram of the entire control and protection device, and marks the running time of each task and the actual running span of each priority task in segments.

[0155] like Figure 5 As shown, the interface displays the task switching operation diagram of the entire control and protection device (the device refers to an execution device in the flexible DC transmission control and protection system). The operation time of each task segment, the operation time of each priority task, and the actual operation span time are marked in segments. The operation time of the control flow diagram is comprehensively and accurately estimated, which can intuitively display the efficiency of the device operation, quickly locate the software operation performance bottleneck, predict the code execution efficiency during the development stage, and guide subsequent optimization.

[0156] in, Figure 5 The numbers at the top of the bars indicate the single run time of the task; the numbers directly above the bars are the count of the number of times the task has been run; each bar represents the time of each task's run, and bars at the same height represent the same task; the horizontal arrows indicate the time of the run. Figure 5 It can intuitively show the execution sequence of each task in the entire control and protection device and the execution time of each task. For example, the tasks are executed in sequence: high priority task 1 runs for 21us, high priority task 2 runs for 18us, low priority task 1 runs for 11us, ..., high priority task 1 runs for 21us, high priority task 2 runs for 18us, low priority task 1 runs for 6us, low priority task 2 runs for 5us, ..., high priority task 1 runs for 21us, high priority task 2 runs for 18us, low priority task 2 runs for 6.7us, ...

[0157] Example 6

[0158] Based on the same inventive concept as other embodiments, this embodiment introduces a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the above-described offline estimation method for control flow graph runtime.

[0159] Example 7

[0160] Based on the same inventive concept as other embodiments, this embodiment introduces a computer device, including: a memory for storing a computer program; and a processor for executing the computer program to implement the steps of the above-described offline estimation method for control flow graph runtime.

[0161] Example 8

[0162] Based on the same inventive concept as other embodiments, this embodiment introduces a computer program product, including a computer program that, when executed by a processor, implements the steps of the above-described offline estimation method for control flow graph runtime.

[0163] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0164] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0165] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0166] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0167] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other modifications under the guidance of the present invention, and these modifications are all within the protection scope of the present invention.

Claims

1. A method for offline estimation of control flow graph runtime, characterized in that, If the control flow graph is a fully sequential control flow graph, the offline estimation method for the runtime of the control flow graph includes the following steps: The visualization control flow graph generates several embedded C codes, with all function calls expanded as inline functions during generation. Compile embedded C code into assembly code; The code instruction cycle is obtained by summing up each assembly instruction cycle. The offline estimate of the control flow graph runtime is obtained by dividing the code instruction cycle by the processor clock frequency.

2. The offline estimation method for control flow graph runtime according to claim 1, characterized in that, If loop logic parsing is added to the control flow graph, the offline runtime estimation method for the control flow graph also includes the following steps: Parse all loop logic in the embedded C code using keywords related to loop structures; The assembly code corresponding to all loop logic is separated from the assembly code obtained by compiling the embedded C code, and the remaining part is the assembly code of the sequential execution part; Calculate the assembly instruction cycle of each loop logic's single execution, multiply it by the number of loops to obtain the assembly code instruction cycle corresponding to each loop logic, thus obtaining the instruction cycle of each loop logic; The sequential execution instruction cycle is obtained by summing up each assembly instruction cycle of the sequential execution section; The total code instruction cycle is obtained by summing the sequential execution instruction cycle and the cycle of each loop logic instruction; The offline estimate of the control flow graph runtime is obtained by dividing the total code instruction cycle by the processor clock frequency.

3. The offline estimation method for control flow graph runtime according to claim 2, characterized in that, If pipeline switching is also added after adding loop logic parsing to the control flow graph, the offline runtime estimation method for the control flow graph further includes the following steps: If the assembly instruction is found to be a jump instruction, then additional fetch and decode cycles are needed when calculating the instruction cycle for the next assembly code.

4. An offline method for estimating the runtime of a control flow graph, characterized in that, The offline runtime estimation method for the control flow graph of task scheduling includes the following steps: Based on the task scheduling strategy, the visualized control flow graph generates several embedded C codes according to the task; Compile the embedded C code for each task into task assembly code; Each task's analysis and accumulation of each task's assembly instruction cycle yields the task's code instruction cycle; The execution time of each task's algorithm is obtained by dividing the task code instruction cycle by the processor's clock speed. Obtain the task switching time from the task switching code; The task execution time is obtained by adding the algorithm execution time of each task to the task switching time; The running time of each scan cycle is obtained by summing the running times of the tasks running in each scan cycle.

5. The offline estimation method for control flow graph runtime according to claim 4, characterized in that, To estimate the actual runtime of a low-priority task, the control flow graph is decomposed into one high-priority task and one low-priority task according to the task priority scheduling strategy. The high-priority task has a higher priority than the low-priority task. The method for estimating the actual runtime of the low-priority task is as follows: Execute scan cycle P using a high-priority task. H Subtract the execution time T of the high-priority task H Obtain the remaining time T for each scan cycle Δ That is, T Δ = P H -T H ; Use the remaining time T of each scan cycle Δ Subtract task switching time T θ Obtain the low-priority task slice time T N That is, T N =T Δ -T θ ; Running time T using low-priority task algorithm L Divide by the low-priority task slice time T N And rounding up gives the number of slices N for low-priority tasks, i.e., for T L / T N The result of the calculation, rounded down, is N. The runtime T of the final slice of the low-priority task is obtained by subtracting the slice time and the number of slices of the low-priority task from the runtime of the low-priority task algorithm. LAST That is, T LAST =T L -T N ×N; The high-priority task's scan cycle is multiplied by the low-priority task's slice count, plus the high-priority task's runtime T. H The runtime T of the last slice of a low-priority task LAST and task switching time T θ The actual runtime T of the low-priority task is obtained. total That is, T total =P H ×N+T H +T LAST +T θ .

6. The offline estimation method for control flow graph runtime according to claim 4, characterized in that, If, based on a task priority scheduling strategy, the control flow graph is decomposed into at least one high-priority task and at least two low-priority tasks, then the method for estimating the total actual runtime of the low-priority tasks is as follows: High-priority task execution time T H It equals the sum of the running times of all high-priority tasks, i.e., T. H =ΣT Hn Where n represents the number of high-priority tasks, and T Hn This represents the execution time of the nth high-priority task; when calculating the number of slices for low-priority tasks, the execution time of the first slice of that low-priority task must be subtracted. N m =(T Lm -T FIRSTm ) / T N Where m represents the number of low-priority tasks, and N m T represents the slice count of the m-th low-priority task. Lm T represents the running time of the algorithm for the m-th low-priority task. FIRSTm T represents the first slice execution time of the m-th low-priority task. N Indicates the slice time for low-priority tasks; The runtime of the last slice of a low-priority task needs to be subtracted from the runtime of the first slice of that low-priority task. LASTm =T Lm -T FIRSTm -T N ×N m , among which, T LASTm This represents the execution time of the last slice of the m-th low-priority task; The actual execution time of a low-priority task needs to be added to the remaining time of the previous low-priority task, T. totalm =T Δm-1 +P H ×N m +T H +T LASTm +T θ , among which, T Δm-1 This represents the remaining time for the (m-1)th low-priority task; when m=1, T Δ0 =0; T Δm =T Δ -T LASTm -T θ T Δ T represents the remaining time for each scan cycle. Δ =P H -T H ; The execution time of the first low-priority task is the time it takes to run this low-priority task within the remaining time of the previous low-priority task. When T Δm-1 ≤T θ At that time, T FIRSTm =0, when T Δm-1 >T θ At that time, T FIRSTm =T Δm-1 -T θ ; The total actual runtime T of low-priority tasks total The sum of the actual runtime of all low-priority tasks, i.e., T total =ΣT totalm .

7. A method for offline estimation of control flow graph runtime, characterized in that, It can visually display the task execution time and execution order of each task, specifically including the following steps: The visual control flow graph is decomposed according to the task scheduling strategy to generate several embedded C codes; Estimate the algorithm runtime for each task; The actual execution time of high-priority tasks was estimated. Based on the control flow graph decomposition, the actual runtime of low-priority tasks is estimated. The list displays the sequential execution instruction cycles, loop counts, assembly instruction cycles for a single execution of each loop logic within each task, task code instruction cycles, and task execution time for each task; the list also displays the actual execution span and number of slices within each scan cycle for each task. The chart simulates the task switching operation diagram of the entire control and protection device, and marks the running time of each task and the actual running span of each priority task in segments; The method for estimating the algorithm running time for each task is as follows: If the control flow graph is a fully sequential control flow graph, then the estimation method for the algorithm runtime of each task is as follows: The visualization control flow graph generates several embedded C codes, with all function calls expanded as inline functions during generation. Compile embedded C code into assembly code; The code instruction cycle is obtained by summing up each assembly instruction cycle. The execution time of the algorithm for each task is calculated by dividing the code instruction cycle by the processor clock speed. Based on the full sequential control flow graph, if loop logic analysis is added, the estimation method for the algorithm runtime of each task also includes the following steps: Parse all loop logic in the embedded C code using keywords related to loop structures; The assembly code corresponding to all loop logic is separated from the assembly code obtained by compiling the embedded C code, and the remaining part is the assembly code of the sequential execution part; Calculate the assembly instruction cycle of each loop logic's single execution, multiply it by the number of loops to obtain the assembly code instruction cycle corresponding to each loop logic, thus obtaining the instruction cycle of each loop logic; The sequential execution instruction cycle is obtained by summing up each assembly instruction cycle of the sequential execution section; The total code instruction cycle is obtained by summing the sequential execution instruction cycle and the cycle of each loop logic instruction; The offline estimate of the control flow graph runtime is obtained by dividing the total code instruction cycle by the processor clock frequency. Based on adding loop logic analysis to the full control flow graph, if pipeline switching is added, the estimation method for the algorithm runtime of each task also includes the following steps: If the assembly instruction is found to be a jump instruction, then when calculating the instruction cycle of the next assembly code, an additional value fetching cycle and decoding cycle are required. The method for estimating the actual running time of the high-priority tasks is as follows: Compile the embedded C code for each task into task assembly code; Each task's analysis and accumulation of each task's assembly instruction cycle yields the task's code instruction cycle; The execution time of each task's algorithm is obtained by dividing the task code instruction cycle by the processor's clock speed. Obtain the task switching time from the task switching code; The task execution time is obtained by adding the algorithm execution time of each task to the task switching time; The running time of each scan cycle is obtained by summing the running time of the tasks running in each scan cycle, which is the actual running time of the advanced task. The method for estimating the actual runtime of the low-priority task is as follows: Execute scan cycle P using a high-priority task. H Subtract the execution time T of the high-priority task H Obtain the remaining time T for each scan cycle Δ That is, T Δ = P H -T H ; Use the remaining time T of each scan cycle Δ Subtract task switching time T θ Obtain the low-priority task slice time T N That is, T N =T Δ -T θ ; Running time T using low-priority task algorithm L Divide by the low-priority task slice time T N And rounding up gives the number of slices N for low-priority tasks, i.e., for T L / T N The result of the calculation, rounded down, is N. The runtime T of the final slice of the low-priority task is obtained by subtracting the slice time and the number of slices of the low-priority task from the runtime of the low-priority task algorithm. LAST That is, T LAST =T L -T N ×N; The high-priority task's scan cycle is multiplied by the low-priority task's slice count, plus the high-priority task's runtime T. H The runtime T of the last slice of a low-priority task LAST and task switching time T θ The actual runtime T of the low-priority task is obtained. total That is, T total =P H ×N+T H +T LAST +T θ .

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by the processor, it implements the steps of the offline estimation method for control flow graph runtime as described in any one of claims 1 to 7.

9. A computer device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the offline estimation method for control flow graph runtime according to any one of claims 1 to 7.

10. A computer program product, comprising a computer program, characterized in that: When the computer program is executed by the processor, it implements the steps of the offline estimation method for control flow graph runtime as described in any one of claims 1 to 7.

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