Wafer parameter prediction method and apparatus, and computing device

Abstract

The present disclosure provides a wafer parameter prediction method, device and computing equipment, wherein the method comprises: obtaining front-end process data of a to-be-detected wafer based on a front-end process procedure and current process data of the to-be-detected wafer in a current processing process; inputting the front-end process data and the current process data into a multi-modal feature extraction network, determining an initial predicted wafer parameter of the to-be-detected wafer based on multi-modal fusion features extracted by the multi-modal feature extraction network; and correcting the initial predicted wafer parameter by using a preset physical constraint rule to obtain a target predicted wafer parameter of the to-be-detected wafer. By applying the embodiments of the present disclosure, efficient feature fusion and initial prediction can be realized end to end, the wafer parameter prediction efficiency is improved, and at the same time, the prediction results in the initial predicted wafer parameter that violate the physical meaning can be corrected in a targeted manner based on the inherent physical laws in the field of semiconductor manufacturing, thereby improving the accuracy of the target predicted wafer parameter.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor manufacturing technology, and in particular to a wafer parameter prediction method, apparatus and computing device. Background Technology

[0002] In semiconductor manufacturing, wafer parameters directly determine chip performance, reliability, and yield. As chip manufacturing processes become increasingly refined, the requirements for wafer processing precision are becoming more stringent. Accurate prediction of wafer parameters can provide real-time data for process adjustments, equipment maintenance, and quality control, effectively reducing wafer scrap and increased production costs caused by parameter anomalies. This is a crucial step in achieving intelligent and efficient semiconductor manufacturing.

[0003] In related technologies, simulation calculations based on traditional physical models are typically used to simulate stress changes, material removal mechanisms, and the interaction of the process environment during wafer processing. This allows for the calculation of key parameters such as wafer morphology changes and particle defect distribution, providing theoretical references for wafer processing technology optimization.

[0004] However, this approach requires detailed modeling of complex physical processes, involving the solution of numerous nonlinear equations and multi-field coupling analysis. This results in extremely high computational costs and low operational efficiency, making it difficult to meet the real-time parameter prediction requirements of semiconductor production lines and providing timely support for rapid process adjustments during production. Therefore, there is an urgent need for a wafer parameter prediction method that balances prediction accuracy with computational efficiency. Summary of the Invention

[0005] This disclosure provides a wafer parameter prediction method, apparatus, and computing device; it can achieve efficient end-to-end feature fusion and initial prediction, improve wafer parameter prediction efficiency, and at the same time, based on the inherent physical laws in the semiconductor manufacturing field, it can specifically correct prediction results that violate physical meaning in the initial prediction of wafer parameters, thereby improving the accuracy of the target predicted wafer parameters.

[0006] The technical solution disclosed herein is implemented as follows: In a first aspect, this disclosure provides a wafer parameter prediction method, comprising: acquiring front-end process data of the wafer to be inspected based on the previous processing steps, and current process data of the wafer to be inspected in the current processing step; inputting the front-end process data and the current process data into a multimodal feature extraction network, determining the initial predicted wafer parameters of the wafer to be inspected based on the multimodal fusion features extracted by the multimodal feature extraction network; and correcting the initial predicted wafer parameters using preset physical constraint rules to obtain the target predicted wafer parameters of the wafer to be inspected, wherein the preset physical constraint rules are used to indicate the physical laws that the wafer parameters conform to.

[0007] Secondly, this disclosure provides a wafer parameter prediction device, comprising: a data acquisition module configured to acquire front-end process data of the wafer to be inspected based on the previous processing steps, and current process data of the wafer to be inspected in the current processing step; a feature extraction module configured to input the front-end process data and the current process data into a multimodal feature extraction network, and determine the initial predicted wafer parameters of the wafer to be inspected based on the multimodal fusion features extracted by the multimodal feature extraction network; and a physical constraint module configured to correct the initial predicted wafer parameters using preset physical constraint rules to obtain the target predicted wafer parameters of the wafer to be inspected, wherein the preset physical constraint rules are used to indicate the physical laws that the wafer parameters conform to.

[0008] Thirdly, this disclosure provides a computing device including a memory and a processor, the memory being used to store executable instructions, and the processor executing the executable instructions stored in the memory to implement the wafer parameter prediction method of the first aspect.

[0009] Fourthly, this disclosure provides a computer storage medium storing computer-executable instructions that, when executed by a processor, implement the steps of the wafer parameter prediction method of the first aspect.

[0010] Fifthly, this disclosure provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the wafer parameter prediction method of the first aspect.

[0011] By applying the embodiments of this disclosure, and by acquiring data from previous processes and current processes, it is possible to comprehensively cover key information throughout the entire wafer fabrication process. This approach considers both the static characteristics of previous processes and captures the dynamic changes in the current process, providing comprehensive and accurate data support for subsequent wafer parameter prediction. Furthermore, by using a multimodal feature extraction network for feature extraction, efficient end-to-end feature fusion and initial prediction can be achieved, improving the efficiency of wafer parameter prediction. Finally, by utilizing preset physical constraint rules to correct the initial predicted wafer parameters, predictions that violate physical principles can be specifically corrected based on the inherent physical laws of semiconductor manufacturing, thereby improving the accuracy of the target predicted wafer parameters. Attached Figure Description

[0012] Figure 1 A flowchart of a wafer parameter prediction method provided in an embodiment of this disclosure.

[0013] Figure 2 This is a flowchart illustrating an initial prediction wafer parameter determination process provided in an embodiment of this disclosure.

[0014] Figure 3This is a flowchart illustrating a target prediction wafer parameter generation process provided in an embodiment of the present disclosure.

[0015] Figure 4 This is a schematic diagram illustrating the fitting of predicted values ​​and actual measured values ​​of curvature parameters obtained using physical constraint rules, as provided in an embodiment of this disclosure.

[0016] Figure 5 A comparison chart showing the prediction effect of a curvature parameter distributed by production batch, provided in an embodiment of this disclosure.

[0017] Figure 6 This is a schematic diagram showing the fitting of a predicted value and an actual measured value of a total light scattering parameter provided in an embodiment of this disclosure.

[0018] Figure 7 This is a schematic diagram of the composition of a wafer parameter prediction device provided in an embodiment of the present disclosure.

[0019] Figure 8 This is a structural block diagram of a computing device provided in an embodiment of the present disclosure. Detailed Implementation

[0020] The technical solutions of this disclosure will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art should fall within the protection scope of this disclosure.

[0021] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure. The singular forms “a,” “the,” and “the” used in this disclosure are also intended to include the plural forms unless the context clearly indicates otherwise.

[0022] Furthermore, in the embodiments of this disclosure, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0023] To facilitate understanding of the technical solutions of the embodiments of this disclosure, the related technologies of the embodiments of this disclosure are described below. The following related technologies are optional solutions and can be combined with the technical solutions of the embodiments of this disclosure in any way, and they all fall within the protection scope of the embodiments of this disclosure.

[0024] In semiconductor manufacturing, simulation methods based on traditional physical models simulate stress evolution, material removal mechanisms, and the interaction of the process environment during wafer fabrication. This allows for the estimation of key parameters such as wafer morphology changes and particle defect distribution, providing theoretical support for wafer fabrication process optimization. However, these methods require detailed modeling of complex physical processes, involving the solution of numerous nonlinear equations and multi-field coupling analysis. This results in high computational costs and low efficiency, making it difficult to meet the real-time parameter prediction requirements of semiconductor production lines and providing timely support for rapid process adjustments during production.

[0025] To improve the prediction efficiency of wafer parameters, one embodiment of this disclosure employs a data-driven end-to-end multimodal feature extraction network for parameter prediction, which can significantly shorten the prediction time and effectively solve the problem of low simulation efficiency of traditional physical models. However, purely data-driven multimodal feature extraction networks lack the active integration of inherent physical laws in the semiconductor manufacturing process, and their prediction results are prone to deviating from physical meaning, such as hierarchical logical conflicts in morphology parameters, non-monotonic distribution of particle parameters, and invalid parameter composition relationships, resulting in insufficient reliability of the prediction results and difficulty in directly supporting production decisions.

[0026] Therefore, this disclosure provides a wafer parameter prediction method. Based on the physical laws followed by wafer parameters (such as the hierarchical inclusion relationship of morphology parameters, absolute value ratio rules, regional consistency requirements, monotonic distribution rules of particle parameters, and composition rules of component addition, etc.), a preset physical constraint rule is constructed. Based on the initial predicted wafer parameters obtained by using a multimodal feature extraction network, the preset physical constraint rule is used to specifically correct the values ​​in the initial prediction results that violate physical meaning, ensuring that the corrected target predicted wafer parameters all conform to the inherent physical laws of semiconductor manufacturing. This improves the accuracy and reliability of the target predicted wafer parameters, effectively reduces silicon wafer scrap caused by unreasonable parameter prediction, improves production yield and efficiency, and provides a reliable basis for production process adjustment and quality control.

[0027] See Figure 1 , Figure 1 This is a flowchart illustrating a wafer parameter prediction method provided in an embodiment of the present disclosure. The wafer parameter prediction method is applied to a virtual metrology scenario in semiconductor manufacturing, specifically including steps S102-S106.

[0028] Step S102: Obtain the previous process data of the wafer to be inspected based on the previous processing process, and the current process data of the wafer to be inspected in the current processing process.

[0029] Specifically, in order to achieve real-time monitoring and control of wafer processing quality during wafer fabrication, it is possible to acquire the data of the previous processing steps generated by the wafer under test in the previous processing steps, as well as the current process data collected in real time during the current processing, so as to provide comprehensive data support for subsequent wafer parameter prediction.

[0030] Among them, front-end process data refers to the relevant data generated by the front-end processing steps such as slicing, grinding, polishing, and etching that the wafer undergoes before the current processing step. It belongs to static scalar data and characterizes the basic physical state of the wafer. It includes, but is not limited to, the initial morphology parameters after front-end processing (such as local thickness non-uniformity, initial value of global thickness range), front-end defect records (such as initial count of spot defects, location information of non-removable defects), and substrate characteristic parameters (such as silicon wafer purity, lattice integrity index), etc.

[0031] Current process data refers to the dynamic sequence data collected in real time during the current wafer processing, which characterizes the changes in the environment and equipment status during the processing, including but not limited to equipment operating parameters (such as time-series data of polishing pressure, etching temperature, and processing speed), environmental parameters (such as time-series data of cleanroom humidity and dust particle concentration), and process medium parameters (such as time-series data of polishing slurry concentration and etching gas flow rate).

[0032] For example, front-end process data can be collected by measurement equipment in the front-end processing stage (such as laser interferometers and atomic force microscopes), stored in the factory manufacturing execution system (MES), and then directly retrieved; alternatively, front-end process statistics of wafers in the same batch can be retrieved from the historical production database as a reference for the front-end data of the wafer to be tested.

[0033] Current process data is collected in real time through production line real-time monitoring sensors (such as pressure sensors, temperature sensors, and particle counters). The sampling frequency is set to 1Hz~100Hz according to process requirements to ensure that dynamic changes in the process are captured.

[0034] Step S104: Input the previous process data and the current process data into the multimodal feature extraction network, and determine the initial predicted wafer parameters of the wafer to be inspected based on the multimodal fusion features extracted by the multimodal feature extraction network.

[0035] Specifically, based on the acquisition of the front-end process data and current process data of the wafer to be inspected, the two types of data can be input into a network or model with a hybrid feature extraction architecture. Then, multimodal fusion features are extracted through the network or model, and the initial prediction results of the wafer parameters of the wafer to be inspected are determined based on the multimodal fusion features.

[0036] The multimodal feature extraction network can employ a hybrid architecture of "DNN+LSTM" or "CNN+Transformer". Multimodal fusion features are the fusion features of previous process data and current process data. Initial predicted wafer parameters are the initial prediction results of the wafer parameters for the wafer to be inspected.

[0037] Step S106: Correct the initial predicted wafer parameters using preset physical constraint rules to obtain the target predicted wafer parameters of the wafer to be tested. The preset physical constraint rules are used to indicate the physical laws that the wafer parameters conform to.

[0038] Specifically, based on the initial prediction results determined by the multimodal feature extraction network, the parameters in the initial prediction results that do not conform to the inherent physical laws of the wafer manufacturing process are further corrected by the preset physical constraint rules, thereby obtaining more accurate target prediction results.

[0039] Among them, the preset physical constraint rules refer to a set of constraints constructed based on the inherent physical laws in the semiconductor manufacturing field. These constraints are used to correct numerical values ​​in the prediction results that violate physical meaning, including but not limited to parameter hierarchy constraints, numerical distribution rule constraints, parameter composition relationship constraints, and region consistency constraints, to ensure that the prediction results conform to the physical logic of silicon wafer processing. The target predicted wafer parameters refer to the target predicted results of the wafer parameters after correction by physical constraints.

[0040] By applying this embodiment, by acquiring data from previous processes and current processes, it is possible to comprehensively cover key information throughout the entire wafer fabrication process. This approach considers both the static characteristics of previous processes and captures the dynamic changes in the current process, providing comprehensive and accurate data support for subsequent wafer parameter prediction. Feature extraction via a multimodal feature extraction network enables efficient end-to-end feature fusion and initial prediction, improving wafer parameter prediction efficiency. Furthermore, by utilizing preset physical constraint rules to correct the initial predicted wafer parameters, it is possible to specifically correct predictions that violate physical principles based on the inherent physical laws of semiconductor manufacturing, thereby improving the accuracy of the target predicted wafer parameters.

[0041] See Figure 2 , Figure 2 This is a flowchart illustrating an initial predicted wafer parameter determination process provided in an embodiment of this disclosure. In one embodiment, front-end process data and current process data are input into a multimodal feature extraction network. Based on the multimodal fusion features extracted by the multimodal feature extraction network, the initial predicted wafer parameters of the wafer to be inspected are determined, including steps S1042-S1048.

[0042] Step S1042: Input the data from the previous process into the static feature extraction network to obtain the static features extracted by the static feature extraction network.

[0043] Specifically, front-end process data refers to static scalar data formed on the wafer before the current processing step. It covers the basic morphological parameters, defect records, and substrate characteristics after the previous processing, and does not change in real time with the current processing. Nonlinear correlations and essential features in the network mining data can be extracted from static features to extract the static features corresponding to the front-end process data.

[0044] Among them, the static feature extraction network is a neural network architecture used to process non-time-series static data, which can extract essential physical features in the front-end process data that do not change over time. Static features are physical state features extracted from the wafer front-end process data that do not change with the current processing, characterizing the basic processing background and inherent properties of the wafer, such as the initial thickness uniformity after front-end processing, substrate purity index, front-end defect density, etc.

[0045] In one example, the data from the preceding process is standardized and then input into a DNN network. The network is then mapped step by step to a high-dimensional feature space through fully connected layers to capture the complex nonlinear relationships between different preceding process parameters (such as initial warpage and preceding process defect count), and outputs a static feature vector with a fixed dimension.

[0046] In another example, the data from the preceding process is restructured (e.g., grouping scattered scalar parameters according to their physical meaning to form a feature matrix), input into a CNN network, and local feature associations (e.g., the local correspondence between the preceding process morphology parameters and the defect distribution) are extracted through convolutional kernels. After the dimensionality is compressed by pooling layers, static features are output.

[0047] Step S1044: Input the current process data into the dynamic feature extraction network to obtain the dynamic time-series features extracted by the dynamic feature extraction network.

[0048] Specifically, the current process data consists of real-time time-series data collected during wafer fabrication, covering the temporal changes of equipment operating parameters (such as polishing pressure and etching temperature), environmental parameters (such as cleanroom humidity), and process medium parameters (such as polishing slurry concentration), exhibiting continuity and correlation in the time dimension. Dynamic feature extraction networks can capture the temporal evolution patterns and extract dynamic temporal features.

[0049] Among them, the dynamic feature extraction network is a neural network architecture used to process time-series sequential data. It can capture the temporal evolution patterns and dynamic correlations of parameters in the current process and adapt to the temporal characteristics of real-time processing data. Dynamic temporal features are process features that change dynamically over time and are extracted from the current process data. They characterize the real-time state fluctuations in the processing process, such as the temporal trends of equipment operating parameters, the dynamic changes in environmental parameters, and the temporal correlations of process medium parameters.

[0050] In one example, the current process data is divided into sequence segments according to a fixed time window and input into an LSTM network. Through a gating mechanism, key changes within a long time series (such as sudden rises and falls in temperature and steady fluctuations in pressure during processing) are selectively memorized, irrelevant noise interference is suppressed, and dynamic time series features reflecting the time series trend are output.

[0051] In another example, positional encoding is added to the current process time series data, which is then input into the Transformer network. The association weights of data at different time steps are calculated through a self-attention mechanism to comprehensively capture the global dependencies of long-term time series data (such as the cumulative change effect of equipment parameters during long-term processing) and output dynamic time series features containing global time series associations.

[0052] Step S1046: Fuse static features and dynamic temporal features to generate multimodal fusion features.

[0053] Specifically, static features reflect the basic state of the wafer, while dynamic time-series features reflect the real-time changes in the processing. The integration of the two can achieve a comprehensive characterization of "basic state + process changes".

[0054] Among them, multimodal fusion features are comprehensive feature vectors formed by integrating static features and dynamic time-series features through a specific fusion strategy. They combine the stability of the wafer's basic state with the dynamism of the processing, and can provide comprehensive data support for subsequent parameter prediction.

[0055] In one example, the static feature vector and the dynamic temporal feature vector are directly concatenated to form a multimodal fusion feature with a dimension equal to the sum of the dimensions of the two. This method is simple to operate, can completely preserve the original information of the two types of features, and is suitable for scenarios where the weights of the two types of features are roughly equal.

[0056] In another example, based on semiconductor manufacturing process knowledge, adaptive weights are assigned to static and dynamic timing features (e.g., static features have higher weights when the front-end has a significant impact, while dynamic features have higher weights when the current process fluctuates greatly). A fused feature is generated using a weighted summation formula (fused feature = ω1 × static feature + ω2 × dynamic timing feature, where ω1 + ω2 = 1). This method can adjust the feature contribution according to process characteristics, adapting to different processing scenarios.

[0057] Furthermore, an attention module can be introduced to calculate the correlation importance score of each dimension in static and dynamic temporal features. The weight ratio of each feature type is dynamically adjusted according to the score, highlighting key feature dimensions for wafer parameter prediction (e.g., when pressure parameter fluctuations significantly affect morphology in the current process, the weight of the corresponding dynamic feature dimension is increased), and outputting multimodal fusion features that focus on key information. This approach has strong adaptability and is suitable for multi-feature collaborative prediction scenarios under complex processes.

[0058] Step S1048: Based on the multimodal fusion features, determine the initial predicted wafer parameters of the wafer to be detected.

[0059] Specifically, multimodal fusion features can be mapped to wafer parameter prediction values ​​through a prediction network.

[0060] For example, multimodal fusion features are input into the prediction head (e.g., composed of 2-3 fully connected layers), and a linear activation function is used (to adapt to the prediction requirements of continuous values ​​such as wafer morphology parameters and particle parameters, avoiding numerical distortion caused by nonlinear activation) to output initial predicted wafer parameters. These initial predicted parameters cover two types of core parameters: first, initial predicted wafer morphology parameters, including local thickness non-uniformity, global thickness range, warpage, and edge region flatness; second, initial predicted wafer particle parameters, including particle counts in different size ranges, total defect count, and cluster defect-related parameters.

[0061] During the prediction process, the training and optimization of the prediction head are completed by minimizing the mean square error loss function between the predicted value and the actual measurement value, ensuring that the initial prediction value can initially reflect the actual distribution trend of the wafer parameters, and providing a reliable basis for subsequent physical constraint correction.

[0062] This embodiment achieves parallel feature mining of two types of modal data by independently dividing the static and dynamic feature extraction networks. This eliminates the need for complex feature transformations or dimension mapping processes, preserving the core information of both types of features while minimizing computational complexity in fusion. It avoids the complex equation solving and multi-field coupling analysis found in traditional physical models, enabling rapid generation of initial prediction values ​​and significantly improving the overall prediction process's response speed. Furthermore, the accurate extraction and efficient fusion of static and dynamic features ensures full utilization of multimodal information, allowing the initial prediction parameters to initially reflect the actual distribution trend of wafer parameters, providing high-quality foundational data for subsequent physical constraint correction.

[0063] In one embodiment of this disclosure, the initial predicted wafer parameters include initial predicted wafer morphology parameters and initial predicted wafer particle parameters, and the target predicted wafer parameters include target predicted wafer morphology parameters and target predicted wafer particle parameters.

[0064] See Figure 3 , Figure 3 This is a flowchart illustrating a target prediction wafer parameter generation process provided in an embodiment of the present disclosure. The initial prediction wafer parameters are corrected using preset physical constraint rules to obtain the target prediction wafer parameters for the wafer to be detected, including steps S1062-S1064.

[0065] Step S1062: Based on the first preset physical constraint rule corresponding to the wafer morphology parameters, the initial predicted wafer morphology parameters are corrected to generate the target predicted wafer morphology parameters.

[0066] Among them, the first preset physical constraint rule refers to the constraint set constructed based on the physical nature of silicon wafer morphology parameters and the law of processing technology. It is used to regulate the physical compliance of the initially predicted wafer morphology parameters, including but not limited to the hierarchical inclusion rule (the logical hierarchical relationship of parameters of the same type), the absolute value and proportion rule (the numerical correlation of parameters of different types), and the regional consistency rule (the distribution characteristics of parameters in a local region). All rules are derived from the geometric axioms and material properties that cannot be violated in the silicon wafer processing.

[0067] Initial predicted wafer morphology parameters refer to silicon wafer morphology-related parameters output by a multimodal feature extraction network that have not undergone physical constraint verification, characterizing the geometric morphological properties of the silicon wafer surface.

[0068] For example, the initial predicted wafer morphology parameters may include, but are not limited to, local thickness inhomogeneity (NT), global thickness range (GBIR), local flatness (SFQR), edge region flatness (ESFQR and ESFQD), bow, and warp.

[0069] The specific definitions of each parameter are as follows: NT measures the local thickness variation of the silicon wafer within the short to medium spatial wavelength range (0.2-20mm); NT10×10 refers to evaluating local thickness fluctuations within a 10mm×10mm area, and NT2×2 refers to evaluating within a smaller 2mm×2mm area, capturing more subtle thickness variations. GBIR reflects the extreme differences in the overall thickness distribution of the silicon wafer, directly measuring the elevation difference between the highest and lowest points on the wafer, encompassing thickness variation components across all spatial wavelengths, and is a core indicator characterizing the overall thickness uniformity of the silicon wafer. SFQR is used to evaluate the deviation of the surface within a local region from the best-fit plane, calculated by independently fitting a reference plane within each local region and calculating the distance difference between the highest and lowest points within that region relative to the reference plane. ESFQR and ESFQD are used to evaluate the flatness characteristics of the annular region at the edge of the silicon wafer; ESFQR refers to the sum of the maximum positive and negative deviations of the edge region, reflecting the overall undulation of the edge region; ESFQD refers to the maximum absolute deviation of the edge region, reflecting the maximum deviation on one side of the edge region. Bow characterizes the systematic curvature of the silicon wafer's center point relative to the overall reference plane, reflecting the overall curvature of the silicon wafer. Positive values ​​indicate upward convexity, while negative values ​​indicate downward concavity. Warp characterizes the maximum undulation of the silicon wafer as a whole relative to the best-fit plane, encompassing all types of deformation such as bending and twisting.

[0070] The target predicted wafer morphology parameters refer to the target predicted results of wafer morphology parameters that conform to the physical laws of semiconductor manufacturing after being corrected by the first preset physical constraint rules.

[0071] Step S1064: Based on the second preset physical constraint rules corresponding to the target predicted wafer morphology parameters and wafer particle parameters, the initial predicted wafer particle parameters are corrected to generate the target predicted wafer particle parameters.

[0072] The second preset physical constraint rule refers to a set of constraints constructed by combining the physical state of the silicon wafer surface (characterized by the morphology parameters of the target predicted wafer) with the particle defect formation mechanism. It is used to regulate the physical compliance of the initial predicted wafer particle parameters, including but not limited to monotonic distribution rules (correlation between particle number and size), additive composition rules (quantitative relationship of different types of particle parameters), and conditional logic rules (defect judgment conditions based on morphology).

[0073] Initial predicted wafer particle parameters refer to the silicon wafer surface defect-related parameters output by the multimodal feature extraction network without physical constraint verification, characterizing the distribution characteristics of silicon wafer surface particles and defects.

[0074] For example, the initial predicted wafer grain parameters may include, but are not limited to, light spot defect parameters (LPD), non-removable light spot defect parameters (LPD_N), cluster count (CLCT), total light scattering (LLS), total defect count (SADC), non-cluster defect count (SAUC), total scratch length (LNTF), cluster area (CARA), and total number of defects within a cluster (CLTC).

[0075] The specific definitions of each parameter are as follows: LPD refers to the total number of all local point defects detected by light scattering; LPD_N refers to LPDs that cannot be removed by standard cleaning processes, which are usually inherent defects in the substrate (such as COPs) rather than surface-attached particle defects; CLCT refers to the parameter used to count the number of such clusters when multiple LPDs that are closely clustered in spatial location and form a specific pattern are identified as a cluster defect; LLS refers to the sum of all point defects, excluding linear defects such as scratches; SADC refers to the absolute number of all types of defects detected; SAUC refers to the total number of all independent defects that are not classified as clusters; LNTF refers to the total length of all linear defects on the silicon wafer surface that are identified as scratches; CARA refers to the total area occupied by all regions identified as cluster defects on the silicon wafer surface; CLTC refers to the total number of individual LPDs contained within all clusters.

[0076] The target predicted wafer particle parameters refer to the target predicted results of wafer particle parameters that conform to the physical laws of semiconductor manufacturing after being corrected by the second preset physical constraint rules.

[0077] This embodiment accurately covers the core physical laws of morphology parameters, such as hierarchical logic, proportional relationships, and regional consistency, through the first preset physical constraint rule. This completely eliminates potential problems in the initial prediction, such as hierarchical relationship conflicts, non-zero value anomalies, and proportional imbalances, ensuring that the predicted wafer morphology parameters fully conform to the geometric characteristics and processing mechanism of silicon wafers. The corrected morphology parameters not only possess physical rationality but also provide a reliable surface physical state benchmark (such as surface smoothness and local undulations) for subsequent particle parameter correction, laying the foundation for cross-parameter correlation correction. Particle parameter correction uses the predicted wafer morphology parameters as the physical basis and, combined with the second preset physical constraint rule, achieves correlation correction between particle parameters and morphology state, avoiding the isolation of the two types of parameter corrections and improving the inherent consistency of the overall prediction results.

[0078] In one embodiment of this disclosure, the first preset physical constraint rule includes: a hierarchical inclusion rule for wafer morphology parameters of the same physical type. Based on the first preset physical constraint rule corresponding to the wafer morphology parameters, the initially predicted wafer morphology parameters are corrected, including: Based on the hierarchical inclusion rule, a first preset correction threshold is used to perform hierarchical coverage correction on the local thickness non-uniformity parameter across sampling scales; Based on the hierarchical inclusion rule, the monotonic chain sorting method is used to sort the sequence to be corrected in descending order. The sequence to be corrected consists of the global thickness range and local flatness parameters with different statistical coverage gradients.

[0079] The first preset correction threshold (denoted as ε) is determined by taking the larger of the two values, which is the 5th percentile of the statistical value of the difference between the minimum resolution of the detection device and the corresponding parameter in the historical good product data, and multiplying it by a safety factor of 1.2 to 1.5. This is used to ensure that the corrected parameter is far away from the measurement noise range and meets the physical limits.

[0080] The sequence to be corrected is a set of parameters consisting of the global thickness range (GBIR) and local smoothness parameters (SFQR Max, SFQR 99%, SFQR 98%, SFQR 95%) with different statistical coverage gradients.

[0081] For example, based on the hierarchical inclusion rule, the local thickness non-uniformity parameter, global thickness range and local flatness parameter in the initial predicted wafer morphology parameters are corrected, mainly including cross-sampling scale local thickness non-uniformity correction and global thickness range and local flatness parameter correction.

[0082] In one example, cross-sampling scale local thickness non-uniformity correction can be implemented as follows: Extract the initial predicted cross-sampling scale local thickness non-uniformity parameters, including NT10×10_raw (initial predicted value for a 10mm×10mm region) and NT2×2_raw (initial predicted value for a 2mm×2mm region). Based on the hierarchical inclusion rule, a first preset correction threshold ε is used to perform hierarchical coverage correction, calculated as: NT10×10_final = max (NT10×10_raw, NT2×2_raw + ε). This formula ensures that the local thickness non-uniformity parameter in large-scale regions is greater than that in small-scale regions, consistent with the physical characteristic that small regions are more prone to extreme values.

[0083] In one example, the correction of global thickness range and local smoothness parameters can be implemented as follows: Constructing the sequence to be corrected: Integrate the initially predicted global thickness range (GBIR_raw) with local smoothness parameters (SFQRMax_raw, SFQR 99%_raw, SFQR 98%_raw, SFQR 95%_raw) at different statistical coverage gradients into a vector to be corrected. Sort this vector in descending order using the monotonic chain sorting method, ensuring that adjacent elements differ by at least one minimum value δ (δ is determined based on the parameter difference distribution of historical good product data, taking the 5th percentile of all positive differences after excluding outliers). The sorted sequence is the final predicted value that conforms to the hierarchical inclusion rule, assigned the values ​​GBIR_final, SFQR Max_final, SFQR99%_final, SFQR 98%_final, and SFQR 95%_final.

[0084] This embodiment addresses potential hierarchical conflicts (such as smaller-scale parameters being greater than larger-scale parameters, or higher-coverage parameters being greater than lower-coverage parameters) that may exist in the initial prediction by using hierarchical inclusion rules to specifically correct morphology parameters across sampling scales and different coverage rates. This ensures that the predicted values ​​conform to the inherent physical logic of silicon wafer thickness variation and flatness distribution. The setting of the first preset correction threshold ε and the minimum value δ is both far from the measurement noise range of the detection equipment and close to the physical limits under optimal silicon wafer processing, avoiding ambiguity in physical meaning caused by parameter values ​​being too close. The corrected parameter hierarchy is clear and logically consistent, improving the reliability of wafer morphology parameter prediction and providing reliable morphology data for subsequent particle parameter correction.

[0085] In one embodiment of this disclosure, after the wafer morphology parameters are corrected according to the hierarchical inclusion rule, the edge region total flatness parameter (ESFQR) and edge region one-sided deviation parameter (ESFQD) are further correlated and corrected based on the absolute value and proportion rule. Then, based on the absolute value and proportion rule, a second preset correction threshold is used to perform non-zero constraint correction on the corrected global thickness range (GBIR) and edge region one-sided deviation parameter (ESFQD).

[0086] Specifically, the first preset physical constraint rules also include: the absolute value and proportion rules of the wafer morphology parameters conforming to different physical types.

[0087] The correction based on absolute value and proportional rules includes: based on absolute value and proportional rules, the total flatness parameter of the edge region is correlated and corrected so that the total flatness parameter of the edge region is greater than the absolute value of the single-sided deviation parameter of the edge region but not greater than a preset proportional multiple of the absolute value.

[0088] Non-zero constraint correction includes: based on absolute value and proportional rules, using a second preset correction threshold to perform non-zero constraint correction on the corrected global thickness range and the single-sided deviation parameter of the edge region. The values ​​of the second preset correction threshold and the first preset correction threshold are determined based on different wafer parameter statistical distributions.

[0089] Among them, the absolute value and proportion rule refers to the inherent numerical correlation rule between wafer morphology parameters of different physical types. Specifically, the total flatness parameter of the edge region must be greater than the absolute value of the single-sided deviation parameter of the edge region, and not greater than the preset proportion multiple of the absolute value (determined based on the characteristics of silicon wafer edge processing technology).

[0090] The second preset correction threshold (denoted as ε') is determined based on the specific statistical distribution of parameters such as global thickness range and edge region unilateral deviation, and is used to ensure that key morphological parameters are not zero.

[0091] Non-zero constraint correction is a mandatory correction of parameters based on physical laws, ensuring that core morphology parameters such as global thickness difference and unilateral deviation in edge regions are not zero, which is consistent with the physical nature of silicon wafer processing (there is no absolutely flat or thickness-free silicon wafer).

[0092] In one example, the correlation correction between the total smoothness of the edge region and the one-sided deviation can be implemented as follows: Extract the initial predicted total smoothness parameter (ESFQR_raw) and the one-sided deviation parameter (ESFQD_raw) of the edge region. Perform the first correction based on absolute value and proportional rules: ensure that ESFQR_final > |ESFQD_raw|. If the initial prediction does not meet this condition, adjust ESFQR_final to |ESFQD_raw| + ε1 (ε1 is a small positive number determined based on the device's measurement accuracy). Perform the second proportional correction: ensure that ESFQR_final ≤ 2 × |ESFQD_final|. If not, set ESFQR_final to min(ESFQR_final, 1.8 × |ESFQD_final|), using gentle correction to avoid the parameter ratio exceeding the physically reasonable range.

[0093] In one example, the non-zero constraint correction for the global thickness range and the one-sided deviation of the edge region can be implemented as follows: extract the corrected one-sided deviation parameter of the edge region (ESFQD_final) and the corrected global thickness range (GBIR_final). Based on the absolute value and proportional rules, a second preset correction threshold ε' is used to perform non-zero constraint correction, and the calculation formulas are: ESFQD_final=max(ESFQD_final,ε') and GBIR_final=max(GBIR_final,ε'). This correction ensures that the core topography parameter is not zero, which conforms to the physical reality of silicon wafer processing.

[0094] This embodiment addresses the imbalance between the two types of flatness parameters in the edge region, ensuring that the numerical correlation between the total undulation and unilateral deviation in the edge region conforms to physical laws. It avoids unreasonable situations such as "excessive unilateral deviation with insufficient total undulation" or "total undulation exceeding twice the unilateral deviation." The second preset correction threshold ε' is determined based on the statistical distribution of specific parameters, making it more targeted. The non-zero constraint correction eliminates the physical contradiction of core morphology parameters being zero, guaranteeing the practical production reference value of the predicted values. The corrected edge region parameters and global thickness range parameters satisfy both numerical proportional relationships and physical rationality, further improving the accuracy and practicality of wafer morphology prediction and providing a reliable basis for evaluating the processing quality of silicon wafer edges.

[0095] In one embodiment of this disclosure, the first preset physical constraint rule further includes: a spatial distribution rule for wafer morphology parameters of the same physical type within a local region of the wafer. The modification of the wafer morphology parameters also includes modification based on the spatial distribution rule: Based on spatial distribution rules, the local mean value of the warp parameter within the preset block is determined; Based on the local mean and the preset shrinkage factor, the warpage parameter of each sampling point in the preset block is corrected by mean shrinkage.

[0096] Among them, the spatial distribution rule is the distribution characteristic rule of the same physical type parameter in a local area of ​​the wafer. That is, the warpage parameter in the same local block of the silicon wafer should be consistent to avoid excessive local fluctuations and conform to the uniformity characteristics of silicon wafer material deformation.

[0097] Preset blocks are local areas divided according to silicon wafer processing technology and measurement requirements (such as dividing into multiple annular blocks according to the silicon wafer radius or dividing into rectangular blocks according to the grid). Within the same block, the deformation conditions of the silicon wafer material tend to be consistent.

[0098] The local mean (denoted as μ_warp) is the arithmetic mean of the initial predicted warp values ​​of all sampling points within a preset block, reflecting the overall level of warp within that block. The preset shrinkage factor (denoted as α) is derived from historical data statistics, calculated as α = σ²_block / σ²_total, where σ²_block is the median variance of the warp values ​​within each preset block in the historical data, and σ²_total is the variance of the overall silicon wafer warp in the historical data. It controls the degree to which the sampling point parameters shrink towards the local mean. Mean shrinkage correction is a correction method that shrinks the warp parameters of each sampling point within the preset block towards the local mean, reducing fluctuations in parameters within the block and conforming to the physical law of uniform material deformation within a local region.

[0099] In one example, the warp parameter correction based on spatial distribution rules is specifically implemented as follows: Based on the silicon wafer processing technology and measurement requirements, the silicon wafer is divided into multiple preset blocks (such as 3-5 annular blocks or grid blocks). The initial predicted warp parameter (Warp_raw_i, where i is the sampling point number within the block) of all sampling points within each preset block is extracted, and the local mean μ_warp of the block is calculated using the formula: μ_warp=(ΣWarp_raw_i) / n (where n is the number of sampling points within the block).

[0100] Retrieve warpage statistics from historical production data, calculate the median variance of warpage values ​​within each preset block σ²_block and the overall warpage variance of the silicon wafer σ²_total, and determine the preset shrinkage factor α according to the formula α=σ²_block / σ²_total.

[0101] For each sampling point within a preset block, a mean shrinkage correction is performed on the warp parameter. The calculation formula is: Warp_final_i = α × Warp_raw_i + (1-α) × μ_warp. This formula shrinks the parameters of each sampling point towards the local mean, reduces the within-group variance, and ensures that the warp parameter is evenly distributed within the same block, conforming to the spatial consistency law of silicon wafer material deformation.

[0102] This embodiment, based on spatial distribution rules, effectively solves the problem of excessive fluctuations in warpage parameters within the same local block in the initial prediction, ensuring that the corrected parameters conform to the uniform physical characteristics of silicon wafer deformation. The preset shrinkage factor α is derived from historical data statistics, balancing individual differences and overall consistency within the block, avoiding information loss due to over-correction or residual fluctuations due to under-correction. The corrected warpage parameters are uniformly distributed in local areas and exhibit a reasonable overall trend. This not only improves the prediction accuracy of individual parameters but also provides more valuable data for silicon wafer deformation trend analysis and process adjustment, further enhancing the physical compliance and practicality of wafer morphology parameters.

[0103] In the process of correcting wafer morphology parameters, the hierarchical relationship of the morphology parameters is corrected first. The hierarchical relationship of morphology parameters (e.g., NT10×10 > NT2×2, GBIR > SFQRMax) originates from the physical differences in measurement scale and coverage. Large-scale parameters necessarily contain the variation characteristics of small-scale parameters, and global parameters need to cover the extreme values ​​of local parameters. This is the core framework constituting the physical meaning of the parameters and must be established first. Otherwise, all subsequent corrections will be based on incorrect physical logic, leading to the failure of the overall prediction. Then, based on the correct hierarchical relationship, the absolute value, proportional relationship, and non-zero constraint are corrected. This is because after the hierarchical framework is established, the numerical relationship between parameters must conform to the physical definition (e.g., the ratio of ESFQR to ESFQD is determined by the physical nature of edge undulations, and core parameters such as GBIR and ESFQD are necessarily non-zero because silicon wafer processing cannot be absolutely flat). Numerical constraints are used to fill the details of compliance under the hierarchical framework, avoiding the contradiction of "correct hierarchy but numerical values ​​that violate physical common sense". Finally, after a single parameter has met the hierarchical and numerical constraints, a local consistency correction is performed on the Warp value within the same block. This is based on the principle of uniformity of silicon wafer material deformation—the processing environment (temperature, pressure) within the same local block tends to be consistent, and the material deformation should be continuous to avoid physical contradictions caused by excessive fluctuations in local parameters. At the same time, this step does not change the hierarchical relationship and core values ​​of the parameters, but only optimizes the local distribution characteristics, which is the final refinement and improvement of physical compliance.

[0104] See Figure 4 , Figure 4 This diagram illustrates the fitting of predicted and actual measured values ​​of a curvature parameter obtained using physical constraint rules, as provided in an embodiment of this disclosure. The horizontal axis represents the actual measured value of the Bow parameter, and the vertical axis represents the target predicted value output by the model. Experimental results show that after mean shrinkage correction by the physical constraint layer (especially the spatial consistency rule), the goodness of fit (R0) between the predicted and actual values ​​is significantly improved. 2 The accuracy reached 0.95. This indicates that by introducing geometric continuity constraints on silicon wafer material deformation, non-physical outliers generated by purely data-driven models can be effectively eliminated, making the prediction results highly consistent with the physical nature of the wafer's macroscopic surface.

[0105] See Figure 5 , Figure 5This figure presents a comparison of the prediction performance of a curvature parameter distributed across production batches, as provided in this embodiment. The figure illustrates the fluctuation characteristics of wafer measurement values ​​and predicted values ​​for multiple consecutive production batches (Lots). The bar charts represent the distribution ranges of the measurement and predicted values, respectively. As can be seen from the figure, in each batch with varying process conditions, the center of gravity and dispersion of the predicted values ​​maintain a very high degree of consistency with the actual measurement values. This further verifies the robustness of this embodiment in industrial-scale production monitoring, effectively addressing sensor drift and environmental noise interference on the production line, ensuring that the prediction results remain within a physically reasonable range.

[0106] In one embodiment of this disclosure, the initial predicted wafer grain parameters include grain distribution parameters for different size ranges; the second preset physical constraint rule includes a monotonic distribution rule where wafer grain parameters of the same physical type monotonically decrease with increasing size. Correction of the initial predicted wafer grain parameters includes: Based on the physical state of the wafer surface determined by the target predicted wafer morphology parameters, a background noise benchmark is established for identifying wafer particle parameters; Under background noise benchmark, based on monotonic distribution rules, the initial predicted particle numerical sequence corresponding to each size range is extracted; The initial predicted particle numerical sequence is corrected for monotonically decreasing characteristics to obtain the target particle distribution parameters that conform to the monotonically decreasing characteristics.

[0107] The particle distribution parameters for different size ranges refer to the particle counts corresponding to continuous intervals (such as 0.1μm, 0.2μm, 0.3μm, etc.) divided according to defect size. They characterize the distribution density of particles of different sizes on the silicon wafer surface and belong to the same physical type of wafer particle parameters. The monotonic distribution rule is an inherent physical law of particle defects on the silicon wafer surface, that is, the number of defects decreases monotonically as the set defect size threshold increases, and the count of small-sized particles is not less than the count of large-sized particles.

[0108] The physical state of the wafer surface refers to the surface characteristics of the silicon wafer characterized by the morphology parameters of the target predicted wafer, including surface flatness, local thickness non-uniformity, and edge undulation, which directly affect the background noise level of particle detection. The background noise benchmark is a particle signal interference threshold determined based on the physical state of the wafer surface. The flatter the surface, the lower the background noise benchmark, used to eliminate false particle signals caused by morphological undulations. The initial predicted particle value sequence is a sequence composed of the initial predicted particle counts sorted from smallest to largest for each size range, and needs to be monotonically reduced to conform to physical laws.

[0109] In one example, based on the monotonic distribution rule, the particle distribution parameters are corrected by combining the predicted wafer morphology parameters. Specifically, this is achieved by extracting parameters such as local thickness non-uniformity (NT) and surface smoothness (SFQR) from the predicted wafer morphology parameters to quantify the interference of silicon wafer surface undulations on particle detection. For example, the smaller the surface smoothness error, the lower the background noise baseline is set (e.g., 0.01~0.05 particles / μm²), ensuring that only the true particle signal is retained.

[0110] Under background noise benchmark, initial predicted particle values ​​for each size range are selected, and spurious signals below the benchmark are removed. Initial predicted particle value sequences are constructed in ascending order of size (e.g., [LPD_0.1μm_raw, LPD_0.2μm_raw, LPD_0.3μm_raw]).

[0111] Based on the monotonic distribution rule, the order-preserving regression algorithm (PAVA) is used to correct the initial predicted particle numerical sequence. For adjacent intervals that violate the decreasing rule (e.g., LPD_0.2μm_raw < LPD_0.3μm_raw), they are merged into the mean of the two or the values ​​are adjusted according to the order-preserving logic to generate target particle distribution parameters that conform to the monotonic decreasing characteristic (e.g., [LPD_0.1μm_final, LPD_0.2μm_final, LPD_0.3μm_final]), ensuring that the values ​​decrease sequentially as the size increases.

[0112] This embodiment effectively eliminates spurious particle signals caused by surface undulations in the silicon wafer by establishing a background noise baseline in conjunction with the predicted wafer morphology parameters, thus avoiding distortion of the distribution pattern caused by noise interference. The order-preserving regression correction based on monotonic distribution rules completely solves the non-monotonic particle distribution problem that easily occurs in purely data-driven models, ensuring that particle counts in different size ranges conform to the physical law of "more small sizes, fewer large sizes." The corrected target particle distribution parameters can accurately reflect the actual distribution state of particles on the silicon wafer surface, improving the physical compliance and reliability of particle parameter prediction, and providing a precise size distribution basis for silicon wafer surface defect assessment.

[0113] In one embodiment of this disclosure, the initial predicted wafer particle parameters further include individual particle parameters and total scattering parameters; the second preset physical constraint rule further includes: wafer particle parameters of different physical types conform to the rule that the sum of the components equals the total amount. Correcting the initial predicted wafer particle parameters further includes: Based on the addition composition rule, the sum of the original predicted values ​​of each component particle parameter is calculated; Using the sum of the original predicted values ​​and the corrected total scattering parameter, the individual particle parameters are corrected by normalizing the proportional allocation so that the sum of the corrected individual particle parameters equals the corrected total scattering parameter.

[0114] Among them, the sub-particle parameters are various subdivided particle defect parameters that constitute the total scattering signal on the silicon wafer surface, including light spot defect parameters (LPD), non-removable light spot defect parameters (LPD_N), cluster defect counts, etc., and are components of the total scattering parameters. The total scattering parameter (LLS) is the sum of light scattering from all point-like and clustered defects on the silicon wafer surface, excluding linear defects such as scratches, and is a total representation of the sub-particle parameters. The summation rule is the inherent quantitative relationship of wafer particle parameters of different physical types, that is, the sum of the corrected values ​​of each sub-particle parameter is strictly equal to the corrected total scattering parameter, which conforms to the physical logic of "the sum of components equals the total". The normalized proportional allocation is based on the proportion of the original predicted values ​​of each sub-particle parameter, and the corrected total scattering parameter is allocated to each sub-parameter proportionally to ensure that the component relationship is valid while retaining the relative proportional characteristics of the original prediction.

[0115] In one example, the numerical correlation between the component particle parameters and the total scattering parameter is corrected based on the summation rule. Specifically, this is achieved by extracting the initial predicted component particle parameters (LPD_raw, LPD_N_raw, cluster_raw) and calculating their sum Sum_A = LPD_raw + LPD_N_raw + cluster_raw, which serves as the basis for calculating the original component proportions. The corrected total scattering parameter (LLS_final) is used as a fixed total, which has been corrected for physical compliance through monotonic distribution.

[0116] If Sum_A≠0, LLS_final is allocated according to the proportion of the original predicted values ​​of each sub-item, and the calculation formula is as follows: LPD_final=LLS_final×(LPD_raw / Sum_A) LPD_N_final=LLS_final×(LPD_N_raw / Sum_A) cluster_final=LLS_final×(cluster_raw / Sum_A) If Sum_A=0 (a special scenario), then LLS_final will be evenly distributed among the sub-items (e.g., LPD_final=LPD_N_final=cluster_final=LLS_final / 3) to avoid logical contradictions caused by a denominator of zero.

[0117] This embodiment, based on the normalized proportional allocation according to the additive composition rule, resolves the contradiction between the component relationships of individual particle parameters and the total scattering parameters, ensuring that their numerical correlation conforms to physical logic. During the correction process, the original predicted relative proportions of each component parameter are preserved, avoiding information loss due to over-correction. Simultaneously, the physical compliance of the total scattering parameters is guaranteed by maintaining a fixed total amount. The corrected individual particle parameters and the total scattering parameters are logically self-consistent, satisfying the inherent rule that "the sum of components equals the total amount," while also improving the accuracy of parameter prediction, providing reliable data support for the detailed tracing of defects on silicon wafer surfaces.

[0118] In one embodiment of this disclosure, the initial predicted wafer grain parameters further include cluster parameters, scratch parameters, and non-cluster independent defect parameters; the second preset physical constraint rules further include: condition triggering rules and hierarchical dependency rules determined based on measurement environment noise and morphological characteristics. Correction of the initial predicted wafer grain parameters further includes: Determine the background noise threshold using the morphology parameters of the target predicted wafer; If the initial predicted cluster count or scratch length is less than the background noise threshold, the corresponding cluster area or scratch count will be corrected to zero based on the condition triggering rule. Based on hierarchical dependency rules, the system determines whether a clustering effect exists and performs logical consistency correction between non-clustered independent defect parameters and the corrected total defect count.

[0119] Among them, cluster parameters are related to cluster defects on the silicon wafer surface, including cluster count (CLCT) and cluster area (CARA), which characterize the quantity and space occupation characteristics of cluster defects. Scratch parameters are related to linear defects on the silicon wafer surface, including total scratch length (LNTF) and scratch count, which characterize the severity of linear defects. Non-clustered independent defect parameters (SAUC) are the sum of the number of all independent defects not classified as clusters, and have a hierarchical dependency on the total defect count (SADC).

[0120] The conditional triggering rules include: triggering conditions set based on environmental noise and morphological characteristics. When the cluster count or scratch length is lower than the background noise threshold, it is determined that there is no corresponding defect, and the relevant parameters are corrected to zero. The hierarchical dependency rules include: logical association rules between non-clustered independent defect parameters and the total defect count. That is, the non-clustered independent defect parameters must be consistent with the corrected total defect count, and when there is no clustering effect, the non-clustered independent defect parameters are equal to the total defect count.

[0121] The background noise threshold (denoted as τ) is a noise judgment standard determined based on the target predicted wafer morphology parameters. It is usually set to 1e-3 (adapted to the accuracy of defect counting equipment) to distinguish between real defects and noise interference.

[0122] In one example, relevant particle parameters are corrected based on conditional triggering rules and hierarchical dependency rules. Specifically, the background noise threshold τ=1e-3 is determined by using parameters such as edge smoothness (ESFQR) and warp in the target predicted wafer morphology parameters, combined with the accuracy of the defect counting device, to determine the validity of the cluster parameters and scratch parameters.

[0123] Extract the initial predicted cluster count (CLCT_raw) and total scratch length (LNTF_raw): If CLCT_raw < τ, it is determined that there is no cluster defect, and the cluster area (CARA_final) is corrected to zero; If LNTF_raw < τ, it is determined that there is no scratch defect, and the scratch count is corrected to zero.

[0124] Extract the corrected total defect count (SADC_final) and the initial predicted non-clustered independent defect parameters (SAUC_raw): If the cluster count CLCT_final=0 and the total scratch length LNTF_final=0 (no clustering effect), then force SAUC_final=SADC_final to ensure logical consistency; If a clustering effect exists (CLCT_final≥τ), then ensure that SAUC_final≥SADC_final (SAUC is the total defect area, SADC is the number of defects, and the unit is μm²). If this condition is not met, then adjust SAUC_final to max(SAUC_raw,SADC_final).

[0125] This embodiment utilizes conditional triggering rules to accurately distinguish between real defects and noise interference based on background noise thresholds determined by morphology parameters. This avoids misclassifying noise as clusters or scratches, improving the accuracy of defect identification. The application of hierarchical dependency rules resolves the logical contradiction between non-clustered independent defect parameters and the total defect count, ensuring that their correlation conforms to physical laws. The corrected cluster parameters, scratch parameters, and non-clustered independent defect parameters all possess clear physical meanings and strong logical consistency, accurately reflecting the actual state of different types of defects on the silicon wafer surface. This provides a reliable basis for defect classification and control, and process optimization.

[0126] See Figure 6 , Figure 6This diagram illustrates the fitting of a predicted value and a true measured value of the total light scattering parameter (LSS) according to an embodiment of this disclosure. As a core parameter characterizing the total number of particle defects on a wafer surface, the prediction accuracy of LLS is greatly affected by morphological background noise. In this experiment, the system first establishes a background noise benchmark based on the physical state (such as smoothness fluctuations) determined by the morphological parameters of the target predicted wafer, and then applies conditional triggering rules and monotonicity corrections to the initial particle prediction values ​​accordingly. The results show that the goodness of fit (R0) between the LLS particle prediction values ​​and the true values ​​is high. 2 The value is as high as 0.9979, and the data points are almost completely distributed on the ideal 45-degree fitting line.

[0127] In one embodiment of this disclosure, the correction of wafer particle parameters is first based on a monotonic distribution rule. The monotonic distribution characteristics of particle parameters (such as LPD and LLS decreasing with increasing size) stem from the physical nature of particle formation and detection. Smaller particles have a higher probability of formation, are more likely to remain on the silicon wafer surface, and are more sensitive to detection. This rule must be established first; otherwise, subsequent numerical correlation and logical correction will be based on distribution data that violates physical common sense, causing the overall prediction result to deviate from the actual defect state.

[0128] Then, based on the established monotonic distribution law, corrections are made according to the summation rules. The summation rules (such as the sum of individual particle parameters equaling the total scattering parameter) represent the inherent quantitative relationships between particle parameters, and their correction relies on compliant distribution data output from the monotonic distribution rules. Only by first ensuring that the distribution of particles in each size range and type conforms to physical laws, and then correcting the relationship between individual parameters and the total quantity through normalized proportional allocation, can we avoid the problem of "reasonable distribution but contradictory numerical values," fill the numerical compliance gaps within the basic framework, and ensure the quantitative logical consistency between parameters.

[0129] Finally, after ensuring that the particle parameters meet the distribution rules and numerical constraints, corrections are made based on conditional triggering rules and hierarchical dependency rules. This is based on the judgment logic and physical correlation principle of particle defects. Defect detection on the same silicon wafer is affected by morphological background noise, and there is a clear logical hierarchy between clustered defects, non-clustered defects, and scratch defects. The first two steps have ensured that the distribution and values ​​of particle parameters are compliant. At this point, by judging the real defects through the background noise threshold and verifying the hierarchical correlation of defect types, false signals can be accurately eliminated and logical contradictions can be corrected without changing the core distribution and values. Only the logical consistency of the parameters is optimized, which is the final refinement and improvement of the physical compliance of particle parameters.

[0130] and Figure 1 Corresponding to the method embodiments shown, this disclosure also provides embodiments of a wafer parameter prediction device. Figure 7 This is a schematic diagram of the composition of a wafer parameter prediction device provided in this disclosure. Figure 7 As shown, the wafer parameter prediction device 200 includes: Data acquisition module 202: configured to acquire the previous process data of the wafer under test based on the previous processing process, and the current process data of the wafer under test in the current processing process.

[0131] Feature extraction module 204 is configured to input the previous process data and the current process data into a multimodal feature extraction network, and determine the initial predicted wafer parameters of the wafer to be inspected based on the multimodal fusion features extracted by the multimodal feature extraction network.

[0132] Physical constraint module 206: configured to correct the initial predicted wafer parameters using preset physical constraint rules to obtain the target predicted wafer parameters of the wafer to be detected, wherein the preset physical constraint rules are used to indicate the physical laws that the wafer parameters conform to.

[0133] In one embodiment, the feature extraction module 204 is further configured to: input the previous process data into the static feature extraction network 2042 to obtain static features extracted by the static feature extraction network 2042; input the current process data into the dynamic feature extraction network 2044 to obtain dynamic temporal features extracted by the dynamic feature extraction network 2044; fuse the static features and the dynamic temporal features to generate multimodal fusion features; and determine the initial predicted wafer parameters of the wafer to be inspected based on the multimodal fusion features.

[0134] In one embodiment, the initial predicted wafer parameters include initial predicted wafer morphology parameters and initial predicted wafer particle parameters, and the target predicted wafer parameters include target predicted wafer morphology parameters and target predicted wafer particle parameters; the physical constraint module 206 includes a morphology constraint layer 2062 and a particle constraint layer 2064, and is further configured as follows: The morphology constraint layer 2062 corrects the initial predicted wafer morphology parameters based on the first preset physical constraint rules corresponding to the wafer morphology parameters, and generates the target predicted wafer morphology parameters. The particle constraint layer 2064 corrects the initial predicted wafer particle parameters based on the second preset physical constraint rules corresponding to the target predicted wafer morphology parameters and wafer particle parameters, and generates the target predicted wafer particle parameters.

[0135] In one embodiment, the initial predicted wafer morphology parameters include local thickness non-uniformity parameters, global thickness range, and local flatness parameters; the first preset physical constraint rules include: hierarchical inclusion rules that wafer morphology parameters of the same physical type conform to; the physical constraint module 206 is further configured to: Based on the hierarchical inclusion rule, a first preset correction threshold is used to perform hierarchical coverage correction on the local thickness non-uniformity parameter across sampling scales; Based on the hierarchical inclusion rule, the monotonic chain sorting method is used to sort the sequence to be corrected in descending order. The sequence to be corrected consists of the global thickness range and local flatness parameters with different statistical coverage gradients.

[0136] In one embodiment, the initial predicted wafer morphology parameters further include an edge region total flatness parameter reflecting the overall undulation of the wafer edge region and an edge region unilateral deviation parameter reflecting the unilateral deviation of the wafer edge region; the first preset physical constraint rules further include: absolute value and proportion rules that wafer morphology parameters of different physical types conform to; the physical constraint module 206 is further configured to: Based on the absolute value and proportional rules, the total flatness parameter of the edge region is correlated and corrected so that the total flatness parameter of the edge region is greater than the absolute value of the single-sided deviation parameter of the edge region but not greater than a preset proportional multiple of the absolute value. Based on the absolute value and proportional rules, a second preset correction threshold is used to perform non-zero constraint correction on the corrected global thickness range and the unilateral deviation parameter of the edge region. The values ​​of the second preset correction threshold and the first preset correction threshold are determined based on different wafer parameter statistical distributions.

[0137] In one embodiment, the initial predicted wafer morphology parameters further include warpage parameters; the first preset physical constraint rule further includes: a spatial distribution rule that wafer morphology parameters of the same physical type within a local region of the wafer conform to; the physical constraint module 206 is further configured to: Based on spatial distribution rules, the local mean value of the warp parameter within the preset block is determined; Based on the local mean and the preset shrinkage factor, the warpage parameter of each sampling point in the preset block is corrected by mean shrinkage.

[0138] In one embodiment, the initial predicted wafer grain parameters include grain distribution parameters for different size ranges; the second preset physical constraint rule includes a monotonically decreasing distribution rule for wafer grain parameters of the same physical type as the size increases; the physical constraint module 206 is further configured to: Based on the physical state of the wafer surface determined by the target predicted wafer morphology parameters, a background noise benchmark is established for identifying wafer particle parameters; Under background noise benchmark, based on monotonic distribution rules, the initial predicted particle numerical sequence corresponding to each size range is extracted; The initial predicted particle numerical sequence is corrected for monotonically decreasing characteristics to obtain the target particle distribution parameters that conform to the monotonically decreasing characteristics.

[0139] In one embodiment, the initial predicted wafer particle parameters further include individual particle parameters and total scattering parameters; the second preset physical constraint rule further includes: wafer particle parameters of different physical types conform to the rule that the sum of the components equals the total amount; the physical constraint module 206 is further configured to: Based on the addition composition rule, the sum of the original predicted values ​​of each component particle parameter is calculated; Using the sum of the original predicted values ​​and the corrected total scattering parameter, the individual particle parameters are corrected by normalizing the proportional allocation so that the sum of the corrected individual particle parameters equals the corrected total scattering parameter.

[0140] In one embodiment, the initial predicted wafer grain parameters further include cluster parameters, scratch parameters, and non-cluster independent defect parameters; the second preset physical constraint rules further include: condition triggering rules and hierarchical dependency rules determined based on measurement environment noise and morphological features; the physical constraint module 206 is further configured as follows: Determine the background noise threshold using the morphology parameters of the target predicted wafer; If the initial predicted cluster count or scratch length is less than the background noise threshold, the corresponding cluster area or scratch count will be corrected to zero based on the condition triggering rule. Based on hierarchical dependency rules, the system determines whether a clustering effect exists and performs logical consistency correction between non-clustered independent defect parameters and the corrected total defect count.

[0141] The above is a schematic scheme of a wafer parameter prediction device provided in this disclosure. The technical solution of this wafer parameter prediction device and the technical solution of the wafer parameter prediction method described above belong to the same concept. For details not described in detail in the technical solution of the wafer parameter prediction device, please refer to the description of the technical solution of the wafer parameter prediction method described above.

[0142] Please refer to Figure 8 , Figure 8 This is a structural block diagram of a computing device provided in this disclosure. In some examples, the computing device 80 can be at least one of a smartphone, smartwatch, desktop computer, laptop, virtual reality terminal, augmented reality terminal, wireless terminal, and laptop computer. The computing device 80 has communication functions and can access a wired or wireless network. The computing device 80 can refer to one of multiple terminals, and those skilled in the art will understand that the number of such terminals can be more or less. In some examples, the computing device 80 can receive data based on the accessed wired or wireless network. It is understood that the computing device 80 undertakes the calculation and processing work of the technical solution of this disclosure, and this disclosure does not limit it in this respect.

[0143] like Figure 8As shown, the computing device in this disclosure may include one or more of the following components: processor 810 and memory 820.

[0144] Optionally, the processor 810 connects various parts within the computing device using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 820, and by calling data stored in the memory 820. Optionally, the processor 810 can be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 810 can integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), Neural-network Processing Unit (NPU), and baseband chip. Among them, the CPU mainly handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required to be displayed on the touch screen; the NPU is used to implement artificial intelligence (AI) functions; and the baseband chip is used to handle wireless communication. It is understandable that the aforementioned baseband chip may not be integrated into the processor 810, but may be implemented using a separate chip.

[0145] The memory 820 may include random access memory (RAM) or read-only memory (ROM). Optionally, the memory 820 may include a non-transitory computer-readable storage medium. The memory 820 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 820 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function (such as touch function, sound playback function, image playback function, etc.), instructions for implementing the various method embodiments described above, etc.; the data storage area may store data created according to the use of the computing device, etc.

[0146] In addition, those skilled in the art will understand that the structure of the computing device shown in the above figures does not constitute a limitation on the computing device. The computing device may include more or fewer components than shown, or combine certain components, or have different component arrangements. For example, the computing device may also include a display screen, camera assembly, microphone, speaker, radio frequency circuit, input unit, sensors (such as accelerometer, angular velocity sensor, light sensor, etc.), audio circuit, Wi-Fi module, power supply, Bluetooth module, etc., which will not be described in detail here.

[0147] This disclosure also provides a computer-readable storage medium storing at least one instruction that is executed by a processor to implement the wafer parameter prediction method as described in the various embodiments above.

[0148] This disclosure also provides a computer program product including computer instructions stored in a computer-readable storage medium; a processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform the wafer parameter prediction method described in the above embodiments.

[0149] Those skilled in the art will recognize that the functions described in this disclosure in one or more of the examples above can be implemented using hardware, software, firmware, or any combination thereof. When implemented in software, these functions can be stored in a computer-readable medium or transmitted as one or more instructions or code on a computer-readable medium. Computer-readable media include computer storage media and communication media, wherein communication media include any medium that facilitates the transfer of a computer program from one place to another. Storage media can be any available medium accessible to a general-purpose or special-purpose computer.

[0150] It should be noted that the technical solutions described in this disclosure can be combined arbitrarily as long as they do not conflict.

[0151] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A method for predicting wafer parameters, characterized in that, include: Acquire the previous process data of the wafer under test based on the previous processing process, and the current process data of the wafer under test in the current processing process; The preceding process data and the current process data are input into a multimodal feature extraction network. Based on the multimodal fusion features extracted by the multimodal feature extraction network, the initial predicted wafer parameters of the wafer to be inspected are determined. The initial predicted wafer parameters are corrected using preset physical constraint rules to obtain the target predicted wafer parameters of the wafer to be tested. The preset physical constraint rules are used to indicate the physical laws that the wafer parameters conform to.

2. The wafer parameter prediction method according to claim 1, characterized in that, The step of inputting the previous process data and the current process data into a multimodal feature extraction network, and determining the initial predicted wafer parameters of the wafer to be inspected based on the multimodal fusion features extracted by the multimodal feature extraction network, includes: The preceding process data is input into a static feature extraction network to obtain static features extracted by the static feature extraction network; The current process data is input into the dynamic feature extraction network to obtain dynamic time-series features extracted by the dynamic feature extraction network; By fusing the static features and the dynamic temporal features, a multimodal fusion feature is generated; Based on the multimodal fusion features, the initial predicted wafer parameters of the wafer to be detected are determined.

3. The wafer parameter prediction method according to claim 1, characterized in that, The initial predicted wafer parameters include initial predicted wafer morphology parameters and initial predicted wafer particle parameters, and the target predicted wafer parameters include target predicted wafer morphology parameters and target predicted wafer particle parameters; The step of correcting the initial predicted wafer parameters using preset physical constraint rules to obtain the target predicted wafer parameters of the wafer to be inspected includes: Based on the first preset physical constraint rule corresponding to the wafer morphology parameters, the initial predicted wafer morphology parameters are corrected to generate the target predicted wafer morphology parameters. Based on the second preset physical constraint rules corresponding to the target predicted wafer morphology parameters and wafer grain parameters, the initial predicted wafer grain parameters are corrected to generate the target predicted wafer grain parameters.

4. The wafer parameter prediction method according to claim 3, characterized in that, The initial predicted wafer morphology parameters include local thickness non-uniformity parameters, global thickness range, and local flatness parameters; the first preset physical constraint rules include: hierarchical inclusion rules that the wafer morphology parameters of the same physical type conform to. The method of correcting the initially predicted wafer morphology parameters based on the first preset physical constraint rule corresponding to the wafer morphology parameters includes: Based on the hierarchical inclusion rule, a first preset correction threshold is used to perform hierarchical coverage correction on the local thickness non-uniformity parameter across sampling scales; Based on the hierarchical inclusion rule, the monotonic chain sorting method is used to sort the sequence to be corrected in descending order. The sequence to be corrected is composed of the global thickness range and the local flatness parameters with different statistical coverage gradients.

5. The wafer parameter prediction method according to claim 4, characterized in that, The initial predicted wafer morphology parameters also include the total flatness parameter of the edge region, which reflects the overall undulation of the wafer edge region, and the unilateral deviation parameter of the edge region, which reflects the unilateral deviation of the wafer edge region. The first preset physical constraint rule also includes: the absolute value and proportion rules that the wafer morphology parameters of different physical types conform to; The method further includes: Based on the absolute value and proportion rules, the total flatness parameter of the edge region is correlated and corrected so that the total flatness parameter of the edge region is greater than the absolute value of the single-sided deviation parameter of the edge region and not greater than a preset proportion multiple of the absolute value. Based on the absolute value and proportional rules, a second preset correction threshold is used to perform non-zero constraint correction on the corrected global thickness range and the edge region one-sided deviation parameter. The values ​​of the second preset correction threshold and the first preset correction threshold are determined based on different wafer parameter statistical distributions.

6. The wafer parameter prediction method according to claim 4, characterized in that, The initial predicted wafer morphology parameters also include warpage parameters; the first preset physical constraint rules also include: the spatial distribution rules that the wafer morphology parameters of the same physical type conform to within a local area of ​​the wafer. The method further includes: Based on the spatial distribution rules, the local mean value of the warp parameter within the preset block is determined; Based on the local mean and the preset shrinkage factor, the warpage parameter of each sampling point in the preset block is corrected by mean shrinkage.

7. The wafer parameter prediction method according to claim 3, characterized in that, The initial predicted wafer particle parameters include particle distribution parameters in different size ranges; the second preset physical constraint rule includes a monotonic distribution rule in which wafer particle parameters of the same physical type decrease monotonically with increasing size; The step of correcting the initial predicted wafer grain parameters based on the second preset physical constraint rule corresponding to the target predicted wafer morphology parameters and wafer grain parameters includes: Based on the physical state of the wafer surface determined by the target predicted wafer morphology parameters, a background noise benchmark for identifying the wafer particle parameters is established. Under the background noise benchmark, based on the monotonic distribution rule, the initial predicted particle value sequence corresponding to each size interval is extracted; The initial predicted particle numerical sequence is corrected for monotonically decreasing characteristics to obtain target particle distribution parameters that conform to monotonically decreasing characteristics.

8. The wafer parameter prediction method according to claim 7, characterized in that, The initial predicted wafer particle parameters also include individual particle parameters and total scattering parameters; the second preset physical constraint rule also includes: wafer particle parameters of different physical types conform to the rule that the sum of the components equals the sum of the total; The method further includes: Based on the summation rules, the sum of the original predicted values ​​of each component particle parameter is calculated; Using the sum of the original predicted values ​​and the corrected total scattering parameter, the individual particle parameters are corrected by normalizing the proportional allocation so that the sum of the corrected individual particle parameters equals the corrected total scattering parameter.

9. The wafer parameter prediction method according to claim 7, characterized in that, The initial predicted wafer grain parameters also include cluster parameters, scratch parameters, and non-cluster independent defect parameters. The second preset physical constraint rule also includes: condition triggering rules and hierarchical dependency rules determined based on the measured environmental noise and morphological features; The method further includes: The background noise threshold is determined using the target predicted wafer morphology parameters; If the initially predicted cluster count or scratch length is less than the background noise threshold, then based on the condition triggering rule, the corresponding cluster area or scratch count is corrected to zero. Based on the hierarchical dependency rules, the non-cluster independent defect parameters and the corrected total defect count are logically consistent by determining whether a clustering effect exists.

10. A wafer parameter prediction device, characterized in that, include: The data acquisition module is configured to acquire the previous process data of the wafer under test based on the previous processing process, and the current process data of the wafer under test in the current processing process; The feature extraction module is configured to input the previous process data and the current process data into a multimodal feature extraction network, and determine the initial predicted wafer parameters of the wafer to be inspected based on the multimodal fusion features extracted by the multimodal feature extraction network. The physical constraint module is configured to correct the initial predicted wafer parameters using preset physical constraint rules to obtain the target predicted wafer parameters of the wafer to be detected, wherein the preset physical constraint rules are used to indicate the physical laws that the wafer parameters conform to.

11. A computing device, characterized in that, include: Memory, used to store executable instructions; A processor, when executing executable instructions stored in the memory, implements the wafer parameter prediction method as described in any one of claims 1-9.

12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions that, when executed by a processor, implement the wafer parameter prediction method as described in any one of claims 1-9.

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