Etching method and system for circuit board

Abstract

The embodiment of the application provides a kind of etching method and etching system of circuit board, the etching method includes: S100, the original image data of the circuit board to be etched is acquired, and the characteristic parameter of the circuit edge in original image data is extracted;S200, the characteristic parameter is input into the edge prediction model pre-trained, wherein the edge prediction model is learned to the etching sample by convolutional neural network, to predict the position and morphology of sawtooth edge in etching process;S300, according to the prediction result output by edge prediction model;S400, according to the prediction result, etching parameter is adjusted in real time by dynamic compensation;S500, secondary image acquisition is carried out to the circuit board after etching, and the circuit edge in secondary image is detected by edge detection algorithm, if it does not reach preset threshold, then repeat S200 step~S400 step, until reaching preset threshold.The etching method provided in the embodiment can improve the overall performance and yield of circuit board.

Description

Technical Field

[0001] This specification relates to the field of circuit board technology, specifically to an etching method and system for circuit boards. Background Technology

[0002] In the production of printed circuit boards (PCBs), etching is a core step in forming conductive lines, and its quality directly affects the electrical performance and reliability of the PCB. During etching, uneven distribution of the etching solution, fluctuations in reaction conditions, or differences in material properties often lead to lateral etching, resulting in irregular serrated edges on the circuitry. These serrated edges not only compromise the geometric accuracy of the circuitry, causing deviations in line width and spacing, but also induce additional reflections and interference during signal transmission, significantly reducing signal integrity. Simultaneously, the serrated edges reduce the effective cross-sectional area of ​​the conductor, leading to increased conductor resistance and exacerbated heat loss, thus affecting the reliability of the PCB. Existing etching technologies mostly employ fixed parameter control, lacking real-time sensing and dynamic adjustment mechanisms for edge morphology changes during etching. This makes it impossible to accurately predict the location and shape of serrated defects, resulting in unstable product quality and difficulty in meeting the manufacturing requirements of high-precision PCBs. Therefore, there is an urgent need to improve etching methods to reduce the generation of serrated edges and improve the performance and reliability of PCBs. Summary of the Invention

[0003] The purpose of this application is to provide an etching method and etching system for circuit boards, which can accurately predict the position and shape of the serrated edge during the etching process and adjust the etching parameters in real time through dynamic compensation, thereby significantly improving the geometric accuracy of the circuit, reducing signal interference, reducing resistance and heat loss, and improving the overall performance and reliability of the circuit board.

[0004] In a first aspect, embodiments of this application provide an etching method for a circuit board, the etching method comprising: S100. Obtain the original image data of the circuit board to be etched, and extract the feature parameters of the circuit edges in the original image data. S200. Input the feature parameters into the pre-trained edge prediction model, wherein the edge prediction model learns from the etched samples through a convolutional neural network to predict the position and shape of the jagged edges during the etching process. S300, Based on the prediction results output by the edge prediction model; S400: Based on the prediction results, the etching parameters are adjusted in real time through dynamic compensation; S500: Perform secondary image acquisition on the etched circuit board, and use an edge detection algorithm to detect the circuit edges in the secondary image. If the preset threshold is not reached, repeat steps S200 to S400 until the preset threshold is reached.

[0005] In some embodiments of this application, in step S100, the characteristic parameters of the line edge include at least one of roughness, line width, line spacing, edge angle, edge continuity, smoothness, and corner curvature.

[0006] In some embodiments of this application, the training process of the edge prediction model in step S200 includes: Construct a dataset of etching defect samples, and label the feature parameters of the jagged edges for each sample; The model was trained using the ResNet-50 network architecture, and the weight ratio of feature parameters for jagged edges was enhanced through an attention mechanism. The parameters of the edge prediction model are optimized using cross-validation.

[0007] In some embodiments of this application, the characteristic parameters of the serrated edge include at least one of coordinates, width, and depth.

[0008] In some embodiments of this application, step S300, which involves adjusting the etching parameters in real time through dynamic compensation based on the prediction results, further includes: Based on the predicted serrated edge position, adjust at least one of the following parameters for the corresponding area: etching fluid flow rate, etching time, etching fluid concentration, etching temperature, and etching fluid jet pressure.

[0009] In some embodiments of this application, the etching parameters are adjusted in real time through dynamic compensation based on the prediction results, and the method further includes: Adjust the etching fluid spray angle in the corresponding area based on the predicted serrated edge shape.

[0010] In some embodiments of this application, in step S500, the edge detection algorithm includes at least one of the Canny operator and the Hough transform algorithm.

[0011] In some embodiments of this application, the etching method further includes: S600: Collect the actual edge data after each etching and input it into the edge prediction model. Iteratively optimize the edge prediction model through incremental learning.

[0012] Secondly, embodiments of this application also provide an etching system for circuit boards, the etching system comprising: The acquisition module is configured to acquire the original image data of the circuit board to be etched and extract the feature parameters of the circuit edges in the original image data; The prediction module is configured to input feature parameters into a pre-trained edge prediction model, wherein the edge prediction model learns from the etched samples through a convolutional neural network to predict the position and shape of the jagged edges during the etching process. The output module is configured to output the prediction results from the edge prediction model. The dynamic compensation module is configured to adjust the etching parameters in real time based on the prediction results through dynamic compensation. The acquisition and detection module is configured to acquire secondary images of the etched circuit board and detect the circuit edges in the secondary image using an edge detection algorithm. If the preset threshold is not reached, the module returns to the prediction film, output module, and dynamic compensation module to perform the corresponding functions until the preset threshold is reached.

[0013] In some embodiments of this application, the etching system further includes an iterative optimization module, which is configured to collect actual edge data after each etching and input it into the edge prediction model, and iteratively optimize the edge prediction model through incremental learning.

[0014] As described above, this application provides an etching method and system for circuit boards. The etching method includes: S100, acquiring the original image data of the circuit board to be etched, and extracting feature parameters of the line edges in the original image data; S200, inputting the feature parameters into a pre-trained edge prediction model, wherein the edge prediction model learns from the etching samples through a convolutional neural network to predict the position and shape of jagged edges during the etching process; S300, based on the prediction results output by the edge prediction model; S400, adjusting the etching parameters in real time through dynamic compensation based on the prediction results; S500, performing secondary image acquisition on the etched circuit board, and detecting the line edges in the secondary image through an edge detection algorithm. If the preset threshold is not reached, steps S200 to S400 are repeated until the preset threshold is reached. This embodiment provides an etching method for circuit boards that effectively avoids the common side etching problem in traditional etching processes by predicting jagged defects at the line edges before etching and dynamically adjusting the etching parameters in real time based on the prediction results. As a result, the edge precision of the circuit board is significantly improved, the generation of jagged edges is effectively suppressed, thereby reducing signal and conductor losses and improving the overall performance and yield of the circuit board. Attached Figure Description

[0016] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiments below. The accompanying drawings are for illustrative purposes only and are not intended to limit this specification. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings: Figure 1 This is a schematic flowchart illustrating the etching method for a circuit board provided in some embodiments of this specification.

[0017] Figure 2This is a schematic flowchart of an etching method for a circuit board provided for some other embodiments of this specification. Detailed Implementation

[0019] The embodiments of the technical solutions in this specification will now be described in detail with reference to the accompanying drawings. These embodiments are merely illustrative of the technical solutions in this specification and should not be construed as limiting the scope of protection of this specification.

[0020] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this specification belongs; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this specification; the terms “comprising” and “having”, and any variations thereof, in the description of this specification and the foregoing drawings are intended to cover non-exclusive inclusion.

[0021] In the description of the embodiments in this specification, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary or secondary relationship of the indicated technical features. In the description of the embodiments in this specification, "multiple" means two or more, unless otherwise explicitly defined.

[0022] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this specification. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment that is mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0023] In the description of the embodiments in this specification, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0024] In the description of the embodiments in this specification, the term "multiple" refers to two or more (including two).

[0025] For this, please refer to Figure 1 As shown, this application proposes an etching method for a circuit board, the etching method comprising: S100. Obtain the original image data of the circuit board to be etched, and extract the feature parameters of the circuit edges in the original image data. S200. Input the feature parameters into a pre-trained edge prediction model, wherein the edge prediction model learns from the etched samples through a convolutional neural network to predict the position and shape of the jagged edges during the etching process. S300, Based on the prediction results output by the edge prediction model; S400. Based on the prediction results, the etching parameters are adjusted in real time through dynamic compensation. S500: Perform secondary image acquisition on the etched circuit board and use an edge detection algorithm to detect the line edges in the secondary image. If the preset threshold is not reached, repeat steps S200 to S400 until the preset threshold is reached.

[0026] For ease of understanding, the following explains some key terms in this embodiment: Raw image data refers to image information obtained by acquiring unetched circuit boards through optical imaging or scanning equipment, which includes the initial geometry and layout information of the circuit board.

[0027] The characteristic parameters of the circuit edge refer to the quantitative indicators used to describe the geometric characteristics and shape of the circuit board edge. These parameters may include edge roughness, line width, line spacing, edge angle, edge continuity, smoothness, corner curvature, etc. These parameters help to identify potential etching defect areas.

[0028] Edge prediction models are computational models built on machine learning or deep learning techniques. By learning from a large number of etching samples, they can predict the location and shape of jagged edges that may appear during the etching process.

[0029] Convolutional neural networks (CNNs) are deep learning models specifically designed to process data with grid-like topological structures (such as images). Through structures such as convolutional layers and pooling layers, they can automatically extract high-level features from images, thereby enabling the recognition and prediction of complex patterns.

[0030] Dynamic compensation refers to a control strategy that adjusts etching process parameters in real time and adaptively based on real-time monitoring or prediction results during the etching process, aiming to correct or mitigate the occurrence of etching defects.

[0031] Etching parameters refer to process variables that affect the etching process and results, such as the concentration, temperature, flow rate, spray angle, spray pressure, and etching time of the etching solution. Precise control of these parameters is crucial to the etching quality.

[0032] Edge detection algorithms are image processing techniques that determine the location of object boundaries or lines by identifying significant changes in attributes such as brightness, color, or texture in an image. For example, gradient-based or template matching methods can be used.

[0033] A preset threshold is a standard value used in etching quality assessment to determine whether the etching result meets the requirements. For example, it can be set as the maximum allowable value for indicators such as the smoothness of the line edge, line width deviation, or serration depth.

[0034] The circuit board etching method of this embodiment first includes step S100, which involves acquiring the original image data of the circuit board to be etched and extracting the feature parameters of the circuit edges from the original image data. Specifically, the original image data can be obtained by photographing the circuit board with an industrial camera or by scanning the circuit board with a flatbed scanner. After acquiring the original image data, a preliminary assessment of the geometry of the circuit edges can be performed by manual visual inspection combined with measuring tools. Furthermore, the feature parameters of the circuit edges can be obtained using image processing software, for example, by manually drawing the edge contour lines and calculating basic geometric quantities such as their length, average width, or local curvature.

[0035] Subsequently, in step S200, the aforementioned feature parameters are input into a pre-trained edge prediction model. This edge prediction model can be a prediction model built based on statistical analysis, such as establishing a mathematical relationship between input features and etching defects through regression analysis of historical etching data. The model learns from etching samples, for example through a multilayer perceptron network, to identify the correlation between input features and jagged edges during the etching process, thereby predicting the possible location and approximate shape of jagged edges.

[0036] Next, step S300 is executed, based on the prediction results output by the edge prediction model. This prediction result can be a text report containing identifiers of areas where the predicted jagged edges might appear, or a simple graphical representation, such as marking potential defect areas on an image.

[0037] Furthermore, in step S400, etching parameters are adjusted in real time through dynamic compensation based on the aforementioned prediction results. Specifically, operators can manually adjust the process parameters of the etching equipment, such as adjusting the jet pressure or temperature of the etching solution, according to the prediction report or graphical indications. This adjustment is real-time and aims to specifically improve the etching effect.

[0038] Finally, in step S500, a secondary image of the etched circuit board is acquired, and the edges of the circuit lines in this secondary image are detected using an edge detection algorithm. The secondary image acquisition can be performed using the same or similar image acquisition equipment as in step S100. The edge detection algorithm can be a simple algorithm based on grayscale differences, such as identifying edges by calculating the grayscale difference between a pixel and its neighboring pixels. If the detection result does not meet the preset quality threshold, for example, if the smoothness of the circuit edges or the line width deviation exceeds the allowable range, the system will prompt the operator to repeat steps S200 to S400 until the etching quality meets the preset threshold requirements.

[0039] This embodiment provides an etching method for circuit boards. By predicting jagged defects at the circuit edges before etching and dynamically adjusting etching parameters in real time based on the prediction results, the side etching problem commonly encountered in traditional etching processes is effectively avoided. As a result, the edge accuracy of the circuit board is significantly improved, the generation of jagged edges is effectively suppressed, thereby reducing signal and conductor losses and improving the overall performance and yield of the circuit board.

[0040] In some implementations, the original image data of the circuit board to be etched is obtained, and the feature parameters of the circuit edges in the original image data are extracted. However, if the extracted feature parameters are not comprehensive or accurate enough, the subsequent edge prediction model may not be accurate enough in predicting the position and shape of the jagged edges during the etching process, thereby affecting the effect of dynamic compensation and making it difficult to effectively improve the etching quality.

[0041] In this regard, this application further proposes that after obtaining the original image data of the circuit board to be etched, the feature parameters of the line edges in the original image data be extracted, including at least one of roughness, line width, line spacing, edge angle, edge continuity, smoothness, and corner curvature.

[0042] Specifically, linewidth refers to the width of a line, a crucial parameter for measuring line size. During etching, the uniformity of linewidth directly affects the electrical performance of the line. Image processing techniques can measure the average width and local width variations of the line to reflect its overall size and local consistency. Line spacing refers to the distance between adjacent lines. Precise control of line spacing is essential for avoiding short circuits and ensuring signal integrity. It can be obtained by calculating the shortest distance between the edges of adjacent lines, which helps assess the isolation of the line and potential bridging risks. Edge angle refers to the angle between the line edge and a reference direction (such as horizontal or vertical), or the tangent direction of a local edge. Variations in edge angle can reflect edge tilting or irregularities during etching; for example, excessive angular deviation may indicate uneven etching fluid flow or spraying. Edge continuity describes the smoothness and integrity of the line edges. Discontinuous edges may indicate etching defects or breaks. It can be assessed by analyzing the connectivity or gradient changes of edge pixels to identify edge breaks or gaps. Smoothness measures the roughness of the line edges. Poorly smooth edges typically appear jagged or wavy, indicating poor etching quality. This can be quantified by calculating the local variance or curvature change of edge pixels, directly reflecting the severity of jagged defects. Corner curvature refers to the degree of bending at the corner of the circuit. During etching, corners are often areas of stress concentration and uneven etching, making them prone to defects. This can be obtained by fitting a curve at the corner and calculating its radius of curvature to assess the etching accuracy and defect risk at the corner.

[0043] By employing the aforementioned technical solution, after acquiring the original image data of the circuit board to be etched, more specific and comprehensive circuit edge feature parameters, such as line width, line spacing, edge angle, edge continuity, smoothness, and corner curvature, can be extracted. This provides richer and more refined input information for the edge prediction model. These parameters directly reflect the geometric characteristics of the circuit edges and the manifestation of potential etching defects, enabling the edge prediction model to more accurately learn and identify the position and shape of jagged edges during the etching process. For example, changes in line width and line spacing may indicate differences in local etching rates, while edge angle, continuity, smoothness, and corner curvature directly quantify the fine structure and degree of defects of the edges. Therefore, based on these high-dimensional feature parameters, the edge prediction model can establish a more accurate mapping relationship, thereby significantly improving the accuracy of jagged edge prediction. This provides a more reliable basis for subsequent dynamic compensation and real-time adjustment of etching parameters, ultimately effectively improving the etching quality and yield of the circuit board.

[0044] In its implementation, ensuring that the edge prediction model can accurately and robustly identify and predict the complex and ever-changing jagged edge defects during the PCB etching process, thereby guaranteeing the accuracy of the prediction and the generalization ability of the model, is a key technical problem that needs to be solved in depth.

[0045] In some implementations, when inputting feature parameters into a pre-trained edge prediction model, the training process of the edge prediction model includes: constructing a dataset of etched defect samples, labeling the feature parameters of the jagged edges for each sample; training the model using a ResNet-50 network architecture, and strengthening the weight ratio of the feature parameters of the jagged edges through an attention mechanism; and optimizing the parameters of the edge prediction model through cross-validation.

[0046] Specifically, constructing a dataset of etching defect samples is fundamental for training the edge prediction model. This involves acquiring a large number of actual etched circuit board images, encompassing jagged edge defects of different types, degrees, and morphologies. Each jagged edge defect in these images is then finely annotated, including its precise geometric location, morphological features (such as length, width, depth, and angle), and other relevant characteristic parameters. This annotated data serves as the model's "ground truth" or supervisory signal, guiding the model to learn how to identify and understand jagged edge defects. The annotation process can combine human expert experience with automated image processing tools to ensure accuracy and consistency.

[0047] During model training, the ResNet-50 network architecture was used. The ResNet-50 architecture is a deep convolutional neural network whose core feature is the introduction of residual connections, effectively solving the gradient vanishing and model degradation problems in deep network training, enabling it to learn deeper and more abstract image features. The constructed dataset of etching defect samples was input into the ResNet-50-based convolutional neural network. To further improve the model's ability to identify jagged edge defects, an attention mechanism module can be introduced after the feature extraction or classification layers of the ResNet-50. This attention mechanism allows the model to adaptively focus on regions and features related to jagged edge defects when processing image information, thereby increasing the weight of these key features in the model's decision-making process and enhancing the model's sensitivity and recognition accuracy for subtle defects.

[0048] Furthermore, the parameters of the edge prediction model are optimized using cross-validation. Cross-validation is an effective strategy for evaluating model performance and selecting optimal model parameters. When training the edge prediction model, the dataset is divided into multiple subsets. For example, using K-fold cross-validation, the dataset is randomly divided into K non-overlapping subsets. In each iteration, K-1 subsets are selected as the training set, and the remaining subset is used as the validation set, repeated K times. In this way, the model's performance on different data subsets can be comprehensively evaluated, thus more accurately measuring the model's generalization ability and avoiding overfitting where the model performs well on the training set but poorly on new data. Based on the results of cross-validation, the model's hyperparameters, such as learning rate, batch size, optimizer type, regularization parameters, and the specific configuration of the attention mechanism, can be systematically adjusted to find the optimal parameter combination for model performance.

[0049] Through the above technical solutions, a dataset of etching defect samples with detailed annotations was constructed, providing rich and high-quality learning examples for the edge prediction model. This enables the model to fully learn and understand the characteristics of various complex and variable jagged edge defects. Using the ResNet-50 network architecture as a foundation ensures the model's powerful feature extraction capabilities, effectively handling complex textures and details in circuit board images. Furthermore, an attention mechanism is introduced, allowing the model to adaptively allocate more computational resources and attention to key features related to jagged edge defects during training. This significantly improves the model's recognition accuracy and weighting of these defect features, thereby enhancing the accuracy of predicting the location and shape of jagged edges. In addition, cross-validation is used to systematically optimize the model parameters, effectively avoiding overfitting on specific training data and significantly enhancing the model's generalization ability. This ensures that the edge prediction model can still stably and accurately predict the location and shape of jagged edges when facing different etching conditions, different circuit board batches, and even different defect types. This allows for more accurate predictions and real-time adjustments to etching parameters based on dynamic compensation, resulting in more precise etching control, significantly improving the etching quality and yield of circuit boards, and effectively reducing scrap rates caused by etching defects.

[0050] If the feature parameters of the serrated edge are not labeled in a specific and precise manner during the etching process, such as only labeling its presence or approximate area, the model may be limited in learning and recognizing the precise geometry of the serrated edge, thereby affecting the accuracy of the prediction and the precision of subsequent etching parameter adjustments.

[0051] In some implementations, the characteristic parameters of the jagged edge include at least one of coordinates, width, and depth. The coordinates specifically refer to the precise location information of the jagged edge on the circuit board image. This can be a discrete set of points represented by a pixel coordinate system or a physical coordinate system, used to accurately depict the contour and position of the jagged edge. The coordinate information allows for accurate location of the specific area where the etching defect occurs. The width also refers to the degree of lateral deviation of the jagged edge relative to the ideal circuit edge. For example, the maximum vertical distance between the peak or valley of the jagged edge and the ideal edge line can be measured to quantify the lateral size of the jagged edge. The width parameter reflects the severity of the jagged defect, i.e., its impact on circuit integrity. Furthermore, the depth refers to the longitudinal extension length of the jagged edge along the circuit direction. For example, the projected length of a single jagged waveform from its start point to its end point along the circuit direction can be measured to quantify the longitudinal size of the jagged edge. The depth parameter reflects the persistence of the jagged defect along the circuit direction.

[0052] Through the aforementioned technical solution, the feature parameters of the jagged edges are more finely annotated during the training process of the edge prediction model, explicitly including at least one of coordinates, width, and depth. This detailed geometric information enables the model to more deeply understand and learn the actual shape and spatial distribution of the jagged edges. Specifically, coordinate information allows the model to accurately identify the location of jagged defects; width information helps the model quantify the lateral deviation of the jagged defects; and depth information allows the model to grasp the extension length of the jagged defects along the circuit direction. Therefore, the edge prediction model can obtain richer and more accurate defect feature data during training, thereby significantly improving its prediction accuracy for the position and shape of jagged edges during etching. This high-precision prediction result provides a more reliable basis for subsequent dynamic compensation and real-time adjustment of etching parameters, ensuring that the etching process can specifically eliminate or mitigate jagged defects, ultimately achieving a higher quality circuit board etching effect.

[0053] In some implementations, an edge prediction model is proposed to predict the location and shape of serrated edges during the etching process, and the etching parameters are dynamically adjusted in real time based on the prediction results. However, if only general etching parameter adjustments are made, it may be difficult to make precise and local interventions for the specific predicted location and shape of the serrated edges, resulting in poor compensation effects and an inability to effectively eliminate local etching defects.

[0054] In some implementations, when adjusting the etching parameters in real time through dynamic compensation based on the prediction results output by the edge prediction model, the adjustment of the etching parameters includes: adjusting at least one of the following in the corresponding region: etching fluid flow rate, etching time, etching fluid concentration, etching temperature, and etching fluid injection pressure, based on the predicted serrated edge position.

[0055] Adjusting the etchant flow rate in a specific area refers to precisely controlling the etchant supply to the corresponding area on the circuit board based on the specific location of the jagged edges predicted by the edge prediction model. Etching flow rate is a key process parameter affecting etching rate and uniformity. By locally adjusting the etchant flow rate, the etching intensity in a specific area can be precisely controlled. Specifically, this can be achieved through a microfluidic system integrated into the etching equipment, a programmable nozzle array, or a local flow controller. When the edge prediction model identifies a risk of jagged edges or the formation of jagged edges in a certain area of ​​the circuit board, the system can instruct the corresponding nozzle or flow controller to increase or decrease the etchant flow rate in that area. For example, if insufficient etching in a certain area is predicted to cause jagged edges, the etchant flow rate in that area can be appropriately increased to accelerate etching; if over-etching in a certain area is predicted, the flow rate can be reduced to slow down etching. This adjustment is based on the precise location information of the prediction, ensuring the locality and specificity of the intervention.

[0056] Simultaneously, adjusting the etching time for corresponding areas refers to locally adjusting the etching time of the corresponding areas on the circuit board based on the predicted serrated edge position. Etching time directly determines the depth and extent of material etching. Local adjustment of etching time means that certain areas can be etched additionally or etched prematurely throughout the entire etching cycle. Specifically, this can be achieved through local masking techniques (such as programmable photoresist, micro-mask arrays) or regional control of the etchant contact time. For example, during continuous etching, if a lag in the etching progress of a certain area is predicted, the etchant contact time in that area can be extended, or the effect of extending the etching time can be simulated through local heating, local stirring, etc. Conversely, if a region is predicted to etch too quickly, the etching process in that area can be terminated prematurely, for example, through local rinsing or neutralization. This adjustment is also based on precise predicted position information, achieving fine-grained control of the local etching process.

[0057] Through the above technical solution, this application can selectively adjust the etchant flow rate and / or etching time of corresponding areas based on the precise location information of the jagged edges output by the edge prediction model. This localized and refined parameter adjustment overcomes the limitations of traditional overall adjustment of etching parameters, enabling precise intervention in predicted local defects during the etching process. For example, for predicted under-etched areas, etching can be accelerated by increasing the etchant flow rate or extending the etching time, thereby eliminating jagged edges; for over-etched areas, the flow rate can be reduced or the time shortened to avoid defect deterioration. This significantly improves the accuracy and uniformity of etching, effectively suppresses the formation of jagged edges, and thus improves the manufacturing quality and yield of circuit boards.

[0058] In some implementations, serrated edge defects during etching can be initially compensated by adjusting the etchant flow rate and / or etching time in the corresponding area based on the predicted serrated edge position. However, in actual etching processes, the morphology of serrated edges can be complex and diverse. Simply adjusting the etchant flow rate and etching time may not be sufficient to finely correct all types of serrated edge morphologies, especially for complex serrated morphologies with specific angles, depths, or curvatures. This may result in poor compensation effects, failing to completely eliminate defects and thus affecting the final quality of the circuit board.

[0059] In some implementations, the etching parameters are adjusted in real time through dynamic compensation based on the prediction results. The etching parameters also include adjusting the etching fluid spray angle in the corresponding area based on the predicted serrated edge morphology.

[0060] The "predicted jagged edge morphology" refers to the specific shape and contour features of the jagged edges that may appear during the etching process, output by the edge prediction model in step S200. This includes not only the location information of the jagged edges but also their geometric features, such as the width, depth, angle, periodicity of the jagged edges, and the overall smoothness or roughness. This morphological information provides a basis for more precise adjustment of etching parameters.

[0061] "Adjusting the etching solution spray angle for the corresponding area" refers to locally and in real-time changing the angle or direction of the etching solution acting on the circuit board surface based on the predicted serrated edge morphology. This adjustment can be achieved in several ways. For example, a micro-nozzle array with a controllable spray angle can be used, where each nozzle or group of nozzles can independently adjust its spray direction, allowing the etching solution to impact a specific area of ​​the circuit board at a specific angle. Another approach is to utilize microfluidics technology, using micro-actuators or fluid guiding structures to precisely control the flow direction of the etching solution before it reaches the circuit board surface. Furthermore, a robotic arm or precision positioning system can be used to dynamically adjust the relative position and angle of the etching head or circuit board during the etching process to change the effective spray angle of the etching solution. This directional adjustment allows the etching solution to act more effectively on the specific geometric features of the serrated edge; for example, for protrusions that need to be smoothed, the etching solution can impact at a more perpendicular angle; for depressions that need to be filled or smoothed, the etching solution can be flushed at a more inclined angle.

[0062] The above technical solution, based on adjusting the etchant flow rate and / or etching time according to the predicted sawtooth edge position, further introduces a strategy to adjust the etchant spray angle according to the predicted sawtooth edge shape. This multi-dimensional adjustment of etching parameters enables the etching process to more precisely and comprehensively compensate for sawtooth defects at the circuit board edges. When the edge prediction model identifies a sawtooth edge with a specific shape, the system can not only adjust the amount and action time of the etchant, but also precisely control the spray angle of the etchant, thereby specifically eliminating or correcting these complex morphological defects. For example, for sawtooths with sharp corners, adjusting the spray angle allows the etchant to act more concentratedly on the corners, accelerating their passivation; for sawtooths of varying depths, impacts at different angles can achieve a more uniform etching effect. This dynamic control of the etchant spray angle greatly enhances the ability to correct sawtooth edge shapes, making the etched circuit edges smoother and more continuous, significantly improving the etching accuracy and product yield of the circuit board.

[0063] In practical applications, the edges of etched circuit boards may contain noise, irregularities, or minor defects. If a general or insufficiently robust edge detection algorithm is used, the detection accuracy of the circuit edges may be low, which may affect the accurate assessment of the etching quality. It may even cause unnecessary repeated etching or omission of defects, reducing production efficiency and product qualification rate.

[0064] In some implementations, the edge detection algorithm in step S500 includes at least one of the Canny operator and the Hough transform algorithm.

[0065] Specifically, the Canny operator is a multi-level edge detection algorithm that aims to achieve optimal edge detection performance, namely low error rate, high localization accuracy, and single-edge response. In its implementation, the Canny operator first smooths the secondary image using a Gaussian filter to effectively suppress noise. Next, it calculates the gradient magnitude and direction of the smoothed image to identify potential edge points. Then, it refines the edges using non-maximum suppression to eliminate non-edge points and ensure edge uniformity. Finally, it employs dual-threshold (high and low thresholds) hysteresis thresholding to connect edge segments, thereby obtaining the final accurate line edge.

[0066] Meanwhile, the Hough transform algorithm is a method for extracting specific shape features in images, particularly suitable for detecting straight lines. In implementation, for line edge detection in quadratic images, the basic idea of ​​the Hough transform algorithm is to map points in image space to a parameter space (e.g., (ρ, θ) space in polar coordinates). Collinear points in image space will intersect at a point or form peaks in parameter space. By finding these peaks in parameter space, straight line edges in image space can be determined in reverse. The Hough transform is robust to noise and edge gaps in images, effectively detecting straight lines even when line edges are discontinuous.

[0067] By employing the Canny operator and / or the Hough transform algorithm as the edge detection algorithm in the S500 step, the accuracy and robustness of edge detection on the etched circuit board can be significantly improved. The Canny operator provides precise edge localization and excellent noise suppression, ensuring that the detected line edges are clear and continuous, thus accurately reflecting the etching quality. The Hough transform algorithm excels at accurately identifying common straight edges on the circuit board even in the presence of noise or edge discontinuities, effectively compensating for the shortcomings of traditional edge detection methods in complex backgrounds. The combination or individual use of these two algorithms makes the evaluation of etching quality more reliable, effectively avoiding misjudgments or omissions caused by inaccurate detection, thereby reducing unnecessary repeated etching, improving the efficiency of the etching process and the quality of the final product, and ensuring that the etching accuracy of the circuit board reaches the preset threshold.

[0068] In actual etching production environments, due to various factors such as material batch differences, equipment wear, and ambient temperature fluctuations, the characteristics of the etching process may change slightly over time. This can lead to a decrease in the prediction accuracy of pre-trained models for newly emerging or changing etching defect patterns, thereby affecting the stability and consistency of etching quality.

[0069] For this, please refer to Figure 2As shown, in some embodiments, the etching method further includes: S600, collecting actual edge data after each etching and inputting it into the edge prediction model, and iteratively optimizing the edge prediction model through incremental learning.

[0070] Specifically, this step aims to acquire the true geometric morphology data of the circuit board's edges after etching. After one etching cycle, the etched circuit board can be scanned using high-precision optical inspection equipment or a 3D topography measuring instrument to obtain its surface image or point cloud data. Subsequently, image processing techniques, such as edge detection algorithms (e.g., the Canny operator or Hough transform algorithm), are used to accurately identify and extract the actual edge contours of the circuits. This actual edge data includes, but is not limited to, the actual linewidth, line spacing, local edge angles, continuity, smoothness, and the precise coordinates, width, and depth of any possible jagged defects. This data will serve as "real labels" for model learning, used to evaluate and improve the model's predictive capabilities.

[0071] The acquired actual edge data, after appropriate preprocessing and format conversion, is fed into the previously trained edge prediction model. The input here is not simply data transmission, but rather the association between the actually observed etching results and the original feature parameters (such as line width and line spacing) received by the model in step S200, forming new training sample pairs. For example, feature parameters extracted from the original image data can be used as input, and the corresponding actual edge data as the expected output, constructing a dataset for model optimization.

[0072] The edge prediction model is iteratively optimized using incremental learning. Incremental learning is a machine learning strategy that allows the model to gradually update its internal parameters as it receives new data, without retraining the entire model from scratch. In practice, online learning or mini-batch updates can be employed. When new actual edge data is input into the model, the model calculates the prediction error based on this new data and fine-tunes the model's weights and biases using backpropagation (or other optimization algorithms). To prevent "catastrophic forgetting" (i.e., the model forgetting old knowledge while learning new knowledge), strategies such as knowledge distillation, regularization techniques, or maintaining a small experience replay buffer can be used. Through this continuous iterative optimization, the edge prediction model can continuously adapt to the dynamic changes during the etching process, improving its accuracy in predicting the location and shape of jagged edges.

[0073] Through the above technical solution, this application introduces a continuous learning and adaptation mechanism based on the original etching method. By collecting actual edge data after each etching and feeding it into the edge prediction model for incremental learning, the model can capture minute changes in etching process parameters, material properties, or equipment status over time. This continuous iterative optimization effectively solves the problem of potential decrease in prediction accuracy of pre-trained models when facing dynamically changing production environments, ensuring that the edge prediction model always maintains high prediction accuracy. Therefore, based on more accurate prediction results, the dynamic compensation module can more precisely adjust etching parameters, thereby significantly improving the stability and consistency of the circuit board etching process, effectively suppressing the generation of jagged edge defects, and ultimately obtaining a higher quality etched circuit board.

[0074] In traditional PCB etching systems, the most common defect during etching is lateral etching, which manifests as jagged edges on the circuit lines. This leads to increased signal and conductor losses, severely impacting PCB performance and yield. The core innovation of this embodiment lies in combining an edge prediction model trained by a convolutional neural network with a dynamic compensation module using a closed-loop feedback mechanism. This allows for real-time prediction of the location and shape of jagged edges during etching and dynamic adjustment of etching parameters, effectively suppressing lateral etching defects and reducing signal and conductor losses.

[0075] This application discloses an etching system for circuit boards, comprising an acquisition module, a prediction module, an output module, a dynamic compensation module, and a data acquisition and detection module. The acquisition module is configured to acquire raw image data of the circuit board to be etched and extract feature parameters of the circuit edges from the raw image data. The prediction module is configured to input the feature parameters into a pre-trained edge prediction model, wherein the edge prediction model learns from etching samples using a convolutional neural network to predict the position and shape of jagged edges during etching. The output module is configured to output the prediction results from the edge prediction model. The dynamic compensation module is configured to adjust the etching parameters in real time based on the prediction results through dynamic compensation. The data acquisition and detection module is configured to perform secondary image acquisition on the etched circuit board and detect the circuit edges in the secondary image using an edge detection algorithm. If the preset threshold is not reached, the corresponding functions in the prediction module, the output module, and the dynamic compensation module are executed until the preset threshold is reached.

[0076] In practical implementation, the acquisition module captures the original image of the circuit board to be etched using an optical imaging device and extracts feature parameters of the circuit edges based on image processing technology, including at least one of line width, line spacing, edge angle, edge continuity, smoothness, and corner curvature. The prediction module inputs the extracted feature parameters into a pre-trained edge prediction model. This model uses a convolutional neural network architecture to learn from etching defect samples, enabling it to identify the coordinates, width, and depth features of jagged edges and output prediction results of the jagged edge position and shape. After receiving the prediction results, the output module transmits them to the dynamic compensation module. This module dynamically adjusts the etching fluid flow rate or etching time based on the predicted jagged edge position and adjusts the etching fluid spray angle based on the predicted jagged edge shape, thereby achieving real-time compensation of etching parameters. The acquisition and detection module performs secondary image acquisition after etching and applies the Canny operator or Hough transform algorithm to detect the quality of the circuit edges. If the detection result does not reach a preset threshold, the system automatically returns to the prediction film, output module, and dynamic compensation module to repeat the prediction, compensation, and detection process until the edge quality meets the requirements.

[0077] Through the above technical solutions, this etching system forms a complete closed-loop control mechanism, which can dynamically respond to potential defects during the etching process, significantly reducing the generation of jagged edges, thereby improving the signal integrity and conductor performance of the circuit board. Furthermore, the system iteratively optimizes the edge prediction model using incremental learning, continuously improving prediction accuracy and compensation effect, ensuring the stability and reliability of the etching process.

[0078] In actual production environments, factors such as the material batch of the circuit board, the composition of the etching solution, the ambient temperature, and equipment wear may change slightly over time, causing the prediction accuracy of the pre-trained model to gradually decrease, thereby affecting the long-term stability and consistency of etching quality.

[0079] In some implementations, the etching system further includes an iterative optimization module, which is configured to collect actual edge data after each etching and input it into the edge prediction model, and iteratively optimize the edge prediction model through incremental learning.

[0080] Specifically, the iterative optimization module is a functional unit whose main responsibility is to continuously monitor and improve the performance of the edge prediction model. This module can be implemented by dedicated hardware circuits, embedded software programs, or server-side computing resources. Its core function is to provide a mechanism that allows the edge prediction model to learn new experiences from actual operation.

[0081] To enable continuous learning of the model, the system collects actual edge data after each etching operation. Specifically, after each etching operation, the acquisition and detection module performs secondary image acquisition on the etched circuit board and accurately identifies the actual edges of the lines using edge detection algorithms (such as at least one of the Canny operator and the Hough transform algorithm). This actual edge data, including its location, shape, line width, line spacing, edge angle, edge continuity, smoothness, corner curvature, and other characteristic parameters, is considered as the "ground truth" of the etching process and is used to evaluate and correct the prediction results of the edge prediction model.

[0082] Subsequently, inputting the collected actual edge data into the edge prediction model is a crucial step in achieving iterative optimization. This typically involves preprocessing and formatting the actual edge data to meet the input requirements of the edge prediction model. For example, the actual edge data can be correlated with the original image data before etching or the prediction results to form new training sample pairs, enabling the model to learn the deviation between the prediction and the actual edge.

[0083] Building upon this, the edge prediction model is iteratively optimized using incremental learning. Incremental learning is a machine learning strategy that allows the model to learn and update its internal parameters progressively from new data without complete retraining. In practice, the iterative optimization module can employ online learning, mini-batch updates, or periodic fine-tuning. For example, when new actual edge data is input, the edge prediction model (which may employ a ResNet-50 network architecture combined with an attention mechanism) utilizes this new data to fine-tune its weights and biases through backpropagation algorithms and optimizers (such as Adam, SGD, etc.). This iterative optimization process enables the model to adapt to dynamic changes in the etching environment, such as drift in material properties, equipment status, or process parameters, thereby continuously improving its accuracy in predicting the location and shape of jagged edges.

[0084] Through the above technical solution, this application effectively addresses the problem of decreased prediction accuracy that may occur in pre-trained models during long-term operation. Specifically, by continuously collecting actual edge data after each etching and feeding it back to the edge prediction model, the model can continuously learn and adapt from actual production, ensuring that its prediction capability remains synchronized with the current etching conditions. This not only ensures that the etching system can accurately predict the position and shape of jagged edges under dynamic changes such as different batches of materials, different environmental conditions, and equipment wear, but also achieves more precise dynamic compensation and etching parameter adjustment, significantly improving the long-term stability and yield of circuit board etching, reducing etching defects caused by outdated models, and lowering the frequency of manual intervention and maintenance, thereby improving production efficiency and economic benefits.

[0085] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this specification, and not to limit them. Although this specification has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments in this specification.

Claims

1. An etching method for a circuit board, characterized in that, The etching method includes: S100: Obtain the original image data of the circuit board to be etched, and extract the feature parameters of the circuit edges in the original image data; S200. Input the feature parameters into a pre-trained edge prediction model, wherein the edge prediction model learns from the etched samples through a convolutional neural network to predict the position and shape of the jagged edges during the etching process. S300, Based on the prediction results output by the edge prediction model; S400. Based on the prediction results, the etching parameters are adjusted in real time through dynamic compensation; S500: Perform secondary image acquisition on the etched circuit board, and detect the line edges in the secondary image using an edge detection algorithm. If the preset threshold is not reached, repeat steps S200 to S400 until the preset threshold is reached.

2. The etching method according to claim 1, characterized in that, In step S100, the characteristic parameters of the line edge include at least one of roughness, line width, line spacing, edge angle, edge continuity, smoothness, and corner curvature.

3. The etching method according to claim 1, characterized in that, In step S200, the training process of the edge prediction model includes: Construct a dataset of etching defect samples, and label the feature parameters of the jagged edges for each sample; The model was trained using the ResNet-50 network architecture, and the weight ratio of the feature parameters of the jagged edges was enhanced through an attention mechanism. The parameters of the edge prediction model are optimized using cross-validation.

4. The etching method according to claim 3, characterized in that, The characteristic parameters of the sawtooth edge include at least one of coordinates, width, and depth.

5. The etching method according to claim 1, characterized in that, In step S300, the step of adjusting the etching parameters in real time through dynamic compensation based on the prediction result further includes: Based on the predicted serrated edge position, adjust at least one of the following parameters for the corresponding area: etching fluid flow rate, etching time, etching fluid concentration, etching temperature, and etching fluid jet pressure.

6. The etching method according to claim 1 or 5, characterized in that, The step of adjusting the etching parameters in real time through dynamic compensation based on the prediction results, wherein the etching parameters further include: Adjust the etching fluid spray angle in the corresponding area based on the predicted serrated edge shape.

7. The etching method according to claim 1, characterized in that, In step S500, the edge detection algorithm includes at least one of the Canny operator and the Hough transform algorithm.

8. The etching method according to claim 1, characterized in that, The etching method further includes: S600. Collect the actual edge data after each etching and input it into the edge prediction model. Iteratively optimize the edge prediction model using incremental learning.

9. An etching system for circuit boards, characterized in that, The etching system includes: The acquisition module is configured to acquire the original image data of the circuit board to be etched and extract the feature parameters of the circuit edges in the original image data; The prediction module is configured to input the feature parameters into a pre-trained edge prediction model, wherein the edge prediction model learns from the etched samples through a convolutional neural network to predict the position and shape of the jagged edges during the etching process. The output module is configured to output the prediction results based on the edge prediction model. The dynamic compensation module is configured to adjust the etching parameters in real time based on the prediction results through dynamic compensation; The acquisition and detection module is configured to acquire a secondary image of the etched circuit board and detect the circuit edges in the secondary image using an edge detection algorithm. If the preset threshold is not reached, the module returns to the prediction film, the output module, and the dynamic compensation module to perform the corresponding functions until the preset threshold is reached.

10. The etching system according to claim 9, characterized in that, The etching system also includes an iterative optimization module, which is configured to collect actual edge data after each etching and input it into the edge prediction model, and iteratively optimize the edge prediction model through incremental learning.

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