Multi-phase current sharing control method, system, and storage medium

Abstract

The application discloses a multi-phase current-sharing control method, system and storage medium. The method comprises the following steps: acquiring an electrical parameter signal collected by a target component in a current period, wherein the electrical parameter signal comprises a voltage signal and a multi-phase current signal; determining an ideal average current corresponding to each phase in the multi-phase based on the voltage signal; determining a current-sharing error corresponding to each phase based on the current signal of each phase; obtaining a current calibration quantity corresponding to each phase in the current period through time domain difference iteration processing based on the current-sharing error corresponding to each phase and a current calibration quantity in a previous period; determining a phase shift driving signal based on the ideal average current, the current calibration quantity in the current period and the current signal; and performing multi-phase current-sharing control on the target component according to the phase shift driving signal. Thus, the steady-state DC bias error can be reduced, and the stability of low-voltage large current can be improved.

Description

Technical Field

[0001] This application relates to the field of circuit technology, and in particular to a multiphase current sharing control method, system and storage medium. Background Technology

[0002] In some applications, such as extreme performance testing of key materials for superconducting magnets (e.g., superconducting cables) and sub-coils, a DC test power supply capable of providing extremely stable low-voltage, high-current (e.g., as low as a few volts, up to thousands or even tens of thousands of amperes) is typically required to provide a strong magnetic field environment.

[0003] Currently, power supply systems based on interleaved buck converter topologies are commonly used to provide the aforementioned low-voltage, high-current power. However, during high-power operation of the power supply system, steady-state DC bias errors can easily arise due to the physical asymmetry between the parallel phases, leading to a decrease in the stability of the low-voltage, high-current provided by the power supply system. Summary of the Invention

[0004] To address the aforementioned technical problems, this application proposes a multiphase current sharing control method, system, and storage medium, which can reduce steady-state DC bias error and improve the stability of low-voltage, high-current operation.

[0005] In a first aspect, embodiments of this application provide a multiphase flow sharing control method, including: Acquire electrical parameter signals collected from the target component in the current cycle, wherein the electrical parameter signals include voltage signals and multi-phase current signals; Based on the voltage signal, determine the ideal average current corresponding to each of the multiphases; Based on the current signals of each phase, determine the current sharing error for each corresponding phase; Based on each corresponding current sharing error and the current calibration amount of the previous cycle, the current calibration amount of the current cycle is obtained through time-domain differential iterative processing. The phase shift drive signal is determined based on the ideal average current, the current calibration value of the current cycle, and the current signal. Multiphase flow sharing control is performed on the target component based on the phase shift drive signal.

[0006] Optionally, the multiphase corresponds one-to-one with multiple independent slow discrete integrators, which are used to implement the time-domain difference iterative processing. The domain transfer function is obtained based on the calibration integral gain configuration; The process of obtaining the current cycle current calibration value for each corresponding cycle based on the corresponding current sharing error and the current calibration value of the previous cycle through time-domain differential iterative processing includes: For each of the multiphases, its corresponding current sharing error is input into the corresponding independent slow discrete integrator, so that the independent slow discrete integrator performs the time-domain differential iteration processing based on the corresponding current sharing error and the current calibration amount of the previous cycle using the calibration integral gain, so as to generate and output the corresponding current calibration amount of the current cycle.

[0007] Optionally, the step of performing the time-domain differential iterative processing using the calibration integral gain based on the corresponding current sharing error and the previous cycle current calibration value to generate and output the corresponding current calibration value for the current cycle includes: Multiply the corresponding current sharing error by the calibration integral gain to obtain the gain error; The corresponding current calibration value for the previous cycle is added to the gain error to obtain the corresponding current calibration value for the current cycle.

[0008] Optionally, the method further includes: The current cycle current calibration amount is compared with a preset threshold range, wherein the threshold range includes a preset upper limit threshold and a preset lower limit threshold for calibration amount; When the current cycle current calibration value exceeds the threshold range, the current cycle current calibration value is limited according to the threshold range. If the continuous duration of the limiting process meets the preset time condition, an early warning message is output. The early warning message is used to trigger a system hardware asymmetric degradation early warning.

[0009] Optionally, determining the phase shift drive signal based on the ideal average current, the current calibration value of the current cycle, and the current signal includes: Based on the difference between the ideal average current corresponding to each phase and the current calibration value of the current cycle, the reference value of the feedforward reconfiguration current corresponding to each phase is determined. Based on the difference between the feedforward reconstructed current reference value and the current signal corresponding to each phase, the driving information corresponding to each phase is determined. The phase shift drive signal is determined based on the driving information corresponding to each of the multiple phases.

[0010] Optionally, the multiphase corresponds one-to-one with multiple independent current inner loop controllers, and the drive information includes duty cycle instructions; The determination of the driving information corresponding to each phase based on the difference between the feedforward reconstructed current reference value and the current signal for each phase includes: The difference between the feedforward reconfiguration current reference value and the current signal corresponding to each phase is input into the independent current inner loop controller corresponding to each phase for calculation to obtain the duty cycle command corresponding to each phase.

[0011] Optionally, determining the ideal average current corresponding to each of the multiphases based on the voltage signal includes: The voltage tracking error is determined based on the difference between the preset reference voltage and the voltage signal; The voltage tracking error is input to the voltage outer loop controller to obtain the total current reference value output by the voltage outer loop controller; The ideal average current is determined based on the ratio between the total current reference value and the number of phases in the multiphase system.

[0012] Optionally, determining the current sharing error for each corresponding phase based on the current signal of each phase includes: The average value of the actual current is obtained by calculating the average value of the current signals of each phase. Based on the difference between the current signal of each phase and the average actual current, the current sharing error of each corresponding phase is determined.

[0013] Secondly, embodiments of this application provide a multiphase flow sharing control system, including: An electrical parameter acquisition module is used to acquire electrical parameter signals collected from the target component in the current cycle, wherein the electrical parameter signals include voltage signals and multi-phase current signals; An ideal average current determination module is used to determine the ideal average current for each corresponding phase in the multiphase based on the voltage signal. The current sharing error determination module is used to determine the current sharing error for each corresponding phase based on the current signals of each phase. The time-domain differential iteration module is used to obtain the current calibration value of each corresponding cycle through time-domain differential iteration based on the current sharing error and the current calibration value of the previous cycle. A phase shift drive signal generation module is used to determine a phase shift drive signal based on the ideal average current, the current cycle current calibration amount, and the current signal; The control module is used to perform multiphase current sharing control on the target component according to the phase shift drive signal.

[0014] Thirdly, embodiments of this application provide a non-transitory computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the method described in any of the above-mentioned embodiments.

[0015] In summary, the embodiments of this application have at least the following beneficial effects: Using the embodiments of this application, electrical parameter signals collected from the target component in the current cycle are acquired, wherein the electrical parameter signals include voltage signals and multi-phase current signals; based on the voltage signals, the ideal average current corresponding to each of the multi-phase currents is determined; based on the current signals of each phase, the current sharing error corresponding to each phase is determined; based on the current sharing error corresponding to each phase and the current calibration amount of the previous cycle, the current calibration amount of each phase corresponding to the current is obtained through time-domain differential iterative processing; based on the ideal average current, the current calibration amount of the current cycle, and the current signals, a phase shift drive signal is determined; and multi-phase current sharing is performed on the target component according to the phase shift drive signal. Flow control, by using the ideal average current determined by the voltage signal, avoids the problem of masking the total power variation that may be caused by relying solely on the average current, thus improving the rationality of the reference. In addition, the consequences of hardware asymmetry can be transformed into a quantifiable control error signal through the current sharing error, and time-domain differential iteration is introduced so that the calibration amount can be accumulated and adjusted when the current sharing error occurs, thereby improving the ability to eliminate DC bias error. Furthermore, by combining the current signal and the ideal average current as the reference, a phase shift drive signal adapted to the current cycle is dynamically generated, thereby precisely adjusting the output current of the target component to reduce steady-state DC bias error and improve the stability of low voltage and high current. Attached Figure Description

[0016] Figure 1 This is a schematic flowchart of the multiphase flow sharing control method provided in the embodiments of this application; Figure 2 This is a control principle diagram of the multiphase flow sharing control provided in the embodiments of this application; Figure 3 This is a circuit diagram of the parallel buck converter topology provided in the embodiments of this application; Figure 4 This is a schematic diagram of the structure of the multiphase flow sharing control system provided in the embodiments of this application; Figure 5 This is a schematic diagram of the computer device provided in the embodiments of this application. Detailed Implementation

[0017] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments / examples are only a part of the embodiments / examples of this application, and not all of the embodiments / examples. Based on the embodiments / examples in this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0018] In the description of this application, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first," "second," "third," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "multiple" means two or more. In the description of this application, the term "comprising" and its variations are open-ended, meaning "including but not limited to." The term "based on" means "at least partially based on." The term "according to" means "at least partially according to." The term "one embodiment / example" means "at least one embodiment / example"; the term "another embodiment / example" means "at least one additional embodiment / example"; the term "some embodiments / examples" means "at least some embodiments / examples."

[0019] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0020] In the description of this application, it should be noted that, unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing specific embodiments only and is not intended to limit the application. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0021] In some cases, with the development of controlled nuclear fusion technology, superconducting magnets, as core components of large scientific devices such as tokamak, place extremely stringent requirements on the test power supply for performance testing and evaluation. In the extreme performance testing of key materials (such as superconducting cables) and sub-coils of superconducting magnets, an extremely stable low-voltage, high-current (e.g., from a few volts to thousands or even tens of thousands of amperes) DC test power supply is typically required to provide a strong magnetic field environment.

[0022] In related technologies, to meet the requirements of such low-voltage, high-current output at the kiloampere level and reduce the thermal stress on individual power devices, power supply systems typically employ multiphase interleaved parallel buck converter topologies. However, in the extremely demanding physical experimental environment of fusion superconducting magnet testing, the absolute stability and accuracy of the output excitation current are crucial.

[0023] In actual high-power operation, severe phase-to-phase current imbalance can occur between parallel phases due to hardware physical asymmetries such as manufacturing tolerances of high-frequency filter inductors, slight differences in parasitic resistance (e.g., ESR) of high-current PCB busbar traces, and zero-point bias of Hall sensors or high-precision current sensing amplifiers and quantization errors of ADCs. The digital average current sharing method used in related technologies primarily relies on a dual closed-loop structure of voltage outer loop and current inner loop for adjustment. However, this dual closed-loop structure struggles to eliminate the steady-state DC bias error caused by the aforementioned hardware physical asymmetries, thus failing to meet the ultra-high precision current sharing requirements of 0.1% in large scientific facilities.

[0024] In view of this, embodiments of this application propose a multiphase current sharing control method, system, and storage medium, aiming to at least partially solve the problems existing in the above-mentioned related technologies.

[0025] Firstly, see [the following] Figure 1 The diagram shows a flowchart of a multiphase current sharing control method provided in an embodiment of this application. This multiphase current sharing control method can be applied to a computer device with data processing capabilities. The method includes S101-S106, as detailed below.

[0026] S101, acquire the electrical parameter signals collected from the target component in the current cycle, wherein the electrical parameter signals include voltage signals and multi-phase current signals.

[0027] In some examples, the target component may include: a power system based on a multiphase interleaved parallel buck converter topology, or a power stage module in the power system, wherein the power stage module may contain n power phases operating in parallel, each of which is independently configured with switching devices, inductors and current sampling units.

[0028] In some examples, electrical parameter signals for the target component can be acquired at different cycles. The current signal for each phase can be used to characterize the actual current of that phase, and the voltage signal can be used to characterize the actual voltage.

[0029] In some examples, see Figure 2 The diagram illustrates the control principle of multiphase current sharing control provided in an embodiment of this application. The current period may include the current discrete period. The voltage signal can contain the current discrete period. Output voltage discrete value The multiphase system can have n phases, where n is a positive integer. The current signal of the n phases can contain the discrete values ​​of the inductor currents of the n phases, which are respectively... .

[0030] For example, see Figure 3 The diagram illustrates a circuit diagram of a parallel buck converter topology provided in an embodiment of this application. In the diagram, the main DC input source (Power Supply) can be used to power all phases, and all phases sharing the same input bus reflects the parallel input characteristic. The structure of each of the n phases can be identical. The corresponding dashed box represents the structure of phase 1, and... The corresponding dashed box represents the structure of the nth phase. This indicates the body diode of phase 1. This represents the body diode of the nth phase. This indicates the main switch transistor for phase 1. This indicates the freewheeling switch for phase 1, which can be used in conjunction with... Complementary conduction (dead zone control). This represents the main switch transistor of phase n. This indicates the freewheeling switch for the nth phase. This represents each corresponding filter inductor. The parasitic resistances for each phase, from phase 1 to phase n, are represented in turn. This represents each corresponding output filter capacitor. Indicates the load resistance. This refers to a current sampling resistor or shunt resistor. The current sensor can be used to collect the current in each phase. Thus, the above is obtained. In addition, the above It can be based on Voltage collected at the location Generated.

[0031] S102, based on the voltage signal, determine the ideal average current corresponding to each of the multiphases.

[0032] In some examples, different voltage signals can correspond to different total current reference values, which can refer to the total current that can maintain the power system corresponding to the target component in a regulated state. Thus, after determining the total current reference value, the total current reference value can be directly divided by the number of phases to obtain the ideal average current for each corresponding phase.

[0033] S103, based on the current signals of each phase, determine the current sharing error for each corresponding phase.

[0034] It is understandable that current sharing error can refer to the deviation between the actual current represented by the current signal of a certain phase and the average value of the actual current represented by the current signals of all phases.

[0035] S104, based on each corresponding current sharing error and the current calibration amount of the previous cycle, obtains the current calibration amount of the current cycle corresponding to each cycle through time-domain differential iterative processing.

[0036] In some examples, time-domain differential iterative processing can be used to indicate a control strategy that iteratively updates the current error with historical calibration values ​​in the time domain.

[0037] In some examples, the previous cycle current calibration value can refer to the current calibration value obtained by processing the electrical parameter signals acquired from the target component in the previous cycle through time-domain differential iterative processing. For example, the current cycle current calibration value in this embodiment can be used as the previous cycle current calibration value in the time-domain differential iterative processing of the next cycle.

[0038] S105, determine the phase shift drive signal based on the ideal average current, the current calibration value of the current cycle, and the current signal.

[0039] In some examples, in a multiphase interleaved topology, the switching drive signals of each phase can be staggered by a certain phase in time (e.g., 120° electrical angle between each phase in a 3-phase system). The phase shift drive signal in this embodiment can refer to a drive signal whose phase and duty cycle have been adjusted after current sharing calibration.

[0040] S106, Perform multiphase flow sharing control on the target component according to the phase shift drive signal.

[0041] In one optional implementation, determining the ideal average current for each corresponding phase in the multiphase based on the voltage signal includes: The voltage tracking error is determined based on the difference between the preset reference voltage and the voltage signal; The voltage tracking error is input to the voltage outer loop PI (Proportional-Integral) controller to obtain the total current reference value output by the voltage outer loop controller; The ideal average current is determined based on the ratio between the total current reference value and the number of phases in the multiphase system.

[0042] In some examples, see Figure 2 The voltage signal of the current period can be the current discrete period. Output voltage discrete value The preset reference voltage can be used to characterize the stable output voltage level that the power supply system expects to maintain, and the voltage tracking error. ,in, This indicates the preset reference voltage.

[0043] In some examples, see Figure 2 The voltage outer loop controller can be a voltage outer loop digital PI controller. (Also known as a voltage outer-loop PI controller), the voltage outer-loop controller can serve as the main control outer loop of a closed-loop control system. It can be used to dynamically adjust the total energy demand based on the voltage tracking error, thus mitigating the voltage tracking error. Enter to In this process, the total current reference value (total current reference command) required to maintain system voltage regulation can be calculated. .

[0044] In some examples, see Figure 2 The total current reference value can be used. Divide by the number of phases n to obtain the ideal average current of each phase. That is, it can be expressed as: .

[0045] In one optional implementation, determining the current sharing error for each corresponding phase based on the current signal of each phase includes: The average value of the actual current is obtained by calculating the average value of the current signals of each phase. Based on the difference between the current signal of each phase and the average actual current, the current sharing error of each corresponding phase is determined.

[0046] In some examples, see Figure 2 The average value of the current signals in each phase can be calculated using the following formula to obtain the actual average current value. .

[0047] in, It can represent the first Phase current signal, .

[0048] In some examples, see Figure 2 For the first Phase, can be determined by formula To calculate the first Corresponding flow equalization error ,For example, This represents the flow sharing error corresponding to the first one. Indicates the first The corresponding flow equalization error.

[0049] In this embodiment, the current sharing error is obtained by comparing the actual current signal of each phase with the arithmetic mean of the current signals of all phases (i.e., the average actual current). This allows the current sharing error to reflect the degree of uneven current distribution in each phase under the current operating state, caused by inherent hardware non-ideals such as inductor DCR (Direct Current Resistance), PCB trace resistance differences, and current sensor zero-point drift. Furthermore, the current sharing error can provide a precise, real-time quantitative indicator to characterize the physical asymmetry within the power supply system. Thus, using this current sharing error as the input signal of an independent slow discrete integrator, its high accuracy and high correlation can improve the effectiveness of calibration. By slowly integrating this current sharing error, a current calibration amount that can almost completely offset hardware bias can be gradually accumulated and generated. This closed-loop calibration mechanism based on real system state feedback can effectively achieve high-precision steady-state current sharing.

[0050] In one optional implementation, the multiphase corresponds one-to-one with multiple independent slow discrete integrators, which are used to implement the time-domain difference iterative processing. The domain transfer function is obtained based on the calibration integral gain configuration; The process of obtaining the current cycle current calibration value for each corresponding cycle based on the corresponding current sharing error and the current calibration value of the previous cycle through time-domain differential iterative processing includes: For each of the multiphases, its corresponding current sharing error is input into the corresponding independent slow discrete integrator, so that the independent slow discrete integrator performs the time-domain differential iteration processing based on the corresponding current sharing error and the current calibration amount of the previous cycle using the calibration integral gain, so as to generate and output the corresponding current calibration amount of the current cycle.

[0051] In some examples, see Figure 2 Independent slow discrete integrator Domain transfer functions can be used To indicate, among which, This refers to the calibration integral gain. In this embodiment, the calibration integral gain... It can be a very small gain.

[0052] Understandably, since the digital integrator has infinite gain at DC (low frequency), according to the final value theorem, in order to achieve closed-loop steady state, the control system can usually force the input error to approach zero, thus obtaining the current sharing error in this embodiment. Approaching zero: Thus, this slow integrator can be analogized to a steady-state error collector, ultimately outputting an error that can be used for precise compensation of the first error. calibration amount of phase hardware deviation That is, with the first The corresponding current calibration value for the current cycle.

[0053] In this embodiment, by introducing an independent slow discrete integrator, the fast dynamic current control and the slow steady-state bias calibration can be decoupled. In related technologies, high-bandwidth PI controllers struggle to distinguish between transient current fluctuations and steady-state bias (such as inherent hardware steady-state zero-point bias), inevitably leading to a large steady-state current sharing error under asymmetrical physical parameters. This embodiment utilizes the slow characteristic to integrate the long-term accumulated current sharing error, effectively reducing miscorrections to normal dynamic processes and precisely and effectively eliminating the steady-state current sharing error caused by hardware asymmetry.

[0054] In one optional implementation, the step of performing the time-domain differential iterative processing using the calibration integral gain based on the corresponding current sharing error and the previous cycle current calibration value to generate and output the corresponding current calibration value for the current cycle includes: Multiply the corresponding current sharing error by the calibration integral gain to obtain the gain error; The corresponding current calibration value for the previous cycle is added to the gain error to obtain the corresponding current calibration value for the current cycle.

[0055] In some examples, see Figure 2 The time-domain difference iterative equation corresponding to the time-domain difference iterative processing can be expressed by the following formula: in, Indicates the relationship with the first The corresponding current calibration value for the current cycle, Indicates the relationship with the first The corresponding current calibration amount from the previous cycle, Indicates the calibration integral gain. Indicates the relationship with the first The corresponding flow sharing error, This indicates the gain error.

[0056] In an optional implementation, the method further includes: The current cycle current calibration amount is compared with a preset threshold range, wherein the threshold range includes a preset upper limit threshold and a preset lower limit threshold for calibration amount; When the current cycle current calibration value exceeds the threshold range, the current cycle current calibration value is limited according to the threshold range. If the continuous duration of the limiting process meets the preset time condition, an early warning message is output. The early warning message is used to trigger a system hardware asymmetric degradation early warning.

[0057] In some examples, the above-described limiting process can be performed before determining the phase shift drive signal based on the ideal average current, the current cycle current calibration amount, and the current signal, so that the current cycle current calibration amount used to determine the phase shift drive signal can be a calibrated amount after limiting, thereby limiting the current cycle current calibration amount to a threshold range (i.e., when the current cycle current calibration amount is greater than the upper limit threshold of the calibration amount, the current cycle current calibration amount can be clamped at the upper limit threshold of the calibration amount; when the current cycle current calibration amount is less than the lower limit threshold of the calibration amount, the current cycle current calibration amount can be clamped at the lower limit threshold of the calibration amount).

[0058] It is understandable that the continuous duration of the limiting process can be used to characterize the continuous duration when the current calibration amount of the current cycle exceeds the threshold range. The continuous duration of the limiting process meets the preset time condition, which means that the continuous duration when the current calibration amount of the current cycle exceeds the threshold range meets the time condition. In some examples, the preset time condition may include at least one of the following: the continuous duration of the limiting process is greater than the warning duration threshold, or the continuous duration of the limiting process fills the preset warning time window.

[0059] In this embodiment, by using clipping processing, system runaway caused by integral saturation (anti-windup) can be effectively reduced, and the clipping boundary can be used as a diagnostic reference for hardware faults, thereby improving system stability.

[0060] In one optional implementation, determining the phase shift drive signal based on the ideal average current, the current calibration value of the current cycle, and the current signal includes: Based on the difference between the ideal average current corresponding to each phase and the current calibration value of the current cycle, the reference value of the feedforward reconfiguration current corresponding to each phase is determined. Based on the difference between the feedforward reconstructed current reference value and the current signal corresponding to each phase, the driving information corresponding to each phase is determined. The phase shift drive signal is determined based on the driving information corresponding to each of the multiple phases.

[0061] In some examples, see Figure 2 The feedforward reconstruction process can be represented by the following formula: in, Indicates the relationship with the first The corresponding feedforward reconfiguration current reference value, Indicates the relationship with the first The corresponding ideal average current, Indicates the relationship with the first The corresponding current calibration value for the current cycle.

[0062] In this embodiment, the accuracy of the reconstructed feedforward current reference value can be improved by feedforward reconstruction.

[0063] In one optional implementation, the multiphase corresponds one-to-one with multiple independent current inner loop controllers, and the drive information includes duty cycle instructions; The determination of the driving information corresponding to each phase based on the difference between the feedforward reconstructed current reference value and the current signal for each phase includes: The difference between the feedforward reconfiguration current reference value and the current signal corresponding to each phase is input into the independent current inner loop controller corresponding to each phase for calculation to obtain the duty cycle command corresponding to each phase.

[0064] In some examples, see Figure 2 An independent current inner loop controller can be a standalone high-bandwidth current inner loop PI controller. (Also known as an independent current inner-loop PI controller), thus, the first... The difference between the feedforward reconstructed current reference value and the current signal corresponding to the phase is input to the first... The corresponding high-bandwidth current inner-loop PI controller (for example, This indicates the high-bandwidth current inner-loop PI controller corresponding to phase 1. Indicates the first The corresponding high-bandwidth current inner-loop PI controller is used to obtain the first phase. The corresponding high-bandwidth current inner-loop PI controller The output of the first The duty cycle command corresponding to a phase can be expressed by the following formula: in, Indicates the first The duty cycle command corresponding to the phase.

[0065] In this way, the independent duty cycle commands for each phase can be calculated, namely: Finally, the duty cycle instruction is written into the underlying DPWM (Digital Pulse Width Modulation) register of the DSP (Digital Signal Processor) so that the DSP can output a precisely phase-shifted signal. The phase shift drive signal is used to complete the closed-loop control.

[0066] It is understood that the voltage outer loop controller and the current inner loop controller are not limited to traditional proportional-integral (PI) controllers. In some embodiments, in order to pursue higher transient response speed and robustness, the current inner loop controller may also adopt a discrete-time sliding mode controller (DSMC), a deadbeat control, or a proportional resonant (PR) controller. The replacement of these controllers does not deviate from the core idea of ​​using an independent slow discrete integrator for low-frequency steady-state current sharing calibration in the embodiments of this application.

[0067] In this embodiment of the application, in the above-mentioned closed-loop control, the high-frequency transient response can be determined by the inner current loop. The low-frequency hardware error can be eliminated by a slow integrator, thus achieving good frequency domain decoupling and improving calibration accuracy.

[0068] In summary, the embodiments of this application, by introducing a slow integral self-calibration loop, can achieve dynamic decoupling of high and low frequencies in the closed-loop control system. Without increasing additional hardware costs or compensation components, it relies purely on upgrades to the underlying digital algorithm, utilizing the inertia of the self-calibrator during transient high-frequency processes to maintain the extremely fast dynamic response of the main loop. Furthermore, in the steady-state low-frequency region, the infinite gain of the integrator automatically and effectively eliminates steady-state bias caused by non-ideal physical factors such as inductance tolerance, line impedance differences, and operational amplifier bias. This allows the steady-state current sharing error of the multiphase converter to be as close to zero as possible. This not only meets the stringent requirements of 0.1% ultimate current sharing accuracy for test power supplies such as fusion superconducting magnets, but also possesses extremely strong system robustness and easy deployment engineering characteristics.

[0069] Secondly, correspondingly, the embodiments of this application also provide a multiphase flow sharing control system, which can realize all the processes of the multiphase flow sharing control method provided in the above embodiments.

[0070] See Figure 4 The diagram shows a schematic of the structure of a multiphase flow sharing control system 400 provided in an embodiment of this application. The multiphase flow sharing control system 400 includes: The electrical parameter acquisition module 401 is used to acquire electrical parameter signals collected from the target component in the current cycle, wherein the electrical parameter signals include voltage signals and multi-phase current signals; Ideal average current determination module 402 is used to determine the ideal average current of each corresponding phase in the multiphase based on the voltage signal; The current sharing error determination module 403 is used to determine the current sharing error for each corresponding phase based on the current signal of each phase. The time-domain differential iteration module 404 is used to obtain the current calibration amount of each corresponding cycle through time-domain differential iteration based on each corresponding current sharing error and the current calibration amount of the previous cycle. The phase shift drive signal generation module 405 is used to determine the phase shift drive signal based on the ideal average current, the current cycle current calibration amount, and the current signal; The control module 406 is used to perform multiphase flow sharing control on the target component according to the phase shift drive signal.

[0071] In one optional implementation, the multiphase corresponds one-to-one with multiple independent slow discrete integrators, which are used to implement the time-domain difference iterative processing. The domain transfer function is obtained based on the calibration integral gain configuration; The process of obtaining the current cycle current calibration value for each corresponding cycle based on the corresponding current sharing error and the current calibration value of the previous cycle through time-domain differential iterative processing includes: For each of the multiphases, its corresponding current sharing error is input into the corresponding independent slow discrete integrator, so that the independent slow discrete integrator performs the time-domain differential iteration processing based on the corresponding current sharing error and the current calibration amount of the previous cycle using the calibration integral gain, so as to generate and output the corresponding current calibration amount of the current cycle.

[0072] In one optional implementation, the step of performing the time-domain differential iterative processing using the calibration integral gain based on the corresponding current sharing error and the previous cycle current calibration value to generate and output the corresponding current calibration value for the current cycle includes: Multiply the corresponding current sharing error by the calibration integral gain to obtain the gain error; The corresponding current calibration value for the previous cycle is added to the gain error to obtain the corresponding current calibration value for the current cycle.

[0073] In one optional implementation, determining the phase shift drive signal based on the ideal average current, the current calibration value of the current cycle, and the current signal includes: Based on the difference between the ideal average current corresponding to each phase and the current calibration value of the current cycle, the reference value of the feedforward reconfiguration current corresponding to each phase is determined. Based on the difference between the feedforward reconstructed current reference value and the current signal corresponding to each phase, the driving information corresponding to each phase is determined. The phase shift drive signal is determined based on the driving information corresponding to each of the multiple phases.

[0074] In one optional implementation, the multiphase corresponds one-to-one with multiple independent current inner loop controllers, and the drive information includes duty cycle instructions; The determination of the driving information corresponding to each phase based on the difference between the feedforward reconstructed current reference value and the current signal for each phase includes: The difference between the feedforward reconfiguration current reference value and the current signal corresponding to each phase is input into the independent current inner loop controller corresponding to each phase for calculation to obtain the duty cycle command corresponding to each phase.

[0075] In one optional implementation, determining the ideal average current for each corresponding phase in the multiphase based on the voltage signal includes: The voltage tracking error is determined based on the difference between the preset reference voltage and the voltage signal; The voltage tracking error is input to the voltage outer loop controller to obtain the total current reference value output by the voltage outer loop controller; The ideal average current is determined based on the ratio between the total current reference value and the number of phases in the multiphase system.

[0076] In one optional implementation, determining the current sharing error for each corresponding phase based on the current signal of each phase includes: The average value of the actual current is obtained by calculating the average value of the current signals of each phase. Based on the difference between the current signal of each phase and the average actual current, the current sharing error of each corresponding phase is determined.

[0077] In an optional implementation, the system further includes a limiting module, the limiting module being used for: The current cycle current calibration amount is compared with a preset threshold range, wherein the threshold range includes a preset upper limit threshold and a preset lower limit threshold for calibration amount; When the current cycle current calibration value exceeds the threshold range, the current cycle current calibration value is limited according to the threshold range. If the continuous duration of the limiting process meets the preset time condition, an early warning message is output. The early warning message is used to trigger a system hardware asymmetric degradation early warning.

[0078] Thirdly, embodiments of this application provide a non-transitory computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of the method described in any of the above-mentioned embodiments.

[0079] Fourthly, embodiments of this application provide a computer device including a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, wherein the processor executes the computer program to implement the steps of the method described in any of the preceding claims.

[0080] See Figure 5 The computer device in this embodiment includes a processor 501, a memory 502, and a computer program stored in the memory 502 and executable on the processor 501, such as a multiphase current sharing control program. When the processor 501 executes the computer program, it implements the steps in the various multiphase current sharing control method embodiments described above, for example... Figure 1 The steps S101-S106 are shown.

[0081] For example, the computer program may be divided into one or more modules / units, which are stored in the memory 502 and executed by the processor 501 to complete this application. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in the computer device.

[0082] The computer device may be a desktop computer, laptop, handheld computer, or cloud server, etc. The computer device may include, but is not limited to, a processor 501 and a memory 502. Those skilled in the art will understand that the schematic diagram is merely an example of a computer device and does not constitute a limitation on the computer device. It may include more or fewer components than shown, or combine certain components, or different components. For example, the computer device may also include input / output devices, network access devices, buses, etc.

[0083] The processor 501 can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor, or the processor 501 can be any conventional processor. The processor 501 is the control center of the computer device, connecting various parts of the entire computer device through various interfaces and lines.

[0084] The memory 502 can be used to store the computer programs and / or modules. The processor 501 implements various functions of the computer device by running or executing the computer programs and / or modules stored in the memory 502 and calling the data stored in the memory 502. The memory 502 may mainly include a program storage area and a data storage area. The program storage area may store the operating system, at least one application program required for a function (such as sound playback function, image playback function, etc.), etc.; the data storage area may store data created according to the use of the mobile phone (such as audio data, phonebook, etc.). In addition, the memory 502 may include high-speed random access memory, and may also include non-volatile memory, such as hard disk, memory, plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, at least one disk storage device, flash memory device, or other volatile solid-state storage device.

[0085] Wherein, if the modules / units integrated into the computer device are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments can also be implemented by a computer program instructing related hardware. The computer program can be stored in a non-transitory computer-readable storage medium. When the computer program is executed by the processor 501, it can implement the steps of the various method embodiments described above. Wherein, the computer program includes computer program code, which can be in the form of source code, object code, executable file, or some intermediate form, etc. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording medium, USB flash drive, portable hard drive, magnetic disk, optical disk, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signal, telecommunication signal, and software distribution medium, etc.

[0086] Fifthly, embodiments of this application provide a computer program product, including computer instructions that, when executed by a processor, implement the steps of the method described in any of the preceding claims.

[0087] In summary, the embodiments of this application have at least the following beneficial effects: Using the embodiments of this application, electrical parameter signals collected from the target component in the current cycle are acquired, wherein the electrical parameter signals include voltage signals and multi-phase current signals; based on the voltage signals, the ideal average current corresponding to each of the multi-phase currents is determined; based on the current signals of each phase, the current sharing error corresponding to each phase is determined; based on the current sharing error corresponding to each phase and the current calibration amount of the previous cycle, the current calibration amount of each phase corresponding to the current is obtained through time-domain differential iterative processing; based on the ideal average current, the current calibration amount of the current cycle, and the current signals, a phase shift drive signal is determined; and multi-phase current sharing is performed on the target component according to the phase shift drive signal. Flow control, by using the ideal average current determined by the voltage signal, avoids the problem of masking the total power variation that may be caused by relying solely on the average current, thus improving the rationality of the reference. In addition, the consequences of hardware asymmetry can be transformed into a quantifiable control error signal through the current sharing error, and time-domain differential iteration is introduced so that the calibration amount can be accumulated and adjusted when the current sharing error occurs, thereby improving the ability to eliminate DC bias error. Furthermore, by combining the current signal and the ideal average current as the reference, a phase shift drive signal adapted to the current cycle is dynamically generated, thereby precisely adjusting the output current of the target component to reduce steady-state DC bias error and improve the stability of low voltage and high current.

[0088] Through the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary hardware platforms, or it can be implemented entirely by hardware. Based on this understanding, all or part of the technical solutions of this application that contribute to the background technology can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM (Read-Only Memory) / RAM (Random Access Memory), magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in various embodiments or some parts of the embodiments of this application.

[0089] The above description is the preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications are also considered to be within the scope of protection of this application.

Claims

1. A multiphase flow sharing control method, characterized in that, include: Acquire electrical parameter signals collected from the target component in the current cycle, wherein the electrical parameter signals include voltage signals and multi-phase current signals; Based on the voltage signal, determine the ideal average current corresponding to each of the multiphases; Based on the current signals of each phase, determine the current sharing error for each corresponding phase; Based on each corresponding current sharing error and the current calibration amount of the previous cycle, the current calibration amount of the current cycle is obtained through time-domain differential iterative processing. The phase shift drive signal is determined based on the ideal average current, the current calibration value of the current cycle, and the current signal. Multiphase flow sharing control is performed on the target component based on the phase shift drive signal.

2. The method according to claim 1, characterized in that, The multiphase corresponds one-to-one with multiple independent slow discrete integrators, which are used to implement the time-domain difference iterative processing. The domain transfer function is obtained based on the calibration integral gain configuration; The process of obtaining the current cycle current calibration value for each corresponding cycle based on the corresponding current sharing error and the current calibration value of the previous cycle through time-domain differential iterative processing includes: For each of the multiphases, its corresponding current sharing error is input into the corresponding independent slow discrete integrator, so that the independent slow discrete integrator performs the time-domain differential iteration processing based on the corresponding current sharing error and the current calibration amount of the previous cycle using the calibration integral gain, so as to generate and output the corresponding current calibration amount of the current cycle.

3. The method according to claim 2, characterized in that, The step of performing time-domain differential iteration processing using the calibration integral gain based on the corresponding current sharing error and the current calibration amount of the previous cycle to generate and output the corresponding current calibration amount of the current cycle includes: Multiply the corresponding current sharing error by the calibration integral gain to obtain the gain error; The corresponding current calibration value for the previous cycle is added to the gain error to obtain the corresponding current calibration value for the current cycle.

4. The method according to any one of claims 1-3, characterized in that, The method further includes: The current cycle current calibration amount is compared with a preset threshold range, wherein the threshold range includes a preset upper limit threshold and a preset lower limit threshold for calibration amount; When the current cycle current calibration value exceeds the threshold range, the current cycle current calibration value is limited according to the threshold range. If the continuous duration of the limiting process meets the preset time condition, an early warning message is output. The early warning message is used to trigger a system hardware asymmetric degradation early warning.

5. The method according to claim 1, characterized in that, The step of determining the phase shift drive signal based on the ideal average current, the current calibration value of the current cycle, and the current signal includes: Based on the difference between the ideal average current corresponding to each phase and the current calibration value of the current cycle, the reference value of the feedforward reconfiguration current corresponding to each phase is determined. Based on the difference between the feedforward reconstructed current reference value and the current signal corresponding to each phase, the driving information corresponding to each phase is determined. The phase shift drive signal is determined based on the driving information corresponding to each of the multiple phases.

6. The method according to claim 5, characterized in that, The multiphase corresponds one-to-one with multiple independent current inner loop controllers, and the driving information includes duty cycle instructions; The determination of the driving information corresponding to each phase based on the difference between the feedforward reconstructed current reference value and the current signal for each phase includes: The difference between the feedforward reconfiguration current reference value and the current signal corresponding to each phase is input into the independent current inner loop controller corresponding to each phase for calculation to obtain the duty cycle command corresponding to each phase.

7. The method according to claim 1, characterized in that, Determining the ideal average current for each corresponding phase in the multiphase based on the voltage signal includes: The voltage tracking error is determined based on the difference between the preset reference voltage and the voltage signal; The voltage tracking error is input to the voltage outer loop controller to obtain the total current reference value output by the voltage outer loop controller; The ideal average current is determined based on the ratio between the total current reference value and the number of phases in the multiphase system.

8. The method according to claim 1, characterized in that, The determination of the current sharing error for each corresponding phase based on the current signal of each phase includes: The average value of the actual current is obtained by calculating the average value of the current signals of each phase. Based on the difference between the current signal of each phase and the average actual current, the current sharing error of each corresponding phase is determined.

9. A multiphase flow sharing control system, characterized in that, include: An electrical parameter acquisition module is used to acquire electrical parameter signals collected from the target component in the current cycle, wherein the electrical parameter signals include voltage signals and multi-phase current signals; An ideal average current determination module is used to determine the ideal average current for each corresponding phase in the multiphase based on the voltage signal. The current sharing error determination module is used to determine the current sharing error for each corresponding phase based on the current signals of each phase. The time-domain differential iteration module is used to obtain the current calibration value of each corresponding cycle through time-domain differential iteration based on the current sharing error and the current calibration value of the previous cycle. A phase shift drive signal generation module is used to determine a phase shift drive signal based on the ideal average current, the current cycle current calibration amount, and the current signal; The control module is used to perform multiphase current sharing control on the target component according to the phase shift drive signal.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method described in any one of claims 1-8.

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