Three-level inverter multi-rate control method
By combining multi-rate control methods and state feedback controllers, the stability problem of three-level inverters under downsampling conditions is solved, achieving efficient and stable operation and harmonic suppression of the system, and simplifying the control algorithm design.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SUZHOU UNIV
- Filing Date
- 2026-02-13
- Publication Date
- 2026-06-05
AI Technical Summary
Existing three-level inverters have stability issues under downsampling conditions, and traditional repetitive control methods require trial and error to select phase compensation parameters and introduce low-pass filters, which leads to weakened internal model gain and reduced harmonic suppression performance in the high-frequency band.
By employing a multi-rate control method, combining a state feedback controller and a repetitive controller, and using integer phase lead compensation and downsampling techniques, a control system for the inverter is constructed, avoiding the use of a low-pass filter and improving system stability and harmonic suppression performance.
Improve system stability and dynamic performance under downsampling conditions, reduce storage resource requirements, maintain effective suppression of harmonics, and simplify control algorithm design.
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Figure CN122159707A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of power system control technology, specifically relating to a multi-rate control method for a three-level inverter. Background Technology
[0002] Three-phase four-wire power supply systems are widely used in scenarios such as new energy grid connection, data centers, electric transportation, and unbalanced load power supply. In these applications, inverters not only need to output a stable positive-sequence voltage, but also need to effectively suppress zero-sequence components and provide a reliable path for neutral line current. Three-phase four-arm voltage source inverters are widely used because they do not require an output transformer and have independent neutral point control capabilities. To reduce output voltage harmonic content and improve system efficiency, three-level inverter topologies are gradually replacing the traditional two-level structure. Among them, the T-type three-level inverter has high efficiency while ensuring three-level output characteristics, but its arm states are complex and its control freedom is high, which places higher demands on the stability and real-time performance of the control algorithm.
[0003] Downsampling repetitive control for T-type three-level four-arm inverters was developed to address power quality and system stability issues. Existing technologies related to this include control methods using PI and PR controllers, conventional repetitive control (C-RC), and odd-order repetitive control (O-RC). Repetitive control (including C-RC and O-RC) is generally implemented directly at high sampling frequencies or by reducing storage requirements through downsampling. However, under downsampling conditions, it is usually necessary to select phase compensation parameters through trial and error and introduce a low-pass filter (LPF) into the internal model to ensure stability, resulting in weakened internal model gain and decreased harmonic suppression performance in the high-frequency range. Summary of the Invention
[0004] To address the shortcomings of existing technologies, this invention provides a multi-rate control method for a three-level inverter, which solves the stability problem of downsampling repetitive control at a high downsampling ratio.
[0005] The present invention achieves the above-mentioned technical objectives through the following technical means.
[0006] A multi-rate control method for a three-level inverter, for any control axis αβ0:
[0007] Voltage target value Compared with actual value The voltage deviation is obtained by subtraction. subscript For control axis designation;
[0008] Repeat controller with As input, the resulting output is then compared with... Adding them together gives ;
[0009] State feedback controller based on , Phase current and the control signal from the previous moment Output control signal Finally, the inverter is controlled by 3D-SVPWM.
[0010] Furthermore, the repetitive controller reduces the sampling frequency. run, To reduce the sampling ratio.
[0011] Furthermore, the transfer function of the repetitive controller is:
[0012]
[0013] In the formula, For discrete frequency domain variables, For the switching cycle, The independent variable in the complex frequency domain, For the repetitive controller gain, For stability adjustment parameters, This represents the number of sampling points corresponding to the fundamental frequency period. This is a phase lead compensation term.
[0014] Furthermore, the input terminal of the repetitive controller is equipped with an anti-aliasing filter unit. The output end is equipped with an anti-imaging filter unit. .
[0015] Furthermore, the control law of the state feedback controller is:
[0016]
[0017] in:
[0018]
[0019] In the formula, For discrete frequency domain variables, For the switching cycle, The independent variable in the complex frequency domain, Time-domain signal The frequency domain signal after time-frequency domain transformation and discretization Here are the feedback gain matrices for each axis. For the direct gain of each axis, for Discretized frequency signal, for time variables The time-domain signal, For discrete time sampling point variables, for Discretized frequency signal, , , , They are respectively , , , Follow The time-domain signal.
[0020] Furthermore, the feedback gain matrix and direct gain The calculation is as follows:
[0021]
[0022]
[0023] in:
[0024]
[0025]
[0026]
[0027]
[0028]
[0029]
[0030]
[0031]
[0032]
[0033] In the formula, It is a 3x3 identity matrix. It is a 1x2 zero matrix. For the state feedback gain vector, , , They are respectively , , Gain coefficient, For transmission delay, It is the identity matrix. For filtering capacitors, For filtering inductors, Its equivalent resistance. It is a neutral inductor. Its equivalent resistance. This is the DC bus voltage.
[0034] Furthermore, the state feedback gain vector The Ackermann method was used to determine this.
[0035] Furthermore, the current and voltage The signals are all within the switching cycle. Sampling at half the time, transmission delay .
[0036] Furthermore, 3D-SVPWM is based on control signals of three axes. , and Output switch signal , , , Control the operation of the inverter.
[0037] Furthermore, Obtained through the following:
[0038] .
[0039] The beneficial effects of this invention are as follows:
[0040] (1) This invention provides a multi-rate control method for a three-level inverter. By introducing a state feedback controller under the multi-rate control framework, the closed-loop poles of the inverter discrete model are configured, which can improve the dynamic performance and phase characteristics of the system, thereby improving the stability of the system under downsampling conditions.
[0041] (2) The present invention uses integer phase lead compensation in the downsampling repetitive controller to effectively compensate for the phase lag caused by digital control delay and downsampling, thus avoiding the design complexity caused by relying on trial and error or fractional phase compensation in traditional design.
[0042] (3) The present invention can achieve stable operation of downsampling repetitive control without the introduction of a low-pass filter, thus avoiding the weakening of high-frequency gain of the internal model of repetitive control by the low-pass filter and maintaining the suppression of harmonics.
[0043] (4) The present invention can run the repetitive controller with a higher downsampling ratio while ensuring system stability and control performance, thereby significantly reducing the storage resource requirements of repetitive control. Attached Figure Description
[0044] Figure 1 This is a structural diagram of the control system for a T-type three-level three-phase four-bridge-arm inverter according to the present invention;
[0045] Figure 2 A structural diagram of a multi-rate control system for each control axis;
[0046] Figure 3 The diagram shows the equivalent single-rate control system structure obtained for each control axis at a reduced sampling frequency.
[0047] Figure 4 This is a block diagram of a state feedback control system without introducing parallel repetitive control.
[0048] Figure 5 The voltage and current waveforms are shown in the test example under an unbalanced linear load (phase A is unloaded, while phases B and C are rated resistive loads). Detailed Implementation
[0049] Embodiments of the present invention are described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein similar or identical reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.
[0050] I. Technical Solution
[0051] 1. Control Overview
[0052] like Figure 1 As shown, for an inverter with a T-type three-level three-phase four-bridge-arm circuit structure, the multi-rate control adopted in this invention includes downsampling repetitive control (RC) and state feedback control. The state feedback controller operates at the switching frequency, and the repetitive controller operates at the downsampling frequency, thereby reducing the computational complexity of repetitive control while ensuring the dynamic performance of the system.
[0053] Figure 1 middle, This is the DC bus voltage. , , This refers to the phase voltage (i.e., the voltage of phase A, B, and C bridge arms relative to the neutral bridge arm N). , , , For each phase, the inductor current is... , , , For each phase arm load current, For filtering inductors, Its equivalent resistance. For filtering capacitors, It is a neutral inductor. Let Sa1~Sn4 be its equivalent resistance, and let Sa1~Sn4 be the switches.
[0054] Based on sampling frequency Phase voltage , , and phase current , , The analog signal is converted to a digital signal via analog-to-digital conversion (ADC); then, a coordinate transformation is performed, changing the coordinate system from abc to αβ0, resulting in the corresponding digital signal. , , and , , .
[0055] For any axis αβ0:
[0056] 1) Target voltage value Compared with actual value By subtracting, the voltage deviation is obtained. , Values , , ;
[0057] 2) Repetitive controller (RC) to reduce sampling frequency run, To reduce the sampling ratio, voltage deviation Add the result to the output of the repetitive controller to obtain ;
[0058] 3) The state feedback controller is based on , , and the control signal from the previous moment Output duty cycle Duty cycle On one hand, it serves as a control signal input to 3D-SVPWM (three-dimensional space vector pulse width modulation), and on the other hand, it serves as the input to the state feedback controller for the next moment (i.e. );
[0059] Finally, 3D-SVPWM is based on control signals of three axes. , and Output switch signal , , , Control the operation of the inverter.
[0060] 2. Repetitive controller
[0061] like Figure 2 and Figure 3 As shown, a periodic control structure is constructed based on the internal model principle, using the error signal between the output voltage and the reference voltage as input. This control structure includes a discrete delay element corresponding to the system's fundamental period. This is used to store and feed back the error signal from the previous cycle, thereby introducing high gain at the fundamental frequency and its integer harmonics to suppress periodic disturbances and steady-state errors. Simultaneously, to compensate for the phase lag introduced by downsampling and digital control, the repetitive controller introduces an integer-order phase lead compensation stage. This ensures that the system has sufficient phase margin within the operating frequency band of the repetitive controller.
[0062] To reduce the storage requirements and computational complexity of the repetitive controller under high sampling frequencies, the repetitive controller operates in a downsampling mode by setting a downsampling ratio. This allows the controller to update internal delay data only during certain control cycles, significantly reducing the number of storage units while maintaining harmonic suppression capabilities.
[0063] The transfer function of the repetitive controller is designed as follows:
[0064]
[0065] In the formula, , The independent variable in the complex frequency domain, For the switching cycle, For the repetitive controller gain, For stability adjustment parameters, This represents the number of sampling points corresponding to the fundamental frequency period. This is a phase lead compensation term.
[0066] Since the repetitive controller operates in downsampling mode, an anti-aliasing filter unit is installed at the input of the repetitive controller to ensure signal consistency in the multi-rate control system. An anti-imaging filter unit is set at the output end. These filters are used to suppress spectral distortion introduced during downsampling and upsampling. These two filter units ensure effective signal transmission between different sampling frequencies and do not constitute part of the repetitive controller's internal model.
[0067] In summary, voltage deviation Obtained through the above-mentioned repetition control The expression can be written as:
[0068]
[0069] 3. State Feedback Controller
[0070] Using state feedback gain vector Calculate the feedback gain matrix By combining a discrete-time state-space model, the closed-loop poles are placed at desired locations, thereby adjusting the system's dynamic performance and phase characteristics, and the state feedback gain vector... The Ackermann method can be used to determine this.
[0071] The discrete-time state-space model of each control axis is derived in detail below:
[0072] 3.1 In the αβ0 reference frame, each axis of the inverter has the following properties in the continuous time domain:
[0073]
[0074]
[0075] In the formula, For time variables, , , , express , , , Variables over time (i.e., each in its own time) (Value at time) For the reason , , Transformed to the αβ0 reference frame, the load current values of each axis are indicated by the subscript. Used to represent the corresponding coordinate axis.
[0076] The average state-space model is then:
[0077]
[0078] in:
[0079] State vector:
[0080]
[0081] The remaining matrix parameters are defined as follows:
[0082]
[0083]
[0084]
[0085] 3.2, The digital controller introduces a transmission delay into the system, defined as... To avoid sampling during power switch commutation, the current... and voltage The signals are all within the switching cycle. Sampling is performed at half the time interval, thus obtaining the transmission delay. By solving the above average state-space model within one sampling period, the discrete-time state-space model of the inverter can be obtained.
[0086] In this invention, the repetitive controller uses a sampling ratio of The sampling frequency is reduced, and its sampling period is... The corresponding transmission delay is Therefore, the discrete-time state-space model can be obtained as follows:
[0087]
[0088] in:
[0089]
[0090]
[0091]
[0092]
[0093] In the formula, For discrete time sampling point variables, It is a natural constant. It is an identity matrix.
[0094] 3.3 The above discrete-time state-space model also depends on the duty cycle at the current sampling time. and the duty cycle of the previous sampling time. Therefore, the definition is as follows: Then the discrete-time state-space model of each axis can be rewritten as:
[0095]
[0096] in:
[0097] For the new state vector:
[0098]
[0099] The remaining matrix parameters are defined as follows:
[0100]
[0101]
[0102]
[0103]
[0104] In the formula, This represents a zero matrix with 1 row and 2 columns.
[0105] 3.4 Based on the above discrete-time state-space model, a control input model can be established for each axis. To output voltage Discrete transfer function model:
[0106]
[0107] In the formula, The discrete frequency domain variables are those obtained after Z-transformation (used to convert time-domain signals into discrete frequency-domain signals). , The independent variable in the complex frequency domain, It is a 3x3 identity matrix; and Time domain signals and The frequency domain signal after time-frequency domain conversion and discretization.
[0108] 3.5, such as Figure 4 As shown, based on the discrete transfer function model described above, the control law of the state feedback controller is designed as follows:
[0109]
[0110] in:
[0111]
[0112]
[0113] In the formula, for Discretized frequency signal, for time variables The time-domain signal, for Discretized frequency signal; Here are the feedback gain matrices for each axis. For each axis, the direct gain is used; both utilize the state feedback gain vector. Calculated , , In the state vector , , Gain coefficient.
[0114] Substituting the above state feedback control law into the discrete transfer function model, we obtain... arrive The equivalent closed-loop transfer function:
[0115]
[0116] Based on the principles of automatic control, using the equivalent closed-loop model transfer function described above, the closed-loop transfer function of the control system when the repetitive controller is neglected can be obtained as follows:
[0117]
[0118] Therefore, the closed-loop design of integer phase lead compensation parameters is performed. ,satisfy:
[0119]
[0120] in for The phase can be determined once the specific form of the filter is determined. for The phase can be determined by the state feedback controller. The phase for integer phase lead compensation. , , To reduce the sampling repetition control frequency.
[0121] This verifies that the state feedback controller (and its control law) introduced in this invention, through the coordinated design of state feedback pole shaping and phase lead compensation, can determine integer-order phase lead compensation parameters and achieve stable operation of the downsampling repetitive control system without introducing a low-pass filter and using integer-order phase lead compensation. Specifically:
[0122] In the downsampling repetitive control structure, the phase lead compensation term Used to compensate for phase lag caused by downsampling and transmission delay in the system, it can be applied at the downsampling Nyquist frequency. Provided by The phase is ahead. Theoretical analysis shows that, At this point, the phase lag introduced by the delay cancels out the downsampling ratio m, thus the phase lead order is [not specified]. The selection of does not change with m. In the control system of this invention, effective compensation of the total phase can be achieved by selecting a fixed integer phase lead order. Therefore, through the coordinated design of state feedback pole shaping and phase lead compensation, stable operation of the downsampling repetitive control system can be achieved without introducing fractional phase compensation.
[0123] In voltage source inverter applications, the current harmonics that primarily affect the total harmonic distortion (THD) of the output voltage are typically low-order odd-order components, with frequencies generally not exceeding the 13th harmonic. Under the state feedback and integer phase lead compensation structure proposed in this invention, the system maintains good stability even under downsampling conditions, thus effectively suppressing the main harmonic components without the need for a low-pass filter.
[0124] Therefore, this invention ensures system stability while avoiding the adverse effects of low-pass filters on harmonic suppression performance.
[0125] II. Testing and Verification
[0126] Experimental verification was conducted on a T-type three-level three-phase four-arm inverter platform, and the corresponding voltage and current waveforms obtained from the tests are as follows: Figure 5 As shown in the figure, the upper figure represents the phase voltage, and the lower figure represents the output current. The results show that the phase voltage remains nearly balanced and exhibits a sinusoidal waveform. Experimental results demonstrate that under the proposed multi-rate control structure, the state feedback controller and the downsampling repetitive controller can work stably together, and the system maintains good stability and dynamic performance even under high downsampling ratios.
[0127] This invention is not limited to the above-described embodiments. Any obvious improvements, substitutions, or modifications that can be made by those skilled in the art without departing from the essence of this invention are within the scope of protection of this invention.
Claims
1. A multi-rate control method for a three-level inverter, characterized in that: For any control axis αβ0: Voltage target value Compared with actual value The voltage deviation is obtained by subtraction. subscript For control axis designation; Repeat controller with As input, the resulting output is then compared with... Adding them together gives ; State feedback controller based on , Phase current and the control signal from the previous moment Output control signal Finally, the inverter is controlled by 3D-SVPWM.
2. The multi-rate control method for a three-level inverter according to claim 1, characterized in that: The repetitive controller reduces the sampling frequency. run, To reduce the sampling ratio.
3. The multi-rate control method for a three-level inverter according to claim 2, characterized in that: The transfer function of the repetitive controller is: In the formula, For discrete frequency domain variables, For the switching cycle, The independent variable in the complex frequency domain, For the repetitive controller gain, For stability adjustment parameters, This represents the number of sampling points corresponding to the fundamental frequency period. This is a phase lead compensation term.
4. The multi-rate control method for a three-level inverter according to claim 3, characterized in that: The input terminal of the repeater controller is equipped with an anti-aliasing filter unit. The output end is equipped with an anti-imaging filter unit. .
5. The multi-rate control method for a three-level inverter according to claim 2, characterized in that: The control law of the state feedback controller is: in: In the formula, For discrete frequency domain variables, For the switching cycle, The independent variable in the complex frequency domain, Time-domain signal The frequency domain signal after time-frequency domain transformation and discretization Here are the feedback gain matrices for each axis. For the direct gain of each axis, for Discretized frequency signal, for time variables The time-domain signal, For discrete time sampling point variables, for Discretized frequency signal, , , , They are respectively , , , Follow The time-domain signal.
6. The multi-rate control method for a three-level inverter according to claim 5, characterized in that: The feedback gain matrix and direct gain The calculation is as follows: in: In the formula, It is a 3x3 identity matrix. It is a 1x2 zero matrix. For the state feedback gain vector, , , They are respectively , , Gain coefficient, For transmission delay, It is the identity matrix. For filtering capacitors, For filtering inductors, Its equivalent resistance. It is a neutral inductor. Its equivalent resistance. This is the DC bus voltage.
7. The multi-rate control method for a three-level inverter according to claim 6, characterized in that: The state feedback gain vector The Ackermann method was used to determine this.
8. The multi-rate control method for a three-level inverter according to claim 6, characterized in that: Current and voltage The signals are all within the switching cycle. Sampling at half the time, transmission delay .
9. The multi-rate control method for a three-level inverter according to claim 1, characterized in that: 3D-SVPWM is based on control signals of three axes. , and Output switch signal , , , Control the operation of the inverter.
10. The multi-rate control method for a three-level inverter according to claim 4, characterized in that: Obtained through the following: 。