A method for optimizing diffusion gettering of N-type single crystal silicon wafer
By pre-treating N-type monocrystalline silicon wafers, forming a getter layer, and performing diffusion annealing, the problem of impurities not being effectively removed in existing technologies is solved, significantly improving silicon wafer quality and device performance, and reducing the defect rate.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 华能(嘉峪关)新能源有限公司
- Filing Date
- 2024-11-30
- Publication Date
- 2026-06-05
AI Technical Summary
In existing technologies, impurities in N-type monocrystalline silicon wafers cannot be effectively removed, especially since high-temperature processes are difficult to control, leading to decreased electrical performance and poor device efficiency. Furthermore, high-temperature deposition and diffusion inhomogeneity affect device performance.
By pre-treating N-type monocrystalline silicon wafers to remove surface contaminants and micro-defects, forming a getter layer, and then performing diffusion annealing, the getter layer material is finally removed by wet or dry etching, thus optimizing the diffusion getter process of the silicon wafer.
It effectively removes heavy metal impurities and defects from silicon wafers, improves wafer quality and device performance, reduces the defect rate, and ensures the stability and controllability of the production process.
Smart Images
Figure CN122161424A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor material manufacturing technology, specifically to an optimization method for diffusion gettering of N-type single-crystal silicon wafers. Background Technology
[0002] In the current semiconductor industry, gettering technology for N-type single-crystal silicon wafers is crucial for improving wafer quality and device efficiency. Traditionally, high-temperature annealing is widely used to remove or fix metallic impurities (such as Fe, Cu, Co, etc.) in silicon wafers. However, the deep recombination centers formed by these impurities in the silicon wafer can severely affect the electrical properties of the wafer and the conversion efficiency of the device. Although methods such as phosphorus (P) gettering and aluminum (Al) gettering have been tried, their application on N-type single-crystal silicon wafers has not been ideal, especially in improving wafer quality and reducing defects.
[0003] In particular, impurity atoms such as boron (B) have low solid solubility in N-type single-crystal silicon and require high temperatures for effective diffusion, which greatly increases the difficulty of process control. Furthermore, the uniformity of diffusion sheet resistance is difficult to guarantee during high-temperature deposition and diffusion, leading to pn junction inhomogeneity and further affecting device performance. Simultaneously, the high-temperature process is not only energy-intensive but also prone to reactions with equipment (such as the formation of borosilicate glass), increasing maintenance costs and boron source consumption. Summary of the Invention
[0004] In order to overcome the defects of the prior art, the purpose of this invention is to provide an optimized diffusion gettering method for N-type single-crystal silicon wafers, so as to solve the technical problem that impurities in silicon wafers cannot be effectively removed in the prior art.
[0005] This invention is achieved through the following technical solution: In a first aspect, the present invention provides a diffusion getter optimization method for N-type single-crystal silicon wafers, comprising: Pretreatment is performed on N-type monocrystalline silicon wafers to remove surface contaminants and minute defects; A getter layer is formed on at least one surface of the pretreated N-type single-crystal silicon wafer; The N-type monocrystalline silicon wafer with a getter layer is subjected to diffusion annealing, and the getter layer material on the N-type monocrystalline silicon wafer after diffusion annealing is removed, thus completing the diffusion getter optimization work of the N-type monocrystalline silicon wafer.
[0006] Preferably, in the step of pre-treating the N-type monocrystalline silicon wafer to remove surface contaminants and minor defects, the pre-treating step includes cleaning the N-type monocrystalline silicon wafer with deionized water, organic solvents and / or chemical reagents, and removing minor defects and damage layers on the surface of the silicon wafer by mechanical polishing or chemical mechanical polishing.
[0007] Preferably, in the step of forming a getter layer on at least one surface of the pretreated N-type single-crystal silicon wafer, the getter layer contains at least one element selected from phosphorus, aluminum, and boron, and the getter layer is formed by one or more of chemical vapor deposition, thermal evaporation, or ion implantation.
[0008] Furthermore, during the chemical vapor deposition process, by controlling the gas flow rate of the source material, the deposition temperature, and the deposition time, a getter layer is obtained on the surface of the N-type single-crystal silicon wafer. The specific process is as follows: An N-type single-crystal silicon wafer is placed in a chemical vapor deposition reaction chamber. A mixed gas containing the source material is introduced into the chemical vapor deposition reaction chamber through an air intake system and mixed with the gas in the chemical vapor deposition reaction chamber. Based on the settings of the gas flow rate of the source material, the deposition temperature, and the deposition time, a getter layer is obtained on the surface of an N-type single-crystal silicon wafer by a mixed gas containing the source material.
[0009] Furthermore, after the N-type monocrystalline silicon wafer is deposited in the chemical vapor deposition reaction chamber, the air intake system is shut off, and the chemical vapor deposition reaction chamber is cooled to room temperature before the N-type monocrystalline silicon wafer is removed.
[0010] Preferably, in the step of diffusion annealing the N-type single-crystal silicon wafer with the getter layer already formed, the temperature change rate of the annealing process is not less than 30°C / min.
[0011] Preferably, in the step of removing the getter layer material on the N-type single-crystal silicon wafer after diffusion annealing, the step of removing the getter layer material adopts wet etching or dry etching.
[0012] Furthermore, the specific process of wet etching is as follows: The N-type single crystal silicon wafer is cleaned and then immersed in a mixed solution of hydrofluoric acid and nitric acid. The solution is stirred to allow the getter layer material to fully react with the etching solution and be dissolved. After etching is complete, the N-type single crystal silicon wafer is removed from the mixed solution, cleaned with a cleaning agent to remove residual etching solution and reaction products, and then the surface of the N-type single crystal silicon wafer is dried with nitrogen or compressed air.
[0013] Furthermore, the specific process of dry etching is as follows: An N-type single-crystal silicon wafer is placed in a reactive ion etching apparatus and filled with etching gas. The etching apparatus is then started, and the etching gas generates plasma under the action of a radio frequency electric field. This plasma physically and chemically etches the getter layer material on the surface of the silicon wafer. After etching is complete, the N-type single-crystal silicon wafer is removed from the reactive ion etching apparatus and cleaned.
[0014] Secondly, the present invention also provides an N-type single-crystal silicon wafer, which is prepared by the above-described N-type single-crystal silicon wafer diffusion gettering optimization method.
[0015] Compared with the prior art, the present invention has the following beneficial technical effects: This invention provides a method for optimizing the diffusion gettering of N-type monocrystalline silicon wafers. The method involves pre-treating the N-type monocrystalline silicon wafer to remove surface contaminants and micro-defects; forming a getter layer on at least one surface of the pre-treated N-type monocrystalline silicon wafer; performing diffusion annealing on the N-type monocrystalline silicon wafer with the formed getter layer; and removing the getter layer material from the N-type monocrystalline silicon wafer after diffusion annealing, thus completing the diffusion gettering optimization of the N-type monocrystalline silicon wafer. The getter layer formed on the silicon wafer surface in this invention can effectively capture and fix heavy metal impurities and defects, such as oxygen deposits and metal deposits, that may be generated inside the silicon wafer during subsequent processes, preventing these impurities and defects from adversely affecting the silicon wafer performance. The diffusion annealing process further promotes the diffusion of impurities and the gettering capacity of the getter layer, ensuring effective impurity removal.
[0016] Furthermore, the pretreatment step effectively removes contaminants and micro-defects from the surface of N-type monocrystalline silicon wafers, providing a cleaner and smoother substrate for subsequent processes. This reduces performance degradation caused by surface contamination and defects, significantly improving the quality of the silicon wafers.
[0017] Furthermore, the N-type single-crystal silicon wafers that have undergone diffusion getter optimization treatment have significantly reduced internal impurity content and a more perfect crystal structure, thereby improving the performance of electronic devices based on the silicon wafers, including higher conversion efficiency, lower leakage current, and longer lifespan.
[0018] Furthermore, this method ensures that each silicon wafer achieves consistent optimization results through standardized pretreatment, getter layer formation, and diffusion annealing processes, thereby improving the stability and controllability of the production process and reducing the defect rate caused by process fluctuations. Attached Figure Description
[0019] Figure 1 This is a schematic diagram of the diffusion gettering optimization process for N-type single-crystal silicon wafers in an embodiment of the present invention; Detailed Implementation To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0020] The present invention will now be described in further detail with reference to the accompanying drawings: The purpose of this invention is to provide an optimized diffusion gettering method for N-type single-crystal silicon wafers to solve the technical problem that impurities in silicon wafers cannot be effectively removed in the prior art.
[0021] Example 1 See Figure 1 In one embodiment of the present invention, a diffusion getter optimization method for N-type single-crystal silicon wafers is provided, comprising: Step 1: Pre-treat the N-type monocrystalline silicon wafer to remove surface contaminants and minor defects; Specifically, the pretreatment steps include cleaning the N-type single-crystal silicon wafer with deionized water, organic solvents and / or chemical reagents, and removing minute defects and damage layers on the silicon wafer surface by mechanical polishing or chemical mechanical polishing.
[0022] In this embodiment, deionized water cleaning is performed: First, deionized water is used to preliminarily clean the N-type monocrystalline silicon wafer to remove most of the soluble impurities and ions from the surface. Due to its high purity and low ion content, deionized water can effectively reduce ion contamination on the silicon wafer surface.
[0023] Organic solvent cleaning: Subsequently, further cleaning is performed using organic solvents such as methanol, ethanol, and isopropanol. These organic solvents can dissolve and remove substances that are difficult to remove with deionized water, such as grease and organic contaminants, adsorbed on the silicon wafer surface. Through the dissolving effect of organic solvents, the organic content on the silicon wafer surface can be significantly reduced.
[0024] Chemical cleaning: In some cases, specific chemical reagents, such as oxidants and complexing agents, may be required for cleaning. These chemical reagents can react with specific contaminants on the silicon wafer surface to generate soluble products, which are then removed.
[0025] Mechanical polishing: Mechanical polishing uses the friction between abrasive particles and a polishing pad to remove minute defects and damaged layers from the surface of silicon wafers. Mechanical polishing significantly improves the flatness and smoothness of the silicon wafer surface, providing a good foundation for subsequent processing steps.
[0026] Chemical mechanical polishing (CMP) is a technique that combines mechanical polishing with chemical etching. During the polishing process, the chemical components in the abrasive and polishing slurry work together on the silicon wafer surface, removing impurities and damaged layers through a combination of chemical reaction and mechanical friction. CMP not only achieves higher surface smoothness but also effectively reduces surface roughness and defects such as microcracks.
[0027] The working principle in this step is as follows: Physical effects: The frictional action in mechanical polishing and chemical mechanical polishing can directly remove impurities and damaged layers from the silicon wafer surface, improving surface smoothness. Simultaneously, the rinsing action of deionized water and organic solvents can also effectively remove soluble impurities and organic matter from the surface.
[0028] Chemical reaction: In chemical cleaning and chemical mechanical polishing, specific chemical reagents can react with contaminants on the silicon wafer surface to generate soluble products, which are then removed. This chemical reaction can penetrate deep into the silicon wafer surface to remove contaminants that are difficult to remove by physical methods.
[0029] Combined effect: Through the combined application of physical and chemical processes, the pretreatment step can completely remove contaminants and micro-defects from the surface of N-type monocrystalline silicon wafers, providing a clean and flat silicon wafer surface for subsequent process steps.
[0030] Step 2: Form a getter layer on at least one surface of the pretreated N-type single crystal silicon wafer; Specifically, the getter layer contains at least one element selected from phosphorus, aluminum, and boron, and the getter layer is formed by one or more of chemical vapor deposition, thermal evaporation, or ion implantation.
[0031] In the chemical vapor deposition process, by controlling the gas flow rate of the source material, the deposition temperature, and the deposition time, a getter layer is obtained on the surface of the N-type single-crystal silicon wafer. The specific process is as follows: An N-type single-crystal silicon wafer is placed in a chemical vapor deposition reaction chamber. A mixed gas containing the source material is introduced into the chemical vapor deposition reaction chamber through an air intake system and mixed with the gas in the chemical vapor deposition reaction chamber. Based on the settings of the gas flow rate of the source material, the deposition temperature, and the deposition time, a getter layer is obtained on the surface of an N-type single-crystal silicon wafer by a mixed gas containing the source material.
[0032] After the N-type monocrystalline silicon wafer is deposited in the chemical vapor deposition reaction chamber, the air intake system is turned off, and the chemical vapor deposition reaction chamber is cooled to room temperature before the N-type monocrystalline silicon wafer is removed.
[0033] The working principle of chemical vapor deposition (CVD) to form the getter layer in this embodiment is as follows: Reaction chamber preparation: The pretreated N-type single-crystal silicon wafer is placed in the chemical vapor deposition reaction chamber. This reaction chamber is a sealed environment used to control the temperature, pressure, and gas flow during the deposition process.
[0034] Gas introduction and mixing: A mixed gas containing the source material (such as phosphine PH3, boron trichloride BCl3, aluminum alkane AlH3, etc., depending on the required getter layer elements) is introduced into the chemical vapor deposition reaction chamber through the gas intake system. These gases mix in the reaction chamber to form a homogeneous mixed gas environment, preparing for the subsequent deposition reaction.
[0035] Deposition process: Based on the preset source material gas flow rate, deposition temperature and deposition time, the mixed gas undergoes chemical reaction or thermal decomposition on the surface of the N-type single crystal silicon wafer.
[0036] At high temperatures, the source material gas molecules are activated and interact with the silicon wafer surface to form compounds or elements of the desired getter layer elements (such as phosphorus, aluminum, and boron), which are then deposited on the silicon wafer surface.
[0037] The deposition rate and parameters such as the thickness and composition of the getter layer are strictly controlled by the gas flow rate, deposition temperature and deposition time.
[0038] Reaction chamber cooling and slide removal: After deposition is completed, shut off the gas inlet system and stop the gas supply.
[0039] Wait for the chemical vapor deposition reaction chamber to cool naturally to room temperature or use other cooling methods to lower the temperature.
[0040] After cooling, the reaction chamber is opened, and the N-type single-crystal silicon wafer with a getter layer deposited on its surface is removed.
[0041] In this step, the airflow rate is controlled to ensure the formation of a uniform getter layer of suitable thickness on the silicon wafer surface. An airflow rate that is too fast or too slow may result in an uneven getter layer or an unsuitable thickness.
[0042] Deposition temperature: A suitable deposition temperature is set based on the characteristics of the source material and the desired properties of the getter layer. High temperatures help activate gas molecules and promote chemical reactions, but excessively high temperatures may damage the silicon wafer surface or degrade the quality of the getter layer.
[0043] Deposition time: Set an appropriate deposition time based on the desired getter layer thickness and deposition rate. A deposition time that is too long or too short will affect the thickness and uniformity of the getter layer.
[0044] Step 3: Perform diffusion annealing on the N-type monocrystalline silicon wafer with the getter layer already formed, and remove the getter layer material on the N-type monocrystalline silicon wafer after diffusion annealing to complete the diffusion getter optimization work of the N-type monocrystalline silicon wafer.
[0045] Specifically, in the diffusion annealing process for N-type single-crystal silicon wafers with a getter layer already formed, the temperature change rate during the annealing process is not less than 30℃ / min.
[0046] In the step of removing the getter layer material on the N-type single crystal silicon wafer after diffusion annealing, the step of removing the getter layer material adopts either wet etching or dry etching.
[0047] Specifically, the wet etching process is as follows: The N-type single crystal silicon wafer is cleaned and then immersed in a mixed solution of hydrofluoric acid and nitric acid. The solution is stirred to allow the getter layer material to fully react with the etching solution and be dissolved. After etching is complete, the N-type single crystal silicon wafer is removed from the mixed solution, cleaned with a cleaning agent to remove residual etching solution and reaction products, and then the surface of the N-type single crystal silicon wafer is dried with nitrogen or compressed air.
[0048] Specifically, the dry etching process is as follows: An N-type single-crystal silicon wafer is placed in a reactive ion etching apparatus and filled with etching gas. The etching apparatus is then started, and the etching gas generates plasma under the action of a radio frequency electric field. This plasma physically and chemically etches the getter layer material on the surface of the silicon wafer. After etching is complete, the N-type single-crystal silicon wafer is removed from the reactive ion etching apparatus and cleaned.
[0049] In this embodiment, during the diffusion annealing process, the silicon wafer is placed in a high-temperature environment, causing impurity elements (such as phosphorus, aluminum, boron, etc.) in the getter layer to diffuse within the silicon wafer. The high temperature promotes the thermal motion of impurity atoms, enabling them to penetrate the silicon wafer surface, enter the wafer's interior, and interact with other atoms within the wafer. By controlling the annealing temperature and time, the diffusion depth and concentration distribution of impurities within the silicon wafer can be precisely controlled, thereby optimizing the silicon wafer's performance.
[0050] Annealing not only promotes impurity diffusion but also helps eliminate stress and lattice distortion generated during earlier processing steps in the silicon wafer. High-temperature atomic rearrangement and lattice repair reduce internal defects and impurities in the silicon wafer, improving its crystal quality and electrical properties. Simultaneously, annealing also improves the surface morphology of the silicon wafer, reducing surface roughness and microcracks.
[0051] In this embodiment, the getter layer material removal process typically employs chemical etching, physical exfoliation, or a combination of both. Chemical etching utilizes specific chemical reagents to react with the getter layer material, generating soluble products that are then removed from the silicon wafer surface. Physical exfoliation uses mechanical force or ultrasonic waves to peel the getter layer material from the silicon wafer surface. Selecting the appropriate removal method based on the properties of the getter layer material and the requirements of the silicon wafer surface is crucial.
[0052] Example 2 This embodiment provides an N-type monocrystalline silicon wafer, which is prepared by the above-described N-type monocrystalline silicon wafer diffusion getter optimization method.
[0053] In summary, this invention provides a method for optimizing the diffusion gettering of N-type monocrystalline silicon wafers. The method involves pre-treating the N-type monocrystalline silicon wafer to remove surface contaminants and micro-defects; forming a gettering layer on at least one surface of the pre-treated N-type monocrystalline silicon wafer; performing diffusion annealing on the N-type monocrystalline silicon wafer with the formed gettering layer; and removing the gettering layer material from the N-type monocrystalline silicon wafer after diffusion annealing, thus completing the diffusion gettering optimization of the N-type monocrystalline silicon wafer. The gettering layer formed on the silicon wafer surface in this invention can effectively capture and fix heavy metal impurities and defects, such as oxygen deposits and metal deposits, that may be generated inside the silicon wafer during subsequent processes, preventing these impurities and defects from adversely affecting the silicon wafer performance. The diffusion annealing process further promotes the diffusion of impurities and the gettering capacity of the gettering layer, ensuring effective impurity removal.
[0054] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.
Claims
1. A method for optimizing diffusion gettering in N-type single-crystal silicon wafers, characterized in that, include: Pretreatment is performed on N-type monocrystalline silicon wafers to remove surface contaminants and minute defects; A getter layer is formed on at least one surface of the pretreated N-type single-crystal silicon wafer; The N-type monocrystalline silicon wafer with a getter layer is subjected to diffusion annealing, and the getter layer material on the N-type monocrystalline silicon wafer after diffusion annealing is removed, thus completing the diffusion getter optimization work of the N-type monocrystalline silicon wafer.
2. The diffusion getter optimization method for N-type single-crystal silicon wafers according to claim 1, characterized in that, The step of pre-treating the N-type monocrystalline silicon wafer to remove surface contaminants and minor defects includes cleaning the N-type monocrystalline silicon wafer with deionized water, organic solvents and / or chemical reagents, and removing minor defects and damage layers on the surface of the silicon wafer by mechanical polishing or chemical mechanical polishing.
3. The diffusion getter optimization method for N-type single-crystal silicon wafers according to claim 1, characterized in that, In the step of forming a getter layer on at least one surface of the pretreated N-type single crystal silicon wafer, the getter layer contains at least one element selected from phosphorus, aluminum, and boron, and the getter layer is formed by one or more of chemical vapor deposition, thermal evaporation, or ion implantation.
4. The diffusion getter optimization method for N-type single-crystal silicon wafers according to claim 3, characterized in that, In the chemical vapor deposition process, by controlling the gas flow rate of the source material, the deposition temperature, and the deposition time, a getter layer is obtained on the surface of the N-type single-crystal silicon wafer. The specific process is as follows: An N-type single-crystal silicon wafer is placed in a chemical vapor deposition reaction chamber. A mixed gas containing the source material is introduced into the chemical vapor deposition reaction chamber through an air intake system and mixed with the gas in the chemical vapor deposition reaction chamber. Based on the settings of the gas flow rate of the source material, the deposition temperature, and the deposition time, a getter layer is obtained on the surface of an N-type single-crystal silicon wafer by a mixed gas containing the source material.
5. The diffusion getter optimization method for N-type single-crystal silicon wafers according to claim 4, characterized in that, After the N-type monocrystalline silicon wafer is deposited in the chemical vapor deposition reaction chamber, the air intake system is turned off, and the chemical vapor deposition reaction chamber is cooled to room temperature before the N-type monocrystalline silicon wafer is removed.
6. The diffusion getter optimization method for N-type single-crystal silicon wafers according to claim 1, characterized in that, In the step of performing diffusion annealing on the N-type single crystal silicon wafer with a getter layer already formed, the temperature change rate during the annealing process is not less than 30℃ / min.
7. The diffusion getter optimization method for N-type single-crystal silicon wafers according to claim 1, characterized in that, In the step of removing the getter layer material on the N-type single crystal silicon wafer after diffusion annealing, the step of removing the getter layer material adopts wet etching or dry etching.
8. The diffusion getter optimization method for N-type single-crystal silicon wafers according to claim 7, characterized in that, The specific process of the wet etching is as follows: The N-type single crystal silicon wafer is cleaned and then immersed in a mixed solution of hydrofluoric acid and nitric acid. The solution is stirred to allow the getter layer material to fully react with the etching solution and be dissolved. After etching is complete, the N-type single crystal silicon wafer is removed from the mixed solution, cleaned with a cleaning agent to remove residual etching solution and reaction products, and then the surface of the N-type single crystal silicon wafer is dried with nitrogen or compressed air.
9. The diffusion getter optimization method for N-type single-crystal silicon wafers according to claim 7, characterized in that, The specific process of the dry etching is as follows: An N-type single-crystal silicon wafer is placed in a reactive ion etching apparatus and filled with etching gas. The etching apparatus is then started, and the etching gas generates plasma under the action of a radio frequency electric field. This plasma physically and chemically etches the getter layer material on the surface of the silicon wafer. After etching is complete, the N-type single-crystal silicon wafer is removed from the reactive ion etching apparatus and cleaned.
10. An N-type single-crystal silicon wafer, characterized in that, The N-type monocrystalline silicon wafer is prepared by the N-type monocrystalline silicon wafer diffusion gettering optimization method according to any one of claims 1 to 9.