TGV interconnection structure with double-sided stress buffer structure and manufacturing method thereof

Abstract

The application discloses a TGV interconnection structure with a double-face stress buffering structure and a manufacturing method thereof. The TGV interconnection structure comprises a glass substrate, a conductive interconnection column and a dielectric layer. The glass substrate comprises a first surface and a second surface arranged oppositely and a glass via hole penetrating through the glass substrate in a thickness direction. The conductive interconnection column is arranged in the glass via hole, and the height of the end surface of the conductive interconnection column is lower than the corresponding surface of the glass substrate, so that a recess space is formed at the two end openings of the glass via hole. The dielectric layer is arranged on the first surface and the second surface and fills the recess spaces at the two ends of the glass via hole. The dielectric layer is provided with an opening at the positions corresponding to the two ends of the conductive interconnection column, and the aperture of the opening is smaller than the aperture of the glass via hole. The redistribution layer is arranged on the dielectric layer of the first surface and the second surface, and the redistribution layer extends into the opening and is connected with the end surface of the conductive interconnection column. The overall stress of the TGV hole on the glass is effectively reduced, and the reliability of the interconnection structure is improved.

Description

Technical Field

[0001] This invention belongs to the technical field of panel-level packaging, specifically relating to a TGV interconnect structure with a double-sided stress buffer structure and its fabrication method. Background Technology

[0002] As semiconductor packaging technology advances towards 3D integration and high-frequency / high-speed operation, through-glass via (TGV) technology has become a core interconnect solution for advanced packaging interposers. However, thermomechanical reliability remains a critical challenge in the practical application of TGV interconnect structures. Thermal mismatch between the metal material and the glass substrate causes severe stress concentration at the opening edges of the TGV structure after high-temperature processing, leading to glass cracking and subsequent large-area elongation cracking, significantly impacting product yield.

[0003] Especially for through-hole TGV structures, the interface between the conductive interconnect pillars and the glass substrate at the aperture edge is the area of ​​highest stress concentration. When the temperature rises, the metal pillars exert enormous stress on the glass aperture edge. Due to the inherent brittleness of glass, such repeated thermal shocks can easily lead to radial cracks at the glass aperture or delamination between the metal layer and the glass interface. Once the cracks propagate into the glass substrate, they will directly compromise the hermeticity of the package and may even cause circuit failure.

[0004] Currently, to address this issue, the industry typically uses spraying equipment to coat the entire inner wall of the TGV through-hole with a low-modulus material as a buffer layer. However, this existing approach has significant drawbacks in actual production: firstly, the process relies on expensive specialized spraying equipment, and the window verification of the spraying process is extremely complex, resulting in high manufacturing costs; secondly, research and practice show that stress failure in TGV mainly concentrates in the edge areas of the upper and lower orifices, while existing spraying processes cannot achieve precise local protection and can only perform full-coverage spraying of the entire inner wall of the through-hole. This indiscriminate full-hole coverage not only results in a significant waste of expensive polymer materials but also increases process time.

[0005] Therefore, how to design a new interconnection structure to effectively isolate the rigid contact between metal and glass and alleviate stress concentration at the orifice is a technical problem that urgently needs to be solved in the field of TGV technology. Summary of the Invention

[0006] To address the aforementioned problems in the prior art, this application provides a TGV interconnect structure with a double-sided stress buffer structure and a method for fabricating the same, thereby overcoming the shortcomings of the prior art.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: According to the first aspect of this application, a method for fabricating a TGV interconnect structure with a double-sided stress buffer structure is proposed, comprising the following steps: Step S1: Provide a glass substrate, the glass substrate including a first surface and a second surface disposed opposite to each other, and form a glass through hole in the thickness direction through the glass substrate; Step S2: A seed layer is formed on the first surface and the second surface, and conductive material is filled into the glass via to form conductive interconnect pillars that penetrate the glass substrate; Step S3: Remove the seed layer located on the first surface and the second surface, and make the height of both ends of the conductive interconnect post lower than the corresponding surface of the glass substrate, thereby forming recessed spaces at both ends of the glass through hole; Step S4: Prepare a dielectric layer covering the first surface and the second surface, and the dielectric layer fills the recessed spaces at both ends of the glass via; Step S5: Window openings are made in the dielectric layers of both the first surface and the second surface to form openings. The central axis of the opening coincides with the central axis of the glass through hole, and the diameter of the opening is smaller than the diameter of the glass through hole, exposing part of the end face of the conductive interconnect post. Step S6: Redistribution layers are fabricated on the dielectric layers of the first surface and the second surface, respectively. The redistribution layers are connected to the two end faces of the conductive interconnect pillars through the openings, and the metal of the redistribution layers does not touch the opening edge of the glass via.

[0008] The method provided by this invention innovatively solves the problem of glass cracking caused by the mismatch of the coefficient of thermal expansion (CTE) after metallization of TGV vias by constructing recessed spaces at both ends of the conductive interconnect pillars penetrating the glass substrate and filling them with a dielectric layer. Targeting the bidirectional penetration characteristics of the via structure, this invention utilizes etching and windowing processes to simultaneously construct an embedded stress buffer structure on both the upper and lower surfaces of the glass substrate. This structure effectively isolates the direct rigid compression of the glass aperture edge by the thermal expansion of the metal conductive interconnect pillar ends, blocking the stress transmission path that leads to cracking, and significantly improving the reliability of the TGV interconnect structure in high-temperature processes.

[0009] Preferably, the glass via includes a first segment, a second segment, and a connecting portion located at the junction of the first and second segments. The connecting portion is the point where the glass via has the smallest diameter. The first segment extends from the connecting portion toward a first surface of the glass substrate, and its diameter gradually increases. The second segment extends from the connecting portion toward a second surface of the glass substrate, and its diameter gradually increases. The conductive interconnect fills the connecting portion, the first segment, and the second segment, and forms recessed spaces at the ports of the first and second segments, respectively. The diameter of the opening is smaller than the end face diameter of the conductive interconnect at the recessed space. By defining the shape of the glass via and ensuring that the opening diameter is smaller than the end face diameter of the conductive interconnect at the recess, the dielectric layer is structurally guaranteed to press against the edge of the conductive interconnect. Utilizing the channel characteristics of being large at both ends and small in the middle, a stable and adaptable stress buffer structure is formed. It effectively withstands vertical thermal shock and effectively disperses radial stress through the symmetrical buffer layers, preventing the metal conductive interconnect from separating from the glass wall.

[0010] Preferably, step S3 specifically includes: removing the seed layer of the first surface and the second surface by wet etching process, and then continuing to etch downward to remove part of the conductive material in the glass via until the end face of the conductive interconnect post forms a preset height difference with the surface of the glass substrate.

[0011] Preferably, step S4 specifically involves: employing a vacuum lamination process, using vacuum pressure to simultaneously press a solid insulating dry film onto the first and second surfaces of the glass substrate, filling the recessed spaces at both ends of the glass via. Unlike liquid coating or chemical vapor deposition processes, this invention utilizes a vacuum lamination process specifically for the unique through-hole open structure of double-sided TGV vias. The negative pressure and mechanical pressure under vacuum conditions cause the solid insulating dry film to plastically flow, precisely filling the recessed spaces at both ends of the glass via. This process avoids the problem of liquid materials easily flowing into the depths of the via, leading to uncontrollable buffer layer thickness or voids within the via, achieving dense filling of the recessed spaces and high flatness of the glass substrate surface, providing a high-quality foundation for subsequent double-sided redistribution layer fabrication.

[0012] More preferably, the height difference between the end face of the conductive interconnect post and the surface of the glass substrate is 5-15 μm; the dielectric layer is an insulating material with a Young's modulus lower than that of the glass substrate; and after the dielectric layer fills the recessed space, its thickness above the first and second surfaces is 5-15 μm.

[0013] Preferably, step S5 specifically involves: performing a window opening process using laser technology, wherein an annular covering area is maintained horizontally between the edge of the opening and the edge of the glass through-hole; the radial width of the annular covering area is 5-15 μm. The radial width refers to the distance between the edge of the glass through-hole and the edge of the opening. Combined with the dimensional parameters of the buffer structure, it can resist the thermal expansion deformation of the conductive interconnect pillars at high temperatures, avoiding buffer failure and achieving a balance between mechanical reliability and electrical performance.

[0014] According to a second aspect of this application, a TGV interconnect structure with a double-sided stress buffer structure is proposed, comprising: A glass substrate, the glass substrate including a first surface and a second surface disposed opposite to each other, and a glass through-hole penetrating the glass substrate in the thickness direction; and Conductive interconnect pillars are disposed within the glass through-hole, with both end faces of the conductive interconnect pillars being lower than the corresponding surfaces of the glass substrate, thereby forming recessed spaces at the two end openings of the glass through-hole; and A dielectric layer covers the first and second surfaces and fills the recessed spaces at both ends of the glass via; the dielectric layer has openings at positions corresponding to both ends of the conductive interconnect pillars, the diameter of the openings being smaller than the diameter of the glass via; and A redistribution layer is disposed on the dielectric layer of the first and second surfaces. The redistribution layer extends into the opening and is connected to the end face of the conductive interconnect post. The metal of the redistribution layer does not touch the opening edge of the glass via.

[0015] The TGV interconnect structure provided by this invention utilizes a dielectric layer filled in the recessed space to fix the conductive interconnect pillars in the center of the glass via, forming a stress isolation band. The wiring layer extends into the opening and connects with the metal conductive interconnect pillars, protecting the glass opening edge, which is most prone to cracking. It can withstand repeated thermal cycling shocks for a long time without delamination or cracking damage, greatly extending the service life of the device.

[0016] Preferably, the glass via includes a first segment, a second segment, and a connecting portion located at the junction of the first and second segments. The connecting portion is the point where the glass via has the smallest diameter. The first segment extends from the connecting portion toward a first surface of the glass substrate, and its diameter gradually increases. The second segment extends from the connecting portion toward a second surface of the glass substrate, and its diameter gradually increases. The conductive interconnect fills the connecting portion, the first segment, and the second segment, and forms recessed spaces at the ports of the first and second segments, respectively. The diameter of the opening is smaller than the diameter of the end face of the conductive interconnect at the recessed space. This physical structure ensures complete coverage of the glass via edge by the dielectric layer, forming a stable and suitable stress buffer structure. It effectively withstands vertical thermal shock and effectively disperses radial stress through the symmetrical upper and lower buffer layers.

[0017] More preferably, the dielectric layer forms an annular covering region between the edge of the glass via and the edge of the opening, covering the inner wall of the glass via and the sidewall of the conductive interconnect pillar; the radial width of the annular covering region is 5-15 μm. The radial width refers to the distance between the edge of the glass via and the edge of the opening.

[0018] Preferably, the height difference between the end face of the conductive interconnect post and the surface of the glass substrate is 5-15 μm; the dielectric layer is made of an insulating material with a Young's modulus lower than that of the glass substrate; and the thickness of the dielectric layer above the first and second surfaces is 5-15 μm.

[0019] Compared with the prior art, the beneficial results of the present invention are as follows: (1) A double-sided embedded stress buffer system was constructed to solve the CTE mismatch problem. In view of the bidirectional through-hole characteristics of TGV vias, a recessed space was innovatively constructed at both ends of the conductive interconnect pillar and filled with a low-modulus dielectric layer. This structure physically isolates the thermal expansion contact interface between the rigid glass and the metal copper pillar, effectively blocking the stress transmission caused by the difference in thermal expansion coefficients, and significantly reducing the risk of glass substrate cracking in high-temperature processes such as reflow soldering.

[0020] (2) Overcoming the challenge of fluid filling in through-holes and achieving high planarization packaging: Addressing the process pain points of lack of bottom support and easy loss of liquid material in double-sided TGV through-holes, this invention adopts a vacuum lamination process. Utilizing the plastic flow characteristics of solid dry film, dense filling of recessed spaces and simultaneous planarization on both sides are achieved, avoiding the problems of voids or uncontrollable thickness in traditional coating processes, and providing a high-quality foundation for high-precision RDL wiring.

[0021] (3) Forming a geometric interlocking structure to improve mechanical stability. Utilizing the geometric feature of the glass through-hole expanding at both ends and shrinking towards the middle, combined with the medium layer filled in the expansion, it effectively disperses the thermal expansion thrust in the Z-axis direction, prevents the metal column from delaminating, and enhances the mechanical bonding force of the overall structure.

[0022] (4) By using laser coaxial windowing and retaining a 5-15μm annular coverage area, a precise insulating protective ring is formed at the edge of the most fragile glass aperture, while retaining sufficient conductive connection area, thus achieving a balance between excellent mechanical reliability and low-resistance electrical performance. Attached Figure Description

[0023] The accompanying drawings provide further illustration of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and, together with the description, serve to explain the principles of the invention. Other embodiments and many anticipated advantages of the embodiments will be readily recognized as they become better understood through reference to the following detailed description. Other features, objects, and advantages of this application will become more apparent from reading the following detailed description of non-limiting embodiments with reference to the accompanying drawings: Figure 1 This is a flowchart of a method for fabricating a TGV interconnect structure with a double-sided stress buffer structure according to a specific embodiment of the present invention; Figures 2-7 This is a step diagram illustrating the fabrication process of a TGV interconnect structure with a double-sided stress buffer structure and its fabrication method according to a specific embodiment of the present invention. Figure 8 This is a simulation diagram of stress on a glass substrate with a TGV interconnect structure having a double-sided stress buffer structure according to a specific embodiment of the present invention. Figure 9 This is a simulation diagram of stress on a glass substrate that does not possess the double-sided stress buffer structure of this application.

[0024] The meanings of the numbers in the figure are as follows: 1-glass substrate, 2-glass via, 21-first hole segment, 22-second hole segment, 23-connection part, 3-seed layer, 4-conductive interconnect pillar, 5-recessed space, 6-dielectric layer, 7-rewiring layer, 8-ring coverage area. Detailed Implementation

[0025] The present application will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, only the parts relevant to the invention are shown in the accompanying drawings.

[0026] In the description of this invention, it should be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features.

[0027] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed", "equipped", "sleeved / connected", "connected", etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be a connection within two components. For those skilled in the art, the specific meaning of the above terms in this invention can be understood according to the specific circumstances.

[0028] To facilitate understanding by those skilled in the art, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments.

[0029] Figure 1 This is a flowchart illustrating a method for fabricating a TGV interconnect structure with a double-sided stress buffer structure according to a specific embodiment of the present invention. Figure 1 As shown, this application proposes a method for fabricating a TGV interconnect structure with a double-sided stress buffer structure, including the following steps: Step S1: Provide a glass substrate 1, the glass substrate 1 including a first surface and a second surface disposed opposite to each other, and form a glass through hole 2 in the thickness direction through the glass substrate 1; Step S2: A seed layer 3 is formed on the first surface and the second surface, and a conductive interconnect post 4 penetrating the glass substrate 1 is formed by filling the glass through hole 2 with conductive material. Step S3: Remove the seed layer 3 located on the first surface and the second surface, and make the height of both end faces of the conductive interconnect post 4 lower than the corresponding surface of the glass substrate 1, thereby forming recessed spaces 5 at the two end openings of the glass through hole 2 respectively; Step S4: Prepare a dielectric layer 6 covering the first surface and the second surface, and the dielectric layer 6 fills the recessed spaces 5 at both ends of the glass through hole 2; Step S5: Openings are formed in the dielectric layer 6 of both the first surface and the second surface. The central axis of the opening coincides with the central axis of the glass through hole 2, and the diameter of the opening is smaller than the diameter of the glass through hole 2, exposing part of the end face of the conductive interconnect post 4. Step S6: Redistribution layers 7 are fabricated on the dielectric layers 6 of the first surface and the second surface, respectively. The redistribution layers 7 are connected to the two end faces of the conductive interconnect pillars 4 through the openings, and neither the metal of the redistribution layers 7 nor the metal of the conductive interconnect pillars 4 touches the opening edge of the glass via 2.

[0030] In a specific embodiment, the glass through-hole 2 includes a first hole segment 21, a second hole segment 22, and a connecting portion 23 located at the junction of the first hole segment 21 and the second hole segment 22. The connecting portion 23 is the smallest aperture of the glass through-hole 2. The first hole segment 21 extends from the connecting portion 23 toward the first surface of the glass substrate 1, and the aperture gradually increases. The second hole segment 22 extends from the connecting portion 23 toward the second surface of the glass substrate 1, and the aperture gradually increases. The conductive interconnect post 4 fills the connecting portion 23, the first hole segment 21, and the second hole segment 22, and forms the recessed space 5 at the ports of the first hole segment 21 and the second hole segment 22, respectively. The diameter of the opening is smaller than the diameter of the end face of the conductive interconnect post at the recessed space 5.

[0031] In a specific embodiment, step S3 specifically includes: removing the seed layer 3 of the first surface and the second surface by wet etching process, and then continuing to etch downward to remove part of the conductive material in the glass via 2 until the end face of the conductive interconnect post 4 forms a preset height difference with the surface of the glass substrate 1.

[0032] In a specific embodiment, step S4 specifically involves: using a vacuum lamination process, a solid insulating dry film is simultaneously pressed onto the first surface and the second surface of the glass substrate 1 using vacuum pressure, and filling the recessed spaces 5 at both ends of the glass through-hole 2.

[0033] In a specific embodiment, the height difference between the end face of the conductive interconnect post 4 and the surface of the glass substrate 1 is 5-15 μm; the dielectric layer 6 is made of an insulating material with a Young's modulus lower than that of the glass substrate 1; after the dielectric layer 6 fills the recessed space 5, its thickness above the first surface and the second surface is 5-15 μm.

[0034] In a specific embodiment, step S5 involves: performing a windowing process using laser technology, whereby an annular covering area 8 is maintained horizontally between the edge of the opening and the edge of the glass through-hole 2; the radial width of the annular covering area 8 is 5-15 μm. The radial width refers to the distance between the edge of the glass through-hole 2 and the edge of the opening. That is, the distance between the edge of the opening in the dielectric layer 6 and the glass through-hole 2 in the X direction is 5-15 μm, and the distance in the Y direction is 5-15 μm.

[0035] It should be noted that the formation of the seed layer 3 on the first and second surfaces in step S2 aims to construct a conductive foundation that penetrates the entire glass via 2. In practice, this can be achieved using a double-sided deposition apparatus or a deposition apparatus with a flipping function. By flipping the substrate and performing multi-angle sputtering within the apparatus, it is ensured that the deposited material not only covers the upper and lower surfaces but also penetrates deep into the inner wall of the glass via, thereby forming an electrically connected seed layer 3 structure between the first surface, the via wall, and the second surface, providing a reliable foundation for subsequent electroplating to fill the via.

[0036] In a specific embodiment, the seed layer 3 of the first surface and the second surface is formed in the same film deposition equipment. The equipment is equipped with a substrate flipping function. After the seed layer 3 is deposited on one surface, a robot or conveying mechanism flips the glass substrate 1 in the cavity and then deposits the seed layer 3 on the other surface.

[0037] Figures 2-7 The diagram illustrates the fabrication steps of a TGV interconnect structure with a double-sided stress buffer structure and its fabrication method according to a specific embodiment of the present invention; as shown. Figure 2 As shown, a glass substrate 1 is provided, the glass substrate 1 including a first surface and a second surface disposed opposite to each other, and at least one glass through hole 2 formed on the glass substrate 1 in the thickness direction.

[0038] like Figure 3 As shown, a seed layer 3 is formed on the first surface and the second surface, and a conductive interconnect post 4 penetrating the glass substrate 1 is formed by filling the glass through hole 2 with conductive material.

[0039] In a specific embodiment, a continuous seed layer 3 is formed on the inner wall of the glass via 2 and the surface of the glass substrate 1 using a thin film deposition process (such as atomic layer deposition, electroless plating, or sputtering deposition). Subsequently, using the seed layer 3 as a conductive base, a conductive material is deposited into the glass via 2 using an electroplating process (such as double-sided electroplating) until it is completely filled, thereby forming a dense and void-free conductive interconnect pillar 4.

[0040] Optionally, the seed layer is made of copper, and the conductive material is also made of copper.

[0041] like Figure 4 As shown, the seed layer 3 located on the first surface and the second surface is removed, and the height of both ends of the conductive interconnect post 4 is lower than the corresponding surface of the glass substrate 1, thereby forming recessed spaces 5 at the two ends of the glass through hole 2.

[0042] In a specific embodiment, the seed layer 3 on the first surface and the second surface is removed by a wet etching process, and then the etching continues downward to remove part of the conductive material in the glass via 2 until the end face of the conductive interconnect post 4 forms a preset height difference with the surface of the glass substrate 1.

[0043] In a preferred embodiment, the height difference between the end face of the conductive interconnect post 4 and the surface of the glass substrate 1 is 5-15 μm.

[0044] like Figure 5 As shown, a dielectric layer 6 is prepared to cover the first surface and the second surface, and the dielectric layer 6 fills the recessed spaces 5 at both ends of the glass through-hole 2.

[0045] In a specific embodiment, a vacuum lamination process is employed, using vacuum pressure to simultaneously press a solid insulating dry film onto the first and second surfaces of the glass substrate 1, filling the recessed spaces 5 at both ends of the glass through-hole 2. This achieves lamination within the glass through-hole 2, resulting in a smooth film on both the upper and lower surfaces of the glass substrate 1.

[0046] It should be noted that for TGV vias with a double-conical structure and recessed spaces, liquid coating processes such as spin coating, spraying, or deposition to prepare the insulating layer have significant drawbacks: liquid materials experience large volume shrinkage during curing and tend to conformally settle with the recessed morphology, making it difficult to form a highly flat surface above the recess to support subsequent precision RDL circuit fabrication; for through-hole TGV vias, liquid materials easily penetrate deep into the channel, making it impossible to precisely control the buffer layer thickness within the designed 5-15μm range, and even affecting the electrical performance of the conductive interconnects. In contrast, this invention employs a vacuum lamination process. Utilizing the non-flowing or low-flowing characteristics of solid dry film materials, combined with a vacuum negative pressure environment, a filling-type leveling of the recessed space at the TGV via opening is achieved. This process not only ensures a highly flat insulating layer surface but also effectively limits excessive intrusion of the dielectric layer into the via, thereby precisely constructing a dimensionally controllable embedded stress buffer ring. This structural and process matching is unattainable by other coating technologies.

[0047] In a preferred embodiment, the dielectric layer 6 is an insulating material with a Young's modulus lower than that of the glass substrate 1, including but not limited to polyimide, Ajinomoto build-up film (ABF), epoxy resin, polybenzoxazole, or insulating dry film. Optionally, the glass substrate 1 is a mixture of borosilicate glass, quartz glass, and alkali-free glass.

[0048] In a preferred embodiment, after the dielectric layer 6 fills the recessed space 5, its thickness above the first surface and the second surface is 5-15 μm.

[0049] like Figure 6 As shown, the dielectric layer 6 on both the first and second surfaces is windowed to form an opening. The central axis of the opening coincides with the central axis of the glass through hole 2, and the diameter of the opening is smaller than the diameter of the glass through hole 2, exposing part of the end face of the conductive interconnect post 4.

[0050] In a specific embodiment, a laser process is used for window opening, and an annular covering area 8 is maintained horizontally between the edge of the opening and the edge of the glass through-hole 2; the radial width of the annular covering area 8 is 5-15 μm. The radial width refers to the distance between the edge of the glass through-hole 2 and the edge of the opening.

[0051] like Figure 7 As shown, redistribution layers 7 are fabricated on the dielectric layers 6 of the first surface and the second surface, respectively, and the redistribution layers 7 are connected to the two end faces of the conductive interconnect pillars 4 through the openings.

[0052] In a specific embodiment, relying on the highly planarized surface provided by the dielectric layer 6, a seed layer is first deposited on the surface of the dielectric layer and within the openings. Then, the circuit pattern is defined by photolithography, and conductive metal is deposited using electroplating. During this process, the conductive metal not only constructs the planar circuitry on the surface but also simultaneously and densely fills the openings in the dielectric layer 6, forming a connection structure connecting the conductive interconnect pillars 4. Finally, the photoresist and excess seed layer are removed, completing the fabrication of the double-sided RDL. This step achieves highly reliable electrical interconnection between the conductive interconnect pillars 4 and external circuits, and thanks to the buffering effect of the dielectric layer 6, the metal bonding interface can effectively resist the stress caused by thermal cycling.

[0053] This application also proposes a TGV interconnect structure with a double-sided stress buffer structure, which is fabricated using the aforementioned method for fabricating a TGV interconnect structure with a double-sided stress buffer structure. Figure 7 A schematic diagram of a TGV interconnect structure with a double-sided stress buffer structure according to a specific embodiment is shown, including: The system comprises a glass substrate 1, conductive interconnect pillars 4, a dielectric layer 6, and a redistribution layer 7. The glass substrate 1 includes a first surface and a second surface disposed opposite to each other, and a glass via 2 penetrating the glass substrate 1 in the thickness direction. The conductive interconnect pillars 4 are disposed within the glass via 2, and the height of both end faces of the conductive interconnect pillars 4 is lower than the corresponding surfaces of the glass substrate 1, thereby forming recessed spaces 5 at the openings at both ends of the glass via 2. The dielectric layer 6 covers the first surface and the second surface and fills the recessed spaces 5 at both ends of the glass via 2. The dielectric layer 6 has openings at positions corresponding to the two ends of the conductive interconnect pillars 4, and the diameter of the openings is smaller than the diameter of the glass via 2. The redistribution layer 7 is disposed on the dielectric layer 6 on the first surface and the second surface. The redistribution layer 7 extends into the openings and connects to the end faces of the conductive interconnect pillars 4, and neither the metal of the redistribution layer 7 nor the metal of the conductive interconnect pillars 4 touches the edge of the opening of the glass via 2.

[0054] In a specific embodiment, the glass through-hole 2 includes a first hole segment 21, a second hole segment 22, and a connecting portion 23 located at the junction of the first hole segment 21 and the second hole segment 22. The connecting portion 23 is the smallest aperture of the glass through-hole 2. The first hole segment 21 extends from the connecting portion 23 toward the first surface of the glass substrate 1, and the aperture gradually increases. The second hole segment 22 extends from the connecting portion 23 toward the second surface of the glass substrate 1, and the aperture gradually increases. The conductive interconnect post 4 fills the connecting portion 23, the first hole segment 21, and the second hole segment 22, and forms the recessed space 5 at the ports of the first hole segment 21 and the second hole segment 22, respectively. The diameter of the opening is smaller than the diameter of the end face of the conductive interconnect post at the recessed space 2.

[0055] In a specific embodiment, the dielectric layer 6 forms an annular covering region 8 between the edge of the glass via 2 and the edge of the opening, covering the inner wall of the glass via 2 and the sidewall of the conductive interconnect pillar; the radial width of the annular covering region 8 is 5-15 μm. The radial width refers to the distance between the edge of the glass via 2 and the edge of the opening.

[0056] In a specific embodiment, the height difference between the end face of the conductive interconnect post 4 and the surface of the glass substrate 1 is 5-15 μm; the dielectric layer 6 is made of an insulating material with a Young's modulus lower than that of the glass substrate; and the thickness of the dielectric layer 6 extending above the first and second surfaces is 5-15 μm.

[0057] The structural parameters defined in this embodiment ensure the overall performance of the TGV interconnect structure. The 5-15μm recess depth, combined with the low-modulus material, creates an effective stress relief space; the surface dielectric layer of the same thickness provides excellent planarization. This planarity is crucial for fine line lithography in high-density packaging, avoiding open or short circuits caused by surface undulations, while ensuring the symmetry of the redistribution layer structure on both sides, reducing the risk of substrate warping during subsequent processing. On the one hand, setting a lower limit of 5μm provides sufficient process safety margin, ensuring that even with minor alignment deviations in laser drilling, the dielectric layer can still completely cover the interface between the glass via and the metal pillar, preventing crack initiation points due to exposed glass edges; on the other hand, setting an upper limit of 15μm avoids excessive obstruction of conductive interconnect pillars, ensuring a sufficiently large exposed metal area after opening for connection with the redistribution layer (RDL), thereby effectively suppressing interface stress cracking while ensuring the low-resistance electrical performance of the interconnect structure.

[0058] To verify the actual effect of the TGV interconnect structure with double-sided stress buffer structure described in this invention in alleviating thermal stress, a three-dimensional simulation model was established in this embodiment, and a comparative analysis was conducted with the existing conventional TGV structure.

[0059] Figure 8 This diagram illustrates a stress simulation of a glass substrate with a TGV interconnect structure having a double-sided stress buffer structure, according to a specific embodiment of the present invention. Figure 8 As shown, the model employs the double-sided recessed space-filling low-modulus dry film technology described in this invention, wherein the dielectric layer fills the recesses at both ends of the conductive interconnect pillars and covers the glass surface. The geometric parameters selected for the model are as follows: the glass substrate thickness is 100 μm; the glass via has a double-conical structure with a maximum aperture of 60 μm at the top and bottom ends and a aperture of 40 μm at the middle connecting portion; both end faces of the conductive interconnect pillars are recessed downwards by 10 μm relative to the glass surface; the dielectric layer covering the glass surface has a thickness of 10 μm and completely fills the aforementioned recessed space; the opening diameter on the dielectric layer is set to 40 μm, thus forming a ring-shaped covering area with a radial width of 10 μm between the edge of the glass via and the edge of the opening. Simulation results show that the stress distribution on the glass substrate is relatively uniform, the maximum principal stress on the glass substrate is only 72.923 MPa, and the high-stress areas are significantly reduced, effectively dispersing the main stress concentration points and avoiding excessive local stress.

[0060] Figure 9 A simulation diagram of stress on a glass substrate lacking the double-sided stress buffer structure of this application is shown. Figure 9As shown, the maximum principal stress distribution cloud map of a conventional TGV interconnect structure as a comparative example is displayed under the same thermal load conditions. The simulation results show that, under the same thermal expansion conditions, a significant stress concentration phenomenon occurs at the edge of the glass via (shown in the dark red area in the figure). The cloud map data shows that the maximum principal stress borne by the glass substrate in this comparative structure reaches as high as 178.99 MPa.

[0061] By comparison Figure 8 and Figure 9 Simulation data shows that, after adopting the double-sided stress buffer structure described in this invention, the maximum principal stress borne by the glass substrate is significantly reduced from 179 MPa in the conventional structure to 72.9 MPa, a stress reduction of approximately 59%. This significant difference directly proves that the structure described in this application, which constructs recessed spaces at both ends of the glass via and fills them with a low-modulus dielectric layer, can greatly alleviate the thermal mismatch stress between the glass and the metal under the glass via structure, thereby effectively preventing the generation of glass via cracks and significantly improving the thermomechanical reliability of the TGV packaging substrate.

[0062] The above description is merely a preferred embodiment of this application and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of the invention involved in this application is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described inventive concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features with similar functions disclosed in this application.

Claims

1. A method for fabricating a TGV interconnect structure with a double-sided stress buffer structure, characterized in that, Includes the following steps: Step S1: Provide a glass substrate, the glass substrate including a first surface and a second surface disposed opposite to each other, and form a glass through hole in the thickness direction through the glass substrate; Step S2: A seed layer is formed on the first surface and the second surface, and conductive material is filled into the glass via to form conductive interconnect pillars that penetrate the glass substrate; Step S3: Remove the seed layer located on the first surface and the second surface, and make the height of both ends of the conductive interconnect post lower than the corresponding surface of the glass substrate, thereby forming recessed spaces at both ends of the glass through hole; Step S4: Prepare a dielectric layer covering the first surface and the second surface, and the dielectric layer fills the recessed spaces at both ends of the glass via; Step S5: Window openings are made in the dielectric layers of both the first surface and the second surface to form openings. The central axis of the opening coincides with the central axis of the glass through hole, and the diameter of the opening is smaller than the diameter of the glass through hole, exposing part of the end face of the conductive interconnect post. Step S6: Redistribution layers are fabricated on the dielectric layers of the first surface and the second surface, respectively. The redistribution layers are connected to the two end faces of the conductive interconnect pillars through the openings, and the metal of the redistribution layers does not touch the opening edge of the glass via.

2. The method for fabricating the TGV interconnect structure according to claim 1, characterized in that, The glass via includes a first segment, a second segment, and a connecting portion located at the junction of the first and second segments. The connecting portion is the point where the glass via has the smallest diameter. The first segment extends from the connecting portion toward a first surface of the glass substrate, and its diameter gradually increases. The second segment extends from the connecting portion toward a second surface of the glass substrate, and its diameter gradually increases. The conductive interconnect pillar fills the connecting portion, the first segment, and the second segment, and forms the recessed spaces at the ports of the first and second segments, respectively. The diameter of the opening is smaller than the diameter of the end face of the conductive interconnect pillar at the recessed space.

3. The method for fabricating the TGV interconnect structure according to claim 1, characterized in that, Step S3 specifically includes: removing the seed layer of the first surface and the second surface by wet etching process, and then continuing to etch downward to remove part of the conductive material in the glass via until the end face of the conductive interconnect post forms a preset height difference with the surface of the glass substrate.

4. The method for fabricating the TGV interconnect structure according to claim 1, characterized in that, Step S4 specifically involves using a vacuum lamination process to simultaneously press a solid insulating dry film onto the first and second surfaces of the glass substrate using vacuum pressure, and filling the recessed spaces at both ends of the glass through-hole.

5. The method for fabricating the TGV interconnect structure according to claim 4, characterized in that, The height difference between the end face of the conductive interconnect post and the surface of the glass substrate is 5-15 μm; the dielectric layer is made of an insulating material with a Young's modulus lower than that of the glass substrate; after the dielectric layer fills the recessed space, its thickness above the first and second surfaces is 5-15 μm.

6. The method for fabricating the TGV interconnect structure according to claim 1, characterized in that, Step S5 specifically involves: using laser technology to perform window opening processing, where an annular covering area is maintained in the horizontal direction between the edge of the opening and the edge of the glass through hole; the radial width of the annular covering area is 5-15 μm.

7. A TGV interconnect structure with a double-sided stress buffer structure, characterized in that, include: A glass substrate, the glass substrate including a first surface and a second surface disposed opposite to each other, and a glass through-hole penetrating the glass substrate in the thickness direction; as well as A conductive interconnect post is disposed in the glass through hole. The height of both ends of the conductive interconnect post is lower than the corresponding surface of the glass substrate, thereby forming recessed spaces at the two ends of the glass through hole. as well as A dielectric layer covers the first surface and the second surface, and fills the recessed spaces at both ends of the glass via; the dielectric layer has openings at positions corresponding to both ends of the conductive interconnect pillars, the diameter of the openings being smaller than the diameter of the glass via; and A redistribution layer is disposed on the dielectric layer of the first surface and the second surface. The redistribution layer extends into the opening and is connected to the end face of the conductive interconnect post. The metal of the redistribution layer does not touch the opening edge of the glass via.

8. The TGV interconnect structure according to claim 7, characterized in that, The glass via includes a first segment, a second segment, and a connecting portion located at the junction of the first and second segments. The connecting portion is the point where the glass via has the smallest diameter. The first segment extends from the connecting portion toward a first surface of the glass substrate, and its diameter gradually increases. The second segment extends from the connecting portion toward a second surface of the glass substrate, and its diameter gradually increases. The conductive interconnect pillar fills the connecting portion, the first segment, and the second segment, and forms the recessed spaces at the ports of the first and second segments, respectively. The diameter of the opening is smaller than the diameter of the end face of the conductive interconnect pillar at the recessed space.

9. The TGV interconnect structure according to claim 8, characterized in that, The dielectric layer forms an annular covering area between the edge of the glass via and the edge of the opening, covering the inner wall of the glass via and the sidewall of the conductive interconnect post; the radial width of the annular covering area is 5-15 μm.

10. The TGV interconnect structure according to claim 7, characterized in that, The height difference between the end face of the conductive interconnect post and the surface of the glass substrate is 5-15 μm; the dielectric layer is made of an insulating material with a Young's modulus lower than that of the glass substrate; the thickness of the dielectric layer above the first and second surfaces is 5-15 μm.

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