System and method for non-separable transform for inter prediction in video coding

Abstract

Methods and systems for video processing are provided. In some embodiments, a method includes: (i) receiving a video bitstream; (ii) determining a first region and a second region of a current block, wherein the second region is a region of the current block other than the first region; and (iii) deriving samples in the first region of the current block by performing a non-separable transform on one or more coefficients.

Description

Technical Field

[0001] This disclosure relates to imaging and video coding techniques. More specifically, this document discloses a video coding scheme and related system that uses an inseparable transform to transform residuals generated by inter-frame prediction tools. Background Technology

[0002] Existing video compression methods, such as High Efficiency Video Coding (HEVC) and Versatile Video Coding (VVC), perform block-based and quantization processes during encoding. The HEVC and VVC standards define block-based hybrid spatial and temporal predictive coding schemes. During encoding, the input image is first divided into square blocks called coding tree units (CTUs). Each CTU in the image can be further divided into one or more coding units (CUs), which can be used for prediction and transformation. Various prediction tools, including inter-frame prediction tools and intra-frame prediction tools, can be used. Inter-frame prediction tools can use any information from images previously encoded into the bitstream. On the other hand, intra-frame prediction tools can use only reconstructed samples from the same image. Because various intra-frame and inter-frame prediction tools require various types of parameters / data / information, implementing these prediction tools requires significant computational resources and storage space. Therefore, an improved system and method are urgently needed to address these requirements. Summary of the Invention

[0003] This disclosure relates to systems and methods for improving video image quality by using improved systems and methods for inter-frame prediction. The system is capable of "reusing" non-separable transform tools used for intra-frame prediction in inter-frame prediction. Advantages include achieving coding gain without incurring additional implementation costs (e.g., additional storage of non-separable transform kernels for inter-frame prediction). The "reused" non-separable transform tools are used to transform the residuals generated by the inter-frame prediction tools.

[0004] In some embodiments, the system enables an operator to selectively enable a fixed / selected set of inter-frame prediction tools to customize their non-separable transformations based on various factors, such as information indicating which tools are more favorable for non-separable transformations. For example, for inter-frame prediction tools with more complex motion models (e.g., affine modes), non-separable transformations can be disabled (e.g., the "nst_idx" parameter is not signaled and is inferred as "0").

[0005] For example, when encoding inter-frame coding units (CUs), an intra-prediction mode (e.g., "predModeIntra") can be derived from the non-separable transform kernel index to the transform set. In some embodiments, the intra-prediction mode can be derived by applying a decoder-side intra-mode derivation (DIMD) algorithm to the spatial neighborhood of the inter-frame CU. In some embodiments, the intra-prediction mode can be derived by applying a template-based intra-mode derivation (TIMD) algorithm to the spatial neighborhood of the inter-frame CU.

[0006] In some embodiments, an intra-prediction mode can be derived by applying a "DIMD-like" procedure to a reference block of an inter-frame CU (e.g., a "one-way prediction" CU). For example, a "3x3" gradient analysis window can be moved over the reference block, and local gradients can be computed (e.g., by applying a Sobel filter). In some embodiments, local gradients can be accumulated in a histogram, and the intra-prediction mode can be selected using the gradient corresponding to the highest count in the histogram.

[0007] In some implementations, the gradient analysis window can move in one-sample increments to cover every location within the reference block. In some embodiments, the gradient analysis window can move in "N"-sample increments at a time. This setup enables faster histogram calculations, allowing the operator to strike a balance between acceptable accuracy and computational resources required for gradient estimation. Figure 4A A detailed discussion of implementation examples of gradient analysis windows is provided.

[0008] In some implementations, the intra-frame prediction mode can be derived by applying a DIMD-like procedure to multiple reference blocks. When using multiple reference blocks, the prediction signal can be determined by a weighted combination of these reference blocks. The same weights can be applied to the histograms calculated from the multiple reference blocks before summing the histograms to form the final histogram.

[0009] In some implementations, intra-prediction modes can be derived by applying a TIMD-like procedure to the reference blocks of inter-frame CUs. A candidate intra-prediction mode set can be searched from a list of most probable modes (MPMs), a fixed predetermined set of modes, or by exhaustively enumerating all possible intra-prediction modes. For each candidate intra-prediction mode, a prediction of the reference block can be generated based on neighboring reference samples using intra-angle prediction methods. Combined with... Figure 4B Implementation examples of intra-frame angle prediction methods are discussed in detail.

[0010] In some embodiments, when using geometric partitioning mode (GPM) to encode inter-frame CUs, the intra-frame prediction mode can be derived based on the mapping of the GPM partitioning direction.

[0011] In some embodiments, the non-separable transform kernel used for inter-frame prediction can be the same as the non-separable transform kernel used for intra-frame prediction. When decoding the last valid position, the number (N) of potential non-zero coefficients can be inferred in the same manner as for intra-frame prediction.

[0012] When decoding the last valid position, if "N" is greater than the number of inseparable transform coefficients to be generated for the inter-frame predicted transform unit (TU), the "nst_idx" parameter is implicitly inferred to be 0 without signaling. If N is less than or equal to the number of inseparable transform coefficients, the "nst_idx" parameter can be signaled.

[0013] In some embodiments, the non-separable transform kernel used for inter-frame prediction is multiplexed from the non-separable transform kernel used for intra-frame prediction. The size of the non-separable transform kernel used for inter-frame prediction can be reduced (e.g., by having a smaller number of transform coefficients).

[0014] Another aspect of this technology includes systems and methods for training non-separable transform kernels for inter-frame prediction residuals. In one implementation, the transform set index can be selected based on the mapping between the inter-frame prediction method and the derived intra-frame prediction mode. Examples of this mapping are discussed in detail in conjunction with Table 3.

[0015] Another aspect of this technology includes systems and methods for performing non-separable primary transform (NSPT) via a "zeroing" method. A signal can be used to notify a sub-block transform (SBT) direction flag to indicate whether the inter-frame CU is divided horizontally or vertically. When a region of the inter-frame CU is zeroed ("zeroed out"), a reverse non-separable transform can be applied to generate residual samples to fill the remaining region. Combined with... Figure 5 A detailed discussion of the implementation examples for the zeroing region.

[0016] Although the following systems and methods are described in conjunction with video processing, in some embodiments, the systems and methods can be used with other image processing systems and methods. This disclosure also provides frameworks / networks that can be trained using deep learning and / or artificial intelligence schemes.

[0017] In some embodiments, the methods discussed herein with respect to an “image” or a “frame” can be applied to a portion or region of that “image” or “frame”. For example, the methods disclosed herein can be applied to a sub-image, a region of an image (e.g., displaying an object of interest), etc.

[0018] In some embodiments, the method may be implemented via a tangible, non-transitory computer-readable medium storing processor instructions that, when executed by one or more processors, cause the one or more processors to perform one or more aspects / features of the method described herein. In other embodiments, the method may be implemented via a system including a computer processor and a non-transitory computer-readable storage medium storing instructions that, when executed by the computer processor, cause the computer processor to perform one or more steps of the method described herein. Attached Figure Description

[0019] To more clearly describe the technical solutions in the embodiments of this disclosure, the accompanying drawings are briefly introduced below. The following drawings only illustrate some aspects or embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0020] Figure 1A This is a schematic diagram illustrating an encoding system according to one or more embodiments of the present disclosure.

[0021] Figure 1B This is a schematic diagram illustrating a decoding system according to one or more embodiments of the present disclosure.

[0022] Figure 2 This is a flowchart illustrating a decoding method according to one or more embodiments of the present disclosure.

[0023] Figure 3 This illustrates one or more embodiments according to this disclosure. Figure 2 The flowchart of the decoding sub-method.

[0024] Figure 4A This is a schematic diagram illustrating a gradient analysis process according to one or more embodiments of the present disclosure.

[0025] Figure 4B This is a schematic diagram illustrating a template matching process according to one or more embodiments of the present disclosure.

[0026] Figure 5 This is a schematic diagram illustrating partitioning using an SBT tool according to one or more embodiments of the present disclosure.

[0027] Figure 6This is a schematic diagram of a wireless communication system according to one or more embodiments of the present disclosure.

[0028] Figure 7 This is a schematic block diagram of a terminal device according to one or more embodiments of the present disclosure.

[0029] Figure 8 This is a schematic block diagram of an electronic device according to one or more embodiments of the present disclosure.

[0030] Figure 9 This is a flowchart illustrating a decoding method according to one or more embodiments of the present disclosure. Detailed Implementation

[0031] To more clearly describe the technical solutions in the embodiments of this disclosure, the accompanying drawings are briefly introduced below. The following drawings only illustrate some aspects or embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0032] Figure 1A This is a schematic diagram illustrating an encoding system 100A according to one or more embodiments of the present disclosure. The encoding system 100A includes a video sequence 10 input to an intra-prediction module 102 and / or an inter-prediction module 103. The intra-prediction module 102 can perform predictions based on any of a variety of intra-prediction tools, such as (but not limited to) intra-block copy (IBC), intra-template matching prediction (intraTMP), spatial geometric partitioning mode (SGPM), matrix-based intraprediction (MIP), decoder-side intra-mode derivation (DIMD), template-based intra-mode derivation (TIMD), or conventional angular intra-prediction signaled by the most probable mode syntax element. Similarly, the inter-frame prediction module 103 can perform predictions based on any of a variety of inter-frame prediction tools, such as (but not limited to) merging mode, template matching, geometric partitioning mode (GPM), affine mode, decoder-side motion vector correction, or conventional one-way / two-way prediction using motion compensation vectors signaled by motion vector difference.

[0033] The outputs of the intra-frame prediction module 102 and / or the inter-frame prediction module 103 can be subtracted from the current CU of video sequence 10 to generate a residual R. This residual R can then be sent to the transform module 104. The output of the transform module 104 can be quantized by the quantization module 105. Next, the output of the quantization module 105 can be sent to the inverse quantization module 106 and the inverse transform module 107.

[0034] like Figure 1A As shown, at adder 108, the outputs of intra-frame prediction module 102 and / or inter-frame prediction module 103 can be added to the output of inverse transform module 107. The result of the addition can then be sent to intra-loop filter 109. The output of intra-loop filter 109 can then be sent to decoded image buffer 110 for further processing by inter-frame prediction module 103. The coding system 100A uses loop filters to suppress compression artifacts and reduce distortion. Loop filters include a deblocking filter (DBF), a sample adaptive offset (SAO) filter, and an adaptive loop filter (ALF). In some embodiments, intra-loop filter 109 does not need to include all of the above filters. In some embodiments, the DBF and SAO filters are two filters designed to reduce artifacts caused by the coding process. The DBF focuses on visual artifacts at block boundaries. The SAO filter complementaryly reduces artifacts that may be caused by the quantization of intra-block transform coefficients. The ALF can be an adaptive filter that enhances the reconstructed signal by using a Wiener-based adaptive filter to reduce the mean square error (MSE) between the original and reconstructed samples. The encoding system 100A also includes an entropy coding module 111, which is configured to perform data compression before generating the bitstream 11.

[0035] Figure 1B This is a schematic diagram of a decoding system 100B according to one or more embodiments of the present disclosure. The decoding system 100B includes an entropy decoding module 121, an inverse quantization module 122, and an inverse transform module 123 configured to process a bitstream 12. The decoding system 100B also includes an inter-frame prediction module 124 and an intra-frame prediction module 125 (e.g., corresponding to the inter-frame prediction module 103 and intra-frame prediction module 102 on the encoding side). The inter-frame prediction module 124 and the intra-frame prediction module 125 are configured to process the bitstream 12 and generate a decoded video 13. Figure 1B As shown, the decoding system 100B also includes an image buffer 126 and a loop filter 127 to assist in completing the above-mentioned decoding task.

[0036] like Figure 1BAs shown, at adder 128, the outputs of intra-frame prediction module 125 and / or inter-frame prediction module 124 can be added to the output of inverse transform module 123. The result of the addition can then be sent to loop filter 127 to generate decoded video 13.

[0037] Figure 2 This is a flowchart illustrating an inverse transformation method 200 according to one or more embodiments of the present disclosure. In some embodiments, method 200 may be comprised of an inverse transformation module (e.g., Figure 2 The inverse transformation module 123 discussed in the text is implemented. Method 200 begins at step 201 and then proceeds to the judgment step 203.

[0038] In step 203, method 200 determines whether to perform a reverse inseparable transform based on the inseparable transform index (referred to as "nst_idx" in this disclosure). The nst_idx parameter can be decoded from or inferred from bitstream 12. The following is in conjunction with... Figure 3 Method 300 further describes in detail the determination of step 203 and the determination of the nst_idx parameter. If nst_idx is "0", then method 200 does not perform the inverse inseparable transform. The process proceeds to step 205 to perform an alternative inverse transform process (e.g., inverse discrete cosine transform (DCT)) and terminates. Otherwise, if nst_idx is not "0" (e.g., "1", "2", or "3"), then method 200 proceeds to step 207.

[0039] In step 207, method 200 determines whether the current prediction method is "inter-frame prediction" or "intra-frame prediction". If the current prediction method is "intra-frame prediction", method 200 proceeds to step 215. If the current prediction method is "inter-frame prediction", method 200 proceeds to step 209.

[0040] In step 215, the current intra-prediction method may have already determined the intra-prediction mode. Alternatively, if the current intra-prediction method (e.g., MIP, intraTMP, or IBC) has not selected an intra-prediction mode, the intra-prediction mode is derived using DIMD. Once the intra-prediction mode is determined, in step 215, method 200 also derives the transform set index. This transform set index (“TrSetIdx”) is determined based on the intra-prediction mode using the mapping shown in Table 1 below. Method 200 then proceeds to step 217.

[0041] Table 1

[0042] In step 217, method 200 determines the selected transformation matrix. First, a transformation kernel with dimensions “AxBxCxD” is selected based on the block size of the current residual block. The current residual block can also be referred to as the current transformation block or “TB”. In some embodiments, a transformation kernel with dimensions as shown in Table 2 can be selected. “4xN”, “Nx4”, “8xN”, and “Nx8” refer to block sizes with dimension N that do not match any of the previous entries in the table. For example, for a block size of 4x8, a transformation kernel with dimensions “32x20x3x35” is selected. For a block size of 4x64, since the dimensions do not exactly match any of the previous entries in Table 3, the entry for a “4xN” block size is used, and a transformation kernel with dimensions “16x16x3x35” is selected. In addition to the kernel dimension, the block size of the residual block also determines which type of non-separable transformation is used. Both the low-frequency non-separable secondary transform (LFNST) and the non-separable primary transform (NSPT) can be selected, but only one can be chosen for a given block size. The first seven rows of Table 2 select the transform kernels used for NSPT, while the last three rows select the transform kernels used for LFNST. The selectable transform kernels have predetermined coefficient weights known to both the decoding system 100B and the coding system 100A.

[0043] Table 2

[0044] After selecting the transform kernel, in step 217, a transform matrix of dimension "AxB" is selected from the transform kernel by indexing to the third dimension "C" of the kernel using the parameter nst_idx and the fourth dimension "D" of the kernel using the parameter TrSetIdx. "A" corresponds to the number of coefficients in the current residual block. "B" corresponds to the maximum number of non-separable transform coefficients decoded from bitstream 12 for the current residual block. For example, in Table 2, "C" equals 3, corresponding to nst_idx with a signal value of 0, 1, 2, or 3, where a value of 0 indicates that no inverse non-separable transform is performed, and values ​​of 1, 2, or 3 select different sets of nst_idx. "D" equals 35, corresponding to the example mapping in Table 1, where the value of TrSetIdx can be determined in the range of 0-34. For a block size of 4x8, a transform matrix of dimension "32x20" is selected from a "32x20x3x35" transform kernel, meaning "A" equals 32 and "B" equals 20. Then, method 200 proceeds to step 213.

[0045] In step 213, method 200 performs an inverse inseparable transformation using the selected transformation matrix. In some implementations, the inverse inseparable transformation can be performed by arranging the transformation coefficients into a vector and then performing matrix multiplication with the selected transformation matrix to obtain an output vector with "A" values. The output vector values ​​can then be distributed to the coefficient positions in the current residual block. Method 200 then terminates.

[0046] In step 209, even without performing the intra-prediction method, the method derives an intra-prediction mode. The intra-prediction mode can be based on this paper (e.g., in conjunction with Figure 1, ...). Figure 4A and Figure 4B The method discussed is used to determine this.

[0047] Once the intra-prediction mode is determined, in step 209, method 200 also derives the transform set index. In some embodiments, the transform set index (“TrSetIdx”) is determined according to the intra-prediction mode, referring to Table 1, in a manner similar to that described in step 215 above. In other embodiments of step 209, the transform set index may be determined based on the type of the current inter-prediction method and the intra-prediction mode. An example mapping from inter-prediction methods and intra-prediction modes to transform set indices is shown in Table 3 below. Method 200 then proceeds to step 211.

[0048] Table 3

[0049] In step 211, method 200 determines the selected transformation matrix. In some embodiments, a transformation kernel of dimension "AxBxCxD" is first selected based on the block size of the current residual block. After selecting the transformation kernel, in step 211, a transformation matrix of dimension "AxB" is selected from the transformation kernel. The above process is the same as that described in step 217 above, and step 217 can be performed using the transformation kernel coefficients already stored in the decoding system 100B and the encoding system 100A. Then, method 200 proceeds to step 213, performing an inverse inseparable transformation using the selected transformation matrix.

[0050] In other embodiments of step 211, a transform kernel of dimension “AxKxCxD” is selected based on the block size of the current residual block, where K is less than B for some residual block sizes. In some embodiments, a transform kernel with dimensions as shown in Table 4 below can be selected. The selectable transform kernel can be a subset of the transform kernels described in step 217 above, thus step 217 can be performed by partially reusing the transform kernel coefficients already stored in the decoding system 100B and the encoding system 100A. For example, for a specific block size, if the number of transform coefficients is reduced to K, the first K basis vectors of “B” in the “AxBxCxD” transform kernel are used, and the remaining basis vectors are ignored. After selecting the transform kernel, in step 211, a transform matrix of dimension “AxK” is selected from the transform kernel. Then, method 200 proceeds to step 213, where an inverse inseparable transform is performed using the selected transform matrix.

[0051] Table 4

[0052] In another embodiment of step 211, a transform kernel with dimensions "A2xB2xC2xD2" is selected based on the block size of the current residual block, wherein the transform kernel coefficients are different from those used to perform step 217. The transform kernel dimension does not need to be the same as "AxBxCxD". For example, in the mapping of Table 3, the value of TrSetIdx can be determined in the range of 0-7, so "D2" equals 8.

[0053] In this disclosure, the transformation at the encoder end is generally referred to as a "forward transform," which typically transforms the signal from the spatial domain to the transform domain, while the transformation at the decoder end is referred to as a "backward transform," which transforms the signal from the transform domain back to the spatial domain. However, in other literature, such as video standard specifications that only describe decoder operation, this "backward transform" can be equivalently referred to simply as a "transform."

[0054] Figure 3 This is a flowchart illustrating a decoding method 300 according to one or more embodiments of the present disclosure. The decoding method 300 can be implemented using a decoder (e.g., the decoding system 100B discussed herein). The decoding method 300 can be implemented as described above. Figure 2 This is a sub-method of step 203 in the described method 200. In step 301, the last valid position is decoded from the bitstream 12. Then, based on this last valid position, the number (N) of potential non-zero coefficients is also determined. Next, method 300 proceeds to the determination step 303.

[0055] In step 303, method 300 determines whether sub-block transform (SBT) is enabled. In some embodiments, this can be determined based on previously decoded SBT flags (i.e., those signaled). The SBT tool involves whether the CU is divided horizontally or vertically and has a "zeroed" region. If the SBT tool is enabled for the current CU, method 300 proceeds to step 305. Otherwise, if the SBT tool is not enabled, method 300 proceeds to step 307.

[0056] In step 305, the adjusted residual block size is set to one-half or one-quarter of the current residual block size. The size and orientation of the adjusted residual block size depend on the values ​​of other flags associated with the SBT tool, and will be combined with... Figure 5 This will be described below. Then, method 300 proceeds to decision step 309.

[0057] In step 307, if the SBT tool is not enabled, method 300 sets the adjusted residual block size to be the same as the current residual block size. Then, method 300 also proceeds to the determination step 309.

[0058] In decision step 309, method 300 continues to check the current prediction method. As described above in conjunction with intra-frame prediction module 102 and inter-frame prediction module 103, although the current prediction method can be roughly classified as intra-frame or inter-frame, it can also utilize any of the various intra-frame or inter-frame prediction tools. Without coding gain, the inseparable transform can be disabled for the prediction tool or its sub-mode. In decision step 309, method 300 checks whether the inseparable transform is disabled for the current prediction tool or its sub-mode. If the inseparable transform is disabled, method 300 proceeds to step 327. Otherwise, if the inseparable transform is enabled and the current prediction method is intra-frame, method 300 proceeds to step 311. If the inseparable transform is enabled and the current prediction method is inter-frame, method 300 proceeds to step 313.

[0059] In some embodiments of decision step 309, non-separable transformations are disabled for affine mode inter-frame prediction. In some embodiments of decision step 309, non-separable transformations are disabled for sub-block mode inter-frame prediction.

[0060] In some embodiments of decision step 309, the non-separable transformation is enabled for the SBT tool. In other embodiments of decision step 309, the non-separable transformation is enabled for the SBT tool when a half-segment is signaled, but disabled for the SBT tool when a quarter-segment is signaled.

[0061] In step 327, the "nst_idx" parameter is inferred to be "0", therefore "nst_idx" is not decoded from bitstream 12. Then, method 300 proceeds to step 329.

[0062] In step 329, in response to "nst_idx" having a value of "0", method 300 determines that the non-separable transformation is not used. Then, method 300 terminates.

[0063] In step 311, in response to enabling the non-separable transform for the current intra-prediction method, method 300 selects a non-separable kernel with dimensions "AxBxCxD" based on the adjusted residual block size. The non-separable kernel dimension can be determined based on Table 2 according to the adjusted residual block size. The maximum number (T) of the non-separable transform coefficients is set to be equal to the value "B" of the selected non-separable kernel with dimensions "AxBxCxD". Then, method 300 proceeds to decision step 315.

[0064] In step 313, in response to enabling the non-separable transform for the current inter-frame prediction method, in some settings, method 300 selects a non-separable kernel with dimensions “AxBxCxD” based on the adjusted residual block size. As in step 311, the non-separable kernel dimension can be determined based on Table 2 according to the adjusted residual block size. The maximum number (T) of the non-separable transform coefficients is set to be equal to the value “B” of the selected subset of non-separable kernels with dimensions “AxBxCxD”.

[0065] In another embodiment of step 313, method 300 selects a subset of kernels (“AxKxCxD”) based on the adjusted residual block size. For example, the dimension of the subset of kernels can be determined based on Table 4 according to the adjusted residual block size. The maximum number (T) of the inseparable transform coefficients is set to be equal to the value “K” of the inseparable kernel of the subset with dimension “AxKxCxD”. Then, method 300 proceeds to decision step 315.

[0066] In step 315, method 300 determines whether the number of coefficients N is greater than the maximum number of transformation coefficients T. If N is greater than T, method 300 proceeds to step 327. Otherwise (N is less than or equal to T), method 300 proceeds to step 317.

[0067] In step 317, method 300 decodes "nst_idx" from bitstream 12. Then, method 300 proceeds to the judgment step 319.

[0068] In step 319, if the value of parameter “nst_idx” is “0”, then method 300 proceeds to step 329. Otherwise (the value of “nst_idx” is “1”, “2”, or “3”), method 300 proceeds to step 321.

[0069] In step 321, method 300 determines that an inseparable transformation is used. Then method 300 terminates.

[0070] Figure 4A This is a schematic diagram illustrating a gradient analysis process according to one or more embodiments of the present disclosure. In some embodiments, an intra-prediction mode can be derived by applying a DIMD-like procedure to a reference block 403 of a unidirectionally predicted inter-frame CU 401. Figure 4A As shown, a 3x3 gradient analysis window 405 can be moved across reference block 403. At each location of the gradient analysis window 405, a local gradient can be computed by applying a filter (e.g., a Sobel filter). Local gradients can be accumulated in a histogram, and the intra-prediction mode is selected using the gradient corresponding to the highest count in the histogram. In some embodiments, the gradient analysis window 405 can move in one-sample increments to cover every location within reference block 403. In other embodiments, the gradient analysis window 405 can move in N-sample increments at a time. This setup enables faster histogram computation and improves the flexibility of the encoding operation.

[0071] Figure 4B This is a schematic diagram illustrating a template matching process according to one or more embodiments of the present disclosure. In some embodiments, an intra-prediction mode can be derived by applying a TIMD-like procedure to a reference block 413 of a unidirectionally predicted inter-frame CU 411. For each candidate intra-prediction mode, a prediction of the reference block 413 can be generated based on adjacent reference samples 415 using an intra-angle prediction method. The candidate intra-prediction mode that generates the best-matching predictor to the reference block sample 413 can be selected as the intra-prediction mode for indexing the transform set from the non-separable transform kernel. In some embodiments, the best match can be determined by finding a predictor that minimizes the sum of absolute differences (SAD) or the sum of absolute transformed differences (SATD), or by comparing the hash values ​​between the predictor and the reference block 413. In some embodiments, when using multiple reference blocks, such as bidirectionally predicted inter-frame CUs, an intra-prediction mode can be derived by applying a TIMD-like procedure to the multiple reference blocks. In this embodiment, the intra-prediction mode is selected by comparing a weighted combination of the multiple reference blocks with a weighted combination of the predictions for each reference block.

[0072] Figure 5This is a schematic diagram illustrating partitioning using an SBT tool according to one or more embodiments of the present disclosure. When the SBT tool is enabled, a signal is used to notify further SBT direction markers to indicate whether the CU is partitioned horizontally or vertically. Figure 5 As shown, when the SBT direction indicator indicates a horizontal division, the first example CU 500A divides the system by a horizontal division. When the SBT direction indicator indicates a vertical division, the second example CU 500B divides the system by a vertical division.

[0073] Example CU 500A includes a shaded region 501A and a white region 503A, and example CU 500B includes a shaded region 501B and a white region 503B. Further SBT position flags are signaled to indicate which region is selected for the inverse transform and which region is zeroed out. For example, when the SBT position flag is "1", the shaded region can be selected for the inverse transform, and the white region is zeroed out; when the SBT position flag is "0", the white region can be selected for the inverse transform, and the shaded region is zeroed out. From the encoder's perspective, the forward transform is applied only to the selected region to generate transform coefficients. From the decoder's perspective, the inverse inseparable transform can be applied to the transform coefficients to generate residual samples that fill the selected region. Therefore, the adjusted residual block size is equal to the size of the selected region.

[0074] exist Figure 5 In the example, the size of the selected region and the size of the zeroing region are depicted as equal. However, the size of the selected region is determined by a further SBT quaternion flag. When the SBT quaternion flag is "0", the size of the selected region is half the size of the CU (i.e., the size of the selected region and the size of the zeroing region are equal). For horizontal splits, the height of the adjusted residual block size is equal to the height of the CU, and the width of the adjusted residual block size is half the width of the CU. For vertical splits, the height of the adjusted residual block size is half the height of the CU, and the width of the adjusted residual block size is equal to the width of the CU. When the SBT quaternion flag is "1", the size of the selected region is one-quarter the size of the CU. For horizontal splits, the height of the adjusted residual block size will be equal to the height of the CU, and the width of the adjusted residual block size will be one-quarter the width of the CU. For vertical splits, the height of the adjusted residual block size will be one-quarter the height of the CU, and the width of the adjusted residual block size will be equal to the width of the CU.

[0075] Figure 6 This is a schematic diagram of a wireless communication system 600 according to one or more embodiments of the present disclosure. The wireless communication system 600 can implement the framework discussed herein. Figure 6As shown, the wireless communication system 600 may include a network device (or base station) 601. Examples of network devices 601 include a base transceiver station (BTS), a Node B (NB), an evolved Node B (eNB or eNodeB), a next-generation Node B (gNB or gNode B), a wireless fidelity (Wi-Fi) access point (AP), etc. In some embodiments, network device 601 may include a relay station, an access point, a vehicle-mounted device, a wearable device, etc. Network device 601 may include wireless connectivity devices for the following communication networks: Global System for Mobile Communications (GSM) networks, Code Division Multiple Access (CDMA) networks, Wideband CDMA (WCDMA) networks, LTE networks, Cloud Radio Access Network (CRAN), networks based on Institute of Electrical and Electronics Engineers (IEEE) 802.11 (e.g., Wi-Fi networks), Internet of Things (IoT) networks, Device-to-Device (D2D) networks, Next Generation Networks (e.g., 5G networks), and future evolved Public Land Mobile Networks (PLMNs). 5G systems or networks may be referred to as New Radio (NR) systems or networks.

[0076] exist Figure 6In this context, the wireless communication system 600 also includes a terminal device 603. The terminal device 603 can be an end-user equipment configured to facilitate wireless communication. The terminal device 603 can be configured to wirelessly connect to the network device 601 according to one or more appropriate communication protocols / standards (e.g., via wireless channel 605). The terminal device 603 can be mobile or fixed. The terminal device 603 can be user equipment (UE), access terminal, user unit, user station, mobile site, mobile station, remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent, or user device. Examples of terminal devices 603 include modems, cellular phones, smartphones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to a wireless modem, in-vehicle devices, wearable devices, Internet of Things (IoT) devices, devices used in 5G networks, devices used in public terrestrial mobile networks, etc.

[0077] For illustrative purposes, Figure 6 Only one network device 601 and one terminal device 603 are shown in the wireless communication system 600. However, in some cases, the wireless communication system 600 may include additional network devices 601 and / or terminal devices 603.

[0078] Figure 7This is a schematic block diagram of a terminal device 703 (e.g., implementing the methods discussed herein) according to one or more embodiments of the present disclosure. As shown, the terminal device 703 includes a processing unit 710 and a memory 720. The processing unit 710 can be configured to execute instructions corresponding to the methods discussed herein and / or other aspects of the above embodiments. It should be understood that the processor 710 in this technical embodiment can be an integrated circuit chip with signal processing capabilities. In implementation, the steps in the above methods can be implemented using hardware integrated logic circuits in the processor 710 or instructions in software form. The processor 710 can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, and discrete hardware components. The methods, steps, and logic block diagrams disclosed in this technical embodiment can be implemented or executed. The general-purpose processor 710 can be a microprocessor, or the processor 710 can be any conventional processor, etc. The steps in the methods disclosed in this technical embodiment can be directly executed or completed by a decoding processor implemented as hardware, or by using a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in memory 720, and processor 710 reads information from memory 720 and, in conjunction with its hardware, completes the steps in the above methods.

[0079] It is understood that the memory 720 in the embodiments of this technology can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random-access memory (RAM) and used as an external cache. By way of example and not limitation, many forms of RAM can be used, such as static random-access memory (SRAM), dynamic random-access memory (DRAM), synchronous dynamic random-access memory (SDRAM), double data rate synchronous dynamic random-access memory (DDR SDRAM), enhanced synchronous dynamic random-access memory (ESDRAM), synchronous link dynamic random-access memory (SLDRAM), and direct Rambus random-access memory (DRRAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these memories and any other suitable types of memory. In some embodiments, the memory may be a non-transitory computer-readable storage medium storing instructions executable by a processor.

[0080] Figure 8This is a schematic block diagram of an electronic device 800 according to one or more embodiments of the present disclosure. The electronic device 800 may include one or more of the following components: a processing component 802, a memory 804, a power supply component 806, a multimedia component 808, an audio component 810, an input / output (I / O) interface 812, a sensor component 814, and a communication component 816.

[0081] Processing component 802 typically controls the overall operation of an electronic device, such as operations related to display, telephone calls, data communication, camera operation, and recording. Processing component 802 may include one or more processors 820 to execute instructions to perform all or part of the steps in the methods described above. Furthermore, processing component 802 may include one or more modules that facilitate interaction between processing component 802 and other components. For example, processing component 802 may include a multimedia module to facilitate interaction between multimedia component 808 and processing component 802.

[0082] Memory 804 is configured to store various types of data to support the operation of the electronic device. Examples of such data include instructions for any application or method running on the electronic device, contact data, phonebook data, messages, pictures, videos, etc. Memory 804 can be implemented using any type of volatile or non-volatile memory device or a combination thereof, such as SRAM, EEPROM, EPROM, PROM, ROM, magnetic storage, flash memory, and magnetic disks or optical disks.

[0083] Power supply assembly 806 supplies power to various components of the electronic device. Power supply assembly 806 may include a power management system, one or more power supplies, and other components associated with the generation, management, and distribution of power for the electronic device.

[0084] Multimedia component 808 may include a screen that provides an output interface between the electronic device and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen may include a TP, the screen may be implemented as a touchscreen to receive input signals from the user. The TP may include one or more touch sensors to sense touches, swipes, and gestures on the TP. The touch sensors may not only sense the boundaries of touch or swipe actions but also detect the duration and pressure associated with the touch or swipe actions. In some embodiments, multimedia component 808 may include a front-facing camera and / or a rear-facing camera. When the electronic device is in an operating mode, such as a photography mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each of the front-facing and rear-facing cameras may be a fixed optical lens system or have focusing and optical zoom capabilities.

[0085] Audio component 810 is configured to output and / or input audio signals. For example, audio component 810 may include a microphone (MIC), and the MIC is configured to receive external audio signals when the electronic device is in an operating mode such as a call mode, recording mode, or voice recognition mode. The received audio signals may also be stored in memory 804 or transmitted via communication component 816. In some embodiments, audio component 810 may also include a speaker configured to output audio signals.

[0086] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, which can be keyboards, click wheels, buttons, etc. Buttons can include, but are not limited to: home button, volume buttons, power button, and lock button.

[0087] Sensor assembly 814 may include one or more sensors configured to provide state assessment of the electronic device in various aspects. For example, sensor assembly 814 may detect the on / off state of the electronic device and the relative positioning of components such as the display and keypad of the electronic device, and sensor assembly 814 may further detect changes in the position of the electronic device or its components, the presence of contact between the user and the electronic device, the orientation or acceleration / deceleration of the electronic device, and temperature changes of the electronic device. Sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 814 may also include an optical sensor configured for imaging applications, such as a complementary metal oxide semiconductor (CMOS) or charge coupled device (CCD) image sensor. In some embodiments, sensor assembly 814 may also include an accelerometer, a gyroscope, a magnetometer, a pressure sensor, or a temperature sensor.

[0088] Communication component 816 is configured to facilitate wired or wireless communication between electronic devices and other devices. The electronic device can access wireless networks based on communication standards, such as Wi-Fi networks, 2nd-generation (2G) or 3G networks, or combinations thereof. In an exemplary embodiment, communication component 816 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, communication component 816 may also include a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth® (BT) technology, and other technologies.

[0089] In an exemplary embodiment, the electronic device 810 may be implemented by one or more ASICs, DSPs, digital signal processing devices (DSPDs), programmable logic devices (PLDs), FPGAs, controllers, microcontrollers, microprocessors, or other electronic components, and is configured to perform the methods described above.

[0090] In exemplary embodiments, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 804 including instructions, wherein the instructions can be executed by a processing component 802 of an electronic device 800 to implement the methods discussed herein. For example, the non-transitory computer-readable storage medium may be ROM, RAM, compact disc ROM (CD-ROM), magnetic tape, floppy disk, optical data storage device, etc.

[0091] Figure 9 This is a flowchart of a decoding method 900 according to one or more embodiments of the present disclosure. Method 900 may be implemented by a system or device (such as the decoding system 100B discussed herein or a device having an inverse transformation module).

[0092] Method 900 begins at step 902, receiving a video bitstream. Method 900 then continues to step 904. In step 904, method 900 determines a first region and a second region of the current block, wherein the second region is the region in the current block other than the first region. In some embodiments, the first and second regions can be determined based on parameters of a sub-block transform partitioning tool. In some other embodiments where sub-block transform partitioning is not applied, the first region may be the same as the current block, in which case the second region is empty. Method 900 then continues to step 906. In step 906, method 900 determines whether an inseparable transform is enabled. If an inseparable transform is enabled, method 900 continues to step 908. Otherwise, the method terminates. In step 908, method 900 derives samples in the first region of the current block by performing an inseparable transform on one or more coefficients. This inseparable transform may also be referred to as an inverse inseparable transform, as described elsewhere in this disclosure. The one or more coefficients may be transform coefficients of the current block decoded from the video bitstream. Method 900 then terminates.

[0093] In some embodiments, a first region and a second region are determined by dividing the current block into two sub-blocks. The current block may also be referred to as a residual block, prediction block, coding block, or coding unit. The first region and the second region may also be referred to as a transform block.

[0094] In some embodiments, as described above Figure 5 The size and position of the first region are determined based on the parameters of the sub-block transformation. In some embodiments, if a quaternion parameter is set, the size of the first region is one-quarter of the current block; otherwise, the size of the first region is one-half of the current block. In some embodiments, the first region is determined by dividing the current block vertically or horizontally according to a direction parameter.

[0095] In some embodiments, if a position parameter is set, the first region is located at the top left corner of the current block; otherwise, the first region is located at the bottom right corner of the current block.

[0096] In some embodiments, the inseparable transformation can be the inseparable principal transformation.

[0097] In some embodiments, the number of samples in the two regions of the current block can be set to 0.

[0098] In some embodiments, in response to determining that the “nst_idx” parameter has a non-“0” value, an inseparable transformation is enabled.

[0099] In some embodiments, in response to the current prediction method being an affine inter-frame prediction method, the nst_idx parameter can be inferred to be 0 (i.e., disabling the non-separable transformation).

[0100] In some embodiments, in response to the current prediction method being the sub-block inter-frame prediction method, the nst_idx parameter can be inferred to be 0 (i.e., disabling the non-separable transformation).

[0101] In some embodiments, in response to the nst_idx parameter having a non-"0" value, an inseparable transform is performed using an inseparable transform matrix. The inseparable transform matrix is ​​selected from the inseparable transform kernels based on the value of the nst_idx parameter and the value of the intra-prediction mode, and the inseparable transform kernel is selected in response to the size of the current block.

[0102] In some embodiments, in response to the current prediction method being an inter-prediction method, the intra-prediction mode can be derived by applying a DIMD-like procedure. In other embodiments, the intra-prediction mode can be derived by a TIMD-like procedure.

[0103] In some embodiments, an inseparable transformation matrix may be selected based on the type of inter-frame prediction method.

[0104] In some embodiments, step 906 of method 900 further includes determining the number “N” of the one or more coefficients and determining the maximum number “T” of the inseparable transform coefficients. In response to determining that “N” is less than or equal to “T”, method 900 decodes the nst_idx parameter from the video bitstream; otherwise (“N” is greater than “T”), method 900 infers that the value of the nst_idx parameter is “0”.

[0105] In some embodiments, the maximum number of inseparable transform coefficients “T” is set to be equal to the size of the dimension “B” of the selected inseparable transform kernel.

[0106] In some embodiments of step 906 of method 900, if the size of the first region is one-quarter of the current block, then the non-separable transformation is not enabled.

[0107] Other precautions The specific embodiments of the disclosed technology described above are not intended to be exhaustive or to limit the disclosed technology to the specific forms disclosed above. While specific examples of the disclosed technology have been described above for illustrative purposes, various equivalent modifications can be made within the scope of the described technology, as will be recognized by those skilled in the art. For example, although processes or blocks are presented in a given order, alternative implementations may execute routines with steps or employ systems with blocks in a different order, and some processes or blocks may be deleted, moved, added, subdivided, combined, and / or modified to provide alternative implementations or sub-combinations. Each of these processes or blocks can be implemented in various different ways. Furthermore, although processes or blocks are sometimes shown to be executed sequentially, these processes or blocks may alternatively be executed or implemented in parallel, or may be executed at different times. Moreover, any specific figures mentioned herein are merely examples; alternative implementations may employ different values ​​or ranges.

[0108] In the detailed description, numerous specific details are set forth to provide a thorough understanding of the art described herein. In other embodiments, the art described herein may be practiced without these specific details. In other instances, well-known features, such as specific functions or routines, have not been described in detail to avoid unnecessarily obscuring this disclosure. References to “implementation / exemplification,” “an embodiment / exemplification,” etc., in this specification mean that a particular feature, structure, material, or characteristic described is included in at least one embodiment of the described art. Therefore, the appearance of such phrases in this specification does not necessarily refer to the same implementation / exemplification. On the other hand, these references are not necessarily mutually exclusive. Furthermore, a particular feature, structure, material, or characteristic may be combined in any suitable manner in one or more implementations / exemplifications. It should be understood that the various embodiments shown in the accompanying drawings are merely illustrative representations and are not necessarily drawn to scale.

[0109] For clarity, this document does not elaborate on certain details of the structures or processes that are well-known and commonly associated with communication systems and subsystems, but may unnecessarily obscure some important aspects of the disclosed technology. Furthermore, although the following disclosure sets forth several embodiments of different aspects of this disclosure, several other embodiments may have different configurations or different components than those described in this section. Therefore, the disclosed technology may have other embodiments with additional elements or without some of the elements described below.

[0110] Many implementations or aspects of the techniques described herein can take the form of computer or processor-executable instructions comprising routines executed by a programmable computer or processor. Those skilled in the art will understand that the described techniques can be practiced on computer or processor systems other than those shown and described below. The techniques described herein can be implemented in a dedicated computer or data processor specifically programmed, configured, or constructed to execute one or more of the computer-executable instructions described below. Therefore, the terms “computer” and “processor” as commonly used herein refer to any data processor. Information processed by these computers and processors can be presented on any suitable display medium. Instructions for performing computer or processor-executable tasks can be stored in or on any suitable computer-readable medium, including hardware, firmware, or a combination of hardware and firmware. Instructions can be contained in any suitable memory device, including, for example, a flash drive and / or other suitable media.

[0111] The term "and / or" in this specification is used only to describe the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can represent the following three situations: A exists alone, both A and B exist, and B exists alone.

[0112] Based on the specific embodiments described above, these and other changes can be made to the disclosed technology. While the specific embodiments describe certain examples of the disclosed technology and the intended best mode, the disclosed technology can be practiced in many ways, however detailed the description above may appear in the text. The details of the system can vary considerably in its specific embodiments, while still being covered by the technology disclosed herein. As stated above, specific terms used when describing certain features or aspects of the disclosed technology should not be construed as implying that the term is redefined herein as limited to any particular characteristic, feature, or aspect of the disclosed technology associated with that term. Therefore, the invention is not limited, but is defined by the appended claims. Generally, the terms used in the appended claims should not be construed as limiting the disclosed technology to the specific examples disclosed in the specification, unless these terms are expressly defined in the specific embodiments section above.

[0113] Those skilled in the art will recognize that, in conjunction with the examples described in the embodiments disclosed herein, the units and algorithm steps can be implemented by electronic hardware or a combination of computer software and electronic hardware. Whether the function is performed by hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but this should not be considered as exceeding the scope of this disclosure.

[0114] Although certain aspects of the invention are presented below in the form of specific claims, the applicant contemplates various aspects of the invention in the form of any number of claims. Therefore, the applicant reserves the right to file appended claims after the filing of this disclosure, in order to seek such appended claims in this disclosure or in a subsequent application.

Claims

1. A video decoding method, comprising: Determine a first region and a second region of the current block, wherein the second region is the region in the current block other than the first region; and Samples in the first region of the current block are derived by performing an inseparable transformation on one or more coefficients.

2. The method according to claim 1, wherein, The first region and the second region are determined by dividing the current block into two sub-blocks.

3. The method according to claim 2, wherein, The size and position of the first region are determined based on the parameters of the sub-block transformation.

4. The method according to claim 3, wherein, If a quaternion parameter or a first parameter indicating the size of the first region is set, then the size of the first region is one-quarter of the current block; otherwise, the size of the first region is one-half of the current block. as well as The first region is determined by dividing the current block vertically or horizontally according to a direction parameter or a second parameter indicating the directionality of the division.

5. The method according to claim 3, wherein, If a position parameter or a third parameter indicating the position of the first region is set, the position of the first region is located at the upper left corner of the current block; otherwise, the position of the first region is located at the lower right corner of the current block.

6. The method according to claim 1, wherein, The inseparable transformation is the inseparable principal transformation.

7. The method according to claim 1, further comprising: Set the samples in the second region of the current block to equal 0.

8. A video encoding method, comprising: Determine a first region and a second region of the current block, wherein the second region is the region in the current block other than the first region; and One or more coefficients are derived by performing an inseparable transformation on samples in the first region of the current block.

9. The method according to claim 8, wherein, The first region and the second region are determined by dividing the current block into two sub-blocks.

10. The method according to claim 9, wherein, The size and position of the first region are determined based on the parameters of the sub-block transformation.

11. The method according to claim 10, wherein, If a quaternion parameter or a first parameter indicating the size of the first region is set, then the size of the first region is one-quarter of the current block; otherwise, the size of the first region is one-half of the current block. as well as The first region is determined by dividing the current block vertically or horizontally according to a direction parameter or a second parameter indicating the directionality of the division.

12. The method according to claim 10, wherein, If a position parameter or a third parameter indicating the position of the first region is set, the position of the first region is located at the upper left corner of the current block; otherwise, the position of the first region is located at the lower right corner of the current block.

13. The method according to claim 8, wherein, The inseparable transformation is the inseparable principal transformation.

14. The method according to claim 8, further comprising: Set the samples in the second region of the current block to equal 0.

15. A video decoding method, comprising: Receive video stream; Determine whether to enable non-separable transformations for the current block; as well as In response to determining that the inseparable transform is enabled, samples in the current block are derived by performing an inseparable transform on one or more coefficients decoded from the video bitstream.

16. The method according to claim 15, wherein, In response to determining that the "nst_idx" parameter has a non-"0" value, the inseparable transformation is enabled.

17. The method according to claim 16, wherein, Since the current prediction method is an affine mode inter-frame prediction method, the nst_idx parameter is inferred to be 0.

18. The method according to claim 16, wherein, In response to the current prediction method being the sub-block mode inter-frame prediction method, the nst_idx parameter is inferred to be 0.

19. The method according to claim 16, wherein, In response to the nst_idx parameter having a non-"0" value, the inseparable transformation is performed using the inseparable transformation matrix; Based on the value of the nst_idx parameter and the value of the intra-prediction mode, the inseparable transformation matrix is ​​selected from the inseparable transformation kernel; as well as In response to the size of the current block, the indivisible transform kernel is selected.

20. The method according to claim 19, wherein, In response to the current prediction method being an inter-frame prediction method, the intra-frame prediction mode is derived.

21. The method according to claim 20, wherein, The intra-frame prediction mode is derived by applying the DIMD procedure.

22. The method according to claim 20, wherein, The intra-frame prediction mode is derived by applying a TIMD-like procedure.

23. The method according to claim 20, wherein, The inseparable transformation matrix is ​​selected based on the type of inter-frame prediction method.

24. The method of claim 16, further comprising: Determine the number ("N") of the one or more coefficients; Determine the maximum number ("T") of the inseparable transformation coefficients; as well as In response to determining that "N" is less than or equal to "T", the nst_idx parameter is decoded from the video bitstream; otherwise, the value of the nst_idx parameter is inferred to be "0".

25. The method according to claim 24, wherein, The maximum number "T" of the inseparable transform coefficients is set to be equal to the size "B" of the dimension of the selected inseparable transform kernel.

26. The method according to claim 24, wherein, The maximum number "T" of the inseparable transform coefficients is set to a value less than the size "B" of the dimension of the selected inseparable transform kernel.

27. The method according to claim 15, wherein, The current block is the first region of the partition determined by the parameters of the Sub-Block Transform (SBT).

28. The method according to claim 27, wherein, If the size of the first region is one-quarter of the current coding unit, then the inseparable transformation is not enabled.

29. A video coding method, comprising: Determine whether to enable non-separable transformations for the current block; In response to determining that the inseparable transformation is enabled, one or more coefficients are derived by performing the inseparable transformation on the samples in the current block; as well as The one or more coefficients are encoded into the video stream.

30. The method according to claim 29, wherein, In response to determining that the "nst_idx" parameter has a non-"0" value, the inseparable transformation is enabled.

31. The method according to claim 30, wherein, Since the current prediction method is an affine mode inter-frame prediction method, the nst_idx parameter is inferred to be 0.

32. The method according to claim 30, wherein, In response to the current prediction method being the sub-block mode inter-frame prediction method, the nst_idx parameter is inferred to be 0.

33. The method according to claim 30, wherein In response to the nst_idx parameter having a non-"0" value, the inseparable transformation is performed using the inseparable transformation matrix; Based on the value of the nst_idx parameter and the value of the intra-prediction mode, the inseparable transform matrix is ​​selected from the inseparable transform kernel; and In response to the size of the current block, the indivisible transform kernel is selected.

34. The method according to claim 33, wherein, In response to the current prediction method being an inter-frame prediction method, the intra-frame prediction mode is derived.

35. The method according to claim 34, wherein, The intra-frame prediction mode is derived by applying the DIMD procedure.

36. The method according to claim 34, wherein, The intra-frame prediction mode is derived by applying a TIMD-like procedure.

37. The method according to claim 34, wherein, The inseparable transformation matrix is ​​selected based on the type of inter-frame prediction method.

38. The method of claim 30, further comprising: Determine the number ("N") of the one or more coefficients; Determine the maximum number ("T") of the inseparable transformation coefficients; as well as In response to determining that "N" is less than or equal to "T", the nst_idx parameter is encoded into the video bitstream; otherwise, the value of the nst_idx parameter is inferred to be "0".

39. The method according to claim 38, wherein, The maximum number "T" of the inseparable transform coefficients is set to be equal to the size "B" of the dimension of the selected inseparable transform kernel.

40. The method according to claim 38, wherein, The maximum number "T" of the inseparable transform coefficients is set to a value less than the size "B" of the dimension of the selected inseparable transform kernel.

41. The method according to claim 29, wherein, The current block is the first region of the partition determined by the parameters of the Sub-Block Transform (SBT).

42. The method according to claim 41, wherein, If the size of the first region is one-quarter of the current coding unit, then the inseparable transformation is not enabled.

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