A task dynamic allocation method based on a multi-core embedded system

By optimizing the resource partitioning line position through a master-slave processing core architecture and PID controller, the problem of unreasonable task allocation in multi-core embedded systems is solved, improving system performance and resource utilization. It is particularly suitable for tasks with high real-time requirements.

CN122173262APending Publication Date: 2026-06-09BEIJING HUAHANG RADIO MEASUREMENT & RES INST

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
BEIJING HUAHANG RADIO MEASUREMENT & RES INST
Filing Date
2024-12-19
Publication Date
2026-06-09

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Abstract

The present application relates to a kind of task dynamic allocation method based on multi-core embedded system, belong to embedded technical field, solve the problem of not high resource utilization and system performance caused by the unreasonable existing task allocation.The method includes: S1, the multiple processing cores of embedded system are divided into one main processing core and other slave processing core;Construct partition line system;S2, main processing core receives task frame by frame, collects data resources;Call partition line system to obtain the position of resource partition line and partition task, and distribute each subtask of partition to slave processing core;S3, slave processing core receives corresponding subtask and carries out identification and processing, and feedback target quantity and processing result to main processing core;S4, main processing core receives and splices the processing result of each subtask of partition, and puts the target quantity of each partition received into data resource, and repeats S2-S4 until completing all frame tasks. Efficient dynamic task allocation is realized.
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Description

Technical Field

[0001] This invention relates to the field of embedded technology, and in particular to a method for dynamic task allocation based on a multi-core embedded system. Background Technology

[0002] With the development of modern society towards intelligence, informatization, and networking, the development of embedded systems has gained extensive room for growth. Both domestically and internationally, embedded systems are undoubtedly one of the most popular and promising industrial application fields. Embedded systems typically include multiple processing cores, and how to enable these cores to perform the same task in parallel efficiently and effectively, thereby improving system processing performance, is currently a key research focus.

[0003] For multiple processing cores executing a single task, some solutions involve dynamically allocating memory resources through the operating system, while research on task allocation direction is limited to cross-cutting; other solutions utilize heterogeneous multi-core processors to dynamically manage and allocate system resources based on the differences in performance requirements and behavior of different applications; still others involve redesigning the software architecture based on the processor architecture and participating in the management of core computing resources.

[0004] In existing cross-cutting methods, because the dimension of the input signal is smaller than the dimension of the output signal, a controlled blind zone will appear as the dividing line moves, resulting in the loss of key information; solutions using heterogeneous multi-core processors are prone to creating gaps in memory resources when configuring system resources, which greatly reduces the degree of system optimization; solutions redesigned according to the processor architecture involve hardware, which greatly increases the system debugging time and is not conducive to the development and debugging of designers. Summary of the Invention

[0005] Based on the above analysis, the embodiments of the present invention aim to provide a dynamic task allocation method based on a multi-core embedded system to solve the problem of low resource utilization and system performance caused by unreasonable task allocation in the existing system.

[0006] This invention provides a method for dynamic task allocation based on a multi-core embedded system, comprising the following steps:

[0007] S1. Divide the multiple processing cores of the embedded system into one main processing core and other slave processing cores; construct a partitioning system to calculate the position of resource partitioning lines;

[0008] S2. The main processing core receives tasks frame by frame and collects data resources; after calling the partitioning system to obtain the position of the resource partitioning line, it partitions the tasks and distributes the subtasks of each partition to the slave processing cores.

[0009] S3. Receive the corresponding subtasks from the processing core, identify and process them, and feed back the target quantity and processing results to the main processing core.

[0010] S4. The main processing core receives the processing results of the subtasks of each partition and splices them together to obtain the processing results of the task. It then puts the target quantity of each partition into the data resource and repeats S2 to S4 until all frame tasks are completed.

[0011] Based on a further improvement of the above method, the partition line system includes one or more PID controllers, each PID controller controls one resource partition line, and calculates the position of the corresponding resource partition line according to the data resources.

[0012] Based on further improvements to the above method, the resource partitioning line divides each frame of tasks into horizontal or vertical parallel partitions.

[0013] Based on a further improvement to the above method, each PID controller calculates the position of the corresponding resource partition line according to the data resources, including:

[0014] If the target quantity for each partition is not available in the data resources, the position of the resource partition line is calculated based on the number of resource partition lines and the size of the task, in a uniform distribution.

[0015] If there are target quantities for each partition in the data resource, each PID controller calculates the position of the resource partition line based on the target quantities of the partitions on both sides of the controlled resource partition line.

[0016] Based on the further improvement of the above method, each PID controller calculates the position of the resource partition line according to the target number of the partitions on both sides of the controlled resource partition line. It uses the difference between the target number of the partitions on both sides of the corresponding resource partition line as the input signal, and controls the position of the resource partition line through proportional coefficient, integral coefficient and derivative coefficient. It outputs the moving distance of the resource partition line and adds it to the current position of the resource partition line to obtain the new position.

[0017] Based on a further improvement to the above method, each PID controller calculates the position of the resource partition line according to the target number of partitions on both sides of the controlled resource partition line using the following formula:

[0018]

[0019] Among them, Loc j {k} and Loc j {k-1} represent the positions of the j-th resource segmentation line in the (k+1)-th and k-th frames of the task, respectively, where Kp represents the scaling factor, and T represents the task sampling period. i T represents the integration time. dLet r represent the differential time, r represent the discretized integral variable, and e(j,k), e(j,r), and e(j,k-1) represent the error signals when calculating the position of the j-th resource segmentation line in the k-th, r-th, and k-1-th frames of the task, respectively. These are obtained by calculating the difference between the number of targets on both sides of the resource segmentation line in two adjacent frames of the task.

[0020] Based on the above method, the partition line system also includes applying windowing constraints to the resource partition lines calculated each time, adjusting the positions of resource partition lines that do not meet the windowing constraints, and using the adjusted positions as the calculated positions.

[0021] A further improvement to the above method involves applying a windowing constraint to the resource partition lines calculated each time. This constraint uses the position of the resource partition line calculated each time as the predicted position. If the predicted position of each resource partition line does not exceed the predicted positions of the resource partition lines on both sides and does not exceed the size of the task, then the windowing constraint is satisfied, and the predicted position is used as the calculated position. Otherwise, the windowing constraint is not satisfied, and the predicted position is adjusted.

[0022] Based on further improvements to the above method, the positions of resource partition lines that do not meet the windowing restrictions are adjusted, including:

[0023] If the predicted position of a resource segment line exceeds the predicted position of its next resource segment line, then the midpoint between the original position of the resource segment line and the predicted position of its next resource segment line is taken as the adjusted position.

[0024] If the predicted position of a resource segment line exceeds the predicted position of its previous resource segment line, then the midpoint between the original position of the resource segment line and the predicted position of its previous resource segment line is taken as the adjusted position.

[0025] Based on a further improvement of the above method, since the number of processing cores is greater than 1, the number of resource partition lines is obtained by subtracting 1 from the number of processing cores.

[0026] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0027] 1. By communicating between the master and slave processing cores in the embedded system, the master processing core receives real-time tasks, uses a partitioning system to reasonably divide the tasks, and enables each slave processing core to complete its own sub-tasks concurrently and efficiently. The master processing core then splices the sub-task processing results to achieve closed-loop control of the tasks. This greatly improves the real-time performance of the embedded system at a very low cost, reduces time complexity, and increases the data processing capability of the embedded system. It is particularly suitable for various tasks with high real-time requirements.

[0028] 2. A PID negative feedback closed-loop control method is adopted. The position of the resource partition line is dynamically adjusted according to the feedback of the difference in the number of targets, so that the resource partition line is set in the optimal position. This allows for reasonable partitioning of tasks, ensuring that the task processing volume of each partition is uniform and that the processing time of each core for each partition is consistent, thus maximizing the use of the hardware resources of the multi-core embedded environment.

[0029] In this invention, the above-described technical solutions can be combined with each other to achieve more preferred combinations. Other features and advantages of this invention will be set forth in the following description, and some advantages may become apparent from the description or be learned by practicing the invention. The objects and other advantages of this invention can be realized and obtained from what is particularly pointed out in the description and drawings. Attached Figure Description

[0030] The accompanying drawings are for illustrative purposes only and are not intended to limit the invention. Throughout the drawings, the same reference numerals denote the same parts.

[0031] Figure 1 This is a flowchart of a task dynamic allocation method based on a multi-core embedded system according to an embodiment of the present invention;

[0032] Figure 2 This is a schematic diagram of the communication structure of the master-slave processing cores in a multi-core embedded system according to an embodiment of the present invention;

[0033] Figure 3 This is an example diagram of the simulation results of the difference in the number of targets on both sides of the resource segmentation line in an embodiment of the present invention;

[0034] Figure 4 This is a flowchart illustrating the process of a processing core in a multi-core embedded system according to an embodiment of the present invention.

[0035] Figure 5 This is a flowchart illustrating the workflow of the main processing core in a multi-core embedded system according to an embodiment of the present invention. Detailed Implementation

[0036] Preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings, which form part of this application and are used together with the embodiments of the present invention to illustrate the principles of the present invention, but are not intended to limit the scope of the present invention.

[0037] A specific embodiment of the present invention discloses a method for dynamic task allocation based on a multi-core embedded system, such as... Figure 1 As shown, it includes the following steps:

[0038] S1. Divide the multiple processing cores of the embedded system into one main processing core and other slave processing cores; construct a partitioning system to calculate the position of resource partitioning lines;

[0039] S2. The main processing core receives tasks frame by frame and collects data resources; after calling the partitioning system to obtain the position of the resource partitioning line, it partitions the tasks and distributes the subtasks of each partition to the slave processing cores.

[0040] S3. Receive the corresponding subtasks from the processing core, identify and process them, and feed back the target quantity and processing results to the main processing core.

[0041] S4. The main processing core receives the processing results of the subtasks of each partition and splices them together to obtain the processing results of the task. It then puts the target quantity of each partition into the data resource and repeats S2 to S4 until all frame tasks are completed.

[0042] In practice, through communication between the master and slave processing cores in the embedded system, the master processing core receives real-time tasks, divides each frame of tasks into multiple partitions using a segmentation system, passes the subtasks of each partition to the slave processing core, collects the resources processed by the slave processing core and splices them together; while the slave processor concurrently processes the subtasks of each partition, thereby maximizing the use of the hardware resources of the multi-core embedded environment and greatly improving processing efficiency.

[0043] Specifically, in step S1, one of the multiple processing cores is selected as the master processing core, and the other processing cores are selected as slave processing cores. The number of slave processing cores is greater than 1. The master and slave processing cores are arranged in a quincunx pattern and establish data flow communication with each other.

[0044] For example, when an embedded system includes four processing cores, the communication structure diagram of the master and slave processing cores is as follows: Figure 2 As shown.

[0045] Furthermore, since each slave processing core is responsible for a subtask of one partition, the number of resource partitions is obtained by subtracting 1 from the number of slave processing cores. For example, if 3 slave processing cores can handle subtasks of 3 partitions, then 2 resource partitions are set to divide the task of each frame.

[0046] It should be noted that treating tasks (especially computationally intensive ones) as a single unit significantly increases computation time and impacts system real-time performance. Partitioning tasks and processing them separately across different partitions accelerates processing. However, due to real-time requirements, when time constraints limit task processing and a partition has too many targets with high computational complexity, it may fail to traverse the entire partition, leading to the loss of some target information. Therefore, the key to task partitioning is distributing the computational load evenly across different partitions. The location of the resource partitioning line becomes crucial, and calculating its position is a control process. This embodiment utilizes a partitioning line system to determine the optimal location of the resource partitioning line.

[0047] Specifically, in this embodiment, the resource partitioning line divides each frame of tasks into horizontal or vertical parallel partitions. The partitioning line system includes one or more PID controllers, each PID controller controlling one resource partitioning line; that is, each PID controller is used to calculate the position of the corresponding resource partitioning line. The partitioning line system is deployed in the main processing core's program and is called by the main processing core.

[0048] In step S2, the embedded system powers on and initializes, and the main processing core receives tasks frame by frame. In this embodiment, the tasks need to be processed sequentially, with a certain correlation between frames. Furthermore, each task contains a target, and the computational load for each frame mainly involves target identification and detection. For example, in the application scenario of UAV visual tracking, the complex image information received by the UAV's camera sensor or infrared sensor requires complex processing to achieve target identification, surrounding environment analysis, obstacle extraction, and path planning. In the application scenario of face recognition, a large amount of facial information needs to be extracted from surveillance videos and identified and classified using intelligent neural networks. These tasks all have high real-time requirements.

[0049] After receiving a task frame, the main processing core collects data resources. The initial data resources mainly consist of task-related data, including but not limited to the task size. For example, if the task is to process a received image, each task frame corresponds to an image. After receiving an image frame, the pixel size of the image is obtained to facilitate setting the initial position of the resource partition lines.

[0050] Furthermore, the main processing core invokes the partitioning system, where each PID controller calculates the position of the corresponding resource partitioning line based on the data resources.

[0051] It should be noted that PID control (proportional-integral-derivative control) is a closed-loop control based on negative feedback. The PID controller calculates a control input to adjust the system based on the deviation between the feedback signal of the current system state and the desired value. The PID controller consists of three control submodules: proportional, integral, and derivative. Proportional control generates the control input based on the magnitude of the deviation; integral control eliminates steady-state error and improves control accuracy; and derivative control predicts and adjusts for future system changes.

[0052] In this embodiment, if the target quantity for each partition does not exist in the data resource, the position of the resource partition line is calculated according to the number of resource partition lines and the size of the task, and the position of the resource partition line is an integer.

[0053] For example, if the pixel size of a task frame is 1000*600, the initial position is 500 if it is vertically partitioned by a single resource partition line, and 333 and 666 respectively if it is vertically partitioned by two resource partition lines. If the position is not divisible, it is rounded according to a preset rule.

[0054] The uniform distribution of resource partition lines mainly addresses two scenarios. One scenario is when the main processing core receives the first frame of the task, which is equivalent to initializing the position of the resource partition lines. The other scenario is when all the slave processing cores have not identified the target. Preferably, a time threshold is added to limit the number of targets identified by all slave processing cores after the time threshold is exceeded, then the default uniform distribution position is restored.

[0055] If there are target quantities for each partition in the data resource, each PID controller calculates the position of the resource partition line based on the target quantities of the partitions on both sides of the controlled resource partition line.

[0056] Specifically, each PID controller uses the difference in the number of targets in the partitions on both sides of the corresponding resource partition line as its input signal. It controls the position of the resource partition line through proportional, integral, and derivative coefficients, outputting the movement distance of the resource partition line, which is then added to the current position of the resource partition line to obtain the new position. In other words, the position of the resource partition line calculated based on the number of targets fed back from the processing core is the position applied to the next frame of the task, used to partition the task in the next frame.

[0057] The formula is expressed as follows:

[0058]

[0059] Among them, Loc j {k} and Loc j{k-1} represent the positions of the j-th resource segmentation line in the (k+1)-th and k-th frames of the task, respectively, where k>1, Kp represents the scaling factor, and T represents the task sampling period. i T represents the integration time. d Let represent the differential time, r represent the discretized integral variable, and e(j,k), e(j,r), and e(j,k-1) represent the error signals when calculating the position of the j-th resource segmentation line in the k-th, r-th, and k-1-th frames of the task, respectively.

[0060] The error signal in the above formula is obtained by calculating the difference between the number of targets on both sides of the resource segmentation line in two adjacent frames, and is expressed by the following formula:

[0061]

[0062] Where n represents the total number of resource partition lines, N represents the total number of partitions, and n = N-1; Delta_Target_Num n {j,k} and Delta_Target_Num n {j,k-1} represent the difference in the number of targets on both sides of the j-th resource segmentation line in the k-th and (k-1)-th frames, respectively, where Target_Num N {j,k} and Target_Num N {j+1,k} represent the target quantities of the j-th partition and the (j+1)-th partition, which are divided by the j-th resource partition line in the k-th frame task, respectively.

[0063] For example, using a video segment with a pixel size of 1000*600 and 500 frames as the task, a PID controller is used to control a resource partitioning line to vertically partition the image. The initial position of the resource partitioning line is 500. A cluster of 100 targets is set with a center position of (400, 350), existing in the form of a step signal and remaining stationary. The simulation results of the difference in the number of targets on both sides of the resource partitioning line after debugging the PID controller are as follows. Figure 3 As shown. By Figure 3 It can be seen that the reaction time of the dividing line system is 160 milliseconds, the overshoot is less than 5%, the disturbance caused by the derivative element does not affect the stability of the system, the system eventually stabilizes, and the PID controller has a good control effect.

[0064] It should be noted that multiple resource partition lines are arranged in parallel in a fixed order. For example, when performing vertical partitioning, the first resource partition line is to the left of the second resource partition line, and the second resource partition line is between the first and third resource partition lines. However, when a partition experiences excessively strong signals (a large number of targets), the resource partition lines used to partition that partition may exhibit a skipping behavior. For instance, the position of the second resource partition line calculated by the second PID controller might shift to between the third and fourth partition lines, or to the left of the first partition line. Therefore, it is necessary to apply windowing constraints to each calculated resource partition line and adjust the positions of resource partition lines that do not meet the windowing constraints, using the adjusted positions as the calculated positions.

[0065] Specifically, applying a windowing constraint to resource partition lines involves using the calculated position of each resource partition line as the predicted position. If the predicted position of each resource partition line does not exceed the predicted positions of the resource partition lines on either side of it, and does not exceed the size of the task, then the windowing constraint is satisfied, and the predicted position is used as the calculated position; otherwise, the windowing constraint is not satisfied, and the predicted position is adjusted.

[0066] Furthermore, adjust the position of resource partition lines that do not meet the windowing restrictions, including:

[0067] If the predicted position of a resource segment line exceeds the predicted position of its next resource segment line, then the midpoint between the original position of the resource segment line and the predicted position of its next resource segment line is taken as the adjusted position.

[0068] If the predicted position of a resource segment line exceeds the predicted position of its previous resource segment line, then the midpoint between the original position of the resource segment line and the predicted position of its previous resource segment line is taken as the adjusted position.

[0069] After determining the location of the resource partition line, the main processing core partitions the task, distributes the subtasks of each partition to the slave processing cores for processing, and waits to receive the feedback results from the slave processing cores. Then, in step S3, each slave processing core receives the corresponding subtask for identification and processing.

[0070] Preferably, the main processing core writes the subtasks of each partition into shared memory, sends a Doorbell signal to inform each slave processing core that there are new subtasks to process, and proceeds to step S3. Each slave processing core reads the data in shared memory and identifies and processes its own subtask. This interrupt-triggered method ensures the integrity of the data information received by the slave processing cores, while avoiding slave processing cores working too early or too late, and preventing conflicts between the slave processing cores' processing in step S3 and the main processing core's subtask allocation process in step S2, as well as the main processing core's process of splicing subtask processing results in step S4.

[0071] In step S3, the workflow of each processing core is as follows: Figure 4 As shown, after collecting the data resources of the partitioned subtasks, target identification and counting are performed, the number of targets is fed back to the main processing core, and the data resources of the subtasks are processed around the targets. The processing results are fed back to the main processing core, the current processing flow ends, and the process waits for the next processing flow.

[0072] In step S4, the main processing core receives the processing results of each slave processing core for its respective subtask and concatenates them to form the complete processing result of the task. Simultaneously, it places the target quantity of each partition into the data resource. At this point, the main processing core completes the control processing loop for the current frame task and returns to step S2 to begin the receiving and processing loop for the next frame task: The main processing core receives the next frame task as a new frame task, calculates the new position of the resource partition line based on the data resource partitioning system, partitions the new frame task, distributes the subtasks of each new partition to the slave processing cores, and executes steps S3 and S4 again to complete the control processing loop for the new frame task. As the main processing core receives tasks frame by frame, it iteratively executes S2 to S4 until all frame tasks are completed. The workflow of the main processing core is as follows: Figure 5 As shown.

[0073] It should be noted that the above steps S2-S4 are an example of two-dimensional task processing to illustrate how to use a PID controller to dynamically allocate tasks. If it is a multi-dimensional task, the task can still be partitioned based on a certain dimension, so that the information contained in the entire task is distributed as evenly as possible to each sub-partition, realizing multi-threaded pool processing of tasks. This allows the multi-core embedded system to make fuller use of hardware resources, meet real-time requirements, and reduce algorithm time complexity.

[0074] For example, a multi-target cluster simulation video was used as the task. The simulation video had 500 frames and a size of 1000*600, containing noise, moving target clusters, fixed interference signals, and moving interference signals. Each frame was divided into four partitions using three resource partition lines, with initial positions of 250, 500, and 750. Experiments were conducted without using the partition line system, and with the partition line system constructed, where three PID controllers each controlled one resource partition line in a closed-loop control process. The experimental results are shown in Table 1.

[0075] Table 1 Comparison of Packet Loss Rates for Each Partition

[0076] Partition 1 Partition 2 Partition 3 Partition 4 No PID controller 0.882 0.152 0.686 0.036 There is a PID controller 0.004 0.001 0.008 0.003

[0077] As can be seen from Table 1, under the action of the PID controller, the packet loss rate of each partition was reduced by more than 90%, and the performance was significantly improved.

[0078] Compared with existing technologies, this embodiment provides a dynamic task allocation method based on a multi-core embedded system. Through communication between the master and slave processing cores in the embedded system, the master processing core receives real-time tasks, and a partitioning system is used to rationally partition the tasks. This allows each slave processing core to concurrently and efficiently complete its respective sub-tasks. The master processing core then concatenates the sub-task processing results to achieve closed-loop control of the tasks. This significantly improves the real-time performance of the embedded system at a very low cost, reduces time complexity, and increases the data processing capabilities of the embedded system. It is particularly suitable for various tasks with high real-time requirements. Employing a PID negative feedback closed-loop control method, the position of the resource partitioning line is dynamically adjusted based on feedback from differences in the number of targets, ensuring that the resource partitioning line is set at the optimal position. This rationally partitions the tasks, ensuring uniform task processing load in each partition and consistent processing time for each processing core across all partitions, maximizing the use of hardware resources in the multi-core embedded environment.

[0079] Those skilled in the art will understand that all or part of the processes of the methods described in the above embodiments can be implemented by a computer program instructing related hardware, and the program can be stored in a computer-readable storage medium. The computer-readable storage medium may be a disk, optical disk, read-only memory, or random access memory, etc.

[0080] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for dynamic task allocation based on a multi-core embedded system, characterized in that, Includes the following steps: S1. Divide the multiple processing cores of the embedded system into one main processing core and other slave processing cores; Construct a partition line system to calculate the location of resource partition lines; S2. The main processing core receives tasks frame by frame and collects data resources; after calling the segmentation system to obtain the position of the resource segmentation line, it partitions the tasks and distributes the sub-tasks of each partition to the slave processing cores. S3. The corresponding sub-tasks are received from the processing core for identification and processing, and the target quantity and processing results are fed back to the main processing core. S4. The main processing core receives the processing results of the subtasks of each partition and splices them together to obtain the processing results of the task. It then puts the target quantity of each partition into the data resource and repeats S2 to S4 until all frame tasks are completed.

2. The task dynamic allocation method based on a multi-core embedded system according to claim 1, characterized in that, The segmentation line system includes one or more PID controllers, each PID controller controls one resource segmentation line, and calculates the position of the corresponding resource segmentation line based on the data resources.

3. The task dynamic allocation method based on a multi-core embedded system according to claim 1 or 2, characterized in that, The resource partitioning line divides each frame of task into horizontal or vertical parallel partitions.

4. The task dynamic allocation method based on a multi-core embedded system according to claim 2, characterized in that, Each PID controller calculates the position of the corresponding resource partition line based on the data resources, including: If the target quantity for each partition is not available in the data resources, the position of the resource partition line is calculated based on the number of resource partition lines and the size of the task, in a uniform distribution. If there are target quantities for each partition in the data resource, each PID controller calculates the position of the resource partition line based on the target quantities of the partitions on both sides of the controlled resource partition line.

5. The task dynamic allocation method based on a multi-core embedded system according to claim 4, characterized in that, Each PID controller calculates the position of the resource partition line based on the target number of the partitions on both sides of the controlled resource partition line. It uses the difference in the target number of the partitions on both sides of the corresponding resource partition line as the input signal, and controls the position of the resource partition line through proportional coefficient, integral coefficient and derivative coefficient. It outputs the moving distance of the resource partition line and adds it to the current position of the resource partition line to obtain the new position.

6. The task dynamic allocation method based on a multi-core embedded system according to claim 4 or 5, characterized in that, Each PID controller calculates the position of the resource partition line based on the target number of partitions on both sides of the controlled resource partition line using the following formula: Among them, Loc j {k} and Loc j {k-1} represent the positions of the j-th resource segmentation line in the (k+1)-th and k-th frames of the task, respectively, where Kp represents the scaling factor, and T represents the task sampling period. i T represents the integration time. d Let r represent the differential time, r represent the discretized integral variable, and e(j,k), e(j,r), and e(j,k-1) represent the error signals when calculating the position of the j-th resource segmentation line in the k-th, r-th, and k-1-th frames of the task, respectively. These are obtained by calculating the difference between the number of targets on both sides of the resource segmentation line in two adjacent frames of the task.

7. The task dynamic allocation method based on a multi-core embedded system according to claim 2, characterized in that, The segmentation line system also includes applying windowing constraints to each calculated resource segmentation line, adjusting the position of resource segmentation lines that do not meet the windowing constraints, and using the adjusted position as the calculation position.

8. The task dynamic allocation method based on a multi-core embedded system according to claim 7, characterized in that, The windowing constraint on each calculated resource partition line is to use the position of each calculated resource partition line as the predicted position. If the predicted position of each resource partition line does not exceed the predicted positions of the resource partition lines on both sides and does not exceed the size of the task, then the windowing constraint is satisfied and the predicted position is used as the calculated position; otherwise, the windowing constraint is not satisfied and the predicted position is adjusted.

9. The task dynamic allocation method based on a multi-core embedded system according to claim 8, characterized in that, The adjustment of the position of resource partition lines that do not meet the windowing restrictions includes: If the predicted position of a resource segment line exceeds the predicted position of its next resource segment line, then the midpoint between the original position of the resource segment line and the predicted position of its next resource segment line is taken as the adjusted position. If the predicted position of a resource segment line exceeds the predicted position of its previous resource segment line, then the midpoint between the original position of the resource segment line and the predicted position of its previous resource segment line is taken as the adjusted position.

10. The task dynamic allocation method based on a multi-core embedded system according to claim 2, characterized in that, The number of processing cores is greater than 1, and the number of resource partition lines is obtained by subtracting 1 from the number of processing cores.