Data processing method and device for edge computing device

Abstract

This application discloses a data processing method and apparatus for edge computing devices. It includes: dividing the triangular matrix, the vector to be solved, and the result vector within a triangular matrix and vector solving function into multiple task blocks; calling multiple stream processors to load the multiple task blocks from global memory to the local memory of the stream processors; processing the first task block using the stream processors to obtain a first calculation result; for each second task block, processing the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row within the second task block using the stream processors to obtain an intermediate calculation result for the current second task block; and processing the intermediate calculation result, the main diagonal matrix block of the second sub-row, and the result sub-vector using the stream processor corresponding to the second task block to obtain a second calculation result. This application solves the technical problems of unreasonable resource scheduling and low processing efficiency in the analysis of complex linear problems on edge computing devices in related technologies.

Description

Technical Field

[0001] This application relates to the field of electronic digital data processing technology, and more specifically, to a data processing method and apparatus for edge computing devices. Background Technology

[0002] In the fields of real-time signal processing and embedded AI inference in edge computing devices, Triangular matrix vector Solve (TRSV) is a core subtask of algorithms such as Cholesky decomposition, Kalman filtering, and iterative image reconstruction. It is widely used in low-power, high-real-time scenarios such as UAV attitude estimation, portable CT image reconstruction, and vibration prediction of industrial equipment.

[0003] Regarding TRSV optimization, the current mainstream implementation uses the clBLAST library based on the OpenCL framework. It decomposes TRSV into alternating calls of two kernels, "Substitution" and "General Matrix-Vector Multiplication (GEMV)," through a block strategy to adapt to the parallel architecture of graphics processors.

[0004] However, this scheme has serious performance bottlenecks: First, due to the inherent data dependencies of TRSV, clBLAST uses serial kernel scheduling, which requires multiple kernel startups for each iteration, accompanied by frequent global memory reads and writes and redundant intermediate vector copies, significantly increasing memory bandwidth pressure; Second, its GEMV kernel is a general implementation and does not optimize thread mapping for TRSV's unique "slender" matrix structure, resulting in a large amount of invalid computation and memory access; Third, the synchronization between kernels depends on explicit synchronization barriers, and the asynchronous execution mechanism of the graphics processor cannot be used to mask queuing and scheduling delays.

[0005] There is currently no effective solution to the above problems. Summary of the Invention

[0006] This application provides a data processing method and apparatus for edge computing devices, which at least solves the technical problems of unreasonable resource scheduling and low processing efficiency when analyzing complex linear problems on edge computing devices.

[0007] According to one aspect of the embodiments of this application, a data processing method for edge computing devices is provided, comprising: dividing a triangular matrix to be computed, a vector to be solved, and a result vector within a vector solving function into multiple task blocks, wherein the triangular matrix is ​​an upper triangular matrix or a lower triangular matrix, and the multiple task blocks include: a first task block comprising only a first sub-row of a main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector; and multiple second task blocks comprising a second sub-row of a main diagonal matrix block and a non-main diagonal matrix block, and the corresponding sub-vector to be solved and the result sub-vector; calling multiple stream processors within the edge computing device to load the multiple task blocks from the global memory of the edge computing device into the local memory of the corresponding stream processor; and utilizing the stream processors corresponding to the first task blocks... The processor performs a first processing operation on the first task block in local memory to obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block. For each second task block, the following steps are executed cyclically: using the stream processor corresponding to the current second task block to perform a second processing operation on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row in the current second task block in local memory to obtain the intermediate calculation result of the current second task block; using the stream processor corresponding to the current second task block to perform a third processing operation on the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in local memory, and the result sub-vector corresponding to the second sub-row to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

[0008] Optionally, the triangular matrix, the vector to be solved, and the result vector in the triangular matrix and vector solving function to be calculated are divided into multiple task blocks, including: dividing the triangular matrix, the vector to be solved, and the result vector in the triangular matrix and vector solving function into multiple task blocks according to the number of stream processors in the edge computing device.

[0009] Optionally, the first processing operation is performed on the first task block in local memory using the stream processor corresponding to the first task block to obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block, including: loading the main diagonal matrix block of the first sub-row in the first task block in local memory and the result sub-vector corresponding to the first sub-row into a register in the edge computing device; calculating the first quotient of the result sub-vector corresponding to the first sub-row in the first task block loaded into the register and the main diagonal matrix block of the first sub-row using the stream processor corresponding to the first task block, and using the first quotient as the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block.

[0010] Optionally, the second processing operation is performed on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row of the current second task block in the local memory using the stream processor corresponding to the current second task block to obtain the intermediate calculation result of the current second task block. This includes: loading the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row of the current second task block in the local memory into the register in the edge computing device; and using the stream processor corresponding to the current second task block to calculate the product of the non-main diagonal matrix block of the second sub-row of the current second task block loaded into the register and the calculation result of the previous task block to obtain the intermediate calculation result of the current second task block.

[0011] Optionally, after obtaining the intermediate calculation result of the current second task block, the method further includes: using the intermediate calculation result as the calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

[0012] Optionally, the third processing operation is performed on the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in local memory, and the result sub-vector corresponding to the second sub-row in the current second task block using the stream processor corresponding to the current second task block, to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block. This includes: loading the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in local memory, and the result sub-vector corresponding to the second sub-row in the current second task block into a register in the edge computing device; calculating the difference between the result sub-vector corresponding to the second sub-row in the current second task block loaded into the register and the intermediate calculation result of the current second task block using the stream processor corresponding to the current second task block; calculating the second quotient between the difference and the main diagonal matrix block of the second sub-row in the current second task block using the stream processor corresponding to the current second task block, and using the second quotient as the second calculation result of the current second task block.

[0013] Optionally, the method further includes: writing the calculation results of each task block sequentially from local memory to the global memory of the edge computing device.

[0014] According to another aspect of the embodiments of this application, a data analysis apparatus for edge computing devices is also provided, comprising: a partitioning module, configured to partition a triangular matrix to be calculated, a triangular matrix in a vector solving function, a vector to be solved, and a result vector into multiple task blocks, wherein the triangular matrix is ​​an upper triangular matrix or a lower triangular matrix, and the multiple task blocks include: a first task block comprising only a first sub-row of a main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector of the first sub-row; and multiple second task blocks comprising a second sub-row of a main diagonal matrix block and a non-main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector of the second sub-row; a loading module, configured to call multiple stream processors within the edge computing device to load the multiple task blocks from the global memory of the edge computing device into the local memory of the corresponding stream processor; and a first analysis module, configured to utilize a... A stream processor corresponding to a task block performs a first processing operation on the first task block in local memory to obtain a first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block. A second analysis module is used to perform the following steps cyclically for each second task block: using the stream processor corresponding to the current second task block to perform a second processing operation on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row in the current second task block in local memory to obtain an intermediate calculation result of the current second task block; using the stream processor corresponding to the current second task block to perform a third processing operation on the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in local memory, and the result sub-vector corresponding to the second sub-row in the current second task block to obtain a second calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

[0015] According to another aspect of the embodiments of this application, a non-volatile storage medium is also provided, the non-volatile storage medium including a stored computer program, wherein the device where the non-volatile storage medium is located executes the above-described data processing method for edge computing devices by running the computer program.

[0016] According to another aspect of the embodiments of this application, a computer program product is also provided, the computer program product including a stored computer program, wherein the computer program, when executed by a processor, implements the above-described data processing method for edge computing devices.

[0017] In this embodiment, by combining the characteristics of the core hardware of the edge computing device and adopting various optimization methods such as operator fusion and asynchronous execution, the performance of triangular matrix and vector solving on the graphics processor of the edge computing device is greatly improved. This achieves the goal of significantly improving the resource utilization of the graphics processor and accelerating the processing efficiency, thereby solving the technical problems of unreasonable resource scheduling and low processing efficiency when analyzing complex linear problems on edge computing devices. Attached Figure Description

[0018] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings:

[0019] Figure 1 This is a schematic diagram of the structure of an edge computing device according to an embodiment of this application;

[0020] Figure 2 This is a schematic flowchart of an optional data processing method for edge computing devices according to an embodiment of this application;

[0021] Figure 3 This is a schematic diagram of the calculation of an optional triangular matrix and vector solving function according to an embodiment of this application;

[0022] Figure 4 This is a calculation diagram of another optional triangular matrix and vector solving function according to an embodiment of this application;

[0023] Figure 5 This is a schematic diagram of a multi-kernel synchronous execution mode for an optional triangular matrix and vector solving function in the prior art;

[0024] Figure 6 This is a schematic diagram of an optional multi-kernel asynchronous execution mode for a triangular matrix and vector solving function according to an embodiment of this application;

[0025] Figure 7 This is a schematic diagram of the structure of an optional data analysis device for edge computing devices according to an embodiment of this application. Detailed Implementation

[0026] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0027] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0028] Furthermore, all information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for display, data used for analysis, etc.) involved in this application are information and data authorized by the user or fully authorized by all parties. For example, this system has an interface with the relevant user or organization. Before obtaining relevant information, it needs to send an acquisition request to the aforementioned user or organization through the interface, and obtain the relevant information after receiving consent information from the aforementioned user or organization.

[0029] To better understand the embodiments of this application, the technical terms involved in the embodiments of this application are explained below:

[0030] Edge devices, also known as edge computing devices, refer to devices that perform computing and data processing at the network edge. These devices shift computing power from centralized data centers or the cloud to locations closer to the data generation source, reducing data transmission latency, improving response speed, and saving network bandwidth. In recent years, the computing power of edge computing devices has significantly improved. Modern edge computing devices are generally equipped with high-performance multi-core processors. With the development of Graphics Processing Unit (GPU) technology, utilizing GPUs for efficient parallel computing has become a trend, and many edge computing devices are equipped with high-performance GPUs or Network Processing Units (NPUs). GPUs possess massively parallel processing capabilities, demonstrating significant performance advantages in numerical calculations such as matrix computations. By equipping edge computing devices with high-performance processors and GPUs, their computing power is greatly enhanced, enabling them to handle complex computational and data analysis tasks more efficiently.

[0031] Graphics Processing Unit (GPU): A processor capable of large-scale parallel computing, particularly suitable for processing image and video data, as well as high-performance computing tasks.

[0032] Triangular matrix vector solution (TRSV) typically involves triangular matrices in linear algebra, where the matrix may have all non-zero elements on the main diagonal, or only non-zero elements in the upper or lower triangular region. When solving a system of linear equations such as AX = b, if A is a triangular matrix, forward or backward substitution methods can be used for efficient solution.

[0033] Matrix-vector multiplication (GEMV) is a fundamental linear algebra operation used to multiply a matrix by a vector to produce a new vector. This operation has wide applications in many scientific and engineering fields, such as computer vision, signal processing, machine learning, and numerical analysis. The following are the basic concepts and computational methods of matrix-vector multiplication.

[0034] The CLBlast library is a high-performance OpenCL open-source computational BLAS library that can be used in production environments.

[0035] The OpenCL programming model: The Open Computing Language (OpenCL) provides an abstract description of hardware, including a host and multiple connected computing devices. Computing devices run OpenCL kernel programs and are typically divided into Compute Units and a memory system. Each Compute Unit contains multiple Compute Clusters, and each Compute Cluster contains multiple Compute Cores. The memory system includes the host and device memory. Device memory mainly includes: Global Memory, Constant Memory, Local Memory, and Private Memory. Global Memory stores data read from host memory, Constant Memory stores data that remains unchanged during kernel program execution, Local Memory stores data shared within the Compute Cluster, and Private Memory stores data private to the Compute Cores. The speed of each memory type, from highest to lowest, is: Private Memory, Local Memory, Constant Memory, and Global Memory. A Warp is a group of stream processors that execute the same instructions simultaneously, and these stream processors perform the same operations at the same time.

[0036] Currently, solving triangular matrices and vectors is a fundamental and widely used processing operation in scientific computing and engineering applications. Especially in signal processing, image processing, and numerical analysis, matrix-vector multiplication plays a crucial role. Among related technologies, the following are some optimized operators for solving triangular matrices and vectors:

[0037] (1) On the CPU (Central Processing Unit) of edge computing devices, for TRSV (Triangular matrix-vector solve), commonly used optimization libraries include OpenBLAS, MKL (x86 architecture specific), Eigen, etc. The optimization operators in these optimization libraries all adopt the method of direct calculation based on mathematical formulas.

[0038] In other words, if we need to solve the problem AX=B (where A represents a triangular matrix, X represents the vector to be solved, and B represents the result vector), the CPU can calculate each element of the vector to be solved row by row. For example, if the first row has only one element, it can be calculated directly. For subsequent rows, the x value of the current row can be calculated using the previously calculated x values.

[0039] (2) On the graphics processing unit (GPU) of the edge computing device, operators such as the substitution operator and the general matrix vector multiplication (GEMV) operator are used in the clBLAST library based on OpenCL. These optimized operators generally complete the solution process by dividing the triangular matrix A into blocks and repeatedly calling multiple kernels (which are usually decomposed into multiple threads and executed by multiple corresponding stream processors) to synchronously execute the solution process.

[0040] Therefore, when using the optimization operators in the aforementioned optimization library to optimize the solution of triangular matrices and vectors, the following drawbacks still exist: Each task block is processed serially. For large-scale systems of linear equations involving triangular matrices and vectors, after each stream processor performs a processing operation on a task block (containing a matrix block obtained by partitioning triangular matrix A and the corresponding sub-vectors within result vector B), the calculation results need to be written back to the global memory of the edge computing device through atomic operations. This operation is extremely time-consuming, resulting in low processing efficiency. Furthermore, due to the inherent characteristics of triangular matrix and vector solutions—that is, the solution of each element depends on the result of the previous element—the data processing parallelism rate is low.

[0041] To address the aforementioned issues, this application provides relevant solutions, which are detailed below.

[0042] According to an embodiment of this application, a method embodiment for data processing of edge computing devices is provided. It should be noted that the steps shown in the flowchart in the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be executed in a different order than that shown here.

[0043] The methods and embodiments provided in this application can be executed on mobile terminals, computer terminals, or similar computing devices. Figure 1 A hardware block diagram of an edge computing device is shown, illustrating a data processing method for implementing edge computing devices. For example... Figure 1 As shown, the edge computing device 10 may include one or more (shown as 102a, 102b, ..., 102n in the figure) processors 102 (processors 102 may include, but are not limited to, microprocessors MCUs or programmable logic devices FPGAs, etc.), a memory 104 for storing data, and a transmission device 106 for communication functions. In addition, it may also include: a display, an input / output interface (I / O interface), a universal serial bus (USB) port (which may be included as one of the ports of a BUS bus), a network interface, a power supply, and / or a camera. Those skilled in the art will understand that... Figure 1 The structure shown is for illustrative purposes only and does not limit the structure of the aforementioned electronic device. For example, the edge computing device 10 may also include... Figure 1 The more or fewer components shown, or having the same Figure 1 The different configurations shown.

[0044] It should be noted that the aforementioned one or more processors 102 and / or other data processing circuits are generally referred to herein as "data processing circuits". These data processing circuits may be wholly or partially embodied in software, hardware, firmware, or any other combination thereof. Furthermore, the data processing circuits may be a single, independent processing module, or may be wholly or partially integrated into any other element within the edge computing device 10. As involved in the embodiments of this application, the data processing circuits serve as a form of processor control (e.g., selection of a variable resistor termination path connected to an interface).

[0045] The memory 104 can be used to store software programs and modules of application software, such as the program instructions / data storage device corresponding to the data processing method for edge computing devices in the embodiments of this application. The processor 102 executes various functional applications and data processing by running the software programs and modules stored in the memory 104, thereby implementing the aforementioned data processing method for edge computing devices. The memory 104 may include high-speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include memory remotely located relative to the processor 102, and these remote memories can be connected to the edge computing device 10 via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0046] The transmission device 106 is used to receive or send data via a network. Specific examples of the network described above may include a wireless network provided by the communication provider of the edge computing device 10. In one example, the transmission device 106 includes a Network Interface Controller (NIC), which can connect to other network devices via a base station to communicate with the Internet. In another example, the transmission device 106 may be a Radio Frequency (RF) module for wireless communication with the Internet.

[0047] The display can be, for example, a touchscreen liquid crystal display (LCD) that allows the user to interact with the user interface of the edge computing device 10.

[0048] In the above operating environment, this application embodiment also provides a data processing method for edge computing devices. Figure 2 This is a schematic flowchart of an optional data processing method for edge computing devices according to an embodiment of this application, as shown below. Figure 2 As shown, the method includes at least steps S202-S208, wherein:

[0049] Step S202: Divide the triangular matrix to be calculated, the triangular matrix in the vector solving function, the vector to be solved, and the result vector into multiple task blocks.

[0050] Specifically, the mathematical meaning of the triangular matrix and vector solution function is shown in the following equation: In this equation, A represents a triangular matrix, X represents the vector to be solved, and B represents the result vector. The triangular matrix can be either an upper triangular matrix or a lower triangular matrix.

[0051] Among them, the above-mentioned triangular matrix and vector calculation functions are widely used in edge computing scenarios with high real-time requirements and limited resources.

[0052] For example, a drone equipped with an edge computing module needs to perceive its own attitude (pitch, roll, yaw) in real time to achieve stable hovering and obstacle avoidance. The attitude estimation algorithm uses an extended Kalman filter, where the Kalman gain is calculated... At that time, among them, This represents the prior state estimation covariance matrix, i.e., the uncertainty of the current attitude; The observation Jacobian matrix is ​​the linearized Jacobian matrix of the nonlinear function that maps the attitude angle to the observations of the vision sensor. This represents the observation noise covariance matrix, i.e., sensor noise, such as accelerometer drift, gyroscope drift, etc. It is usually transformed into a lower triangular form using the Lyapunov equation (e.g., (As a result of some change), the solution function for the triangular matrix and vector to be calculated is then: , where L represents the known lower triangular matrix, b represents the intermediate variable, and y represents the state correction vector to be solved.

[0053] For example, in mobile CT scanners or portable ultrasound devices, image reconstruction employs iterative reconstruction algorithms, the core of which is solving a very large-scale sparse linear system: Here, A represents the projection matrix (calculated from the geometric structure), typically a triangular block structure with coefficients, X represents the pixel / voxel intensity vector to be reconstructed, and B represents the raw projection data acquired by the detector. Therefore, in the iterative reconstruction algorithm, the image blocks are updated in row-wise order in each round. To accelerate convergence, the projection matrix A can be triangularly decomposed.

[0054] For example, in industrial predictive maintenance scenarios, autoregressive models can be used to analyze real-time data collected by motor vibration sensors in a factory to predict future failure trends. The prediction logic is as follows: In the formula, Let represent the values ​​at time t-1 (the time before time t), t-2 (the two times before time t), ..., tn (the n times before time t), respectively. Indicates the error term. These represent the influence of the value at time t-1 on the value at time t (i.e., the autocorrelation coefficient), the influence of the value at time t-2 on the value at time t, ..., the influence of the value at time tn on the value at time t. And in order to estimate the parameters... We need to analyze the Yule-Walker equations: Here, R represents the autocorrelation matrix (which is usually positive definite in pairs), so R is decomposed into the following values ​​using the Levinson-Durbin algorithm: Therefore, the above problem is transformed into two computational steps: i) For the problem Solve for y; ii) Regarding the problem Solve for a.

[0055] By dividing the triangular matrix, the vector to be solved, and the result vector within the above triangular matrix and vector solving function, multiple task blocks can be obtained. These multiple task blocks include: a first task block that only includes the first sub-row of the main diagonal matrix block and the corresponding sub-vector to be solved and the result vector of the first sub-row; and multiple second task blocks that include the second sub-row of the main diagonal matrix block and the non-main diagonal matrix block, and the corresponding sub-vector to be solved and the result vector of the second sub-row.

[0056] Specifically, when dividing a triangular matrix, multiple matrix blocks can be obtained, and the types of matrix blocks include main diagonal matrix blocks and non-main diagonal matrix blocks. The main diagonal matrix block can be understood as the matrix block located on the main diagonal of the triangular matrix, while the non-main diagonal matrix block can be understood as the other matrix blocks besides the main diagonal matrix block among the multiple matrix blocks obtained by dividing the triangular matrix.

[0057] by Figure 3 For example, dividing a triangular matrix A yields multiple matrix blocks, such as A0, A1, A2, etc. Dividing the vector X to be solved yields multiple sub-vectors to be solved, such as X0, X1, X2, etc. Dividing the result vector B yields multiple result sub-vectors, such as B0, B1, B2, etc. Then, the first task block is formed by the main diagonal matrix block A0 and the sub-vector B0, while the second task block is formed by the off-diagonal matrix block A1, the main diagonal matrix block A2, and the sub-vector B1. Similarly, the second task block is formed by the off-diagonal matrix block A3, the main diagonal matrix block A4, and the sub-vector B2. Therefore, the vertical dimensions of the matrix blocks and sub-vectors within each task block are the same. For example, if the size of the matrix block is 61... If the value is 61, then the size of the subvector to be solved and the result subvector is also 64.

[0058] Step S204: Invoke multiple stream processors within the edge computing device to load multiple task blocks from the global memory of the edge computing device into the local memory of the corresponding stream processor.

[0059] In this context, when multiple stream processors compute a single task block, they will read the task block from the global memory within the edge computing device for computation. Since accessing global memory is time-consuming, the entire computation process is lengthy and inefficient. Therefore, this application optimizes the computation process using local memory. Specifically, it allocates a local memory (also known as shared memory) to each stream processor corresponding to a task block to cache vector fragments for computation, thereby significantly reducing access to global memory.

[0060] Furthermore, the loading order of the aforementioned task blocks can be either top-down or bottom-up. That is, for the lower triangular matrix, each task block can be loaded from the global memory of the edge computing device to its local memory in a top-down order; while for the upper triangular matrix, each task block can be loaded from the global memory of the edge computing device to its local memory in a bottom-up order.

[0061] It should be noted that the length of the vector segment of the vector to be solved read in each time can be dynamically adjusted according to the size of the local memory space allocated to each stream processor, thereby reducing the fence synchronization and effectively controlling the logic consumption time.

[0062] It should be noted that the edge computing device in this embodiment includes a graphics processor (GPU), which includes a storage unit and a processing unit. The storage unit includes global memory, local memory, and registers, with the memory space sizes of the global memory, local memory, and registers decreasing sequentially, and their data read / write efficiency increasing sequentially. The processing unit consists of a cluster, and each cluster can have multiple computing cores. To maximize parallelism, the number of stream processors in this embodiment can be set to the same value as the number of computing cores. For example, if there are 64 computing cores, there can also be 64 stream processors. These stream processors can execute instructions synchronously, each completing a portion of a complex task.

[0063] Step S206: Utilize the stream processor corresponding to the first task block to perform a first processing operation on the first task block in the local memory, and obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block.

[0064] The first calculation result mentioned above is the calculation result of the sub-vector to be solved within the first task block.

[0065] Step S208: For each second task block, the following steps are executed cyclically: A second processing operation is performed on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row within the current second task block in local memory using the stream processor corresponding to the current second task block, to obtain the intermediate calculation result of the current second task block; A third processing operation is performed on the intermediate calculation result of the current second task block and the main diagonal matrix block and the result sub-vector corresponding to the second sub-row within the current second task block in local memory using the stream processor corresponding to the current second task block, to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row within the current second task block.

[0066] The second calculation result mentioned above is the calculation result of the sub-vector to be solved within the second task block.

[0067] The specific implementation of steps S202 to S208 in the embodiments of this application will be further described below.

[0068] As an optional implementation, in the technical solution provided in step S202 above, the method may include: dividing the triangular matrix and the triangular matrix in the vector solving function, the vector to be solved and the result vector into multiple task blocks according to the number of stream processors in the edge computing device.

[0069] The above scheme can be understood as follows: determine the vertical dimension (i.e., vertical dimension) of the triangular matrix, the vector to be solved, and the result vector based on the number of stream processors in the edge computing device; then, divide the triangular matrix into multiple sub-rows according to the vertical dimension, with each sub-row including at least one matrix block (main diagonal matrix block or non-main diagonal matrix block), and divide the vector to be solved and the result vector into multiple sub-vectors to be solved and multiple result vectors; finally, combine the multiple sub-rows obtained from dividing the triangular matrix and the multiple sub-vectors to be solved and multiple result vectors obtained from dividing the vector to be solved and the result vectors into multiple task blocks according to the vertical dimension.

[0070] For example, the edge computing device is pre-configured with 64 stream processors, and the size of the triangular matrix is ​​1024. 1024, the size of both the vector to be solved and the result vector is 1024. 1. Therefore, the vertical dimension of the triangular matrix, the vector to be solved, and the result vector is determined to be 16. Thus, the triangular matrix can be divided into matrix blocks with a vertical dimension of 16, and the vector to be solved and the result vector can be divided into 64 blocks of size 16. 1 subvector to be solved and 64 vectors of size 16 1. Result Vector. It should be noted that the shape of the matrix blocks obtained by dividing the triangular matrix is ​​preferably square, so the difference between the horizontal and vertical dimensions of the matrix blocks is less than a preset threshold.

[0071] Furthermore, after the task blocks are divided, each task block is processed by several stream processors. Therefore, in the technical solution provided in step S204 above, a corresponding stream processor can be assigned to each task block, and all data of each task block is placed in the local memory of the corresponding stream processor for data reading operations. The data reading operation involves loading the data of each task block from global memory into the local memory of the stream processor.

[0072] As an optional implementation, in the technical solution provided in step S206 above, the method may include:

[0073] Step 1: Load the main diagonal matrix block of the first sub-row and the corresponding result sub-vector of the first sub-row in the first task block in local memory into the register in the edge computing device;

[0074] Step 2: Calculate the first quotient of the result sub-vector corresponding to the first sub-row in the first task block loaded into the register and the first quotient of the main diagonal matrix block of the first sub-row, and use the first quotient as the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block.

[0075] by Figure 4 Taking the calculation example diagram shown above as an example, the calculation process of the first task block can be understood as follows: the stream processor corresponding to the first task block performs a substitution operation, that is, the first quotient of the result subvector B0 corresponding to the first subrow and the main diagonal matrix block A0 in the first subrow is substituted to the subvector X0 to be solved corresponding to the first subrow, so as to obtain the first calculation result of the first task block.

[0076] As an optional implementation, in the technical solution provided in step S208 above, for each non-main diagonal matrix block within the second task block, the corresponding intermediate calculation results can be obtained in the following ways:

[0077] Step 1: Load the calculation results of the previous task block and the non-main diagonal matrix block of the second sub-row in the current second task block in local memory into the registers in the edge computing device.

[0078] Step 2: Calculate the product of the non-main diagonal matrix block of the second sub-row within the current second task block loaded into the register and the calculation result of the previous task block using the stream processor corresponding to the current second task block, and obtain the intermediate calculation result of the current second task block.

[0079] It should be noted that after calculating the intermediate calculation results, the intermediate calculation results can be used as the calculation results of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

[0080] Step 3: Load the intermediate calculation results of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in local memory, and the result sub-vectors corresponding to the second sub-row into the registers in the edge computing device.

[0081] Step 4: Calculate the difference between the result subvector corresponding to the second sub-row in the current second task block and the intermediate calculation result of the current second task block using the stream processor corresponding to the current second task block.

[0082] Step 5: Calculate the difference between the current second task block and the second quotient of the main diagonal matrix block of the second sub-row within the current second task block using the stream processor corresponding to the current second task block, and use the second quotient as the second calculation result of the current second task block.

[0083] by Figure 4 Taking the calculation example diagram shown below as an example, then... Figure 4 The calculation formula for each second task block can be written as: The specific calculation process can be understood as follows:

[0084] First, the stream processor corresponding to the second task block is invoked to perform matrix-vector multiplication operations that are easily parallelized, that is, to calculate the non-main diagonal matrix block in the i-th second sub-row. Comparison with the calculation results of the previous task block The product of these factors yields the intermediate calculation result for the second task block. In the matrix-vector multiplication operation described above, The sub-block is not currently in use and can be used as a substitute. This achieves the effects of memory reuse and performance acceleration.

[0085] Furthermore, the calculation formula is transformed into ,in, The resulting subvector corresponding to the second sub-row i Intermediate calculation results with the second task block The difference is then used to perform a substitution operation on the stream processor corresponding to the second task block. and The second quotient is replaced by the vector to be solved. This is to obtain the second calculation result of the current second task block.

[0086] Finally, the computation results of each task block are sequentially written from local memory to global memory. The sequential writing order can refer to the order in which data within each task block is written from global memory to local memory. This writing order can be either top-down or bottom-up. Specifically, for lower triangular matrices, the computation results corresponding to each task block within the vector to be solved can be loaded from the local memory of the edge computing device to global memory in a top-down order; while for upper triangular matrices, the computation results corresponding to each task block within the vector to be solved can be loaded from the local memory of the edge computing device to global memory in a bottom-up order.

[0087] The following will be through Figure 5 and Figure 6 The schematic diagram of the computational model shown briefly illustrates the advantages of the computational method provided in this application. Typically, a kernel execution has the following four time points:

[0088] 1. Queued: The kernel is placed in the command queue, waiting to be executed;

[0089] 2. Submitted: The kernel retrieves the data from the queue and submits it to the device for execution.

[0090] 3. Start: The kernel actually begins execution on the device;

[0091] 4. Execution complete (End): The kernel has finished executing on the device.

[0092] Existing technologies typically employ Figure 5The multiple kernels shown execute each task block synchronously because existing technology divides the triangular matrix to be calculated, the solution vector, and the result vector within the vector solving function into: a first task block containing only the first sub-row of the main diagonal matrix block (A0) and the corresponding solution sub-vector X0 and result sub-vector B0; a second task block containing the second sub-row of the non-main diagonal matrix blocks (A1, A3, A5, A7, A9, A11, A13) and the corresponding solution sub-vectors and result sub-vectors; and a third task block containing the main diagonal matrix blocks (such as A2, A3, A5, A7, A9, A11, A13). The second sub-row of A4, A6, A8, A10, A12, and A14, and the corresponding sub-vectors to be solved and the resulting sub-vectors, are the third task blocks. Each task block is assigned a corresponding stream processor for execution. Due to the limited performance of the graphics processing unit (GPU), the number of stream processors allocated to each task block is relatively small for computationally intensive problems. Furthermore, the GPU needs to call the substitution operator during the execution phase of processing each of the above third task blocks. Since the substitution operator has strong dependencies, i.e., computation... Must rely on Therefore, each task block is executed in the following order: accessing and retrieving the data corresponding to the task block from global memory (i.e., queuing), submitting the data corresponding to the task block to the stream processor for execution (i.e., submission). Figure 5 The process involves several steps: waiting for execution, the stream processor processing the data corresponding to the task block (i.e., starting execution), and obtaining the calculation result of the task block (i.e., ending execution). Accessing global memory consumes a significant amount of time, and the sequential execution of data within each task block results in poor parallelism in data processing, leading to low computational efficiency.

[0093] However, the embodiments of this application adopt... Figure 6The proposed solution uses multiple kernels to asynchronously process each task block. Compared to the methods described above, this solution can allocate more stream processors to each task block, thereby improving processing efficiency. Furthermore, since the graphics processor has no data dependencies when processing the non-diagonal matrix blocks (A1, A3, A5, A7, A9, A11, A13), it can be executed by any stream processor, maximizing parallelism. In other words, when calculating the first task block, it can be calculated in the order of queuing, submission, start execution, and end execution. Meanwhile, since the calculation of the non-diagonal matrix blocks in the subsequent second task block does not involve the corresponding subvectors to be solved, the second task block can enter the queuing stage during the first task block's waiting execution phase, and then enter the waiting execution stage during the first task block's execution phase. Finally, after the first task block is completed, it directly enters the execution stage to obtain the calculation result for that task block. This allows the entire calculation to be performed using only 2... The kernel can be implemented in (n / k)-1 times (where n is the size of the triangular matrix and k is the vertical dimension of the matrix block), which can greatly reduce the execution time and improve the execution efficiency.

[0094] Based on the scheme defined in steps S202 to S208 above, it can be understood that in the embodiment, by combining the characteristics of the core hardware of the edge computing device and adopting various optimization methods such as operator fusion and asynchronous execution, the performance of triangular matrix and vector solving on the graphics processor of the edge computing device is greatly improved, achieving the goal of significantly improving the resource utilization of the graphics processor and accelerating processing efficiency. This solves the technical problems of unreasonable resource scheduling and low processing efficiency when analyzing complex linear problems on edge computing devices.

[0095] In addition, this application also provides a data analysis device for edge computing devices. Figure 7 This is a schematic diagram of the structure of an optional data analysis device for edge computing devices according to an embodiment of this application, such as... Figure 7 As shown, the data analysis device for edge computing devices includes at least a partitioning module 72, a loading module 74, a first analysis module 76, and a second analysis module 78, wherein:

[0096] The partitioning module 72 is used to divide the triangular matrix, the vector to be solved, and the result vector in the triangular matrix and vector solving function into multiple task blocks. The triangular matrix is ​​an upper triangular matrix or a lower triangular matrix. The multiple task blocks include: a first task block that only includes the first sub-row of the main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector; and multiple second task blocks that include the second sub-row of the main diagonal matrix block and the non-main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector.

[0097] Loading module 74 is used to call multiple stream processors in the edge computing device to load multiple task blocks from the global memory of the edge computing device to the local memory of the corresponding stream processor;

[0098] The first analysis module 76 is used to perform a first processing operation on the first task block in local memory using the stream processor corresponding to the first task block, and obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block.

[0099] The second analysis module 78 is used to perform the following steps cyclically for each second task block: using the stream processor corresponding to the current second task block to perform a second processing operation on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row in the current second task block in local memory, to obtain the intermediate calculation result of the current second task block; using the stream processor corresponding to the current second task block to perform a third processing operation on the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in local memory, and the result sub-vector corresponding to the second sub-row, to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

[0100] Optionally, the above-mentioned device is further configured to divide the triangular matrix, the vector to be solved, and the result vector in the triangular matrix and vector solving function into multiple task blocks by means of the following method: dividing the triangular matrix, the vector to be solved, and the result vector in the triangular matrix and vector solving function into multiple task blocks according to the number of stream processors in the edge computing device.

[0101] Optionally, the above-described apparatus is further configured to perform a first processing operation on the first task block in local memory using the stream processor corresponding to the first task block, and obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block by means of the following method: loading the main diagonal matrix block of the first sub-row in the first task block in local memory and the result sub-vector corresponding to the first sub-row into a register in the edge computing device; calculating the first quotient of the result sub-vector corresponding to the first sub-row in the first task block loaded into the register and the main diagonal matrix block of the first sub-row using the stream processor corresponding to the first task block, and using the first quotient as the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block.

[0102] Optionally, the above-described apparatus is further configured to perform a second processing operation on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row of the current second task block in local memory using the stream processor corresponding to the current second task block, to obtain an intermediate calculation result of the current second task block, including: loading the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row of the current second task block in local memory into a register in the edge computing device; and using the stream processor corresponding to the current second task block to calculate the product of the non-main diagonal matrix block of the second sub-row of the current second task block loaded into the register and the calculation result of the previous task block, to obtain an intermediate calculation result of the current second task block.

[0103] Optionally, the above-mentioned apparatus is further configured to, after obtaining the intermediate calculation result of the current second task block, use the intermediate calculation result as the calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

[0104] Optionally, the above-described apparatus is further configured to obtain a second calculation result of the sub-vector to be solved corresponding to the second sub-row within the current second task block by means of the following method: loading the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row within the current second task block in local memory, and the result sub-vector corresponding to the second sub-row into a register within the edge computing device; calculating the difference between the result sub-vector corresponding to the second sub-row within the current second task block loaded into the register and the intermediate calculation result of the current second task block using the stream processor corresponding to the current second task block; calculating the second quotient of the difference and the main diagonal matrix block of the second sub-row within the current second task block using the stream processor corresponding to the current second task block, and using the second quotient as the second calculation result of the current second task block.

[0105] Optionally, the above-mentioned device is also used to write the calculation results of each task block from local memory to the global memory of the edge computing device in sequence.

[0106] It should be noted that the modules in the data analysis device for edge computing devices described above can be program modules (e.g., a set of program instructions to implement a specific function) or hardware modules. For the latter, they can take the following forms, but are not limited to them: each of the above modules is represented by a processor, or the functions of each of the above modules are implemented by a processor.

[0107] According to an embodiment of this application, a non-volatile storage medium is also provided, which stores a program, wherein the program controls the device where the non-volatile storage medium is located to execute the above-described data processing method for edge computing devices when it runs.

[0108] Optionally, the device containing the non-volatile storage medium executes the following steps by running the program: dividing the triangular matrix, the vector to be solved, and the result vector within the triangular matrix and vector solving function into multiple task blocks, wherein the triangular matrix is ​​an upper triangular matrix or a lower triangular matrix, and the multiple task blocks include: a first task block containing only the first sub-row of the main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector; and multiple second task blocks containing the second sub-row of the main diagonal matrix block and the non-main diagonal matrix block, and the corresponding sub-vector to be solved and the result sub-vector; calling multiple stream processors within the edge computing device to load the multiple task blocks from the global memory of the edge computing device into the local memory of the corresponding stream processor; and utilizing the stream processor corresponding to the first task block. Perform a first processing operation on the first task block in local memory to obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block; for each second task block, perform the following steps in a loop: use the stream processor corresponding to the current second task block to perform a second processing operation on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row in the current second task block in local memory to obtain the intermediate calculation result of the current second task block; use the stream processor corresponding to the current second task block to perform a third processing operation on the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in local memory, and the result sub-vector corresponding to the second sub-row in the current second task block to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

[0109] According to an embodiment of this application, a computer program product is also provided, which includes a stored computer program, wherein the computer program, when executed by a processor, implements the above-described data processing method for edge computing devices.

[0110] Optionally, the computer program performs the following steps: dividing the triangular matrix, the vector to be solved, and the result vector within the triangular matrix and vector solving function into multiple task blocks, wherein the triangular matrix is ​​an upper triangular matrix or a lower triangular matrix, and the multiple task blocks include: a first task block containing only the first sub-row of the main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector; and multiple second task blocks containing the second sub-row of the main diagonal matrix block and the non-main diagonal matrix block, and the corresponding sub-vector to be solved and the result sub-vector; calling multiple stream processors within the edge computing device to load the multiple task blocks from the global memory of the edge computing device into the local memory of the corresponding stream processor; and using the stream processor corresponding to the first task block to process the data in the local memory. The first task block performs a first processing operation to obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row within the first task block. For each second task block, the following steps are executed cyclically: using the stream processor corresponding to the current second task block, a second processing operation is performed on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row within the current second task block in local memory to obtain the intermediate calculation result of the current second task block; using the stream processor corresponding to the current second task block, a third processing operation is performed on the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row within the current second task block in local memory, and the result sub-vector corresponding to the second sub-row to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row within the current second task block.

[0111] According to an embodiment of this application, a processor is also provided for running a program, wherein the program executes the above-described data processing method for edge computing devices.

[0112] Optionally, the program executes the following steps during runtime: dividing the triangular matrix to be calculated, the vector to be solved, and the result vector within the vector solving function into multiple task blocks, wherein the triangular matrix is ​​an upper triangular matrix or a lower triangular matrix, and the multiple task blocks include: a first task block containing only the first sub-row of the main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector; and multiple second task blocks containing the second sub-row of the main diagonal matrix block and the non-main diagonal matrix block, as well as the corresponding sub-vector to be solved and the result sub-vector; calling multiple stream processors within the edge computing device to load the multiple task blocks from the global memory of the edge computing device into the local memory of the corresponding stream processor; and using the stream processor corresponding to the first task block to process the data in the local memory. The first task block performs a first processing operation to obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row within the first task block. For each second task block, the following steps are executed cyclically: using the stream processor corresponding to the current second task block, a second processing operation is performed on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row within the current second task block in local memory to obtain the intermediate calculation result of the current second task block; using the stream processor corresponding to the current second task block, a third processing operation is performed on the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row within the current second task block in local memory, and the result sub-vector corresponding to the second sub-row to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row within the current second task block.

[0113] According to an embodiment of this application, an electronic device is also provided, wherein the electronic device includes one or more processors; a memory for storing one or more programs, wherein when the one or more programs are executed by the one or more processors, the one or more processors are configured to run the programs, wherein the programs are configured to execute the above-described data processing method for edge computing devices during runtime.

[0114] Optionally, the processor is configured to execute the following steps via a computer program: dividing the triangular matrix, the vector to be solved, and the result vector within the triangular matrix and vector solving function into multiple task blocks, wherein the triangular matrix is ​​an upper triangular matrix or a lower triangular matrix, and the multiple task blocks include: a first task block containing only the first sub-row of the main diagonal matrix block and the corresponding sub-vector to be solved and the result vector of the first sub-row; and multiple second task blocks containing the second sub-row of the main diagonal matrix block and the corresponding sub-vector to be solved and the result vector of the second sub-row; calling multiple stream processors within the edge computing device to load the multiple task blocks from the global memory of the edge computing device into the local memory of the corresponding stream processor; and using the stream processor corresponding to the first task block to perform a game. The first task block in local memory performs a first processing operation to obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block. For each second task block, the following steps are executed cyclically: using the stream processor corresponding to the current second task block, the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row in the current second task block in local memory are used to perform a second processing operation to obtain the intermediate calculation result of the current second task block; using the stream processor corresponding to the current second task block, the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in local memory, and the result sub-vector corresponding to the second sub-row are used to perform a third processing operation to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

[0115] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0116] In the above embodiments of this application, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0117] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. The device embodiments described above are merely illustrative; for example, the division of units can be a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some interfaces; indirect couplings or communication connections between units or modules may be electrical or other forms.

[0118] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0119] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0120] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to related technologies, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as a USB flash drive, read-only memory (ROM), random access memory (RAM), portable hard drive, magnetic disk, or optical disk.

[0121] The above are merely preferred embodiments of this application. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. A data processing method for edge computing devices, characterized in that, include: The triangular matrix to be calculated, the triangular matrix to be solved, and the result vector in the vector solving function are divided into multiple task blocks. The triangular matrix is ​​an upper triangular matrix or a lower triangular matrix. The multiple task blocks include: a first task block that includes only the first sub-row of the main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector; and multiple second task blocks that include the second sub-row of the main diagonal matrix block and the non-main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector. Multiple stream processors within the edge computing device are invoked to load multiple task blocks from the global memory of the edge computing device into the local memory of the corresponding stream processor; The first processing operation is performed on the first task block in the local memory using the stream processor corresponding to the first task block, and the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block is obtained. For each second task block, the following steps are executed cyclically: using the stream processor corresponding to the current second task block, a second processing operation is performed on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row within the current second task block in the local memory to obtain the intermediate calculation result of the current second task block; using the stream processor corresponding to the current second task block, a third processing operation is performed on the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row within the current second task block in the local memory, and the result sub-vector corresponding to the second sub-row to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row within the current second task block.

2. The method according to claim 1, characterized in that, The triangular matrix to be calculated, the triangular matrix in the vector solving function, the vector to be solved, and the result vector are divided into multiple task blocks, including: Based on the number of stream processors within the edge computing device, the triangular matrix, the vector to be solved, and the result vector within the vector solving function are divided into multiple task blocks.

3. The method according to claim 1, characterized in that, The first task block in the local memory is processed by the stream processor corresponding to the first task block to obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block, including: Load the main diagonal matrix block of the first sub-row in the first task block in the local memory and the result sub-vector corresponding to the first sub-row into the register in the edge computing device; The first quotient of the result subvector corresponding to the first subrow in the first task block and the main diagonal matrix block of the first subrow is calculated using the stream processor corresponding to the first task block loaded into the register, and the first quotient is used as the first calculation result of the subvector to be solved corresponding to the first subrow in the first task block.

4. The method according to claim 1, characterized in that, Using the stream processor corresponding to the current second task block, perform a second processing operation on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row within the current second task block in the local memory to obtain the intermediate calculation result of the current second task block, including: The calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row in the current second task block in the local memory are loaded into the register in the edge computing device; The intermediate calculation result of the current second task block is obtained by multiplying the non-main diagonal matrix block of the second sub-row within the current second task block loaded into the register with the calculation result of the previous task block using the stream processor corresponding to the current second task block.

5. The method according to claim 4, characterized in that, After obtaining the intermediate calculation results of the current second task block, the method further includes: The intermediate calculation result is used as the calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

6. The method according to claim 1, characterized in that, Using the stream processor corresponding to the current second task block, a third processing operation is performed on the intermediate calculation results of the current second task block, the main diagonal matrix block of the second sub-row within the current second task block in the local memory, and the result sub-vector corresponding to the second sub-row, to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row within the current second task block, including: The intermediate calculation results of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in the local memory, and the result sub-vector corresponding to the second sub-row are loaded into the register in the edge computing device; The difference between the result subvector corresponding to the second sub-row within the current second task block and the intermediate calculation result of the current second task block is calculated using the stream processor corresponding to the current second task block. The stream processor corresponding to the current second task block is used to calculate the second quotient of the difference and the main diagonal matrix block of the second sub-row in the current second task block, and the second quotient is used as the second calculation result of the current second task block.

7. The method according to claim 1, characterized in that, The method further includes: The calculation results of each task block are sequentially written from local memory to the global memory of the edge computing device.

8. A data analysis device for edge computing devices, characterized in that, include: The partitioning module is used to divide the triangular matrix to be calculated, the triangular matrix to be solved, and the result vector in the vector solving function into multiple task blocks. The triangular matrix is ​​an upper triangular matrix or a lower triangular matrix. The multiple task blocks include: a first task block that includes only the first sub-row of the main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector; and multiple second task blocks that include the second sub-row of the main diagonal matrix block and the non-main diagonal matrix block and the corresponding sub-vector to be solved and the result sub-vector. The loading module is used to call multiple stream processors within the edge computing device to load multiple task blocks from the global memory of the edge computing device into the local memory of the corresponding stream processor; The first analysis module is used to perform a first processing operation on the first task block in the local memory using the stream processor corresponding to the first task block, and obtain the first calculation result of the sub-vector to be solved corresponding to the first sub-row in the first task block. The second analysis module is used to perform the following steps cyclically for each second task block: using the stream processor corresponding to the current second task block to perform a second processing operation on the calculation result of the previous task block and the non-main diagonal matrix block of the second sub-row in the current second task block in the local memory, to obtain the intermediate calculation result of the current second task block; using the stream processor corresponding to the current second task block to perform a third processing operation on the intermediate calculation result of the current second task block, the main diagonal matrix block of the second sub-row in the current second task block in the local memory, and the result sub-vector corresponding to the second sub-row, to obtain the second calculation result of the sub-vector to be solved corresponding to the second sub-row in the current second task block.

9. A non-volatile storage medium, characterized in that, The non-volatile storage medium stores a computer program, wherein the device containing the non-volatile storage medium executes the data processing method for edge computing devices according to any one of claims 1 to 7 by running the computer program.

10. A computer program product, characterized in that, include: A computer program, wherein when executed by a processor, the computer program implements the data processing method for an edge computing device as described in any one of claims 1 to 7.

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