A surge suppression circuit and power supply

Abstract

This invention relates to the field of electronic technology and discloses a surge suppression circuit and power supply, comprising: a control module that matches the control voltage to the initial voltage value of the switching circuit based on the first voltage signal of the first sampling circuit, thereby keeping the switching circuit in the off state and preventing the destructive impact of large current at the moment of power-on from the source; then gradually reducing the control voltage to drive the switching circuit into the variable resistance region to achieve current limiting; simultaneously, calculating the actual current of the circuit in real time through the second voltage signal of the second sampling circuit and dynamically comparing it with the maximum surge current setting value; when the difference reaches the preset value, immediately fixing the control voltage to fully turn on the switching circuit. This closed-loop logic allows the surge suppression process to adaptively adjust with changes in the actual current, effectively limiting the surge current to a safe range while avoiding the problem of slow power-on caused by traditional fixed current limiting methods, achieving a dual balance between surge suppression effect and power-on efficiency.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, specifically to a surge suppression circuit and a power supply. Background Technology

[0002] In electronic circuit applications, when a large-capacity capacitor is configured at the load end, the rapid closing of the power-on switch can easily trigger a surge current with a large amplitude and long duration. This current can cause destructive impacts on the power supply, components and lines of the power supply path, seriously affecting the stability and service life of the circuit system. Therefore, the effective suppression of surge current has become a key technical requirement in electronic circuit design.

[0003] One existing power surge current suppression scheme is to limit the current through a series power resistor. When the power switch is closed, the current is limited to a fixed range by the power resistor. After power-on, the resistor is bypassed by the switch to ensure low internal resistance of the power supply circuit. However, this scheme requires a large power resistor, and the peak surge current is determined by the fixed resistance value of the resistor. It cannot be flexibly configured by software. Adjusting the resistance value after the whole machine is assembled is costly and complicated.

[0004] Another existing suppression scheme is to increase the gate capacitance or gate voltage divider resistor value of the power MOSFET to extend the MOSFET's operating time in the variable resistance region. This utilizes the variable resistance characteristic to charge the load capacitor and suppress surge current. However, this scheme also lacks the ability to configure the surge current peak value in software. Furthermore, an excessively large gate RC parameter will cause the MOSFET to turn off too slowly, which can easily lead to reverse voltage flow from the load on the large capacitor side during power-down, bringing new circuit operation risks. Summary of the Invention

[0005] This invention provides a surge suppression circuit and power supply to solve the problem that when a large-capacity capacitor is configured at the load end, the rapid closing of the power-on switch can easily cause a surge current with a large amplitude and long duration.

[0006] In a first aspect, the present invention provides a surge suppression circuit applied in a power supply circuit. The power supply circuit includes a control switch, a first switching circuit, and a second switching circuit. The surge suppression circuit includes a startup circuit, a first sampling circuit, a second sampling circuit, a voltage control circuit, and a control module. A first terminal of the control switch is connected to positive DC power. A first terminal of the first switching circuit is connected to a second terminal of the control switch, and a second terminal of the first switching circuit is connected to a first terminal of the second switching circuit. The negative terminal of the load is connected to negative DC power. A first terminal of the startup circuit is connected to a second terminal of the control switch, and a second terminal of the startup circuit is connected to the control module. The startup circuit outputs a startup signal to the control module when the control switch is closed. A first terminal of the first sampling circuit is connected to a second terminal of the first switching circuit, and a second terminal of the first sampling circuit is connected to the control module. The first sampling circuit outputs a first voltage signal when the control switch is closed. A first terminal of the second sampling circuit is connected to a second terminal of the second switching circuit, and a second sampling circuit outputs a first voltage signal. The second end of the circuit is connected to the positive terminal of the load, and the third end of the second sampling circuit is connected to the control module. The second sampling circuit is used to output a second voltage signal. The first end of the voltage control circuit is connected to the control module, and the second end of the voltage control circuit is connected to the control terminals of the first and second switching circuits. The voltage control circuit is used to adjust the amplitude of the control voltage based on the voltage control signal output by the control circuit. The control circuit is used to control the amplitude of the control voltage to be the initial value of the voltage at the second terminal of the first switching circuit after the control switch is closed, and gradually reduce the amplitude of the control voltage so that the first and second switching circuits are in the variable resistance region. During the process of gradually reducing the amplitude of the control voltage, the control circuit is used to determine whether the difference between the current and the maximum surge current setting value reaches the preset voltage difference value according to the second voltage signal. When the difference reaches the preset voltage difference value, the control voltage amplitude is controlled to be the preset voltage value. The preset voltage value is used to control the first and second switching circuits to be fully turned on.

[0007] In one optional embodiment, the startup circuit includes: a first resistor, a second resistor, a third resistor, a first capacitor, and a first operational amplifier, wherein a first end of the first resistor is connected to a second end of a control switch, a second end of the first resistor is connected to the non-inverting input of the first operational amplifier, and the second end of the first resistor is also grounded through the second resistor; the inverting input of the first operational amplifier is connected to its output and the first end of the third resistor; the second end of the third resistor is connected to a control module, and the second end of the third resistor is also grounded through the first capacitor.

[0008] In one optional implementation, the first sampling circuit includes: a fourth resistor, a fifth resistor, a sixth resistor, a second capacitor, and a second operational amplifier. The first end of the fourth resistor is connected to the second end of the first switching circuit, the second end of the fourth resistor is connected to the non-inverting input of the second operational amplifier, and the second end of the fourth resistor is also grounded through the fifth resistor. The inverting input of the second operational amplifier is connected to its output and the first end of the sixth resistor. The second end of the sixth resistor is connected to the control module, and the second end of the sixth resistor is also grounded through the second capacitor.

[0009] In one optional embodiment, the second sampling circuit includes: a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third capacitor, and a third operational amplifier. The first terminal of the seventh resistor is connected to the second terminal of the second switching circuit and the first terminal of the eighth resistor; the second terminal of the seventh resistor is connected to the negative terminal of the load and the first terminal of the tenth resistor; the second terminal of the eighth resistor is connected to the non-inverting input terminal of the third operational amplifier and is also grounded through the ninth resistor; the second terminal of the tenth resistor is connected to the inverting input terminal of the third operational amplifier and the first terminal of the eleventh resistor; the second terminal of the eleventh resistor is connected to the output terminal of the third operational amplifier and the second terminal of the twelfth resistor; the second terminal of the twelfth resistor is connected to the control module and is also grounded through the third capacitor.

[0010] In one optional embodiment, the voltage control circuit includes: a digital potentiometer and a conditioning circuit, wherein the input terminal of the digital potentiometer is connected to the control module, and the digital potentiometer is used to adjust the amplitude of the output voltage based on the voltage control signal output by the control circuit; the first terminal of the conditioning circuit is connected to the output terminal of the digital potentiometer, and the second terminal of the conditioning circuit is connected to the control terminals of the first switching circuit and the second switching circuit, and the conditioning circuit is used to condition the output voltage of the digital potentiometer and then output a control voltage.

[0011] In one optional embodiment, the conditioning circuit includes: a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a fourth operational amplifier, wherein the first terminal of the thirteenth resistor is connected to the output terminal of the digital potentiometer, and the second terminal of the thirteenth resistor is connected to the non-inverting input terminal of the fourth operational amplifier; the first terminal of the fourteenth resistor is grounded, and the second terminal of the fourteenth resistor is connected to the first terminal of the fifteenth resistor and the inverting input terminal of the fourth operational amplifier; the second terminal of the fifteenth resistor is connected to the inverting input terminal of the fourth operational amplifier, the control terminal of the first switching circuit, and the control terminal of the second switching circuit.

[0012] In one optional implementation, the control module includes: an analog-to-digital converter and a controller, wherein the input terminal of the analog-to-digital converter is connected to the second terminal of the startup circuit and the second terminal of the first sampling circuit, and the output terminal of the analog-to-digital converter is connected to the input terminal of the controller; the input terminal of the controller is connected to the third terminal of the second sampling circuit, and the output terminal of the controller is connected to the first terminal of the voltage control circuit.

[0013] In a second aspect, the present invention provides a power supply, including: a power supply circuit and a surge suppression circuit.

[0014] In one optional embodiment, the first switching circuit includes a first MOSFET, and the second switching circuit includes a second MOSFET, wherein the source of the first MOSFET is connected to the second terminal of the control switch, the drain of the first MOSFET is connected to the drain of the second MOSFET, the gate of the first MOSFET is connected to the gate of the second MOSFET and the second terminal of the voltage control circuit, and the source of the second MOSFET is connected to the first terminal of the second sampling circuit.

[0015] In one optional embodiment, the power supply further includes: a Zener diode, a sixteenth resistor, and a fourth capacitor, wherein the cathode of the Zener diode is connected to the second terminal of the first switching circuit, the first terminal of the sixteenth resistor, and the first terminal of the fourth capacitor, and the anode of the Zener diode is connected to the control terminal of the first switching circuit, the second terminal of the sixteenth resistor, and the second terminal of the fourth capacitor.

[0016] In one alternative embodiment, the power supply further includes an output filter circuit, wherein a first terminal of the output filter circuit is connected to the positive terminal of the load, and a second terminal of the output filter circuit is connected to the negative terminal of the load.

[0017] Beneficial effects: This invention forms a complete closed-loop control system of power-on triggering, voltage sampling, current feedback, and dynamic voltage regulation through the coordinated operation of a startup circuit, a dual sampling circuit, a voltage control circuit, and a control module. The control module first matches the control voltage to the initial voltage value of the switching circuit based on the first voltage signal from the first sampling circuit, keeping the switching circuit in the off state and preventing the destructive impact of large current surges at the moment of power-on. Then, it gradually reduces the control voltage to drive the switching circuit into the variable resistance region to achieve current limiting. Simultaneously, it calculates the actual current in the circuit in real time using the second voltage signal from the second sampling circuit and dynamically compares it with the maximum surge current setting. When the difference reaches the preset value, it immediately fixes the control voltage to fully turn on the switching circuit. This closed-loop logic allows the surge suppression process to adaptively adjust according to changes in the actual current, effectively limiting the power-on surge current within a safe range while avoiding the slow power-on problem caused by traditional fixed current limiting methods, achieving a dual balance between surge suppression effect and power-on efficiency. Attached Figure Description

[0018] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0019] Figure 1 This is the first circuit structure diagram for power-on surge current suppression in related technologies; Figure 2 This is the second circuit structure diagram for power-on surge current suppression in related technologies; Figure 3 This is a schematic diagram of the surge suppression circuit according to an embodiment of the present invention; Figure 4 , Figure 5 This is a specific circuit structure diagram of the surge suppression circuit according to an embodiment of the present invention. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] It is understood that before using the technical solutions disclosed in the various embodiments of the present invention, users should be informed of the types, scope of use, and usage scenarios of the personal information involved in the present invention and their authorization should be obtained in accordance with relevant laws and regulations through appropriate means.

[0022] The terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0023] like Figure 1 As shown, if the subsequent load has a large-capacity capacitor and the power-on switch K1 switches too quickly, a large-amplitude, long-lasting surge current (Isurge) will occur. One existing method for suppressing surge current is as follows: Figure 1As shown, when K1 closes, the current is limited by resistor R1, restricting the maximum current to within VCC / R1. After power-on, switch K2 turns on, bypassing R1 to ensure low internal resistance of the power supply circuit, reducing power consumption and line voltage drop. However, the disadvantage of this method is that it requires a relatively large power resistor R1, and the peak value of the power-on surge current cannot be flexibly configured by the user through software. When assembled into a complete unit, adjusting the resistance value of R1 to configure the power-on surge current is costly.

[0024] Another existing method for suppressing power-on surge current is as follows: Figure 2 As shown, by increasing the power MOSFETs Q1 and Q2, C3, or the gate voltage divider resistors R2 and R3, the power MOSFETs can remain in the variable resistance region for as long as possible. At power-on, the variable resistors of Q1 and Q2 charge the subsequent load capacitor, thereby suppressing the occurrence of large inrush current. However, the disadvantage of this method is that the peak value of the power-on inrush current cannot be flexibly configured by the user through software. Furthermore, when powering off, an excessively large gate RC parameter can cause Q1 and Q2 to turn off too slowly, which may cause reverse voltage flow to the load side of the large capacitor.

[0025] Based on this, this embodiment provides a surge suppression circuit, which is applied in a power supply circuit, such as... Figure 3 As shown, the power supply circuit includes a control switch K1, a first switch circuit 1, and a second switch circuit 2. The first terminal of the control switch K1 is connected to positive DC power. The first terminal of the first switch circuit 1 is connected to the second terminal of the control switch K1. The second terminal of the first switch circuit 1 is connected to the first terminal of the second switch circuit 2. The negative terminal of the load is connected to negative DC power. The surge suppression circuit includes a startup circuit 3, a first sampling circuit 4, a second sampling circuit 5, a voltage control circuit 6, and a control module 7.

[0026] refer to Figure 2 The first end of the starting circuit 3 is connected to the second end of the control switch K1, and the second end of the starting circuit 3 is connected to the control module 7. The starting circuit 3 is used to output a start signal to the control module 7 when the control switch K1 is closed.

[0027] Specifically, after the control switch K1 is closed, the starting circuit 3 immediately generates and outputs a starting signal, triggering the control module 7 to enter the working mode, providing a starting trigger basis for the full-process control of surge suppression.

[0028] refer to Figure 2 The first terminal of the first sampling circuit 4 is connected to the second terminal of the first switching circuit 1, and the second terminal of the first sampling circuit 4 is connected to the control module 7. The first sampling circuit 4 is used to output a first voltage signal when the control switch K1 is closed. This signal serves as the basic reference voltage for the control module 7 to regulate the control voltage.

[0029] refer to Figure 2 The first terminal of the second sampling circuit 5 is connected to the second terminal of the second switching circuit 2, the second terminal of the second sampling circuit 5 is connected to the positive terminal of the load, and the third terminal of the second sampling circuit 5 is connected to the control module 7. The second sampling circuit 5 is used to output a second voltage signal, which can directly reflect the actual current change in the power supply circuit.

[0030] refer to Figure 2 The first end of the voltage control circuit 6 is connected to the control module 7, and the second end of the voltage control circuit 6 is connected to the control terminal of the first switch circuit 1 and the control terminal of the second switch circuit 2. The voltage control circuit 6 is used to adjust the amplitude of the control voltage based on the voltage control signal output by the control circuit.

[0031] refer to Figure 2 The control circuit is used to control the amplitude of the control voltage based on the first voltage signal. The amplitude of the control voltage is the initial value of the second terminal voltage of the first switching circuit 1 after the control switch K1 is closed. At this time, the first and second switching circuits 2 are in the off state, which avoids the impact of large current at the moment of power-on from the source. Then, the control module 7 gradually reduces the amplitude of the control voltage according to the preset logic, driving the first switching circuit 1 and the second switching circuit 2 into the variable resistance region. By utilizing the current limiting characteristics of its variable resistance, the surge current is effectively suppressed, allowing the load capacitor to be charged smoothly and avoiding the surge current from causing destructive impact on the circuit devices.

[0032] refer to Figure 2 Throughout the process of gradually decreasing the control voltage amplitude, the control module 7 continuously calculates the actual current value in the power supply circuit through the second voltage signal output by the second sampling circuit 5, and compares the actual current with the preset maximum surge current setting value in real time, calculates the difference between the two and converts it into the corresponding voltage difference judgment condition; when the difference is detected to reach the preset voltage difference value, it indicates that the surge current in the circuit has been effectively suppressed to the target safe range. At this time, the control module 7 immediately issues an instruction to fix the amplitude of the control voltage to the preset voltage value. This voltage value can drive the first switching circuit 1 and the second switching circuit 2 to be fully turned on, so that the power supply circuit leaves the current limiting mode and enters the normal power supply state with low internal resistance. This not only completes the precise suppression of the power-on surge current, but also ensures the power supply efficiency of the power supply circuit, achieving a balance between surge suppression effect and normal power supply of the circuit.

[0033] In one alternative implementation, such as Figure 4As shown, the startup circuit 3 includes: a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, and a first operational amplifier U1. The first end of the first resistor R1 is connected to the second end of the control switch K1, and the second end of the first resistor R1 is connected to the non-inverting input of the first operational amplifier U1. The second end of the first resistor R1 is also grounded through the second resistor R2. The inverting input of the first operational amplifier U1 is connected to its output and the first end of the third resistor R3. The second end of the third resistor R3 is connected to the control module 7 (i.e., ADC), and the second end of the third resistor R3 is also grounded through the first capacitor C1.

[0034] The startup circuit 3, through a combination of voltage divider adaptation, voltage follower, and RC filtering, realizes the acquisition, conditioning, and transmission of the control switch K1 closing signal, providing a start trigger signal for the control module 7. The components work together to form an integrated signal processing link: the first resistor R1 and the second resistor R2 form a voltage divider circuit, and the input voltage is stepped down by the resistance ratio of the two to adapt to the input voltage threshold of the first operational amplifier U1, so as to avoid damage to the operational amplifier device by overvoltage signal, and at the same time lay the foundation for the adapted voltage reference for subsequent signal conditioning.

[0035] The first operational amplifier U1 adopts a wiring method in which the inverting input terminal is directly connected to its own output terminal, forming a typical voltage follower circuit. Utilizing the electrical characteristics of the voltage follower, which has high input impedance and low output impedance, it achieves effective isolation between the front-stage voltage divider circuit and the rear-stage circuit, preventing the load changes of the rear-stage circuit from interfering with the voltage division accuracy. At the same time, it buffers the voltage signal after voltage division to ensure lossless transmission of the signal in the link and ensures the original accuracy of the start-up trigger signal.

[0036] The third resistor R3 and the first capacitor C1 together form an RC low-pass filter circuit, which can effectively filter out high-frequency circuit noise and interference noise mixed in the voltage signal, suppress signal fluctuations, and keep the filtered signal stable and continuous. Finally, the signal transmitted from the second end of the third resistor R3 to the control module 7 is a stable start signal without noise.

[0037] In one alternative implementation, such as Figure 4As shown, the first sampling circuit 4 includes: a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a second capacitor C2, and a second operational amplifier U2. This circuit achieves accurate acquisition and signal conditioning of the real-time voltage at the second terminal of the first switching circuit 1 through cascaded processing of sampling voltage division, voltage tracking, and RC filtering. Finally, it outputs a stable, noise-free first voltage signal to the control module 7, providing an accurate and reliable voltage reference for the voltage regulation operation of the control module 7. Specifically, the first terminal of the fourth resistor R4 is connected to the second terminal (Q1) of the first switching circuit 1, and the second terminal of the fourth resistor R4 is connected to the non-inverting input terminal of the second operational amplifier U2. The second terminal of the fourth resistor R4 is also grounded through the fifth resistor R5. The inverting input terminal of the second operational amplifier U2 is connected to its output terminal and the first terminal of the sixth resistor R6. The second terminal of the sixth resistor R6 is connected to the control module 7 (i.e., ADC), and the second terminal of the sixth resistor R6 is also grounded through the second capacitor C2.

[0038] Specifically, the fourth resistor R4 directly acquires the real-time voltage at the second terminal of the first switching circuit 1 and transmits the voltage signal to the non-inverting input terminal of the second operational amplifier U2 without loss. The fourth resistor R4 and the fifth resistor R5 form a voltage divider network. By matching the resistance ratio of the two, the acquired original voltage is adaptively stepped down to match the input voltage range of the second operational amplifier U2, so as to avoid the distortion of the sampling signal or the damage to the device caused by over-range input.

[0039] The second operational amplifier U2 adopts a topology in which the inverting input terminal is directly connected to its own output terminal, forming a classic voltage follower. By taking advantage of the high input impedance and low output impedance of the voltage follower, electrical isolation between the front-stage voltage divider sampling circuit and the rear-stage filter circuit is achieved.

[0040] The conditioning signal output from the second operational amplifier U2 is transmitted forward through the sixth resistor R6. The sixth resistor R6 and the second capacitor C2 together form an RC low-pass filter circuit, which can efficiently filter out high-frequency electromagnetic interference, circuit noise and voltage spike noise mixed in the sampling signal, smooth the sampling signal, suppress irregular fluctuations of the signal, and finally transmit the first voltage signal to the control module 7 through the sixth resistor R6. This is an effective signal that stably, continuously and accurately reflects the actual voltage state of the second terminal of the first switching circuit 1, ensuring the accuracy and stability of the control module 7 in the initial matching of the control voltage amplitude and subsequent dynamic adjustment based on this signal.

[0041] In one alternative implementation, such as Figure 4As shown, the second sampling circuit 5 includes: a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a third capacitor C3, and a third operational amplifier U3. The first terminal of the seventh resistor R7 is connected to the second terminal (Q2) of the second switching circuit 2 and the first terminal of the eighth resistor R8. The second terminal of the seventh resistor R7 is connected to the negative terminal of the load and the first terminal of the tenth resistor R10. The second terminal of the eighth resistor R8 is connected to the non-inverting input terminal of the third operational amplifier U3 and is also grounded through the ninth resistor R9. The second terminal of the tenth resistor R10 is connected to the inverting input terminal of the third operational amplifier U3 and the first terminal of the eleventh resistor R11. The second terminal of the eleventh resistor R11 is connected to the output terminal of the third operational amplifier U3 and the second terminal of the twelfth resistor R12. The second terminal of the twelfth resistor R12 is connected to the control module 7 (ADC) and is also grounded through the third capacitor C3.

[0042] The second sampling circuit 5 establishes a differential sampling link through the seventh resistor R7, the eighth resistor R8 and the tenth resistor R10 to accurately acquire the voltage difference between the second terminal of the second switching circuit 2 and the negative terminal of the load. This difference is directly related to the actual current in the power supply circuit. The differential sampling method can effectively suppress common-mode interference in the circuit and greatly improve the anti-interference capability and accuracy of current sampling.

[0043] The differential amplifier circuit with the third operational amplifier U3 as its core achieves signal amplification and input matching through the ratio of multiple resistors. The eighth resistor R8 and the ninth resistor form a voltage divider network to step down the differential sampling signal at the non-inverting input terminal so that it matches the input voltage range of the third operational amplifier U3, thus avoiding signal distortion caused by over-range input.

[0044] The tenth resistor R10 and the eleventh resistor R11 form a feedback link. The gain of the differential amplifier circuit can be flexibly set by the resistance ratio of the two resistors, which amplifies the small voltage difference obtained by sampling into a voltage signal that can be accurately identified by the control module 7, while ensuring the linearity and accuracy of the amplified signal.

[0045] The signal, after differential amplification by the third operational amplifier U3, is transmitted forward through the twelfth resistor R12. The twelfth resistor R12 and the third capacitor C3 form the subsequent RC low-pass filter circuit, which can efficiently filter out high-frequency electromagnetic interference, circuit noise and voltage spikes introduced during the amplification process, smooth the amplified voltage signal, suppress irregular fluctuations of the signal, and keep the signal stable and continuous.

[0046] The second voltage signal, which is ultimately transmitted from the second end of the twelfth resistor R12 to the control module 7, is an effective signal after differential sampling, precise amplification, and filtering conditioning. It can reflect the actual current change in the power supply circuit in real time and accurately, ensuring that the control module 7 can accurately determine the difference between the surge current and the maximum surge current setting value based on this signal, providing reliable detection support for the closed-loop control of surge suppression.

[0047] In one optional embodiment, the voltage control circuit 6 includes a digital potentiometer U6 and a conditioning circuit. The input terminal of the digital potentiometer U6 is connected to the control module 7 (i.e., U5), and the digital potentiometer U6 is used to adjust the amplitude of the output voltage based on the voltage control signal output by the control circuit. The first terminal of the conditioning circuit is connected to the output terminal of the digital potentiometer U6, and the second terminal of the conditioning circuit is connected to the control terminal (i.e., Q1) of the first switching circuit 1 and the control terminal (i.e., Q2) of the second switching circuit 2. The conditioning circuit is used to condition the output voltage of the digital potentiometer U6 and then output a control voltage.

[0048] The digital potentiometer U6 can respond to the voltage control signal output by the control module 7 in real time and accurately. Through the digital tap switching of the internal resistor array, it can realize the programmable and step-by-step precise adjustment of its output voltage amplitude, replacing the fixed resistance design of the traditional analog resistor. This allows the output voltage to change dynamically according to the real-time control requirements of surge suppression, perfectly adapting to the full-process voltage control requirements of the first and second switching circuits 2 from the cutoff state to the variable resistance region and then to the fully conducting state, realizing the digital and flexible adjustment of the control voltage amplitude.

[0049] Optionally, the digital potentiometer U6 is a 256-tap digital potentiometer TPL0501-100DCNR.

[0050] For example, refer to Figure 4 , Figure 5 After power-on, V2 is stepped down by a voltage divider circuit composed of R4 and R5, then passes through U2, and finally through a low-pass filter circuit composed of R6 and C2 before being input to the ADC for analog-to-digital conversion. The ADC transmits the conversion result to U5 via the SPI interface, and U5 then controls the output voltage Uw of U6 via the SPI interface. Uw is amplified by 11 times to form Vg. The initial value of Vg is V2. For example, assuming that the sampled value of V2 is 28V, then the initial value of Vg is 28V, that is, Uw = 28 ÷ 11 = 2.54V, which means that the RwL of the digital potentiometer U6 is 76.95kJ, and the corresponding digital setting value is 11000101, as shown in Table 1.

[0051] Table 1

[0052] The conditioning circuit can perform targeted conditioning processes such as signal amplification, buffering, and impedance matching, effectively compensating for the shortcomings of the analog driving characteristics of the output signal of the digital potentiometer U6. It ensures that the conditioned voltage signal has sufficient driving capability to regulate the potential of the control terminal of the switching circuit, while ensuring that the amplitude and stability of the voltage signal are precisely matched with the control electrical characteristics of the first switching circuit 1 and the second switching circuit 2. Finally, the conditioning circuit stably outputs the required control voltage to the control terminals of the two switching circuits, providing a reliable voltage drive guarantee for the smooth and accurate switching of the working state of the switching circuit.

[0053] In one alternative implementation, such as Figure 4 , Figure 5 As shown, the conditioning circuit includes: a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, and a fourth operational amplifier U4. The first terminal of the thirteenth resistor R13 is connected to the output terminal of the digital potentiometer U6, and the second terminal of the thirteenth resistor R13 is connected to the non-inverting input terminal of the fourth operational amplifier U4. The first terminal of the fourteenth resistor R14 is grounded, and the second terminal of the fourteenth resistor R14 is connected to the first terminal of the fifteenth resistor R15 and the inverting input terminal of the fourth operational amplifier U4. The second terminal of the fifteenth resistor R15 is connected to the inverting input terminal of the fourth operational amplifier U4, the control terminal of the first switching circuit 1, and the control terminal of the second switching circuit 2.

[0054] The fourth operational amplifier U4, together with the fourteenth resistor R14 and the fifteenth resistor R15, constitutes a non-inverting proportional amplifier circuit. The fifteenth resistor R15 is connected between the inverting input and output of the operational amplifier, forming a deep negative feedback link. On the one hand, by matching the resistance value with the fourteenth resistor R14, the voltage amplification factor of the entire conditioning circuit can be flexibly and accurately set, amplifying the small voltage adjustment signal output by the digital potentiometer U6 to a voltage amplitude that can effectively drive the control terminal of the switching circuit. On the other hand, the deep negative feedback can effectively suppress the signal distortion of the operational amplifier, stabilize its operating point, and ensure that the amplified voltage signal maintains a good linear relationship with the input signal, so that the output of the control voltage accurately follows the voltage adjustment changes of the digital potentiometer U6.

[0055] The stable control voltage amplified and conditioned by the fourth operational amplifier U4 is synchronously output to the control terminals of the first switching circuit 1 and the second switching circuit 2 through the fifteenth resistor R15. This ensures that the two switching circuits can receive the same accurate and distortion-free control voltage signal, achieving synchronous switching of their operating states. This avoids the problem of uncontrolled surge current caused by asynchronous operation of the switching circuits due to inconsistent control voltages. At the same time, the amplified control voltage has sufficient driving capability to effectively regulate the potential changes at the control terminals of the switching circuits, ensuring a smooth and stable switching process from the cutoff state to the variable resistance region and then to the fully conducting state for the first switching circuit 1 and the second switching circuit 2, accurately responding to the voltage regulation commands of the control module 7.

[0056] In one alternative implementation, such as Figure 4 , Figure 5 As shown, the control module 7 includes an analog-to-digital converter (ADC) and a controller U5. The input terminal of the ADC is connected to the second terminal of the startup circuit 3 and the second terminal of the first sampling circuit 4. The output terminal of the ADC is connected to the input terminal of the controller U5. The input terminal of the controller U5 is connected to the third terminal of the second sampling circuit 5. The output terminal of the controller U5 is connected to the first terminal of the voltage control circuit 6.

[0057] The analog-to-digital converter (ADC) can acquire the analog start-up trigger signal output by the start-up circuit 3 and the analog first voltage signal output by the first sampling circuit 4. It performs high-resolution analog-to-digital conversion on these two types of continuous analog voltage signals, converting them into digital signals that the controller U5 can recognize and process. The converted digital signals are then accurately transmitted to the controller U5 through the output terminal. The integrity and accuracy of the signal are guaranteed during the conversion process, effectively solving the problem that analog signals are easily interfered with and cannot be directly used by the controller U5 for logical operations, thus providing a precise signal foundation for subsequent digital control.

[0058] The input terminal of controller U5 has a multi-channel signal receiving link. On the one hand, it receives the start signal and the digital quantity of the first voltage signal transmitted by the analog-to-digital converter (ADC). On the other hand, it is directly connected to the second sampling circuit 5 to receive the second voltage signal output by it. Controller U5 has a built-in preset surge suppression closed-loop control logic. It can first quickly identify the power-on trigger state of the power supply circuit based on the start signal, and then use the digital quantity of the first voltage signal as a reference to complete the initial matching of the control voltage amplitude and output the corresponding voltage control signal.

[0059] Throughout the surge suppression process, controller U5 continuously receives the second voltage signal, calculates the actual current value in the power supply circuit in real time, and dynamically compares it with the preset maximum surge current setting. Based on the judgment result, it adjusts the output parameters of the voltage control signal in real time. Its output terminal is precisely connected to the voltage control circuit 6, and outputs the calculated digital voltage control signal stably. This drives the voltage control circuit 6 to dynamically adjust the control voltage amplitude output to the switching circuit, thereby regulating the working state of the first switching circuit 1 and the second switching circuit 2. This orderly completes the state switching from cutoff to current limiting in the variable resistance area, and then to full conduction. At the same time, it can also output power-down related control commands according to the actual operating requirements of the circuit, realizing rapid power-off or soft power-off of the load, and comprehensively ensuring the safety and stability of surge suppression and circuit power supply.

[0060] Specifically, Figure 4 , Figure 5 In the diagram, pins 1, 14, 15, and 16 of the analog-to-digital converter (ADC) are connected to pins T9, U7, V7, and U10 of the controller U5, respectively. Pins 4, 5, and 6 of the digital potentiometer U6 are connected to pins Y9, Y8, and V8 of the controller U5, respectively.

[0061] In a practical application, refer to Figure 4 , Figure 5 After K1 is closed, voltages V1 and V2 are processed by the startup circuit 3 and the first sampling circuit 4, and then converted from analog to digital by the ADC and transmitted to the controller U5. When the controller U5 detects that the voltage V2 reaches the preset threshold, it determines that the circuit meets the power-on conditions and then adjusts the output potential of the digital potentiometer U6 to change the amplification factor of the fourth operational amplifier U4, so that the output voltage Vg of the fourth operational amplifier U4 gradually decreases, and the gate drive voltage (V2-Vg) of the corresponding MOS transistor increases synchronously, driving the MOS transistor to smoothly enter the variable resistance region from the cutoff state. Meanwhile, the voltage (V3-V4) across the seventh resistor R7 is conditioned by the differential amplifier circuit, acquired by the ADC and converted into a digital signal, which is then fed back to the controller U5. The controller U5 calculates the actual sampled current value Is of the loop using the formula (V3-V4) / R7, and then calculates the control error err=Iu(power-on surge current set value)-Is. This error value is multiplied by the scaling factor and converted into a digital control quantity. The output Vg of the fourth operational amplifier U4 is further adjusted by the digital potentiometer U6, forming a closed-loop control of the surge current.

[0062] This closed-loop control method effectively suppresses inrush current during power-on while preventing a slow power-on process from affecting circuit efficiency. Furthermore, the inrush current can be flexibly configured via software, quickly matching the control needs of different users, eliminating the cumbersome process of traditional hardware configuration, and avoiding the operational risks associated with hardware debugging. During the power-off phase, V2-Vg can be set to 0 via software to achieve rapid load disconnection, ensuring safety during the power-off process.

[0063] In addition, the main chip of the integrated flight controller has abundant hardware resources and can be directly shared as the controller U5 of this circuit. There is no need to add a dedicated control chip, which greatly reduces the hardware cost and PCB board area of ​​the circuit, while fully demonstrating the high integration design characteristics of the integrated flight controller.

[0064] When the load is powered off, adjust the output voltage Uw of the digital potentiometer U6 to make (V2-Vg)=0, so that the load can be quickly de-energized. If the load is a large inductive load, Uw can be gradually increased to prevent (V2-Vg) from suddenly decreasing to zero, thus avoiding the back electromotive force generated by the inductive load when the power is suddenly cut off.

[0065] This embodiment provides a power supply, including: a power supply circuit and a surge suppression circuit.

[0066] In one alternative implementation, such as Figure 4 As shown, the first switching circuit 1 includes a first MOSFET, and the second switching circuit 2 includes a second MOSFET. The source of the first MOSFET is connected to the second terminal of the control switch K1, the drain of the first MOSFET is connected to the drain of the second MOSFET, the gate of the first MOSFET is connected to the gate of the second MOSFET and the second terminal of the voltage control circuit 6, and the source of the second MOSFET is connected to the first terminal of the second sampling circuit 5.

[0067] In one alternative implementation, such as Figure 4 As shown, the power supply also includes: a Zener diode ZD1, a sixteenth resistor R16, and a fourth capacitor C4. The cathode of the Zener diode is connected to the second terminal of the first switching circuit 1, the first terminal of the sixteenth resistor, and the first terminal of the fourth capacitor. The anode of the Zener diode is connected to the control terminal of the first switching circuit 1, the second terminal of the sixteenth resistor, and the second terminal of the fourth capacitor.

[0068] In one alternative implementation, such as Figure 4 As shown, the power supply also includes an output filter circuit (i.e., C5 and C6), wherein the first terminal of the output filter circuit is connected to the positive terminal of the load, and the second terminal of the output filter circuit is connected to the negative terminal of the load.

[0069] Although embodiments of the invention have been described in conjunction with the accompanying drawings, those skilled in the art can make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations all fall within the scope defined by the appended claims.

Claims

1. A surge suppression circuit, characterized in that, The surge suppression circuit is applied in a power supply circuit, which includes a control switch, a first switching circuit, and a second switching circuit. The surge suppression circuit includes a startup circuit, a first sampling circuit, a second sampling circuit, a voltage control circuit, and a control module. The first terminal of the control switch is connected to positive DC power, the first terminal of the first switch circuit is connected to the second terminal of the control switch, the second terminal of the first switch circuit is connected to the first terminal of the second switch circuit, and the negative terminal of the load is connected to negative DC power. The first terminal of the starting circuit is connected to the second terminal of the control switch, and the second terminal of the starting circuit is connected to the control module. The starting circuit is used to output a starting signal to the control module when the control switch is closed. The first terminal of the first sampling circuit is connected to the second terminal of the first switching circuit, and the second terminal of the first sampling circuit is connected to the control module. The first sampling circuit is used to output a first voltage signal when the control switch is closed. The first terminal of the second sampling circuit is connected to the second terminal of the second switching circuit, the second terminal of the second sampling circuit is connected to the positive terminal of the load, the third terminal of the second sampling circuit is connected to the control module, and the second sampling circuit is used to output a second voltage signal. The first terminal of the voltage control circuit is connected to the control module, and the second terminal of the voltage control circuit is connected to the control terminal of the first switching circuit and the control terminal of the second switching circuit. The voltage control circuit is used to adjust the amplitude of the control voltage based on the voltage control signal output by the control circuit. The control circuit is used to control the amplitude of the control voltage based on the first voltage signal to the initial value of the second terminal voltage of the first switching circuit after the control switch is closed, and gradually reduce the amplitude of the control voltage so that the first switching circuit and the second switching circuit are in the variable resistance region. During the process of gradually reducing the amplitude of the control voltage, the control circuit is used to determine whether the difference between the current and the maximum surge current setting value reaches the preset voltage difference value based on the second voltage signal. When the difference reaches the preset voltage difference value, the amplitude of the control voltage is controlled to be the preset voltage value. The preset voltage value is used to control the first switching circuit and the second switching circuit to be fully turned on.

2. The surge suppression circuit according to claim 1, characterized in that, The startup circuit includes: a first resistor, a second resistor, a third resistor, a first capacitor, and a first operational amplifier, wherein, The first end of the first resistor is connected to the second end of the control switch, the second end of the first resistor is connected to the non-inverting input of the first operational amplifier, and the second end of the first resistor is also grounded through the second resistor. The inverting input terminal of the first operational amplifier is connected to its output terminal and the first terminal of the third resistor; The second end of the third resistor is connected to the control module, and the second end of the third resistor is also grounded through the first capacitor.

3. The surge suppression circuit according to claim 1, characterized in that, The first sampling circuit includes: a fourth resistor, a fifth resistor, a sixth resistor, a second capacitor, and a second operational amplifier, wherein, The first end of the fourth resistor is connected to the second end of the first switching circuit, the second end of the fourth resistor is connected to the non-inverting input of the second operational amplifier, and the second end of the fourth resistor is also grounded through the fifth resistor; The inverting input terminal of the second operational amplifier is connected to its output terminal and the first terminal of the sixth resistor; The second end of the sixth resistor is connected to the control module, and the second end of the sixth resistor is also grounded through the second capacitor.

4. The surge suppression circuit according to claim 1, characterized in that, The second sampling circuit includes: a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, a twelfth resistor, a third capacitor, and a third operational amplifier, wherein, The first end of the seventh resistor is connected to the second end of the second switching circuit and the first end of the eighth resistor, and the second end of the seventh resistor is connected to the negative terminal of the load and the first end of the tenth resistor. The second end of the eighth resistor is connected to the non-inverting input of the third operational amplifier, and the second end of the eighth resistor is also grounded through the ninth resistor; The second end of the tenth resistor is connected to the inverting input of the third operational amplifier and the first end of the eleventh resistor; The second end of the eleventh resistor is connected to the output terminal of the third operational amplifier and the second end of the twelfth resistor; The second end of the twelfth resistor is connected to the control module, and the second end of the twelfth resistor is also grounded through the third capacitor.

5. The surge suppression circuit according to claim 1, characterized in that, The voltage control circuit includes: a digital potentiometer and a conditioning circuit, wherein... The input terminal of the digital potentiometer is connected to the control module, and the digital potentiometer is used to adjust the amplitude of the output voltage based on the voltage control signal output by the control circuit. The first terminal of the conditioning circuit is connected to the output terminal of the digital potentiometer, and the second terminal of the conditioning circuit is connected to the control terminal of the first switching circuit and the control terminal of the second switching circuit. The conditioning circuit is used to condition the output voltage of the digital potentiometer and then output the control voltage.

6. The surge suppression circuit according to claim 5, characterized in that, The conditioning circuit includes: a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, and a fourth operational amplifier, wherein, The first end of the thirteenth resistor is connected to the output terminal of the digital potentiometer, and the second end of the thirteenth resistor is connected to the non-inverting input terminal of the fourth operational amplifier. The first terminal of the fourteenth resistor is grounded, and the second terminal of the fourteenth resistor is connected to the first terminal of the fifteenth resistor and the inverting input terminal of the fourth operational amplifier. The second end of the fifteenth resistor is connected to the inverting input of the fourth operational amplifier, the control terminal of the first switching circuit, and the control terminal of the second switching circuit.

7. The surge suppression circuit according to claim 1, characterized in that, The control module includes: an analog-to-digital converter and a controller, wherein... The input terminal of the analog-to-digital converter is connected to the second terminal of the startup circuit and the second terminal of the first sampling circuit, and the output terminal of the analog-to-digital converter is connected to the input terminal of the controller. The input terminal of the controller is connected to the third terminal of the second sampling circuit, and the output terminal of the controller is connected to the first terminal of the voltage control circuit.

8. A power supply, characterized in that, include: The power supply circuit and the surge suppression circuit according to any one of claims 1-7.

9. The power supply according to claim 8, characterized in that, The first switching circuit includes a first MOSFET, and the second switching circuit includes a second MOSFET, wherein... The source of the first MOSFET is connected to the second terminal of the control switch, the drain of the first MOSFET is connected to the drain of the second MOSFET, and the gate of the first MOSFET is connected to the gate of the second MOSFET and the second terminal of the voltage control circuit. The source of the second MOS transistor is connected to the first terminal of the second sampling circuit.

10. The power supply according to claim 8, characterized in that, Also includes: Zener diode, sixteenth resistor, and fourth capacitor, among which, The cathode of the Zener diode is connected to the second terminal of the first switching circuit, the first terminal of the sixteenth resistor, and the first terminal of the fourth capacitor. The anode of the Zener diode is connected to the control terminal of the first switching circuit, the second terminal of the sixteenth resistor, and the second terminal of the fourth capacitor.

11. The power supply according to claim 8, characterized in that, Also includes: Output filter circuit, wherein, The first terminal of the output filter circuit is connected to the positive terminal of the load, and the second terminal of the output filter circuit is connected to the negative terminal of the load.

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