Expansion circuit and expansion method for card acquisition drive

Abstract

This invention discloses an expansion circuit and method for driving a data acquisition card. The expansion circuit includes a DI configuration circuit, a DO configuration circuit, a latch expansion DO circuit, a decoder expansion DO circuit, a data acquisition protection circuit, and a PWM output circuit, all electrically connected to the NI data acquisition card body. The first to sixteenth paths of the first port in the NI data acquisition card body are respectively connected to the output ports of each DI configuration circuit, and the digital input interface of the controller is connected to the control signal input port of the DI configuration circuit. The seventeenth to twenty-fourth paths of the first port in the NI data acquisition card body are respectively connected to one input port of the DO configuration circuit, and the digital output interface of the controller is connected to the signal output terminal of the DO configuration circuit. This expansion circuit for driving a data acquisition card achieves I / O port expansion without the need for additional boards, improves the stability of the data acquisition card by adding protection circuits, expands the number of available ports, and reduces testing costs.

Description

Technical Field

[0001] This invention relates to the field of electronic circuit technology, and in particular to an expansion circuit and expansion method for driving a data acquisition card. Background Technology

[0002] In the field of automated production and testing, data acquisition cards, as core components for signal acquisition and control, are increasingly widely used. NI (National Instruments) data acquisition cards hold a leading position in the field of automated testing, and their stable performance has led to their widespread application in various industrial automation equipment. However, with the continuous rise in raw material prices, the procurement cost of NI data acquisition cards is constantly increasing. At the same time, different automated testing scenarios have varying requirements for the number and type of I / O (input / output) ports. The native I / O configuration of existing NI data acquisition cards often cannot meet the needs of multiple scenarios, requiring users to purchase additional expansion cards to complete specific testing tasks, further increasing equipment investment costs. Therefore, existing testing methods based on NI data acquisition cards suffer from insufficient port compatibility. Summary of the Invention

[0003] This invention provides an expansion circuit and method for a data acquisition card driver, aiming to solve the problem of insufficient port compatibility in the testing process based on NI data acquisition cards in existing technologies.

[0004] In a first aspect, embodiments of the present invention provide an expansion circuit for driving a data acquisition card, wherein the expansion circuit includes a DI configuration circuit, a DO configuration circuit, a latch expansion DO circuit, a decoder expansion DO circuit, a data acquisition protection circuit, and a PWM output circuit that are electrically connected to the main body of the NI data acquisition card. The first to sixteenth paths of the first port in the main body of the NI acquisition card are respectively connected to the output ports of the DI configuration circuits, and the digital input interface of the controller is connected to the control signal input port of the DI configuration circuit; the digital input interface is connected to the regulated power supply or the digital input ground terminal; The seventeenth to twenty-fourth channels of the first port in the main body of the NI acquisition card are respectively connected to one input port of the DO configuration circuit, and the digital output interface of the controller is connected to the signal output terminal of the DO configuration circuit; the digital output interface is connected to the regulated power supply or the digital output ground terminal; The 25th to 32nd channels of the first port in the NI acquisition card body are respectively connected to one of the first to eighth channels of the second port in the NI acquisition card body, and the eight connection points formed are respectively connected to the eight input terminals of the latch expansion DO circuit; the latch power supply terminal of the latch expansion DO circuit is connected to a low voltage power supply, and the enable terminal of the latch expansion DO circuit is respectively connected to the eight control terminals of the controller; the latch expansion DO circuit leads out 64 sets of digital output interfaces. The first to fifth paths of the third port in the main body of the NI acquisition card are respectively connected to the input terminals of the two decoder expansion DO circuits. The decoder power supply terminal of the decoder expansion DO circuit is connected to the regulated power supply. Each decoder expansion DO circuit leads out 8 sets of digital output interfaces. The enable terminal of each decoder expansion DO circuit receives a conduction control signal to control that only one set of digital output interfaces of each decoder expansion DO circuit is turned on at a time. The sixth to eighth channels of the third port in the main body of the NI acquisition card are all connected to the input terminal of the PWM output circuit; the output terminal of the PWM output circuit is connected to the PWM signal input terminal of the controller.

[0005] Secondly, embodiments of the present invention also provide an expansion method for a data acquisition card driver, wherein the expansion method is applied to an expansion circuit for a data acquisition card driver as described in the first aspect above, and the expansion method includes: Configure the effective level information of the first to sixteenth channels of the first port in the main body of the NI acquisition card, and configure the sampling frequency and trigger conditions accordingly; The DO configuration circuit, latch extension DO circuit, and decoder extension DO circuit are independently controlled, and the number of digital output interfaces that are turned on at one time in the decoder extension DO circuit is controlled. Configure the PWM frequency and duty cycle of the sixth to eighth channels of the third port in the main body of the NI acquisition card; Configure the range and sampling rate of the analog input signal acquisition in the acquisition and protection circuit, the voltage range of the analog output signal, and perform filtering processing on the analog input signal acquired by the acquisition and protection circuit; The DI configuration circuit obtains sensing information or control signals from external sensors through its output port. The actuator is driven through the signal output terminal of the DO configuration circuit, the digital output interface of the latch extended DO circuit, and the digital output interface of the decoder extended DO circuit. The modulation signal is output through the output terminal of the PWM output circuit; The acquisition and protection circuit acquires external analog input signals and outputs analog output signals.

[0006] This invention provides an expansion circuit and method for driving a data acquisition card. The expansion circuit includes a DI configuration circuit, a DO configuration circuit, a latch expansion DO circuit, a decoder expansion DO circuit, a data acquisition protection circuit, and a PWM output circuit, all electrically connected to the NI data acquisition card body. The first to sixteenth paths of the first port in the NI data acquisition card body are respectively connected to the output ports of each DI configuration circuit, and the digital input interface of the controller is connected to the control signal input port of the DI configuration circuit. The seventeenth to twenty-fourth paths of the first port in the NI data acquisition card body are respectively connected to one input port of the DO configuration circuit, and the digital output interface of the controller is connected to the signal output terminal of the DO configuration circuit. This expansion circuit for driving a data acquisition card achieves I / O port expansion without the need for additional boards, improves the stability of the data acquisition card by adding protection circuits, expands the number of available ports, and reduces testing costs. Attached Figure Description

[0007] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0008] Figure 1 A circuit structure block diagram of an expansion circuit for a data acquisition card driver provided in an embodiment of the present invention; Figure 2 The circuit structure diagram of the DI configuration circuit provided in the embodiment of the present invention; Figure 3 A partial circuit structure diagram of the DO configuration circuit provided in an embodiment of the present invention; Figure 4 This is another partial circuit structure diagram of the DO configuration circuit provided in an embodiment of the present invention; Figure 5 A partial circuit structure diagram of the latch extension DO circuit provided in an embodiment of the present invention; Figure 6 This is another partial circuit structure diagram of the latch extension DO circuit provided in an embodiment of the present invention; Figure 7 A circuit structure diagram of the decoder extension DO circuit provided in an embodiment of the present invention; Figure 8 The circuit structure diagram of the PWM output circuit provided in the embodiment of the present invention; Figure 9 A partial circuit structure diagram of the acquisition protection circuit provided in an embodiment of the present invention; Figure 10This is another partial circuit structure diagram of the acquisition protection circuit provided in an embodiment of the present invention; Figure 11 This is a flowchart of an extended method for a data acquisition card driver provided in an embodiment of the present invention.

[0009] Figure reference numerals: 10. NI data acquisition card body; 11. DI configuration circuit; 12. DO configuration circuit; 13. Latch expansion DO circuit; 14. Decoder expansion DO circuit; 15. Data acquisition protection circuit; 16. PWM output circuit; R1. First resistor; R2. Second resistor; C1. First capacitor; R3. Third resistor; D1. First diode; D2. Second diode; D3. Third diode; D4. Fourth diode; Q1. First transistor; R4. Fourth resistor; U5. First optocoupler switch; R5. Fifth resistor; R6. Sixth resistor; R7. Seventh resistor; U6. Second optocoupler switch; U7. First connector; U9. Latch; R8. Eighth resistor; R9. Ninth resistor; U18. Second connector; U17. Third connector; U14. Decoder; C13. Thirteenth capacitor; C 14. Fourteenth capacitor; C15. Fifteenth capacitor; U30. Fourth connector; R24. Twenty-fourth resistor; U21. Third optocoupler switch; R32. Thirty-second resistor; U11. Output controller; R11. Eleventh resistor; R12. Twelfth resistor; U12. Fourth optocoupler switch; R13. Thirteenth resistor; R14. Fourteenth resistor; R15. Fifteenth resistor; D14. Fourteenth diode; R18. Eighteenth resistor; Q2. Second transistor; R19. Nineteenth resistor; Q3. Third transistor; R20. Twentieth resistor; D6. Sixth diode; D7. Seventh diode; D8. Eighth diode; D9. Ninth diode; C12. Twelfth capacitor; D12. Twelfth diode; R40. Current limiting resistor; C16. Filter capacitor; D16. Bidirectional transient voltage suppressor diode. Detailed Implementation

[0010] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0011] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0012] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0013] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0014] An embodiment of this invention application provides an expansion circuit for a data acquisition card driver, such as... Figure 1As shown, the expansion circuit includes a DI configuration circuit 11, a DO configuration circuit 12, a latch expansion DO circuit 13, a decoder expansion DO circuit 14, a data acquisition protection circuit 15, and a PWM output circuit 16, all electrically connected to the NI data acquisition card body 10. The first to sixteenth paths of the first port of the NI data acquisition card body 10 are respectively connected to the output ports of each of the DI configuration circuits 11. The digital input interface of the controller is connected to the control signal input port of the DI configuration circuit 11. The digital input interface is connected to a regulated power supply or a digital input ground terminal. The seventeenth to twenty-fourth paths of the first port of the NI data acquisition card body 10 are respectively connected to one input port of the DO configuration circuit 12. The digital output interface of the controller is connected to the signal output terminal of the DO configuration circuit 12. The digital output interface is connected to a regulated power supply or a digital output ground terminal. The twenty-fifth to thirty-second paths of the first port of the NI data acquisition card body 10 are respectively connected to one of the first to eighth paths of the second port of the NI data acquisition card body 10. The eight connection points formed are respectively connected to the eight input terminals of the latch expansion DO circuit 13; the power supply terminal of the latch U9 of the latch expansion DO circuit 13 is connected to the low-voltage power supply, and the enable terminal of the latch expansion DO circuit 13 is respectively connected to the eight control terminals of the controller; the latch expansion DO circuit 13 leads out 64 sets of digital output interfaces; the first to fifth paths of the third port of the NI acquisition card body 10 are respectively connected to the input terminals of the two decoder expansion DO circuits 14, and the power supply terminal of the decoder U14 of the decoder expansion DO circuit 14 is connected to the regulated power supply; each decoder expansion DO circuit 14 leads out 8 sets of digital output interfaces; the enable terminal of each decoder expansion DO circuit 14 inputs a conduction control signal to control each decoder expansion DO circuit 14 to conduct only one set of digital output interfaces at a time; the sixth to eighth paths of the third port of the NI acquisition card body 10 are all connected to the input terminals of the PWM output circuit 16; the output terminal of the PWM output circuit 16 is connected to the PWM signal input terminal of the controller.

[0015] Specifically, the expansion circuit in this application can be applied to NI's PCI / PXI-6224, USB / PCI / PXI-6225, PCI / PXI-6229, PCI / PXI-6254, PCI / PCIe / PXI / PXIe-6259, PCIe-6323, PCIe-6343, PCIe-6353, PXIe-6353, PCIe / PXIe-6363, PXIe-6368, and PXIe-6378 boards; the original configuration of the boards includes 32 analog input channels, 4 analog output channels, and 48 I / O (input / output) channels (including 4 sets of counters or PWM outputs). After expansion using the aforementioned expansion circuit, 16 sets of digital input ports, 88 sets of digital output ports, and 3 sets of PWM ports can be obtained, operating independently of the original 32 analog signal acquisition channels and 4 analog signal output channels. The 16 sets of digital output ports are used to drive relays to switch the multimeter probes, avoiding short circuits caused by simultaneous conduction of two sets. Specifically, DI configuration circuit 11 is the digital input (DI) configuration circuit, DO configuration circuit 12 is the digital output (DO) configuration circuit, latch expansion DO circuit 13 is the digital output circuit expanded based on latch U9, and decoder expansion DO circuit 14 is the digital output circuit expanded based on decoder U14.

[0016] In a more specific embodiment, the DI configuration circuit 11 includes a first resistor R1, a second resistor R2, a first capacitor C1, a third resistor R3, a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a first transistor Q1, a fourth resistor R4, a first optocoupler switch U5, and a fifth resistor R5; the first resistor R1 and the second resistor R2 are connected in series, one end of the first resistor R1 serves as a signal input port, one end of the first capacitor C1 is connected to one end of the second resistor R2, and the other end of the first capacitor C1 serves as a control signal input port for the DI configuration circuit 11; the first diode D1 and the third diode D3 are connected in series between the two ends of the first capacitor C1 and one end of the third resistor R3, respectively; the second diode D2 is connected in series between the two ends of the first capacitor C1 and the other end of the third resistor R3, respectively. The first diode D1 and the third diode D3 are both connected to one end of the third resistor R3; the second diode D2 and the fourth diode D4 are both connected to the other end of the third resistor R3; the collector of the first transistor Q1 is connected to one end of the third resistor R3 and the first pin of the first optocoupler switch U5; the emitter of the first transistor Q1 is connected to the other end of the third resistor R3 and one end of the fourth resistor R4; the collector of the first transistor Q1 is connected to the other end of the fourth resistor R4 and the second pin of the first optocoupler switch U5; the third pin of the first optocoupler switch U5 is grounded; the fourth pin of the first optocoupler switch U5 is connected to one end of the fifth resistor R5 and serves as an output port of the DI configuration circuit 11, and the other end of the fifth resistor R5 is connected to the low-voltage power supply.

[0017] The first to sixteenth paths of the first port in the main body 10 of the NI acquisition card are also corresponding to lines 0 to 15 of port0. Figure 2 The mP0.6 shown is the seventh channel (line 6) corresponding to the first port, which is also the signal input port. Figure 2 The first channel (1) to the sixteenth channel (2) of the PLC_DI port are connected to the PLC_DI interface via resistors R1 and R2, respectively. The PLC_DI interface is the controller's digital input interface. The regulated power supply is 24V (+24V). The PLC_DI interface is connected to both the +24V power supply and the COM_DI ground terminal, allowing for high-level or low-level active switching via software configuration. The COM_DI ground terminal is also the digital input ground terminal, and can be configured via software to connect either the PLC_DI interface to the +24V power supply or the digital input ground terminal. The resistance values ​​of resistors R1 and R2 are between 1.2kΩ and 2.2kΩ.

[0018] Furthermore, the DO configuration circuit 12 includes a sixth resistor R6, a seventh resistor R7, a second optocoupler switch U6, and a first connector U7; one end of the sixth resistor R6 serves as an input port of the DO configuration circuit 12, and the other end of the sixth resistor R6 is connected to the first pin of the second optocoupler switch U6; the second pin of the second optocoupler switch U6 is grounded; the fourth pin of the second optocoupler switch U6 is connected to the low-voltage power supply; the third pin of the second optocoupler switch U6 is connected to one end of the seventh resistor R7 as an extended signal input terminal; the other end of the seventh resistor R7 is grounded; each input port of the first connector U7 is connected to a corresponding extended signal input terminal; the common power supply terminal of the first connector U7 is connected to the regulated power supply; the ground terminal of the first connector U7 is grounded; and each output terminal of the first connector U7 serves as the signal output terminal of the DO configuration circuit 12.

[0019] The seventeenth to twenty-fourth channels of the first port in the NI acquisition card body 10, which correspond to lines 16 to 23 of port0. Figure 3 The mP0.16 shown corresponds to the seventeenth channel (line 16) of the first port. Channels seventeen through twenty-four of the first port are connected to the PLC_DO interface via the sixth resistor R6. The PLC_DO interface is the controller's digital output interface. The PLC_DO interface is connected to a +24V power supply and the COM_DO ground terminal via a connector, and outputs a 24V switching signal via software configuration. The COM_DO ground terminal is also the digital output ground terminal, so the PLC_DO interface can be connected to either a +24V power supply or the digital output ground terminal via software configuration. The resistance of the sixth resistor R6 is 680 ohms. The low-voltage power supply is 5V, i.e., VCC_5V / VCC1_5V / VCC1_+5V in the diagram; the output terminals of the first connector U7 are ports 1C to 8C of the first connector U7; the common power supply terminal is COM10.

[0020] In a more specific embodiment, the latch extension DO circuit 13 includes a latch U9, an eighth resistor R8 and a ninth resistor R9, a second connector U18 and a third connector U17; one end of the eighth resistor R8 and the sixth pin of the latch U9 are both connected to the low-voltage power supply; the third pin of the latch U9 is connected to one of the twenty-fifth to thirty-second paths of the first port; the fourth pin of the latch U9 is connected to one end of the ninth resistor R9 and grounded; the fifth pin of the latch U9 is connected to the other end of the ninth resistor R9, and the connection point is connected to one of the first to eighth paths of the second port; the second connector... The eight input terminals of connector U18 serve as the eight input terminals of the latch expansion DO circuit 13; the common ground terminal of the second connector U18 is grounded, and the power supply terminal of the second connector U18 is connected to the low-voltage power supply; the enable input terminal of the second connector U18 serves as the enable terminal of the latch expansion DO circuit 13; the output terminals of the second connector U18 are respectively connected to one input terminal of the third connector U17; the common power supply terminal of the third connector U17 is connected to the regulated power supply; the ground terminal of the third connector U17 is grounded; each output terminal of the third connector U17 serves as the digital output interface led out from the latch expansion DO circuit 13.

[0021] The 25th to 32nd channels of the first port in the NI acquisition card body 10 correspond to lines 24 to 31 of port 0. The 1st to 8th channels of the second port in the NI acquisition card body 10 correspond to lines 0 to 7 of port 1. Figure 5 Ports D1 to D8; Figure 5 The mP1.0 shown corresponds to the first path (line0) of the second port. The 16 signals (line24-line31, 8 channels) of port0 and line0-line7 of port1 are connected in pairs, forming eight connection points that are all connected to the eight input terminals of the second connector U18 in the eight latch expansion DO circuits 13. The power supply terminal of the second connector U18 is connected to the low-voltage power supply VCC1_+5V, and its ground terminal GND is grounded. The enable terminals of the latch expansion DO circuit 13 are LE1 to LE8, as shown... Figure 6 LE1 shown is also the enable terminal of one of the latch extension DO circuits 13. The latch extension DO circuit 13 has a total of 64 digital output interfaces, meaning that each of the eight output terminals of each third connector U17 corresponds to one digital output interface, such as... Figure 6PLY1 to PLY8 correspond to 8 digital output interfaces, so the 8 digital output interfaces of the eight latch expansion DO circuits 13 correspond to a total of 64 digital output interfaces. Each digital output interface corresponds to one COM terminal (that is, the COM ground terminal) and one signal output terminal.

[0022] Specifically, the decoder extension DO circuit 14 includes a decoder U14, a thirteenth capacitor C13, a fourteenth capacitor C14, a fifteenth capacitor C15, a fourth connector U30, and eight optocoupler control circuits. The first, second, and third pins of the decoder U14 serve as the three input terminals of the decoder extension DO circuit 14. The fourth and sixth pins of the decoder U14 serve as the enable terminals of the decoder extension DO circuit 14. The optocoupler control circuit includes a twenty-fourth resistor R24, a third optocoupler switch U21, and a thirty-second resistor R32. The eight output terminals of the decoder U14 are each connected to the second pin of the third optocoupler switch U21 in the optocoupler control circuit. The first pin of the third optocoupler switch U21 is connected to the twenty-fourth resistor R24, and the other end of the twenty-fourth resistor R24 ​​is connected to the low-voltage power supply. The fourth pin of the third optocoupler switch U21... The third pin of the third optocoupler switch U21 is connected to one end of the thirty-second resistor R32 and one input terminal of the fourth connector U30; the other end of the thirty-second resistor R32 is grounded; the enable control terminal of the decoder U14 serves as the enable terminal of the decoder extension DO circuit 14; the common power supply terminal of the fourth connector U30 is connected to the regulated power supply; the ground terminal of the fourth connector U30 is grounded; the eight output terminals of the fourth connector U30 serve as eight sets of digital output interfaces of the decoder extension DO circuit 14.

[0023] The first to fifth paths of the third port in the NI acquisition card body 10, which correspond to lines 0 to 4 (5 paths) of port 2, are respectively connected to the input terminals of the two decoder expansion DO circuits 14. The five paths are as follows: Figure 7 The mP2.0, mP2.1, mP2.2, mP2.3, and mP2.4 are shown. This application embodiment describes the specific structure of one of the decoder extension DO circuits 14. The eight output terminals of the fourth connector U30 of one decoder extension DO circuit 14 are ports 1C to 8C, and the eight output terminals of the fourth connector U30 of the other decoder extension DO circuit 14 are ports 9C to 16C, thus providing a total of 16 sets of digital output interfaces. The ground terminal of the decoder U14 of the decoder extension DO circuit 14 is connected to the digital ground terminal.

[0024] Furthermore, the PWM output circuit 16 includes an output controller U11, an eleventh resistor R11, a twelfth resistor R12, a fourth optocoupler switch U12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a fourteenth diode D14, an eighteenth resistor R18, a second transistor Q2, a nineteenth resistor R19, a third transistor Q3, a twentieth resistor R20, a sixth diode D6, a seventh diode D7, an eighth diode D8, a ninth diode D9, a twelfth capacitor C12, and a twelfth diode D12; the second pin of the output controller U11 serves as the input terminal of the PWM output circuit 16; the fifth pin of the output controller U11... The low-voltage power supply and the fourth pin of the output controller U11 are connected to one end of the eleventh resistor R11; the other end of the eleventh resistor R11 is connected to one end of the twelfth resistor R12 and the third pin of the fourth optocoupler switch U12; the other end of the twelfth resistor R12 is connected to the low-voltage power supply and the first pin of the fourth optocoupler switch U12; the fourth pin of the fourth optocoupler switch U12 is connected to the anode of the fourteenth diode D14, the emitter of the second transistor Q2, one end of the nineteenth resistor R19, the emitter of the third transistor Q3, and one end of the twentieth resistor R20; the fifth pin of the fourth optocoupler switch U12 is connected to... One end of the fourteenth resistor R14 and one end of the fifteenth resistor R15; the sixth pin of the fourth optocoupler switch U12 is connected to one end of the thirteenth resistor R13 and the other end of the fourteenth resistor R14; the other end of the fifteenth resistor R15 is connected to the base of the second transistor Q2; the other end of the thirteenth resistor R13 is connected to one end of the eighteenth resistor R18 and the regulated power supply; the other end of the eighteenth resistor R18 is connected to the collector of the second transistor Q2, the other end of the nineteenth resistor R19 and the base of the third transistor Q3; the collector of the third transistor Q3 is connected to the other end of the twentieth resistor R20; the twentieth A sixth diode D6 and a seventh diode D7 are connected in series between the two ends of resistor R20 and one end of the twelfth capacitor C12, respectively; an eighth diode D8 and a ninth diode D9 are connected in series between the two ends of the twentieth resistor and the other end of the twelfth capacitor C12, respectively; the negative terminals of the sixth diode D6 and the eighth diode D8 are both connected to the other end of the twentieth resistor R20; the positive terminals of the seventh diode D7 and the ninth diode D9 are both connected to one end of the twentieth resistor R20; the negative terminal of the twelfth diode D12 is connected to one end of the twelfth capacitor C12, and the positive terminal of the twelfth diode D12 is connected to the other end of the twelfth capacitor C12. The positive and negative terminals of the twelfth diode D12 serve as the two output terminals of the PWM output circuit 16.

[0025] The sixth to eighth channels of the third port in the NI acquisition card body 10, which correspond to lines 5 to 7 of port 2, are as follows: Figure 8 mP2.7 in the diagram corresponds to the eighth path of the third port; lines 5 to 7 of port 2 are directly led out as PWM output terminals, and the output level is determined by the external power supply voltage. The PWM frequency and duty cycle are configured by software. The twelfth diode, D12, is a unidirectional transient voltage suppressor diode (TVS).

[0026] In a more specific embodiment, the acquisition and protection circuit 15 includes 32 independently configured input acquisition channels and 4 output acquisition channels. Specifically, each input acquisition channel includes a current-limiting resistor R40 and a bidirectional transient voltage suppressor diode D16 connected in series. One end of the current-limiting resistor R40 serves as the input terminal of the input acquisition channel, and the other end of the current-limiting resistor R40 is connected to one end of a filter capacitor C16 and one end of the bidirectional transient voltage suppressor diode D16. The other end of the filter capacitor C16 is grounded, and the other end of the bidirectional transient voltage suppressor diode D16 is used to input analog signals. Similarly, each output acquisition channel includes a current-limiting resistor R40 and a filter capacitor C16. One end of the current-limiting resistor R40 receives the output analog signal, and the other end of the current-limiting resistor R40 is connected to one end of the filter capacitor C16 and serves as the output terminal. The other end of the filter capacitor C16 is grounded.

[0027] The data acquisition and protection circuit 15 includes 32 independent input acquisition channels and 4 output acquisition channels. For example... Figure 9 and Figure 10 As shown, all input acquisition channels are connected to the input acquisition ground terminal. The input acquisition channels are used for analog signal input (AI), and the output acquisition channels are used for analog signal input (AO). Each input acquisition channel is connected in series with a current-limiting resistor R40 and a filter capacitor C16; each output acquisition channel is connected in series with a current-limiting resistor R40 and a filter capacitor C16. The current-limiting resistor R40 has a resistance of 1K ohms, and the filter capacitor C16 has a capacitance of 0.1uF.

[0028] This application also provides an expansion method for a data acquisition card driver, wherein the expansion method is applied to the expansion circuit for a data acquisition card driver as described in the above embodiments. Figure 11 As shown, the method includes steps S110 to S180.

[0029] S110. Configure the effective level information of the first to sixteenth channels of the first port in the main body of the NI acquisition card, and configure the sampling frequency and trigger conditions accordingly.

[0030] When the device is powered on, the +5V and +24V power supplies start, the latches, decoders, and boards complete initialization, and the sampling protection circuit begins to work. In the software, select the active level mode (high / low) for port0 line0-line15, and set the sampling frequency and trigger conditions. The trigger condition can be that a certain current signal exceeds a certain current threshold.

[0031] S120. Independently control the DO configuration circuit, latch extension DO circuit, and decoder extension DO circuit, and control the number of digital output interfaces that are turned on once in the decoder extension DO circuit.

[0032] The DO configuration circuit, latch extension DO circuit, and decoder extension DO circuit are independently controlled. The number of digital output interfaces in the decoder extension DO circuit is limited by software logic to prevent multiple channels from being turned on at the same time.

[0033] S130. Configure the PWM frequency and duty cycle of the sixth to eighth channels of the third port in the main body of the NI acquisition card.

[0034] Set the PWM frequency (frequency adjustment range is 1Hz~1MHz) and duty cycle (duty cycle adjustment range is 0~100%) for port2 line5-line7.

[0035] S140. Configure the range and sampling rate of the analog input signal acquisition in the acquisition and protection circuit, the voltage range of the analog output signal, and perform filtering processing on the analog input signal acquired by the acquisition and protection circuit.

[0036] Configure the range and sampling rate of AI acquisition in the sampling protection circuit, and the voltage range of AO output in the sampling protection circuit. Filter the acquired signal through software algorithms to form a dual protection system with the hardware protection circuit.

[0037] S150. Obtain sensing information or control signals from external sensors through the output port of the DI configuration circuit.

[0038] S160. Drive the actuator through the signal output terminal of the DO configuration circuit, the digital output interface of the latch extended DO circuit, and the digital output interface of the decoder extended DO circuit. S170. Output the modulation signal through the output terminal of the PWM output circuit; S180. The external analog input signal is acquired through the acquisition and protection circuit and an analog output signal is output.

[0039] The output port (DI port) of the DI configuration circuit receives sensing information or control signals from external sensors. The signal output terminal (DO port) of the DO configuration circuit, the digital output interface of the latch expansion DO circuit, and the digital output interface of the decoder expansion DO circuit drive actuators such as relays. The output terminal of the PWM output circuit outputs the modulation signal. The input acquisition channel of the acquisition protection circuit acquires external analog signals, and the output acquisition channel of the circuit outputs the control signal.

[0040] When an overcurrent occurs in the input or output acquisition channel, the current-limiting resistor limits the current magnitude; the filter capacitor filters out high-frequency interference; the input acquisition ground terminal (AIGND) and the digital ground terminal (DGND) are independently grounded to avoid crosstalk and ensure stable operation of the board.

[0041] The expansion circuit and method for driving the data acquisition card disclosed in the above embodiments include a DI configuration circuit, a DO configuration circuit, a latch expansion DO circuit, a decoder expansion DO circuit, a data acquisition protection circuit, and a PWM output circuit electrically connected to the NI data acquisition card body. The first to sixteenth paths of the first port in the NI data acquisition card body are respectively connected to the output ports of each DI configuration circuit, and the digital input interface of the controller is connected to the control signal input port of the DI configuration circuit. The seventeenth to twenty-fourth paths of the first port in the NI data acquisition card body are respectively connected to one input port of the DO configuration circuit, and the digital output interface of the controller is connected to the signal output terminal of the DO configuration circuit. The above-mentioned expansion circuit for driving the data acquisition card can achieve I / O port expansion without adding additional boards, improves the stability of the data acquisition card by adding protection circuits, expands the number of available ports, and reduces testing costs.

[0042] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An expansion circuit for a data acquisition card driver, characterized in that, The expansion circuit includes a DI configuration circuit, a DO configuration circuit, a latch expansion DO circuit, a decoder expansion DO circuit, an acquisition protection circuit, and a PWM output circuit, all electrically connected to the NI acquisition card body. The first to sixteenth paths of the first port in the main body of the NI acquisition card are respectively connected to the output ports of the DI configuration circuits, and the digital input interface of the controller is connected to the control signal input port of the DI configuration circuit; the digital input interface is connected to the regulated power supply or the digital input ground terminal; The seventeenth to twenty-fourth channels of the first port in the main body of the NI acquisition card are respectively connected to one input port of the DO configuration circuit, and the digital output interface of the controller is connected to the signal output terminal of the DO configuration circuit; the digital output interface is connected to the regulated power supply or the digital output ground terminal; The 25th to 32nd channels of the first port in the NI acquisition card body are respectively connected to one of the first to eighth channels of the second port in the NI acquisition card body, and the eight connection points formed are respectively connected to the eight input terminals of the latch expansion DO circuit; the latch power supply terminal of the latch expansion DO circuit is connected to a low voltage power supply, and the enable terminal of the latch expansion DO circuit is respectively connected to the eight control terminals of the controller; the latch expansion DO circuit leads out 64 sets of digital output interfaces. The first to fifth paths of the third port in the main body of the NI acquisition card are respectively connected to the input terminals of the two decoder expansion DO circuits. The decoder power supply terminal of the decoder expansion DO circuit is connected to the regulated power supply. Each decoder expansion DO circuit leads out 8 sets of digital output interfaces. The enable terminal of each decoder expansion DO circuit receives a conduction control signal to control that only one set of digital output interfaces of each decoder expansion DO circuit is turned on at a time. The sixth to eighth channels of the third port in the main body of the NI acquisition card are all connected to the input terminal of the PWM output circuit; the output terminal of the PWM output circuit is connected to the PWM signal input terminal of the controller.

2. The expansion circuit for data acquisition card driver according to claim 1, characterized in that, The DI configuration circuit includes a first resistor, a second resistor, a first capacitor, a third resistor, a first diode, a second diode, a third diode, a fourth diode, a first transistor, a fourth resistor, a first optocoupler switch, and a fifth resistor. The first resistor and the second resistor are connected in series. One end of the first resistor serves as a signal input port. One end of the first capacitor is connected to one end of the second resistor, and the other end of the first capacitor serves as a control signal input port for the DI configuration circuit. A first diode and a third diode are connected in series between the two ends of the first capacitor and one end of the third resistor, respectively. A second diode and a fourth diode are connected in series between the two ends of the first capacitor and the other end of the third resistor, respectively. The cathodes of the first diode and the third diode are both connected to one end of the third resistor. The anodes of the second diode and the fourth diode are both connected to the other end of the third resistor. The collector of the first transistor is connected to one end of the third resistor and the first pin of the first optocoupler switch; the emitter of the first transistor is connected to the other end of the third resistor and one end of the fourth resistor; the collector of the first transistor is connected to the other end of the fourth resistor and the second pin of the first optocoupler switch. The third pin of the first optocoupler switch is grounded; the fourth pin of the first optocoupler switch is connected to one end of the fifth resistor and serves as an output port of the DI configuration circuit, and the other end of the fifth resistor is connected to the low-voltage power supply.

3. The expansion circuit for data acquisition card driver according to claim 1, characterized in that, The DO configuration circuit includes a sixth resistor, a seventh resistor, a second optocoupler switch, and a first connector. One end of the sixth resistor serves as an input port of the DO configuration circuit, and the other end of the sixth resistor is connected to the first pin of the second optocoupler switch; the second pin of the second optocoupler switch is grounded; the fourth pin of the second optocoupler switch is connected to the low-voltage power supply; the third pin of the second optocoupler switch is connected to one end of the seventh resistor as an extended signal input terminal; the other end of the seventh resistor is grounded. Each input port of the first connector is connected to a corresponding extended signal input terminal; the common power supply terminal of the first connector is connected to the regulated power supply; the ground terminal of the first connector is grounded; each output terminal of the first connector serves as the signal output terminal of the DO configuration circuit.

4. The expansion circuit for driving a data acquisition card according to any one of claims 1-3, characterized in that, The latch extension DO circuit includes a latch, an eighth resistor and a ninth resistor, a second connector and a third connector; One end of the eighth resistor and the sixth pin of the latch are both connected to the low-voltage power supply. The third pin of the latch is connected to one of the twenty-fifth to thirty-second paths of the first port; the fourth pin of the latch is connected to one end of the ninth resistor and grounded; the fifth pin of the latch is connected to the other end of the ninth resistor, and the connection point is connected to one of the first to eighth paths of the second port. The eight input terminals of the second connector serve as the eight input terminals of the latch extension DO circuit; the common ground terminal of the second connector is grounded, and the power supply terminal of the second connector is connected to the low-voltage power supply; the enable input terminal of the second connector serves as the enable terminal of the latch extension DO circuit. The output terminals of the second connector are respectively connected to one input terminal of the third connector; the common power supply terminal of the third connector is connected to the regulated power supply; the ground terminal of the third connector is grounded; each output terminal of the third connector serves as the digital output interface brought out by the latch extension DO circuit.

5. The expansion circuit for a data acquisition card driver according to claim 4, characterized in that, The decoder extension DO circuit includes a decoder, a thirteenth capacitor, a fourteenth capacitor, a fifteenth capacitor, a fourth connector, and eight optocoupler control circuits. The first, second, and third pins of the decoder serve as the three input terminals of the decoder extended DO circuit, respectively; the fourth and sixth pins of the decoder serve as the enable terminals of the decoder extended DO circuit. The optocoupler control circuit includes a twenty-fourth resistor, a third optocoupler switch, and a thirty-second resistor; The eight output terminals of the decoder are respectively connected to the second pin of the third optocoupler switch in the optocoupler control circuit; the first pin of the third optocoupler switch is connected to the twenty-fourth resistor, and the other end of the twenty-fourth resistor is connected to the low-voltage power supply; the fourth pin of the third optocoupler switch is connected to the low-voltage power supply; the third pin of the third optocoupler switch is connected to one end of the thirty-second resistor and one input terminal of the fourth connector; the other end of the thirty-second resistor is grounded; the enable control terminal of the decoder serves as the enable terminal of the decoder extended DO circuit. The common power supply terminal of the fourth connector is connected to the regulated power supply; the ground terminal of the fourth connector is grounded; the eight output terminals of the fourth connector serve as eight digital output interfaces for the decoder's extended DO circuit.

6. The expansion circuit for a data acquisition card driver according to claim 5, characterized in that, The PWM output circuit includes an output controller, an eleventh resistor, a twelfth resistor, a fourth optocoupler switch, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a fourteenth diode, an eighteenth resistor, a second transistor, a nineteenth resistor, a third transistor, a twentieth resistor, a sixth diode, a seventh diode, an eighth diode, a ninth diode, a twelfth capacitor, and a twelfth diode. The second pin of the output controller serves as the input terminal of the PWM output circuit; the fifth pin of the output controller is connected to the low-voltage power supply, and the fourth pin of the output controller is connected to one end of the eleventh resistor. The other end of the eleventh resistor is connected to one end of the twelfth resistor and the third pin of the fourth optocoupler switch; the other end of the twelfth resistor is connected to the low-voltage power supply and the first pin of the fourth optocoupler switch. The fourth pin of the fourth optocoupler switch is connected to the positive terminal of the fourteenth diode, the emitter of the second transistor, one end of the nineteenth resistor, the emitter of the third transistor, and one end of the twentieth resistor. The fifth pin of the fourth optocoupler switch is connected to one end of the fourteenth resistor and one end of the fifteenth resistor; the sixth pin of the fourth optocoupler switch is connected to one end of the thirteenth resistor and the other end of the fourteenth resistor; the other end of the fifteenth resistor is connected to the base of the second transistor; the other end of the thirteenth resistor is connected to one end of the eighteenth resistor and the regulated power supply; the other end of the eighteenth resistor is connected to the collector of the second transistor, the other end of the nineteenth resistor, and the base of the third transistor; The collector of the third transistor is connected to the other end of the twentieth resistor; A sixth diode and a seventh diode are connected in series between the two ends of the twentieth resistor and one end of the twelfth capacitor, respectively; an eighth diode and a ninth diode are connected in series between the two ends of the twentieth resistor and the other end of the twelfth capacitor, respectively; the negative terminals of the sixth diode and the eighth diode are both connected to the other end of the twentieth resistor; the positive terminals of the seventh diode and the ninth diode are both connected to one end of the twentieth resistor. The negative terminal of the twelfth diode is connected to one end of the twelfth capacitor, and the positive terminal of the twelfth diode is connected to the other end of the twelfth capacitor. The positive and negative terminals of the twelfth diode serve as the two output terminals of the PWM output circuit, respectively.

7. The expansion circuit for a data acquisition card driver according to claim 6, characterized in that, The acquisition and protection circuit includes 32 independently configured input acquisition channels and 4 output acquisition channels.

8. The expansion circuit for a data acquisition card driver according to claim 7, characterized in that, Each input acquisition channel includes a current-limiting resistor and a bidirectional transient voltage suppressor diode connected in series. One end of the current-limiting resistor serves as the input terminal of the input acquisition channel, and the other end of the current-limiting resistor is connected to one end of a filter capacitor and one end of the bidirectional transient voltage suppressor diode. The other end of the filter capacitor is grounded, and the other end of the bidirectional transient voltage suppressor diode is used to input analog signals.

9. The expansion circuit for a data acquisition card driver according to claim 7, characterized in that, Each of the aforementioned output acquisition channels includes a current-limiting resistor and a filter capacitor; One end of the current-limiting resistor is used to receive the output analog signal, and the other end of the current-limiting resistor is connected to one end of the filter capacitor and serves as the output terminal; the other end of the filter capacitor is grounded.

10. An extension method for a data acquisition card driver, characterized in that, The expansion method is applied to the expansion circuit for a data acquisition card driver as described in any one of claims 1-9, and the expansion method includes: Configure the effective level information of the first to sixteenth channels of the first port in the main body of the NI acquisition card, and configure the sampling frequency and trigger conditions accordingly; The DO configuration circuit, latch extension DO circuit, and decoder extension DO circuit are independently controlled, and the number of digital output interfaces that are turned on at one time in the decoder extension DO circuit is controlled. Configure the PWM frequency and duty cycle of the sixth to eighth channels of the third port in the main body of the NI acquisition card; Configure the range and sampling rate of the analog input signal acquisition in the acquisition and protection circuit, the voltage range of the analog output signal, and perform filtering processing on the analog input signal acquired by the acquisition and protection circuit; The DI configuration circuit obtains sensing information or control signals from external sensors through its output port. The actuator is driven through the signal output terminal of the DO configuration circuit, the digital output interface of the latch extended DO circuit, and the digital output interface of the decoder extended DO circuit. The modulation signal is output through the output terminal of the PWM output circuit; The acquisition and protection circuit acquires external analog input signals and outputs analog output signals.

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