Electronic devices and methods for analog-to-digital conversion, power calculation devices and methods, and computer-readable storage media

Abstract

This disclosure provides an electronic device and method for analog-to-digital conversion, a power calculation method, and a computer-readable storage medium. The electronic device for analog-to-digital conversion includes: processing circuitry configured to: obtain an encoded data stream obtained by quantizing and encoding an input analog signal using an analog modulation module; filter and downsample the encoded data stream to obtain a decimation-filtered result, wherein the number of bits in the decimation-filtered result is greater than the effective number of bits of the analog modulation module; perform dynamic filtering processing on the decimation-filtered result to obtain a dynamic filtering result; and perform dynamic temperature compensation processing on the dynamic filtering result.

Description

Technical Field

[0001] This disclosure relates to the field of analog data processing, specifically to analog-to-digital conversion (ADC) technology and power calculation technology using ADC technology. More specifically, this disclosure relates to an electronic device and method for analog-to-digital conversion, a power calculation device and method, a computer-readable program, and a computer-readable storage medium. Background Technology

[0002] In today's electronic technology field, analog-to-digital conversion (ADC) technology plays a crucial role, and it is widely used in numerous signal processing and data acquisition systems. As a bridge connecting the analog world and the data world, the analog-to-digital converter (ADC) is responsible for converting continuous analog signals into discrete digital signals for precise processing by subsequent digital circuits.

[0003] However, existing analog-to-digital conversion (ADC) technologies still suffer from significant drawbacks, particularly low resolution. With the rapid development of science and technology, the demands for signal processing accuracy are constantly increasing across various technical fields. The low resolution of existing ADC technologies has become a bottleneck restricting further development in these fields. Therefore, there is an urgent need for ADC equipment and methods with higher resolution to meet the growing demand for high-precision signal processing and data acquisition in various sectors. Summary of the Invention

[0004] The maximum effective number of bits in an existing ADC is typically determined by the noise characteristics of the ADC module and the oversampling rate of subsequent filtering. Traditionally, filtering after the ADC module usually employs a two-stage SINC filter (also known as a SINC2 filter). The number of bits decimated by this SINC2 filter is usually the same as the effective number of bits of the ADC module, thus lacking an effective means of processing signals in the noise bits submerged beyond the retained effective number of bits.

[0005] To address the problems existing in current analog-to-digital conversion (ADC) devices and methods, this invention provides a more accurate and stable electronic device and method for ADC conversion. This device and method can not only improve the effective resolution of the ADC, reduce output noise, and improve the stability and accuracy of the output data, but also further improve the response speed and processing accuracy by utilizing dynamic filtering, and improve the stability of the output data at different temperatures.

[0006] A brief overview of this disclosure is provided below to provide a basic understanding of certain aspects of it. It should be understood that this overview is not an exhaustive summary of the disclosure. It is not intended to identify key or essential parts of the disclosure, nor is it intended to limit its scope. Its purpose is merely to present certain concepts in a simplified form as a prelude to the more detailed description that follows.

[0007] According to one aspect of this disclosure, an electronic device for analog-to-digital conversion is provided, comprising: a processing circuit configured to: obtain an encoded data stream obtained by quantizing and encoding an input analog signal using an analog modulation module; filter and downsample the encoded data stream to obtain a decimation-filtered result, wherein the number of bits in the decimation-filtered result is greater than the effective number of bits of the analog modulation module; perform dynamic filtering processing on the decimation-filtered result to obtain a dynamic filtering result; and perform dynamic temperature compensation processing on the dynamic filtering result.

[0008] According to one aspect of this disclosure, a power calculation device is provided, comprising: the electronic device described above, which processes an encoded data stream obtained by quantizing and encoding an analog voltage or current of a battery using an analog modulation module to obtain a digital voltage or current; and a power calculation module which calculates the power of the battery using the digital voltage or current.

[0009] According to one aspect of this disclosure, a method for analog-to-digital conversion is provided, comprising: obtaining an encoded data stream obtained by quantizing and encoding an input analog signal through an analog modulation module; filtering and downsampling the encoded data stream to obtain a decimation filtering result, wherein the number of bits in the decimation filtering result is greater than the effective number of bits of the analog modulation module; performing dynamic filtering processing on the decimation filtering result to obtain a dynamic filtering result; and performing dynamic temperature compensation processing on the dynamic filtering result.

[0010] According to one aspect of this disclosure, a method for calculating battery capacity is provided, comprising: processing an encoded data stream obtained by quantizing and encoding an analog voltage or current of a battery using an analog modulation module, using the analog-to-digital conversion method described above, to obtain a digital voltage or current; and calculating the battery capacity using the digital voltage or current.

[0011] According to one aspect of this disclosure, a machine-readable program is provided, characterized in that, when executed by a processor, the machine-readable program implements the methods described above.

[0012] According to one aspect of this disclosure, a machine-readable storage medium is provided that stores machine-executable instructions thereon, which, when executed, cause a processor to perform the methods described above.

[0013] According to the apparatus, methods, machine-readable programs, and machine-readable storage media described in various and other aspects of this disclosure, the effective resolution of an ADC can be improved, output noise reduced, and the stability and accuracy of output data enhanced during analog-to-digital conversion and battery charge calculation. Furthermore, dynamic filtering can be used to further improve response speed and processing accuracy, and the stability of output data under different temperatures can be improved. Moreover, when this apparatus and method are used to calculate battery charge, more accurate battery charge calculation results unaffected by temperature can be obtained.

[0014] These and other advantages of this disclosure will become more apparent from the following detailed description of preferred embodiments of this disclosure in conjunction with the accompanying drawings. Attached Figure Description

[0015] To further illustrate the above and other advantages and features of this disclosure, the specific embodiments of this disclosure are described in more detail below with reference to the accompanying drawings. These drawings, together with the following detailed description, are included in and form a part of this specification. Elements having the same function and structure are indicated by the same reference numerals. Furthermore, the dashed lines in the drawings indicate optional elements or optional steps. It should be understood that these drawings only depict typical examples of this disclosure and should not be construed as limiting the scope of this disclosure. In the drawings:

[0016] Figure 1A A schematic diagram of the structure of an electronic device for analog-to-digital conversion according to one embodiment is shown.

[0017] Figure 1B Schematic illustration Figure 1A A schematic diagram illustrating a structural example of an electronic device used for analog-to-digital conversion;

[0018] Figure 2 The schematic diagram illustrates a processing flow implemented by an electronic device for analog-to-digital conversion according to one embodiment.

[0019] Figure 3 The diagram illustrates a process for high-precision conversion of analog signals to data signals implemented by an electronic device for analog-to-digital conversion according to one embodiment.

[0020] Figure 4 The diagram illustrates a filtering and downsampling process implemented by a processing circuit or filtering and downsampling module of an electronic device for analog-to-digital conversion according to one embodiment.

[0021] Figure 5The illustration schematically shows a dynamic filtering process implemented by a processing circuit or dynamic filtering module of an electronic device for analog-to-digital conversion according to one embodiment.

[0022] Figure 6 The illustration schematically shows a dynamic temperature compensation process implemented by a processing circuit or dynamic temperature compensation module of an electronic device for analog-to-digital conversion according to one embodiment.

[0023] Figure 7 A schematic diagram illustrating the structure of an energy calculation device according to one embodiment is shown.

[0024] Figure 8 Schematic illustration Figure 7 A schematic diagram illustrating a structural example of the power calculation device shown;

[0025] Figure 9 A schematic diagram illustrating the processing flow implemented by a power calculation device according to one embodiment is shown.

[0026] Figure 10 A comparison diagram showing the effect of dynamic filtering before and after the analog-to-digital conversion process of an electronic device according to one embodiment is shown. Detailed Implementation

[0027] Exemplary embodiments of this disclosure will be described below with reference to the accompanying drawings. For clarity and brevity, not all features of actual embodiments are described in the specification. However, it should be understood that many implementation-specific decisions must be made during the development of any such actual embodiment in order to achieve the developer's specific goals, such as complying with constraints related to the system and business, and these constraints may vary depending on the implementation. Furthermore, it should be understood that while development work can be very complex and time-consuming, such development work is merely a routine task for those skilled in the art who benefit from this disclosure.

[0028] It should also be noted that, in order to avoid obscuring the contents of this disclosure with unnecessary details, the accompanying drawings only show the equipment structure and / or processing steps that are closely related to the solution according to this disclosure, while omitting other details that are not closely related to this disclosure.

[0029] <First Implementation Method>

[0030] This embodiment provides an electronic device for analog-to-digital conversion.

[0031] Figure 1A A schematic diagram of the structure of an electronic device 10 for analog-to-digital conversion according to one embodiment is shown. Figure 1BSchematic illustration Figure 1A The diagram shows a structural example of an electronic device used for analog-to-digital conversion.

[0032] First refer to Figure 1A .like Figure 1A As shown, the electronic device 10 includes: a processing circuit 100 configured to: obtain an encoded data stream obtained by quantizing and encoding an input analog signal using an analog modulation module; filter and downsample the encoded data stream to obtain a decimation-filtered result, wherein the number of bits in the decimation-filtered result is greater than the effective number of bits of the analog modulation module; perform dynamic filtering processing on the decimation-filtered result to obtain a dynamic filtering result; and perform dynamic temperature compensation processing on the dynamic filtering result. As an example, the processing circuit 100 can be implemented via a processor or chip. Note that although in Figure 1A A single processing circuit 100 is shown, but it may include and / or be implemented in Figure 1B The functions of the multiple modules shown are illustrated. In other words, the electronic device 10 (or its processing circuitry 100) may include optional modulation analog module 110, filtering and downsampling module 120, dynamic filtering module 130, dynamic temperature compensation module 140, etc., the functions of which can be implemented by corresponding hardware and / or software and their combination. Preferably, the above modules can be mainly implemented by hardware.

[0033] Figure 2 It shows things like Figure 1A or Figure 1B A schematic diagram of the processing flow implemented by the electronic device 10 shown. Figure 3 It shows things like Figure 1A or Figure 1B The illustrated electronic device 10 performs a high-precision analog-to-data signal conversion process. For ease of description, the following text mainly focuses on... Figure 1A The electronic device 10 will be further described.

[0034] As an example, in the processing circuit 100 of the electronic device 10, the signal type of the input analog signal is a sampled voltage or sampled current obtained by sampling or measuring the terminal voltage of the battery or the charging current or discharging current of the battery, but it is certainly not limited to this.

[0035] As an example, in the processing circuit 100 of the electronic device 10, the encoded data stream is obtained using a delta-integral modulator. A delta-integral modulator is also known as a Sigma-Delta modulator, Delta-Sigma modulator, integral-differential modulator, etc. As an example, this delta-integral modulator has 16 effective bits and can be, for example, a first-order delta-integral modulator.

[0036] As an example, in the processing circuit 100 of the electronic device 10 (or the filtering and downsampling module 120 therein), a K-stage SINC filter (also known as a cascaded integrator comb filter, or CIC filter) is used for filtering and downsampling, where K is a natural number. Preferably, K = 2. As an example, the number of bits in the decimation filtering result obtained using a K-stage SINC filter is 1 to 3 more bits than the effective number of bits of the analog modulation module, and preferably, 2 more bits.

[0037] Using the electronic device 10 and its processing circuit 100 or various modules as described above, the following can be achieved: Figure 3 The process of high-precision conversion from analog signal to data signal is shown.

[0038] The following combination Figure 4 This describes a preferred embodiment of the filtering and downsampling processing implemented by the processing circuit 100 (or the filtering and downsampling module 120 therein) of the electronic device 10. Consider the following example scenario: using a trigonometric integrator as an implementation example of the modulation analog module 110, and a 2-stage SINC filter (SINC2 filter) with K=2 as an implementation example of the filtering and downsampling module 120, filtering and downsampling the output of the trigonometric integrator to obtain a decimation filtering result, where the number of bits in the decimation filtering result is 2 more bits than the effective number of bits of the analog modulation module. Figure 4 This is a schematic diagram illustrating the example scenario.

[0039] Note that this invention does not modify the structure of the SINC2 filter itself, which consists of a D delay flip-flop and an adder, etc. The only difference from the prior art is the number of bits of data discarded at the output of the SINC2 filter. Therefore, unnecessary details will be omitted in the following description.

[0040] As a prelude, the encoded data stream obtained by the trigonometric integrator, which serves as an example of the modulation simulation module, and the data that the filtering and downsampling modules can obtain are first described.

[0041] In the example process of filtering and downsampling, the effective number of bits ENOB of the first-order trigonometric integral modulator providing the encoded data stream can be calculated by equation (1):

[0042] ENOB=N+1.5log2(OSR)-0.859 … Equation (1)

[0043] Where N is the number of bits in the quantizer, and in this example, N is 1, which is also the most commonly used form of quantizer in the field. OSR is the oversampling rate, and in this example, the oversampling rate of the trigonometric integral modulator is 2048. Therefore, from the above formula, we can know that the effective number of bits ENOB of the trigonometric integral modulator is 16.641, which is 16 bits after rounding. Data after the 16th bit is generally considered to be noise data in the field.

[0044] In addition, Figure 4 In the example implementation of the SINC2 filter as a filtering and downsampling module, the word length B of the data can be calculated according to the following equation (2):

[0045] B = Klog2M + log2R… Equation (2),

[0046] Where K is the number of stages of the SINC filter, K = 2 in this example; M is the downsampling rate, M = 2048 in this example; and R is the number of accumulations, R = 2 in this example. Therefore, in this example, the word length B is 2 * 11 + 1 = 23. Here, since the SINC2 filter is implemented by a D delay flip-flop and an accumulator and has register functionality, its word length can also be called the register word length.

[0047] like Figure 4 As shown, in this example, a 1-bit encoded data stream (which has, for example, the form of +1, -1) obtained by a 16-bit analog modulator (triangular integral modulator) is accumulated twice, and then the accumulated result is output to the subsequent SINC2 filter at twice the downsampling rate. The SINC2 filter then filters the encoded data stream and performs downsampling at a downsampling rate of 2048, thereby obtaining 23 bits of data (i.e., a 23-bit bit sequence consisting of 0s and 1s) calculated according to Equation (2).

[0048] Subsequently, from the obtained 23-bit data, the first 18 bits are truncated while the last 5 bits are discarded. In other words, in this example, 16 + 2 = 18 bits of digital data obtained from the SINC2 filter are taken as the result of filtering and downsampling and enter into the next processing flow or input to the next processing module. Among them, 2 bits are the noise bits that are usually discarded in the art when the data is 16 bits. That is to say, for the case where the SINC2 filter obtains a 23-bit downsampled result from the output of an analog modulator with 16 effective bits, the common practice at the end of filtering and downsampling is to truncate the first 16 effective bits and discard the last 7 noise bits; while in this example, the first 18 bits of the output (equal to the sum of the 16 effective bits and the original 2 noise bits) are truncated, and only the last 5 noise bits are discarded, and then used for the next processing module / flow (i.e., the dynamic filtering module / process).

[0049] After the above filtering and downsampling processes, some noise data is retained, thereby effectively uncovering the signal in the noise bits that are submerged outside the retained effective bits, thus effectively improving the resolution of the analog-to-digital conversion process.

[0050] In the subsequent dynamic filtering process in the processing circuit 100 (or the dynamic filtering module 130 therein) of the electronic device 10, the parameters of the dynamic filtering process can be dynamically adjusted according to the data characteristics of the input data of the dynamic filtering process.

[0051] Preferably, the dynamic filtering process includes one or more of the following: moving average filtering, median filtering, and / or dynamic low-pass filtering.

[0052] The following combination Figure 5 A preferred embodiment of the processing circuit 100 of the electronic device 10 or the dynamic filtering module 130 therein is described. Figure 5 A schematic diagram of a dynamic filtering module according to one embodiment is shown. The processing flow implemented by this dynamic filtering module mainly includes moving average filtering, median filtering, and dynamic low-pass filtering.

[0053] As an example, this dynamic filtering module includes the following modules: a 2-16 window mean filtering module, a median filtering module, and a dynamic low-pass filtering module. Specifically, all of these filtering modules can be implemented in hardware or as circuits.

[0054] use Figure 5 The modules shown in this example, specifically the dynamic filtering module, can be configured to perform the following operations: Input the 18-bit data containing 2 bits of noise obtained from the filtering and downsampling modules into the sliding mean filtering module with an adjustable filtering window to obtain mean-filtered data. For example, the mean filtering window can be selected as 2, 4, 8, or 16. Process the mean-filtered data using the median filtering module with an adjustable filtering window to obtain median-filtered data. Determine the data feature region to which the median-filtered data belongs. Based on the determined data feature region, jointly select different low-pass thresholds and low-pass coefficients to perform low-pass filtering using the dynamic low-pass filtering module, and output the dynamic filtering result. Figure 5 As shown, switching between mean filtering and / or median filtering can be achieved, for example, through a selector. Here, the optimal and / or preferred values ​​of each parameter can be obtained through prior experiments and / or simulations, thereby achieving the desired results in practical applications.

[0055] After the above dynamic filtering process, under dynamic input conditions, the filtering parameters can be dynamically adjusted according to the relevant data characteristics of the input data. Therefore, the response speed is fast, the current accuracy is high, and it can be applied to input data with various data characteristics.

[0056] In addition, the processing circuit 100 of the electronic device 10 can also implement and / or include the function of the dynamic temperature compensation module 140 to perform dynamic temperature compensation processing on the above-mentioned dynamic filtering results.

[0057] The following combination Figure 6 A preferred embodiment of the dynamic temperature compensation processing implemented by the processing circuit 100 (or the dynamic temperature compensation module 140 therein) is described. As an example, the dynamic temperature compensation processing includes: dynamically compensating the dynamic filtering result based on the temperature range in which the current temperature falls relative to one or more predetermined temperatures.

[0058] Specifically, dynamic temperature compensation of the dynamic filtering result includes: compensating the dynamic filtering result of the current temperature based on temperature compensation parameters (e.g., but not limited to temperature compensation coefficient and / or temperature compensation offset value) determined based on the deviation of historical output data of analog-to-digital conversion processing (in particular, dynamic filtering module) at the current temperature relative to historical input data of analog-to-digital conversion processing (in particular, analog modulation module).

[0059] Here, we briefly describe how the temperature compensation parameters are determined. We consider the case where the temperature compensation parameters include both the temperature compensation coefficient and the temperature compensation offset value, and for a predetermined temperature, the determined parameters satisfy the following formula:

[0060] Y0=SX0+O…Formula (3-0),

[0061] Where S is the temperature compensation coefficient at the predetermined temperature, O is the temperature compensation offset value at the predetermined temperature, X0 is a set of (historical) output data of the analog-to-digital conversion processing (specifically, the dynamic filtering module) at the predetermined temperature, and Y0 is a corresponding set of (historical) input data of the analog-to-digital conversion processing (specifically, the analog modulation module) at the predetermined temperature. The values ​​of S and O at this predetermined temperature (S, O) can be determined by fitting or machine learning methods, such that equation (3-0) is satisfied.

[0062] After obtaining the above parameters, temperature compensation of the current data at the predetermined temperature can be achieved based on the determined parameter values ​​using the following formula (3).

[0063] Y=SX+O… Formula (3)

[0064] Where X is the current output data of the analog-to-digital conversion process (specifically, the dynamic filtering module) at the predetermined temperature, and Y is the output data of the temperature compensation process (the temperature compensation module with the aforementioned temperature compensation parameters) at the predetermined temperature.

[0065] For multiple predetermined temperatures, multiple sets of values ​​(S,O) of equation (3-0) at multiple predetermined temperatures can be determined, so that dynamic temperature compensation can be performed based on the current temperature in subsequent practical applications.

[0066] The following describes a non-limiting specific example of dynamic temperature compensation processing. If we consider that the temperature compensation coefficient S and the temperature compensation offset value O remain stable within a temperature range adjacent to a predetermined temperature T0, i.e., S = S0 and O = O0 within this temperature range, then if the temperature T1 of the product under test in the application scenario falls within this adjacent temperature range, it can be approximately assumed that the temperature compensation coefficient S0 and the temperature compensation offset value O0 at the predetermined temperature also apply to the product temperature T1. Therefore, temperature compensation at temperature T1 can be directly achieved using the temperature compensation coefficient S0 and the temperature compensation offset value O0 determined in the above manner.

[0067] The following describes another non-limiting specific example of dynamic temperature compensation processing.

[0068] Considering the temperature dependence of the analog-to-digital conversion results, three predetermined temperatures, T, are set according to the temperature variation range in the specific application scenario. HI 25℃ (room temperature), T LO T HI >25℃>T LO Current temperature T CUR The possible temperature location is therefore divided into 5 temperature ranges, namely T. CUR >=T HI T HI >T CUR >25℃, T CUR =25℃, 25℃>T CUR >T LO T CUR <=T LO .

[0069] Here, we consider using the above equation (3-0) to determine three sets of temperature compensation parameters at three predetermined temperatures, and corresponding temperature compensation can be achieved using the following three equations:

[0070] Y HI =S HI X HI +O HI …Equation (4-1),

[0071] Y25 =S 25 X 25 +O 25 …Equation (4-2),

[0072] Y LO =S LO X LO +O LO …Equation (4-3),

[0073] Among them, S 25 That is, based on the temperature compensation coefficient obtained above at 25℃, O 25 That is, based on the temperature compensation offset value at 25℃ obtained in the above manner, correspondingly, S HI For T HI Temperature compensation coefficient at temperature, O HI For T HI Temperature compensation offset value at temperature, S LO For T LO Temperature compensation coefficient at temperature, O LO For T LO Temperature compensation offset value under temperature. The selection method for the predetermined temperature is not limited to this; it can be selected based on the temperature variation range in the specific application scenario of the product.

[0074] Taking the calculation of the temperature compensation coefficient and temperature compensation offset at the current temperature using a linear interpolation algorithm to obtain the data after dynamic temperature compensation as an example, let's take T... CUR X represents the current temperature. CUR Y represents the current output data of the analog-to-digital conversion process (specifically, the dynamic filtering module) at the current temperature. CUR Further details are described for the output data of the temperature compensation processing (temperature compensation module with the above temperature compensation parameters) at the current temperature.

[0075] When T CUR >=T HI At that time, Y CUR =X CUR *(1-S HI )-O HI ;

[0076] When T HI >T CUR At >25℃,

[0077] Y CUR =X CUR *(1-S HI +(T HI -T CUR )*(S HI -S 25 ) / (THI -25))-O HI +(T HI -T CUR )*(O HI -O 25 ) / (T HI -25);

[0078] When T CUR At 25℃, Y CUR =X CUR *(1-S 25 )-O 25 ;

[0079] When 25℃>T CUR >T LO hour,

[0080] Y CUR =X CUR *(1-S LO +(T CUR -T LO )*(S LO -S 25 ) / (25-T LO ))-O LO +(T CUR -T LO )*(O LO -O 25 ) / (25-T LO );

[0081] When T CUR <=T LO At that time, Y CUR =X CUR *(1-S LO )-O LO .

[0082] After the above exemplary processing, the input data is dynamically compensated according to the current temperature range, and the output data after dynamic temperature compensation can be obtained.

[0083] The above examples are merely illustrative of exemplary processing methods for dynamic temperature compensation and do not limit the specific implementation of dynamic temperature compensation. After the dynamic temperature compensation process described above, more accurate output data can be obtained at different temperatures, which can then be applied to analog-to-digital conversion processing at different temperatures. Incidentally, the processing circuit 100 (or its dynamic temperature compensation module 140) used for the above dynamic temperature compensation process can obtain the current temperature of the product in any suitable manner.

[0084] Preferably, although not shown in the figures, the electronic device 10 or its processing circuit 100 may also implement and / or include the function of a calibration module to perform calibration processing. This calibration processing can be implemented in hardware or software. Preferably, the calibration processing includes performing calibration based on the deviation (e.g., difference) between historical output data and historical input data from the analog-to-digital conversion. In one example, calibration parameters can be obtained by minimizing the deviation (e.g., difference) between historical output data and historical input data, and these calibration parameters can be used to calibrate the actual input data, for example, by adding the calibration parameters to the actual data.

[0085] The processing steps in the above processing circuit configuration are not limited to using a single processing circuit. They can also be performed using one or more discrete or integrated modular circuits or one or more software programs combined with each other.

[0086] The electronic device in this embodiment uses various hardware modules to implement various functions that are usually implemented in software in the art and has the following technical effects: by extracting both noise bits and effective bits in the filtering and downsampling modules, digital data with noisy data sampling values ​​is obtained, thereby improving the effective resolution of the ADC without significantly increasing the circuit area. Furthermore, by dynamically filtering the digital data with noisy data sampling values ​​through the digital dynamic filtering module, effective data can be extracted from the noise data that is usually discarded, effectively reducing output noise and improving the stability and accuracy of the output signal. Moreover, the dynamic temperature compensation process improves the stability of the ADC output at different temperatures, thereby improving the overall output accuracy of the ADC.

[0087] <Second Implementation Method>

[0088] With the widespread application of battery-powered technology in mobile communications and electronic devices, effective battery management systems have become a hot topic of common concern for battery researchers and users. As current sampling resistors become smaller and smaller, operating temperature requirements become higher and higher, and the actual measured analog input signals become smaller and smaller, a major challenge facing battery management systems is how to obtain more accurate and stable charge values.

[0089] This embodiment provides a power calculation device, which may include: an electronic device for analog-to-digital conversion as described in the above embodiments, which processes an encoded data stream obtained by quantizing and encoding the analog voltage or current of a battery using an analog modulation module to obtain a digital voltage or current; and a power calculation module, which uses the digital voltage or current to calculate the power of the battery, such as using various existing methods (e.g., ampere-hour integration method).

[0090] The following is combined Figures 7 to 9 A power calculation device for calculating battery power using output data obtained from the electronic device described above for analog-to-digital conversion will be described. Descriptions that are repeated in the above embodiments will not be repeated here. Figure 7 The schematic diagram illustrates the structure of a power calculation device 70 according to one embodiment, which, in addition to including the electronic device 10 for analog-to-digital conversion described above, Figure 7 The power calculation device also includes a power calculation module 750, which uses the output of the analog-to-digital conversion process to calculate the battery's power using various existing calculation methods, such as the ampere-hour integration method. Preferably, the power calculation module 750 can also use other methods to calculate the battery's power.

[0091] also, Figure 8 Schematic illustration Figure 7 A schematic diagram of an example modular structure of a power calculation device 80, which includes, in the electronic device 10, the following: an analog modulation module 810, a filtering and downsampling module 820, a dynamic filtering module 830, and a dynamic temperature compensation module 840, as well as... Figure 7 The power calculation module 750 corresponds to the power calculation module 850.

[0092] Figure 9 The diagram illustrates a sample processing flow that can be implemented by a power calculation device according to one embodiment.

[0093] The output data from the above processing steps, preferably voltage or current data, can be used in various ways to calculate battery capacity or changes in capacity. The following example uses the Coulomb integral method based on voltage data to illustrate the calculation method, but it is not limited to this; for example, calculations can be performed based on current and / or voltage data using various existing methods, which will not be elaborated upon here.

[0094] In this example, the change in battery capacity is calculated based on the voltage data obtained after the analog-to-digital conversion process described above. The specific calculation formula is as follows:

[0095]

[0096] Where R is the sampling resistor, t is the sampling time, and Ah i X represents the battery charge at time i. C (k) represents the voltage data across the battery obtained after the above analog-to-digital conversion process during the k-th sampling time. Therefore, according to the above formula, the change in battery charge (Ah) between time 0 and time i can be obtained. i -Ah0), and thus the charge at time i can be determined based on the known charge at the previous time (time 0).

[0097] Alternatively, the output data obtained from the above analog-to-digital conversion process can be used to calculate the battery's charge or charge change in other ways.

[0098] <Third Implementation Method>

[0099] In describing the electronic device for analog-to-digital conversion in the above embodiments, it is evident that some processes or methods have also been disclosed. Hereinafter, an outline of these methods is given without repeating some details already discussed above. (See also...) Figure 2 This embodiment provides a method for analog-to-digital conversion, including: step S201, obtaining an encoded data stream obtained by quantizing and encoding an input analog signal through an analog modulation module; step S202, filtering and downsampling the encoded data stream to obtain a decimation filtering result, wherein the number of bits in the decimation filtering result is greater than the effective number of bits in the analog modulation module; step S203, performing dynamic filtering processing on the decimation filtering result to obtain a dynamic filtering result; and step S204, performing dynamic temperature compensation processing on the dynamic filtering result.

[0100] In one example, the encoded data stream is obtained using a trigonometric integral modulator. In one example, the effective bit width of the trigonometric integral modulator is 16 bits.

[0101] In one example, a K-order SINC filter is used for filtering and downsampling, where K is a natural number. Preferably, K = 2.

[0102] In one example, the number of bits in the decimation filtering result is 1 to 3 more bits than the effective number of bits in the analog modulation module.

[0103] In one example, the calibration process includes dynamically temperature compensating the dynamic filtering results based on the temperature range in which the current temperature falls relative to one or more predetermined temperatures.

[0104] In one example, the dynamic temperature compensation of the dynamic filtering result includes: compensating the dynamic filtering result of the current temperature based on a temperature compensation parameter determined by the deviation of the historical output data of the analog-to-digital conversion process at the current temperature relative to the historical input data of the analog-to-digital conversion process.

[0105] In one example, the parameters of the dynamic filtering process are dynamically adjusted based on the data characteristics of the input data.

[0106] Preferably, the dynamic filtering process includes one or more of the following: moving mean filtering, median filtering, and / or dynamic low-pass filtering.

[0107] <Fourth Implementation Method>

[0108] This embodiment provides a method for calculating electricity consumption. For example... Figure 9 As shown, the method includes: step S901, utilizing the above-described method for analog-to-digital conversion (e.g., but not limited to...). Figure 2 The method shown processes the encoded data stream obtained by quantizing and encoding the analog voltage or current of the battery using an analog modulation module to obtain a digital voltage or current; step S902, the battery capacity is calculated using the digital voltage or current.

[0109] <Effect>

[0110] The following is combined Figure 10 In one example, the technical effects of the data obtained by implementing the method of the second embodiment in the dynamic filtering step during analog-to-digital conversion using the electronic device of the first embodiment (i.e., the final data obtained by analog-to-digital conversion processing) are explained.

[0111] Figure 10 A comparison chart showing the data obtained before and after implementing dynamic filtering is presented. Figure 10 In this process, the product being measured (battery) is discharged with a current of 5000mA. The final result data is obtained by performing analog-to-digital conversion on the discharge current, including dynamic filtering. The solid line represents the measured output data of the electronic device with the dynamic filtering module described in the above embodiment, while the dashed line represents the measured output data of the electronic device without enabling the dynamic filtering process described in the above embodiment. Figure 10 In the graph, the horizontal axis represents the number of sampling points (sampling point number), and the vertical axis represents the measured output current value, in mA. It is clear from the graph that electronic devices with dynamic filtering modules or methods using dynamic filtering have significantly more stable measurement outputs compared to electronic devices without dynamic filtering modules or methods without dynamic filtering.

[0112] Therefore, through the dynamic filtering process described above, and especially by using the dynamic filtering module described above, the filtering parameters can be dynamically adjusted according to the relevant data characteristics of the input data under dynamic input conditions. As a result, the response speed is fast, the current accuracy is high, and it can be applied to input data with various data characteristics.

[0113] In summary, the methods and devices described above obtain digital data with noisy sample values ​​by extracting both noise bits and effective bits during filtering and downsampling processes, thereby improving the effective resolution of the analog-to-digital converter (ADC). Furthermore, by dynamically filtering the noisy sample values ​​using a digital dynamic filtering module, effective data can be extracted from normally discarded noise data without significantly increasing the circuit area, effectively reducing output noise and improving the stability and accuracy of the output signal. Dynamic temperature compensation further enhances the stability of the ADC output at different temperatures, thus improving the overall output accuracy of the ADC. Finally, by applying this to battery power calculation, more accurate changes in battery power can be obtained.

[0114] The basic principles of this disclosure have been described above in conjunction with specific embodiments. However, it should be noted that those skilled in the art will understand that all or any step or component of the methods and apparatus of this disclosure can be implemented in any computing device (including processors, storage media, etc.) or network of computing devices, in the form of hardware, firmware, software or a combination thereof. This is something that those skilled in the art can achieve by using their basic circuit design knowledge or basic programming skills after reading the description of this disclosure.

[0115] Furthermore, this disclosure also proposes a machine-readable program, characterized in that, when executed by a processor, the machine-readable program implements the method for analog-to-digital conversion and / or the power calculation method as described above in the embodiments of this disclosure.

[0116] Furthermore, this disclosure also proposes a machine-readable storage medium storing machine-executable instructions thereon, which, when executed, cause a processor to perform the analog-to-digital conversion method and / or power calculation method as described above according to the embodiments of this disclosure. The machine-readable storage medium includes, but is not limited to, floppy disks, optical disks, magneto-optical disks, memory cards, memory sticks, etc. When this disclosure is implemented via software or firmware, programs constituting the software are installed from a storage medium or network onto a computer with a dedicated hardware architecture, enabling the computer to perform various functions when various programs are installed.

[0117] It should also be noted that in the electronic devices and methods of this disclosure, the components or steps can be decomposed and / or recombined. These decompositions and / or recombinations should be considered equivalent solutions to this disclosure. Furthermore, the steps performing the above series of processes can naturally be executed in the order described, but are not necessarily required to be executed in chronological order. Some steps can be performed in parallel or independently of each other.

[0118] Finally, it should be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Furthermore, unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0119] In addition, the following configuration is provided according to this disclosure.

[0120] 1. An electronic device for analog-to-digital conversion, comprising:

[0121] The processing circuit is configured as follows:

[0122] Obtain the encoded data stream obtained by quantizing and encoding the input analog signal using an analog modulation module;

[0123] The encoded data stream is filtered and downsampled to obtain a decimation filtering result, wherein the number of bits in the decimation filtering result is greater than the effective number of bits in the analog modulation module;

[0124] The extracted filtering results are subjected to dynamic filtering processing to obtain dynamic filtering results.

[0125] Dynamic temperature compensation processing is performed on the dynamic filtering results.

[0126] 2. The electronic device according to configuration 1, wherein the encoded data stream is obtained using a trigonometric integral modulator.

[0127] 3. The electronic device according to configuration 2, wherein the effective number of bits of the trigonometric integral modulator is 16 bits.

[0128] 4. The electronic device according to configuration 1, wherein filtering and downsampling are performed using a K-level SINC filter, where K is a natural number.

[0129] 5. The electronic device according to configuration 4, wherein K = 2.

[0130] 6. The electronic device according to configuration 1, wherein the number of bits of the decimation filtering result is 1 to 3 more bits than the effective number of bits of the analog modulation module.

[0131] 7. The electronic device according to configuration 1, wherein the dynamic temperature compensation process includes: performing dynamic temperature compensation on the dynamic filtering result based on the temperature range in which the current temperature is relative to one or more predetermined temperatures.

[0132] 8. The electronic device according to configuration 7, wherein the dynamic temperature compensation of the dynamic filtering result includes: compensating the dynamic filtering result of the current temperature based on a temperature compensation parameter determined by the deviation of historical output data of analog-to-digital conversion processing at the temperature corresponding to the current temperature from historical input data of analog-to-digital conversion processing.

[0133] 9. The electronic device according to configuration 1, wherein the parameters of the dynamic filtering process are dynamically adjusted according to the data characteristics of the input data of the dynamic filtering process.

[0134] 10. The electronic device according to configuration 1, wherein the dynamic filtering process includes one or more of the following processes: moving average filtering, median filtering, and / or dynamic low-pass filtering.

[0135] 11. A power calculation device, comprising:

[0136] The electronic device configured in any one of 1 to 10 is used to process the encoded data stream obtained by quantizing and encoding the analog voltage or current of the battery using an analog modulation module to obtain a digital voltage or current.

[0137] A power calculation module that uses the digital voltage or current to calculate the battery's power.

[0138] 12. A method for analog-to-digital conversion, comprising:

[0139] Obtain the encoded data stream obtained by quantizing and encoding the input analog signal through the analog modulation module;

[0140] The encoded data stream is filtered and downsampled to obtain a decimation filtering result, wherein the number of bits in the decimation filtering result is greater than the effective number of bits in the analog modulation module;

[0141] The extracted filtering results are subjected to dynamic filtering processing to obtain dynamic filtering results.

[0142] Dynamic temperature compensation processing is performed on the dynamic filtering results.

[0143] 13. The method according to configuration 12, wherein the encoded data stream is obtained using a trigonometric integral modulator.

[0144] 14. The method according to configuration 13, wherein the effective number of bits of the triangular integral modulator is 16 bits.

[0145] 15. The method according to configuration 12, wherein filtering and downsampling are performed using a K-level SINC filter, where K is a natural number.

[0146] 16. The method described according to configuration 15, wherein K = 2.

[0147] 17. The method according to configuration 12, wherein the number of bits of the decimation filtering result is 1 to 3 more bits than the effective number of bits of the analog modulation module.

[0148] 18. The method according to configuration 12, wherein the dynamic temperature compensation process includes: performing dynamic temperature compensation on the dynamic filtering result based on the temperature range in which the current temperature is relative to one or more predetermined temperatures.

[0149] 19. The method according to configuration 18, wherein the dynamic temperature compensation of the dynamic filtering result includes: compensating the dynamic filtering result of the current temperature based on a temperature compensation parameter determined by the deviation of historical output data of analog-to-digital conversion processing at the temperature corresponding to the current temperature from historical input data of analog-to-digital conversion processing.

[0150] 20. The method according to configuration 12, wherein the parameters of the dynamic filtering process are dynamically adjusted according to the data characteristics of the input data of the dynamic filtering process.

[0151] 21. The method according to configuration 12, wherein the dynamic filtering process includes one or more of the following processes: moving mean filtering, median filtering, and / or dynamic low-pass filtering.

[0152] 22. A method for calculating electricity consumption, comprising:

[0153] Using the method according to any one of configurations 12 to 21, the encoded data stream obtained by quantizing and encoding the analog voltage or current of the battery using an analog modulation module is processed to obtain digital voltage or current.

[0154] The battery charge is calculated using the digital voltage or current.

[0155] 23. A machine-readable program, characterized in that, when executed by a processor, the machine-readable program implements the method as described in any one of configurations 12 to 22.

[0156] 24. A machine-readable storage medium having stored thereon machine-executable instructions that, when executed, cause a processor to perform the method according to any one of configurations 12 to 22.

[0157] While the embodiments of this disclosure have been described in detail above with reference to the accompanying drawings, it should be understood that the embodiments described above are merely illustrative of this disclosure and do not constitute a limitation thereof. Those skilled in the art can make various modifications and alterations to the above embodiments without departing from the substance and scope of this disclosure. Therefore, the scope of this disclosure is defined only by the appended claims and their equivalents.

Claims

1. An electronic device for analog-to-digital conversion, comprising: The processing circuit is configured as follows: Obtain the encoded data stream obtained by quantizing and encoding the input analog signal using an analog modulation module; The encoded data stream is filtered and downsampled to obtain a decimation filtering result, wherein the number of bits in the decimation filtering result is greater than the effective number of bits in the analog modulation module; The extracted filtering results are subjected to dynamic filtering processing to obtain dynamic filtering results. Dynamic temperature compensation processing is performed on the dynamic filtering results.

2. The electronic device according to claim 1, wherein, The encoded data stream is obtained using a trigonometric integral modulator.

3. The electronic device according to claim 2, wherein, The effective number of bits of the trigonometric integral modulator is 16 bits.

4. The electronic device according to claim 1, wherein, A K-order SINC filter is used for filtering and downsampling, where K is a natural number.

5. The electronic device according to claim 4, wherein, K＝2。 6. The electronic device according to claim 1, wherein, The number of bits in the decimation filtering result is 1 to 3 more bits than the effective number of bits in the analog modulation module.

7. The electronic device according to claim 1, wherein, The dynamic temperature compensation process includes: performing dynamic temperature compensation on the dynamic filtering result based on the temperature range in which the current temperature is relative to one or more predetermined temperatures.

8. The electronic device according to claim 7, wherein, The dynamic temperature compensation of the dynamic filtering result includes: compensating the dynamic filtering result of the current temperature based on a temperature compensation parameter determined by the deviation of the historical output data of the analog-to-digital conversion process at the current temperature relative to the historical input data of the analog-to-digital conversion process.

9. The electronic device according to claim 1, wherein, The parameters of the dynamic filtering process are dynamically adjusted according to the data characteristics of the input data.

10. The electronic device according to claim 1, wherein, The dynamic filtering process includes one or more of the following: moving mean filtering, median filtering, and / or dynamic low-pass filtering.

11. A power calculation device, comprising: The electronic device according to any one of claims 1 to 10 is used to process an encoded data stream obtained by quantizing and encoding the analog voltage or current of a battery using an analog modulation module, so as to obtain a digital voltage or current. A power calculation module that uses the digital voltage or current to calculate the battery's power.

12. A method for analog-to-digital conversion, comprising: Obtain the encoded data stream obtained by quantizing and encoding the input analog signal through the analog modulation module; The encoded data stream is filtered and downsampled to obtain a decimation filtering result, wherein the number of bits in the decimation filtering result is greater than the effective number of bits in the analog modulation module; The extracted filtering results are subjected to dynamic filtering processing to obtain dynamic filtering results. Dynamic temperature compensation processing is performed on the dynamic filtering results.

13. The method according to claim 12, wherein, The encoded data stream is obtained using a trigonometric integral modulator.

14. The method according to claim 12, wherein, A K-order SINC filter is used for filtering and downsampling, where K is a natural number.

15. The method according to claim 12, wherein, The number of bits in the decimation filtering result is 1 to 3 more bits than the effective number of bits in the analog modulation module.

16. The method according to claim 12, wherein, The dynamic temperature compensation process includes: performing dynamic temperature compensation on the dynamic filtering result based on the temperature range in which the current temperature is relative to one or more predetermined temperatures.

17. The method according to claim 12, wherein, The parameters of the dynamic filtering process are dynamically adjusted according to the data characteristics of the input data.

18. A method for calculating electricity consumption, comprising: Using the method according to any one of claims 12 to 17, the encoded data stream obtained by quantizing and encoding the analog voltage or current of the battery using an analog modulation module is processed to obtain digital voltage or current. The battery charge is calculated using the digital voltage or current.

19. A machine-readable program, characterized in that, When the machine-readable program is executed by a processor, it implements the method as described in any one of claims 12 to 18.

20. A machine-readable storage medium having stored thereon machine-executable instructions that, when executed, cause a processor to perform the method according to any one of claims 12 to 18.

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